Abnormality processing method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention discloses an exception handling method and device, electronic equipment and a storage medium. The method comprises the following steps: when at least one programmable device in an abnormal state exists in a target circuit board corresponding to a target processor, cutting off a power supply corresponding to the abnormal programmable device in the abnormal state; determining a first associated device in communication connection with the abnormal programmable device in the target circuit board, and controlling a first signal line between the first associated device and the first connector to be in a high-resistance state; and under the condition that an associated circuit board in communication connection with the target circuit board exists in the programmable system, sending an abnormal interrupt signal to the associated circuit board, so that an associated processor on the associated circuit board sends the abnormal interrupt signal to the target circuit board based on the received abnormal interrupt signal. And controlling a second signal line between a second associated device on the associated circuit board and the second connector to be in a high-resistance state. According to the technical scheme of the embodiment of the invention, the safety of the system is improved, and the accuracy and reliability of design verification are ensured.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of computer technology, and in particular to an exception handling method, device, electronic device, and storage medium. Background Art

[0002] Programmable devices can be used to verify the design logic in chip design. As the design scale continues to expand and become more and more complex, multiple FPGA systems are often used for system verification. Programmable devices are connected to each other through interconnection signal lines at both ends of the connector to achieve networking and interconnection.

[0003] In the prior art, when a programmable device has an abnormal situation, the hardware power supply of the abnormal programmable device is usually cut off to stop the power supply to the abnormal programmable device. However, the associated programmable devices connected to the abnormal programmable device are still in operation. The prior art does not take the situation of the associated programmable devices into consideration, resulting in the abnormal programmable device affecting the operation of other programmable devices, causing damage, causing unforeseen failures in the entire system, and affecting the accuracy and reliability of design verification. Summary of the invention

[0004] The embodiments of the present invention provide an exception handling method, an apparatus, an electronic device and a storage medium to achieve the purpose of improving the security of the system and ensuring the accuracy and reliability of design verification.

[0005] According to one aspect of the present invention, there is provided an exception handling method, which is applied to a target processor in a programmable system, comprising:

[0006] In the case that at least one programmable device in the target circuit board corresponding to the target processor is in an abnormal state, cutting off the power supply corresponding to the abnormal programmable device in the abnormal state;

[0007] Determine a first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and control a first signal line between the first associated device and a first connector to be in a high impedance state;

[0008] In the case where there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, an abnormal interrupt signal is sent to the associated circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device and the second connector on the associated circuit board to be in a high-impedance state based on the received abnormal interrupt signal.

[0009] According to another aspect of the present invention, there is provided an exception handling device, which is arranged in a target processor of a programmable system, comprising:

[0010] A power cut-off module, used for, when at least one programmable device in a target circuit board corresponding to the target processor is in an abnormal state, cutting off the power corresponding to the abnormal programmable device in the abnormal state;

[0011] A device determination module, used for determining a first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and controlling a first signal line between the first associated device and a first connector to be in a high impedance state;

[0012] A signal sending module is used to send an abnormal interrupt signal to the associated circuit board when there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device and the second connector on the associated circuit board to be in a high-impedance state based on the received abnormal interrupt signal.

[0013] According to another aspect of the present invention, there is provided an electronic device, the electronic device comprising:

[0014] at least one processor; and

[0015] a memory communicatively connected to the at least one processor; wherein,

[0016] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the exception handling method described in any embodiment of the present invention.

[0017] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the exception handling method described in any embodiment of the present invention when executed.

[0018] The technical solution of the embodiment of the present invention is to cut off the power supply corresponding to the abnormal programmable device in the abnormal state when at least one programmable device in the target circuit board corresponding to the target processor is in an abnormal state; and determine the first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and control the first signal line between the first associated device and the first connector to be in a high-impedance state; and, in the case that there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, send an abnormal interrupt signal to the associated circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device on the associated circuit board and the second connector to be in a high-impedance state based on the received abnormal interrupt signal. The technical solution of this embodiment makes the first signal line and the second signal line in a high-impedance state, so that the interior of the first associated device and the second associated device is not easily broken down, protects the internal logic of the first associated device and the second associated device, improves the security of the system, and ensures the accuracy and reliability of design verification.

[0019] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 is a flowchart of an exception handling method provided according to an embodiment of the present invention;

[0022] Figure 2 is a flowchart of another exception handling method provided according to an embodiment of the present invention;

[0023] Figure 3 is a structural schematic diagram of an exception handling device provided according to an embodiment of the present invention;

[0024] Figure 4 It is a structural schematic diagram of an electronic device for implementing the exception handling method of an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0026] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "etc." and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0027] It should be noted that the collection, collection, updating, analysis, processing, use, transmission, storage and other aspects of user personal information involved in the technical solution of this disclosure are in compliance with the provisions of relevant laws and regulations, are used for legitimate purposes, and do not violate public order and good morals. Necessary measures are taken for user personal information to prevent illegal access to user personal information data and maintain the security of user personal information and network security.

[0028] Figure 1 This is a flow chart of an exception handling method provided according to an embodiment of the present invention. This embodiment is applicable to the case of performing exception handling on an abnormal programmable device in a programmable system. The method can be executed by an exception handling device, which can be implemented in the form of hardware and / or software.

[0029] like Figure 1 As shown, the method of this embodiment is applied to a target processor in a programmable system, and may specifically include:

[0030] S110. When at least one programmable device in a target circuit board corresponding to a target processor is in an abnormal state, cut off the power supply corresponding to the abnormal programmable device in the abnormal state.

[0031] It should be noted that the programmable system can be used for design logic verification. The programmable system includes at least one programmable circuit board, each programmable circuit board includes at least one programmable device, and the programmable device can be an FPGA (Field Programmable Gate Array). Different FPGAs are connected to each other at both ends of the connector through interconnection signal lines to achieve networking and interconnection.

[0032] In actual applications, when an FPGA on any programmable circuit board is abnormal, the power supply to the abnormal FPGA is cut off. Since the associated FPGA connected to the abnormal FPGA is still running, a voltage difference is formed between the abnormal FPGA and the associated FPGA, resulting in the loss of internal logic of the associated FPGA due to voltage, and causing inaccurate design verification results.

[0033] In this embodiment, a central processing unit may be deployed on each programmable circuit board in the programmable system. The target processor may be any central processing unit in the programmable system. The programmable circuit board to which the target processor belongs is the target circuit board.

[0034] In a specific implementation, the target processor can determine the working state of the programmable device in the target circuit board. The working state includes an abnormal state and a normal state. The abnormal state includes at least one of an overcurrent abnormality, an overvoltage abnormality, an overload abnormality, an overtemperature abnormality, and an undervoltage abnormality.

[0035] In order to ensure the safety of the programmable system, the working state of the programmable device of the target circuit board in the programmable system can be determined. Optionally, the working information of the programmable device in the target circuit board can be detected by a detection device to determine the working state of the programmable device based on the working information. The working information includes at least one of current, voltage and load.

[0036] Exemplarily, a current sensor may be connected in series to the power input terminal of the programmable device to determine the working current of the programmable device. When the working current exceeds a preset current threshold, the working state of the programmable device is determined to be an abnormal state; otherwise, the working state of the programmable device is determined to be a normal state. Alternatively, a voltage detection circuit may be connected in parallel to the power input terminal of the programmable device to determine the working voltage of the programmable device. When the working voltage exceeds a preset voltage threshold, the working state of the programmable device is determined to be an abnormal state; otherwise, the working state of the programmable device is determined to be a normal state. Alternatively, the performance data corresponding to the performance indicator of the programmable device may be determined. In the case of unstable performance data, it may be determined that the programmable device is overloaded, and the working state is an abnormal state.

[0037] In a specific implementation, if it is determined that the working state of a programmable device in the target circuit board in the programmable system is abnormal, in order to ensure working safety, the power supply of the abnormal programmable device in the abnormal state can be cut off, thereby powering off the abnormal programmable device to avoid damage to the abnormal programmable device.

[0038] S120, determining a first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and controlling a first signal line between the first associated device and the first connector to be in a high-impedance state.

[0039] In order to avoid the abnormal programmable device from affecting other programmable devices, a first associated device in the target circuit board that is communicatively connected to the abnormal programmable device may be determined. It should be noted that the first associated device may be a programmable device on the target circuit board that is directly or indirectly communicatively connected to the abnormal programmable device. Exemplarily, the connection relationship between programmable devices in the target circuit board may be determined based on interconnected signal lines, so as to determine the first associated device based on the connection relationship.

[0040] In this embodiment, the specific implementation method of controlling the first signal line between the first associated device and the first connector to be in a high impedance state includes: clearing the configuration data pre-burned in the first associated device to change the first signal line between the first associated device and the first connector to a high impedance state.

[0041] In a specific implementation, the configuration data is pre-burned data for logic verification. Clearing the configuration data is to restore the data in the first associated device to an initial state. By clearing the configuration data, the first signal line between the first associated device and the first connector is changed to a high impedance state. The first signal line is an interconnection signal. By adjusting the first signal line to a high impedance state, even if a voltage difference is generated due to power failure of an abnormal programmable device, the first associated device will not be broken down within the voltage range adapted by the connector, thereby restoring the internal logic of the first associated device.

[0042] In addition, the first signal line between the first associated device and the first connector can be adjusted to a high impedance state through a three-state gate.

[0043] S130. In the case where there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, an abnormal interrupt signal is sent to the associated circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device and the second connector on the associated circuit board to be in a high-impedance state based on the received abnormal interrupt signal.

[0044] When the programmable system is a system obtained by networking multiple boards, in order to avoid other programmable boards associated with the target board being affected, resulting in board safety and stability problems, an abnormal interrupt signal may be sent to the associated board. The associated board is a programmable board that has a communication connection relationship with the target board.

[0045] In this embodiment, after the associated circuit board receives the abnormal interrupt signal, it can determine the programmable device on the associated circuit board as the second associated device, clear the pre-burned configuration data in the second associated device, so that the second signal line between the second associated device and the second connector is changed to a high-impedance state.

[0046] In a specific implementation, sending an abnormal interrupt signal to an associated circuit board includes: sending an abnormal interrupt signal to an associated circuit board through an open-drain cable in a programmable system for connecting different circuit boards; and / or sending an abnormal interrupt signal to an associated circuit board through a network broadcast.

[0047] Among them, the open-drain cable is a cable used by the circuit with the drain of the MOSFET (metal oxide semiconductor field effect transistor) as the output terminal. It allows signals to be transmitted between devices while keeping the low level valid.

[0048] In this embodiment, the abnormal interrupt signal can be transmitted through an open-drain cable. Exemplarily, a first circuit board connected to the target circuit board through an open-drain cable can be determined, and the abnormal interrupt signal is sent to the first circuit board through the open-drain cable. A second circuit board connected to the first circuit board through an open-drain cable is determined; wherein the second circuit board does not include the target circuit board. The first circuit board transmits the abnormal interrupt signal to the second circuit board through the open-drain cable. Similarly, the abnormal interrupt signal is transmitted to the third circuit board connected to the second circuit board through the second circuit board until each programmable circuit board directly or indirectly connected to the target circuit board in the programmable system receives the abnormal interrupt signal. The associated circuit boards are the first circuit board, the second circuit board, the third circuit board, and the like.

[0049] In a specific implementation, an abnormal interrupt signal may also be sent to the associated circuit board through network broadcasting. Specifically, the associated circuit board is a programmable circuit board directly or indirectly connected to the target circuit board.

[0050] This embodiment sends an abnormal interrupt signal to each associated circuit board via an open-drain cable or network broadcasting, thereby quickly and efficiently completing the transmission of the abnormal interrupt signal, avoiding the problem of slow signal reception at the remote card processing station, and facilitating response to abnormal situations.

[0051] The technical solution of the embodiment of the present invention is to cut off the power supply corresponding to the abnormal programmable device in the abnormal state when at least one programmable device in the target circuit board corresponding to the target processor is in an abnormal state; and determine the first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and control the first signal line between the first associated device and the first connector to be in a high-impedance state; and, in the case that there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, send an abnormal interrupt signal to the associated circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device on the associated circuit board and the second connector to be in a high-impedance state based on the received abnormal interrupt signal. The technical solution of this embodiment makes the first signal line and the second signal line in a high-impedance state, so that the interior of the first associated device and the second associated device is not easily broken down, protects the internal logic of the first associated device and the second associated device, improves the security of the system, and ensures the accuracy and reliability of design verification.

[0052] Figure 2 is a flowchart of another exception handling method provided according to an embodiment of the present invention. Based on the above embodiment, this embodiment further includes: upon receiving an alarm signal sent by a power management chip deployed on a target circuit board, determining that at least one programmable device on the target circuit board is in an abnormal state. The explanations of the terms that are the same or corresponding to the above embodiments are not repeated here. Figure 2 As shown, the method includes:

[0053] S210: Upon receiving an alarm signal sent by a power management chip deployed on a target circuit board, determine that at least one programmable device on the target circuit board is in an abnormal state.

[0054] The abnormal state includes at least one of an overcurrent abnormality, an overvoltage abnormality, an overload abnormality, an overtemperature abnormality and an undervoltage abnormality.

[0055] It should be noted that each programmable device on each programmable circuit board is configured with a corresponding power management chip, and the power management chip can detect the working state of the programmable device, for example, the working current state, the working voltage state and the load.

[0056] Optionally, the programmable device can be detected by a power management chip. Exemplarily, the programmable device can be detected periodically or in real time. When the working state of the programmable device is detected to be abnormal, the power management chip generates an alarm signal and sends the alarm signal to the target processor. After the target processor receives the alarm signal, it indicates that at least one programmable device on the target circuit board is in an abnormal state.

[0057] In this embodiment, the working state of the programmable device is determined by the power management chip, so that when an abnormality is found, the target processor can be notified by an alarm signal in time, so as to facilitate timely and rapid determination of the abnormal programmable device.

[0058] S220. When at least one programmable device in the target circuit board corresponding to the target processor is in an abnormal state, cut off the power supply corresponding to the abnormal programmable device in the abnormal state.

[0059] Optionally, each programmable device corresponds to a power management chip, and the specific implementation method of cutting off the power corresponding to the abnormal programmable device in an abnormal state may be: treating the programmable device corresponding to the alarm power management chip that sends the alarm signal as an abnormal programmable device, and cutting off the power corresponding to the abnormal programmable device.

[0060] In this embodiment, the correspondence between the programmable device and the power management chip can be predetermined. Specifically, the correspondence between the power management chip and the programmable device can be determined based on the connection relationship between the programmable device and the power management chip when the target circuit board is deployed. In a specific implementation, based on the correspondence between the power management chip and the programmable device, the programmable device corresponding to the power management chip that sends the alarm signal is determined as an abnormal programmable device. The number of abnormal programmable devices can be one or more. In order to ensure the safety of the programmable device, the power supply corresponding to each abnormal programmable device can be cut off.

[0061] S230: Determine a first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and control a first signal line between the first associated device and the first connector to be in a high-impedance state.

[0062] S240. In the case where there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, an abnormal interrupt signal is sent to the associated circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device and the second connector on the associated circuit board to be in a high-impedance state based on the received abnormal interrupt signal.

[0063] In this embodiment, after controlling the second signal line between the second associated device on the associated circuit board and the second connector to be in a high impedance state, it also includes: adjusting the first associated device, the second associated device and the abnormal programmable device to be in a configuration disabled state.

[0064] It should be noted that in order to prevent the programmable device in the programmable system from being reconfigured and being damaged again due to unresolved abnormalities, after adjusting the second signal line to a high impedance state, the first associated device, the second associated device and the abnormal programmable device can be adjusted to a configuration disabled state. The configuration disabled state is a state in which the abnormal programmable device cannot be reconfigured.

[0065] Specifically, the method of adjusting the first associated device, the second associated device and the abnormal programmable device to be in a configuration disabled state may include: adjusting the identifier corresponding to the pre-set download configuration item to a non-downloadable identifier; or disconnecting the communication connection between the first associated device, the second associated device and the abnormal programmable device and the download tool.

[0066] Furthermore, after the abnormality of the abnormal programmable device is resolved, the programmable system may be powered on again, and after detecting that the programmable system is powered on again, the first associated device, the second associated device and the abnormal programmable device may be adjusted to a configurable state.

[0067] This embodiment adjusts the first associated device, the second associated device and the abnormal programmable device to a configuration disabled state, thereby avoiding secondary damage caused by secondary configuration of the programmable device in an abnormal state, which is beneficial to improving the security and stability of the programmable system.

[0068] In order to facilitate the staff to discover abnormal situations in time, optionally, after cutting off the power supply corresponding to the abnormal programmable device in the abnormal state, it also includes: determining the current display mode of the status light deployed on the target circuit board based on the correspondence between the preset display mode and the working state, and the abnormal state; controlling the status light to work according to the current display mode to prompt the existence of an abnormality on the target circuit board; recording the abnormal information corresponding to the abnormal programmable device in the log, and storing the log recording the abnormal information.

[0069] The display mode includes at least one of flashing display at a preset frequency, constant light display with a preset color, and no light display. The status light may be a light emitting diode.

[0070] In this embodiment, the corresponding relationship between different working states and display modes can be preset. For example, for a normal working state, the status light may not be on. For an abnormal state, different display modes may be corresponding to different types of abnormalities. For example, a voltage abnormality may be displayed by flashing at a preset frequency, and a current abnormality may be displayed by a preset color light that is always on. The preset colors may include red and green, etc.

[0071] In a specific implementation, the display mode corresponding to the abnormal state of the abnormal programmable device can be determined as the current display mode, and the status light can be controlled to display according to the current display mode, thereby prompting that there is an abnormality on the target circuit board, and the type of abnormality on the target circuit board can be determined through the current display mode of the status light.

[0072] Furthermore, in order to analyze the abnormality after the staff finds the abnormality, the abnormal information corresponding to the abnormal programmable device can be recorded in the log. Specifically, the abnormal information includes the type of abnormal state, the time when the abnormality occurred, and the identification of the abnormal programmable device. By storing the log recording the abnormal information, it is convenient for the staff to trace and view it.

[0073] This embodiment can quickly identify the abnormality of the programmable device, cut off the power supply of the abnormal programmable device in time when the abnormality occurs, and clearly understand the configuration data of each first-related device and the second-related device, so as to avoid the programmable device from being broken down and causing losses; and through the status light and log, it is convenient for the staff to quickly locate the problem; the entire abnormality handling process does not require human participation, reducing the waste of human resources.

[0074] Figure 3 1 is a schematic diagram of the structure of an exception handling device provided according to an embodiment of the present invention, and the device is used to execute the exception handling method provided in any of the above embodiments. The device and the exception handling method of the above embodiments belong to the same inventive concept, and the details not described in detail in the embodiments of the exception handling device can refer to the embodiments of the above exception handling method. Figure 3 As shown, the device is arranged in a target processor of a programmable system, and includes:

[0075] The power cut-off module 10 is used to cut off the power corresponding to the abnormal programmable device in the abnormal state when at least one programmable device in the target circuit board corresponding to the target processor is in an abnormal state;

[0076] The device determination module 11 is used to determine a first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and control a first signal line between the first associated device and the first connector to be in a high impedance state;

[0077] The signal sending module 12 is used to send an abnormal interrupt signal to the associated circuit board when there is an associated circuit board that is communicatively connected to the target circuit board in the programmable system, so that the associated processor on the associated circuit board controls the second signal line between the second associated device and the second connector on the associated circuit board to be in a high-impedance state based on the received abnormal interrupt signal.

[0078] Based on any optional technical solution in the embodiments of the present invention, optionally, the device further includes:

[0079] A state determination module is used to determine that at least one programmable device on the target circuit board is in an abnormal state before cutting off the power supply corresponding to the abnormal programmable device in the abnormal state, upon receiving an alarm signal sent by a power management chip deployed on the target circuit board;

[0080] The abnormal state includes at least one of an overcurrent abnormality, an overvoltage abnormality, an overload abnormality, an overtemperature abnormality and an undervoltage abnormality.

[0081] Based on any optional technical solution in the embodiment of the present invention, optionally, the power cut-off module 10 includes:

[0082] The power cut-off unit is used to treat the programmable device corresponding to the alarm power management chip that sends the alarm signal as an abnormal programmable device and cut off the power corresponding to the abnormal programmable device.

[0083] Based on any optional technical solution in the embodiment of the present invention, optionally, the signal sending module 12 includes:

[0084] A first abnormal interrupt signal sending unit is used to send an abnormal interrupt signal to an associated circuit board through an open-drain cable used to connect different circuit boards in a programmable system; and / or,

[0085] The second abnormal interrupt signal sending unit is used to send an abnormal interrupt signal to the associated circuit board through network broadcasting.

[0086] Based on any optional technical solution in the embodiment of the present invention, optionally, the device determination module 11 includes:

[0087] The configuration data clearing unit is used to clear the configuration data pre-burned in the first associated device, so that the first signal line between the first associated device and the first connector is changed to a high impedance state.

[0088] Based on any optional technical solution in the embodiments of the present invention, optionally, the device further includes:

[0089] The configuration disabled state adjustment module is used to adjust the first associated device, the second associated device and the abnormal programmable device to be in a configuration disabled state after the second signal line between the device and the second connector is in a high impedance state.

[0090] Based on any optional technical solution in the embodiments of the present invention, optionally, the device further includes:

[0091] A current display mode determination module is used to determine the current display mode of the status light deployed on the target circuit board based on the correspondence between the preset display mode and the working state, and the abnormal state, after cutting off the power supply corresponding to the abnormal programmable device in the abnormal state;

[0092] A status light control module is used to control the status light to work according to the current display mode to prompt that there is an abnormality on the target circuit board;

[0093] The abnormal information recording module is used to record the abnormal information corresponding to the abnormal programmable device in the log and store the log recording the abnormal information;

[0094] The display mode includes at least one of flashing display at a preset frequency, constant light display with a preset light color, and off display.

[0095] The technical solution of the embodiment of the present invention is to cut off the power supply corresponding to the abnormal programmable device in the abnormal state when at least one programmable device in the target circuit board corresponding to the target processor is in an abnormal state; and determine the first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and control the first signal line between the first associated device and the first connector to be in a high-impedance state; and, in the case that there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, send an abnormal interrupt signal to the associated circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device on the associated circuit board and the second connector to be in a high-impedance state based on the received abnormal interrupt signal. The technical solution of this embodiment makes the first signal line and the second signal line in a high-impedance state, so that the interior of the first associated device and the second associated device is not easily broken down, protects the internal logic of the first associated device and the second associated device, improves the security of the system, and ensures the accuracy and reliability of design verification.

[0096] It is worth noting that in the embodiment of the above-mentioned exception handling device, the various units and modules included are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be achieved; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention.

[0097] Figure 4It is a structural diagram of an electronic device that implements the exception handling method of an embodiment of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are only examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0098] like Figure 4 As shown, the electronic device 20 includes at least one processor 21, and a memory connected to the at least one processor 21, such as a read-only memory (ROM) 22, a random access memory (RAM) 23, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 21 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 22 or the computer program loaded from the storage unit 28 to the random access memory (RAM) 23. In RAM23, various programs and data required for the operation of the electronic device 20 can also be stored. The processor 21, ROM22 and RAM23 are connected to each other through a bus 24. An input / output (I / O) interface 25 is also connected to the bus 24.

[0099] A number of components in the electronic device 20 are connected to the I / O interface 25, including: an input unit 26, such as a keyboard, a mouse, etc.; an output unit 27, such as various types of displays, speakers, etc.; a storage unit 28, such as a disk, an optical disk, etc.; and a communication unit 29, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 29 allows the electronic device 20 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0100] The processor 21 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 21 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The processor 21 executes the various methods and processes described above, such as an exception handling method.

[0101] In some embodiments, the exception handling method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 28. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 20 via the ROM 22 and / or the communication unit 29. When the computer program is loaded into the RAM 23 and executed by the processor 21, one or more steps of the exception handling method described above may be performed. Alternatively, in other embodiments, the processor 21 may be configured to perform the exception handling method in any other appropriate manner (e.g., by means of firmware).

[0102] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0103] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0104] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0105] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0106] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0107] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0108] This embodiment also provides a computer program product, including a computer program, which, when executed by a processor, implements the exception handling method provided in any embodiment of the present application.

[0109] In the process of implementation, the computer program product can be written in one or more programming languages ​​or a combination thereof to perform the computer program code of the present invention, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (for example, using an Internet service provider to connect through the Internet).

[0110] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0111] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. An exception handling method, characterized in that: Target processors for programmable systems, including: In the case that at least one programmable device in the target circuit board corresponding to the target processor is in an abnormal state, cutting off the power supply corresponding to the abnormal programmable device in the abnormal state; Determine a first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and control a first signal line between the first associated device and a first connector to be in a high impedance state; In the case where there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, an abnormal interrupt signal is sent to the associated circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device and the second connector on the associated circuit board to be in a high-impedance state based on the received abnormal interrupt signal.

2. The method according to claim 1, characterized in that: Before cutting off the power supply corresponding to the abnormal programmable device in the abnormal state, the method further includes: Upon receiving an alarm signal sent by a power management chip deployed on the target circuit board, determining that at least one programmable device on the target circuit board is in an abnormal state; The abnormal state includes at least one of an overcurrent abnormality, an overvoltage abnormality, an overload abnormality, an overtemperature abnormality and an undervoltage abnormality.

3. The method according to claim 2, characterized in that Each programmable device corresponds to a power management chip, and the step of cutting off the power corresponding to the abnormal programmable device in the abnormal state includes: The programmable device corresponding to the alarm power management chip that sends the alarm signal is regarded as an abnormal programmable device, and the power supply corresponding to the abnormal programmable device is cut off.

4. The method according to claim 1, characterized in that The sending of an abnormal interrupt signal to the associated circuit board includes: Sending an abnormal interrupt signal to the associated circuit board through an open-drain cable used to connect different circuit boards in the programmable system; and / or, An abnormal interrupt signal is sent to the associated circuit board through network broadcasting.

5. The method according to claim 1, characterized in that The controlling the first signal line between the first associated device and the first connector to be in a high impedance state includes: The configuration data pre-burned in the first associated device is cleared, so that the first signal line between the first associated device and the first connector is changed to the high-impedance state.

6. The method according to claim 1, characterized in that After controlling the second signal line between the second associated component on the associated circuit board and the second connector to be in a high impedance state, the method further includes: The first associated device, the second associated device and the abnormal programmable device are all adjusted to be in a configuration disabled state.

7. The method according to claim 1, characterized in that After cutting off the power supply corresponding to the abnormal programmable device in the abnormal state, the method further includes: Based on the correspondence between the preset display mode and the working state, and the abnormal state, determine the current display mode of the status light deployed on the target circuit board; Controlling the status light to operate according to the current display mode to indicate that an abnormality exists on the target circuit board; Recording the abnormal information corresponding to the abnormal programmable device in a log, and storing the log recording the abnormal information; The display mode includes at least one of flashing display at a preset frequency, constant light display with a preset light color, and off display.

8. An exception handling device, characterized in that: A target processor provided in a programmable system, comprising: A power cut-off module, used for, when at least one programmable device in a target circuit board corresponding to the target processor is in an abnormal state, cutting off the power corresponding to the abnormal programmable device in the abnormal state; A device determination module, used for determining a first associated device in the target circuit board that is communicatively connected to the abnormal programmable device, and controlling a first signal line between the first associated device and a first connector to be in a high impedance state; A signal sending module is used to send an abnormal interrupt signal to the associated circuit board when there is an associated circuit board in the programmable system that is communicatively connected to the target circuit board, so that the associated processor on the associated circuit board controls the second signal line between the second associated device and the second connector on the associated circuit board to be in a high-impedance state based on the received abnormal interrupt signal.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the exception handling method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the exception handling method according to any one of claims 1 to 7 when executed.

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