Task scheduling method, chip and storage medium

By obtaining the requirements information of the calculation task, assigning the target calculation unit and constructing a descriptor list, the problem of low execution efficiency of calculation tasks in the prior art is solved and the execution efficiency of the calculation task is improved.

CN119883533APending Publication Date: 2025-04-25SOPHGO TECH LTD
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Patent Information

Application Number
CN202411742373.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-29
Publication Date
2025-04-25

AI Technical Summary

Technical Problem

In the prior art, the computing tasks of neural network models adopt serial scheduling, resulting in low execution efficiency of computing tasks.

Method used

By obtaining the demand information of multiple computing tasks, including the type and quantity information of the calculation units, the target computing unit is allocated from the multiple computing units, and a descriptor link list is constructed, sent to the target computing unit for processing, and the descriptor link list is updated according to the processing results.

Benefits of technology

The utilization rate of the target computing unit is improved and the execution efficiency of the computing tasks corresponding to multiple descriptors is improved.

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Abstract

The embodiment of the invention provides a task scheduling method, a chip and a storage medium. The method comprises the following steps: acquiring demand information of a plurality of calculation tasks, wherein the demand information comprises type information and quantity information of calculation units required by each calculation task; according to the type information and the quantity information of the calculation units required by each calculation task, distributing at least one target calculation unit for the plurality of calculation tasks from the plurality of calculation units; constructing at least one descriptor chain table according to the at least one target computing unit, wherein each descriptor chain table comprises descriptors of different computing tasks which are connected in sequence; and sending each descriptor chain table to a corresponding target calculation unit for processing, and updating at least one descriptor chain table according to a processing result returned by each calculation unit. According to the technical scheme, the execution efficiency of the multiple calculation tasks can be improved.
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Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a task scheduling method, a chip and a storage medium. Background Art

[0002] In the related art, the computing tasks of the neural network model are serially scheduled, and the context of each computing task is independent and isolated. For example, the computing task of the next neural network model can only be executed after the computing task of the previous neural network model is completed. In one computing task, there is no way to know the information of the next computing task to be executed. Therefore, for multiple computing tasks, its scheduling method leads to low execution efficiency of computing tasks. Summary of the invention

[0003] The embodiments of the present application provide a task scheduling method, a chip, and a storage medium, aiming to solve the problem of low execution efficiency of current computing tasks.

[0004] In a first aspect, an embodiment of the present application provides a task scheduling method, including:

[0005] Acquire demand information of multiple computing tasks, wherein the demand information includes type information and quantity information of computing units required for each of the computing tasks;

[0006] Allocate at least one target computing unit to the plurality of computing tasks from a plurality of computing units according to the type information and quantity information of the computing units required for each of the computing tasks;

[0007] Constructing at least one descriptor linked list according to the at least one target computing unit, each of the descriptor linked lists comprising descriptors of different computing tasks connected in sequence;

[0008] Each of the descriptor linked lists is sent to the corresponding target computing unit for processing, and the at least one descriptor linked list is updated according to the processing results returned by each of the computing units.

[0009] In a second aspect, an embodiment of the present application also provides a task scheduling chip, which includes a processor, a memory, a computer program stored in the memory and executable by the processor, and a data bus for realizing connection and communication between the processor and the memory, wherein when the computer program is executed by the processor, any task scheduling method provided in the embodiment of the present application is implemented.

[0010] In a third aspect, an embodiment of the present application also provides a storage medium for computer-readable storage, characterized in that the storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement any task scheduling method provided in the embodiment of the present application.

[0011] The embodiment of the present application provides a task scheduling method, chip and storage medium. The embodiment of the present application obtains the demand information of multiple computing tasks, and the demand information includes the type information and quantity information of the computing units required for each computing task; according to the type information and quantity information of the computing units required for each computing task, at least one target computing unit is allocated to multiple computing tasks from multiple computing units; at least one descriptor chain list is constructed according to at least one target computing unit, and each descriptor chain list includes descriptors of different computing tasks connected in sequence; each descriptor chain list is sent to the corresponding target computing unit for processing, and at least one descriptor chain list is updated according to the processing results returned by each computing unit. Through the task scheduling method provided by the embodiment of the present application, the descriptor chain list can be uniformly constructed and updated, and the synchronization and collaboration problems between the target computing units can be solved at a lower cost, and the target computing unit can be allowed to obtain multiple descriptors in the corresponding descriptor chain list, so as to improve the utilization rate of the target computing unit, and then improve the execution efficiency of the computing tasks corresponding to the multiple descriptors. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A schematic diagram of the steps of a task scheduling method provided in an embodiment of the present application;

[0013] Figure 2 A schematic diagram of a data format of a descriptor provided in an embodiment of the present application;

[0014] Figure 3 A schematic diagram of multiple descriptor linked lists and multiple target computing units provided in an embodiment of the present application;

[0015] Figure 4 A schematic diagram of a descriptor linked list and a target computing unit provided in an embodiment of the present application;

[0016] Figure 5 A schematic diagram of another descriptor linked list and another target computing unit provided in an embodiment of the present application;

[0017] Figure 6 A schematic diagram of a descriptor linked list and multiple target computing units provided in an embodiment of the present application;

[0018] Figure 7 A schematic diagram of another descriptor linked list and multiple target computing units provided in an embodiment of the present application;

[0019] Figure 8 A schematic block diagram of a task scheduling chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0021] The flowcharts shown in the accompanying drawings are only examples and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, combined or partially merged, so the actual execution order may change according to actual conditions.

[0022] It should be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the application. As used in this application specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0023] In the traditional computing unit scheduling method, the operating system scheduler selects computing tasks for each computing unit and switches the computing unit between different computing tasks through context switching technology. In the computing unit scheduling process, the context of each computing task is independent and isolated, so that when the computing unit is in a computing task, it has no way of knowing the information of the next computing task to be executed. As a result, during the switching process of computing-intensive computing tasks, floating-point, matrix and other computing units are idle for a long time, resulting in low execution efficiency of computing tasks.

[0024] Based on this, an embodiment of the present application provides a task scheduling method, a chip, and a storage medium. Among them, the task scheduling method can be applied to a task scheduling chip, and the task scheduling chip may include a task scheduling unit, which may be a centralized global scheduler for constructing and updating a descriptor linked list. The task scheduling chip may also include multiple computing units, one of which is used as a centralized global scheduler for constructing and updating a descriptor linked list, and the other computing units are used to execute computing tasks corresponding to multiple descriptors in the descriptor linked list.

[0025] For example, a task scheduling chip may include a central processing unit and multiple dedicated processing units, where the central processing unit can serve as a centralized global scheduler. Each dedicated processing unit may include logic operators such as adders and multipliers to perform computing tasks such as floating-point operations, matrix operations, and parallel computing.

[0026] For example, task scheduling chips can be homogeneous multi-core chips and heterogeneous multi-core chips. Homogeneous multi-core chips refer to chips with multiple cores of the same structure, while heterogeneous multi-core chips refer to chips with multiple cores of different structures. One core in a multi-core chip can be used as a centralized global scheduler, and other cores in the multi-core chip can be used to execute computing tasks.

[0027] In some embodiments, the task scheduling method can also be applied to a computer device, which includes a server or a terminal device, and the terminal device can be an electronic device such as a mobile phone, a tablet computer, a laptop computer, a desktop computer, a personal digital assistant, and a wearable device. It is understandable that the computer device can include at least one task scheduling chip as shown in the embodiments of the present application.

[0028] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0029] Please refer to Figure 1 , Figure 1 A schematic diagram of the steps of a task scheduling method provided in an embodiment of the present application.

[0030] like Figure 1 As shown, the task scheduling method includes steps S101 to S104.

[0031] Step S101: Obtain demand information of multiple computing tasks, where the demand information includes type information and quantity information of computing units required for each computing task.

[0032] The computing tasks may include data processing, algorithm operation, business logic execution, etc., such as data handling tasks, data computing tasks, synchronization tasks, etc. The type information of the computing unit may refer to the type of computing task performed by the computing unit, and the type information of the computing unit may include data processing unit, algorithm operation unit, business logic execution unit, etc.

[0033] It is understandable that the type information and quantity information of computing units required for different computing tasks are different. Taking the computing task as a data handling task as an example, the computing task, for example, requires two computing units that can perform data handling processing. Taking the computing task as a data computing task as an example, the computing task, for example, requires one computing unit that can perform floating-point operations and two computing units that can perform matrix operations. Taking the computing task as a synchronization task as an example, the computing task, for example, requires three computing units that can coordinate and perform data synchronization between multiple threads.

[0034] In one embodiment, multiple computing tasks may be obtained through different application software, and each application software may generate different types of computing tasks. Multiple computing tasks may be obtained through one or more neural network models, and different neural network models or different levels of neural network models may generate different types of computing tasks.

[0035] Step S102: Allocate at least one target computing unit from a plurality of computing units to a plurality of computing tasks according to the type information and quantity information of the computing units required for each computing task.

[0036] It should be noted that the multiple computing units may include computing units for performing different types of computing tasks, such as computing units for performing data processing, algorithm calculations, business logic execution and other types of computing tasks, and there may be multiple computing units for performing different types of computing tasks.

[0037] It should be noted that in the process of allocating at least one target computing unit to multiple computing tasks from multiple computing units, each target computing unit can correspond to one or more computing tasks, and different target computing units can correspond to the same computing task, that is, the same computing task can correspond to different target computing units.

[0038] Exemplarily, the type information of the computing unit required for computing task A is a data processing unit, and the number information of the computing units required for computing task A is 2. Then, based on the type information and number information of the computing units required for computing task A, it is necessary to allocate 2 data processing units for executing data processing tasks from multiple computing units as target computing units for multiple computing tasks A.

[0039] In one embodiment, a computing unit in an idle state is determined from a plurality of computing units; and at least one target computing unit is allocated to the plurality of computing tasks from the computing units in the idle state according to type information of the computing unit in the idle state and requirement information of the plurality of computing tasks. The type information of the at least one target computing unit allocated to the plurality of computing tasks matches the type information and quantity information of the computing units required for each computing task.

[0040] In one embodiment, the multiple computing tasks are divided into multiple task queues according to description information of the multiple computing tasks; and at least one target computing unit is allocated to each task queue from multiple computing units according to demand information of at least one computing task in each task queue.

[0041] The description information of the computing task may include the data source of the computing task, such as representing which application the computing task comes from, or representing which model the computing task comes from, or representing which model level the computing task comes from.

[0042] It should be noted that when allocating at least one target computing unit to multiple computing tasks, the allocation can be made according to the task queue, so that different target computing units can perform parallel calculations or fast serial calculations on the computing tasks in each task queue, thereby reducing the idle time of the target computing unit and greatly improving the execution efficiency of the computing tasks.

[0043] Step S103: construct at least one descriptor linked list according to at least one target computing unit, each descriptor linked list includes descriptors of different computing tasks connected in sequence.

[0044] The number of target computing units may be one or more, each target computing unit is allocated with at least one descriptor linked list, and the descriptor linked lists allocated to different target computing units may be the same or different. In other words, the target computing units corresponding to the same descriptor linked list may be one or more. Each descriptor linked list may include descriptors of different computing tasks, and the descriptors of different computing tasks may be connected in sequence.

[0045] By constructing at least one descriptor linked list for at least one target computing unit, the synchronization and collaboration problems between the target computing units can be solved at a lower cost, and the target computing unit can be allowed to obtain multiple descriptors in the corresponding descriptor linked list, thereby improving the utilization rate of the target computing unit.

[0046] In one embodiment, the execution order between different computing tasks assigned to each target computing unit is determined, and the descriptors of the different computing tasks assigned to each target computing unit are determined; according to the execution order between the different computing tasks assigned to each target computing unit, the descriptors of the different computing tasks assigned to each target computing unit are connected in sequence to generate a descriptor linked list corresponding to each target computing unit.

[0047] Among them, the descriptor of the computing task includes one or more of the following data: the identifier of the computing task, the address of the computing task, the address of the next descriptor, the execution permission of the computing task, the type of computing task, and the execution result of the computing task. The execution order between different computing tasks can be determined based on the dependency or logical relationship between different computing tasks. It should be noted that the descriptor linked list constructed by the task scheduling chip may include descriptors of different computing tasks connected in sequence, but may not include specific computing tasks. Each target computing unit can determine the corresponding computing task or obtain the corresponding data to be executed based on the identifier of the computing task or the address of the computing task in each descriptor.

[0048] For example, Figure 2 As shown, the descriptor of the computing task may include data such as the identifier 11 of the computing task, the address 12 of the computing task, the address 13 of the next descriptor, the execution permission 14 of the computing task, the type 15 of the computing task, and the execution result 16 of the computing task. Among them, the address 12 of the computing task and the address 13 of the next descriptor may be the storage address of the shared memory space, and each computing unit may obtain the corresponding data through the storage address of the shared memory space. The address 12 of the computing task may be used to obtain the corresponding computing task or the corresponding data. The address 13 of the next descriptor may be used to obtain the next descriptor, and the data format of the next descriptor may be the same. The execution permission 14 of the computing task may be used to inform each target computing unit whether the computing task corresponding to the descriptor is executable, and the type 15 of the computing task may be used to inform each target computing unit of the type of the computing task corresponding to the descriptor, so as to facilitate each target computing unit to check whether the computing task corresponding to the descriptor can be executed. The execution result 16 of the computing task may be used to record whether the computing task corresponding to the descriptor is executed or whether it is executed successfully.

[0049] In one embodiment, different computing tasks assigned to each target computing unit are determined; the execution order between the different computing tasks assigned to each target computing unit is determined based on the dependency relationship between the different computing tasks assigned to each target computing unit; and a descriptor linked list corresponding to each target computing unit is generated according to the execution order between the different computing tasks assigned to each target computing unit.

[0050] Among them, different computing tasks assigned to each target computing unit can be from the same data source, so that at least one target computing unit can process different computing tasks from the same data source. For example, multiple computing tasks assigned to a target computing unit can be from the same application, or from the same model, or from the same model level of the same model, etc. There can be dependencies between different computing tasks. For example, there is an execution logic relationship between multiple computing tasks, and one computing task must be executed before another computing task can be executed.

[0051] For example, Figure 3 As shown, at least one target computing unit includes target computing unit 1, target computing unit 2, ..., target computing unit k, and at least one constructed descriptor chain list includes descriptor chain list 1, ..., descriptor chain list m, and each descriptor chain list may include descriptor 1, descriptor 2, ..., descriptor n. Among them, k, n and m can all be positive integers greater than 1, k and m can be unequal, and the content and quantity of each descriptor in different descriptor chain lists can be different.

[0052] For example, descriptor linked list 1 may include descriptors of five computing tasks connected in sequence, and these five computing tasks require one computing unit capable of performing floating-point operations and two computing units capable of performing matrix operations. Furthermore, descriptor linked list 1 needs to be sent to target computing unit 1 and target computing unit 2 respectively, where target computing unit 1 can perform floating-point operations and matrix operations, and target computing unit 2 can perform matrix operations. Target computing unit 1 processes descriptors 1 and 2 in descriptor linked list 1. Target computing unit 2 also needs to process descriptor 2 in descriptor linked list 1.

[0053] Step S104: Send each descriptor linked list to the corresponding target computing unit for processing, and update at least one descriptor linked list according to the processing results returned by each computing unit.

[0054] Each descriptor linked list is sent to a corresponding target computing unit so that each target computing unit can perform corresponding processing on a computing task corresponding to at least one descriptor in the received descriptor linked list. Furthermore, after each target computing unit performs corresponding processing on a computing task corresponding to at least one descriptor in the received descriptor linked list, the processing result is returned to the task scheduling chip so that the task scheduling chip updates at least one descriptor linked list according to the processing result returned by each computing unit.

[0055] Through the task scheduling method provided in the embodiment of the present application, the descriptor linked list can be uniformly constructed and updated, so as to solve the synchronization and collaboration problems between the target computing units at a lower cost, and allow the target computing unit to obtain multiple descriptors in the corresponding descriptor linked list, thereby improving the utilization rate of the target computing unit and further improving the execution efficiency of the computing tasks corresponding to multiple descriptors.

[0056] In one embodiment, at least one of the target computing units includes multiple computing sub-units; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending the corresponding descriptor linked list to multiple computing sub-units, so that each computing sub-unit performs the computing tasks corresponding to different descriptors in the corresponding descriptor linked list.

[0057] It should be noted that each computing unit may include multiple computing subunits. When there is at least one target computing unit, at least one of which includes multiple computing subunits, the corresponding descriptor linked list can be sent to the multiple computing subunits of the at least one target computing unit, so that each computing subunit performs the computing tasks corresponding to different descriptors in the corresponding descriptor linked list, which can reduce the idle time of the multiple computing subunits of the at least one target computing unit, thereby improving the utilization rate of the target computing unit, thereby improving the execution efficiency of the computing tasks corresponding to the multiple descriptors.

[0058] For example, Figure 4 As shown, the descriptor linked list 1 is sent to the corresponding target computing unit 1 for processing. Among them, the descriptor linked list 1 includes descriptors 1, descriptors 2, descriptors 3 and descriptors 4. The target computing unit 1 includes computing subunit 1, computing subunit 2 and computing subunit 3. The computing subunit 1, computing subunit 2 and computing subunit 3 are used to execute the computing tasks corresponding to descriptors 1, descriptors 2 and descriptors 3 respectively, so the utilization rate of the target computing unit 1 can be improved, thereby improving the execution efficiency of the computing tasks corresponding to descriptors 1, descriptors 2 and descriptors 3.

[0059] In one embodiment, at least one of the target computing units includes multiple computing sub-units; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending the corresponding descriptor linked list to multiple computing sub-units so that each computing sub-unit executes different sub-tasks in the computing task corresponding to the same descriptor in the corresponding descriptor linked list.

[0060] It should be noted that the multiple computing subunits in each computing unit can be of the same type. When there is at least one target computing unit, at least one of which includes multiple computing subunits, the corresponding descriptor linked list can be sent to the multiple computing subunits of the at least one target computing unit, so that each computing subunit executes a different subtask in the computing task corresponding to the same descriptor, which can reduce the idle time of the multiple computing subunits of the at least one target computing unit, thereby improving the utilization rate of the target computing unit, thereby improving the execution efficiency of the computing tasks corresponding to the multiple descriptors.

[0061] For example, Figure 5As shown, the descriptor linked list 2 is sent to the corresponding target computing unit 2 for processing. Among them, the descriptor linked list 2 includes descriptors 1, descriptor 2 and descriptor 3. The target computing unit 2 includes computing subunit 1 and computing subunit 2. The computing subunit 1 and computing subunit 2 are both used to execute the computing task corresponding to the descriptor 1 in the descriptor linked list 2, wherein the computing task corresponding to the descriptor 1 can be divided into a first subtask and a second subtask. Based on this, the computing subunit 1 can be assigned to execute the first subtask corresponding to the descriptor 1 in the descriptor linked list 2, and the computing subunit 2 can be assigned to execute the second subtask corresponding to the descriptor 1 in the descriptor linked list 2. Therefore, the utilization rate of the target computing unit 2 can be improved, thereby improving the execution efficiency of the computing task corresponding to the descriptor 1.

[0062] In one embodiment, at least one of the target computing units includes multiple computing sub-units; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending the corresponding descriptor linked list to multiple computing sub-units so that each computing sub-unit executes a computing task corresponding to a different descriptor in the corresponding descriptor linked list; and sending the corresponding descriptor linked list to multiple computing sub-units so that each computing sub-unit executes a different sub-task in the computing task corresponding to the same descriptor in the corresponding descriptor linked list.

[0063] That is to say, in the scenario where at least one of the target computing units includes multiple computing subunits, in the process of sending each descriptor linked list to the corresponding target computing unit for processing, each computing subunit can be made to perform computing tasks corresponding to different descriptors in the corresponding descriptor linked list, and each computing subunit can be made to perform different subtasks in the computing task corresponding to the same descriptor in the corresponding descriptor linked list. Therefore, the utilization rate of each target computing unit can be improved, thereby improving the execution efficiency of the computing tasks corresponding to each descriptor.

[0064] For example, Figure 4 and Figure 5 As shown, descriptor linked list 1 is sent to the corresponding target computing unit 1 for processing, and descriptor linked list 2 is sent to the corresponding target computing unit 2 for processing. The computing subunit 1, computing subunit 2 and computing subunit 3 in the target computing unit 1 are respectively used to execute the computing tasks corresponding to the descriptors 1, 2 and 3 in the descriptor linked list 1. The computing subunit 1 in the target computing unit 2 is used to execute the first subtask corresponding to the descriptor 1 in the descriptor linked list 2, and the computing subunit 2 in the target computing unit 2 is used to execute the second subtask corresponding to the descriptor 1 in the descriptor linked list 2. Therefore, the utilization rate of the target computing unit 1 and the target computing unit 2 can be improved, thereby improving the execution efficiency of the computing tasks corresponding to the descriptors in the descriptor linked list 1 and the descriptor linked list 2.

[0065] In one embodiment, the number of target computing units is at least two, and the descriptor linked lists corresponding to at least two target computing units are the same; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending the same descriptor linked list to the corresponding at least two target computing units, so that the at least two target computing units execute computing tasks corresponding to different descriptors in the same descriptor linked list.

[0066] For example, Figure 6 As shown, the descriptor linked list 3 is sent to the corresponding target computing unit 3 and the target computing unit 4 for processing. Among them, the descriptor linked list 3 includes descriptors 1, 2 and 3. The target computing unit 3 is used to execute the computing task corresponding to the descriptor 2 in the descriptor linked list 3, and the target computing unit 4 is used to execute the computing task corresponding to the descriptor 1 in the descriptor linked list 3. Since the computing tasks corresponding to the descriptors 1 and 2 in the descriptor linked list 3 can be processed by synchronous threads, the execution efficiency of the computing tasks corresponding to the descriptors 1 and 2 in the descriptor linked list 3 can be improved.

[0067] In one embodiment, the number of target computing units is at least two, and the descriptor linked lists corresponding to at least two target computing units are the same; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending the same descriptor linked list to the corresponding at least two target computing units, so that the at least two target computing units execute different subtasks in the computing task corresponding to the same descriptor in the same descriptor linked list.

[0068] For example, Figure 6 As shown, the descriptor linked list 3 is sent to the corresponding target computing unit 3 and target computing unit 4 for processing. Wherein, the descriptor linked list 3 includes descriptors 1, descriptor 2 and descriptor 3. The target computing unit 3 is used to execute the computing task corresponding to the descriptor 2 in the descriptor linked list 3, and the target computing unit 4 is used to execute the computing task corresponding to the descriptor 2 in the descriptor linked list 3. Wherein the computing task corresponding to the descriptor 2 can be divided into a first subtask and a second subtask. Based on this, the target computing unit 3 can be assigned to execute the first subtask corresponding to the descriptor 2 in the descriptor linked list 3, and the target computing unit 4 can be assigned to execute the second subtask corresponding to the descriptor 2 in the descriptor linked list 3. Since the first subtask and the second subtask corresponding to the descriptor 2 in the descriptor linked list 3 can be processed by synchronous threads, the execution efficiency of the computing task corresponding to the descriptor 2 in the descriptor linked list 3 can be improved.

[0069] In one embodiment, the number of target computing units is at least two, and the descriptor linked lists corresponding to at least two target computing units are the same; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending the same descriptor linked list to the corresponding at least two target computing units, so that the at least two target computing units execute computing tasks corresponding to different descriptors in the same descriptor linked list; and sending the same descriptor linked list to the corresponding at least two target computing units, so that the at least two target computing units execute different subtasks in the computing task corresponding to the same descriptor in the same descriptor linked list.

[0070] For example, Figure 6 As shown, the descriptor linked list 3 is sent to the corresponding target computing unit 3 and target computing unit 4 for processing. The target computing unit 3 is used to execute the computing task corresponding to the descriptor 2 in the descriptor linked list 3, and the target computing unit 4 is used to execute the computing task corresponding to the descriptor 1 in the descriptor linked list 3. Afterwards, the target computing unit 3 executes the first subtask corresponding to the descriptor 3 in the descriptor linked list 3, and the target computing unit 4 executes the second subtask corresponding to the descriptor 3 in the descriptor linked list 3. Therefore, the execution efficiency of the computing tasks corresponding to the descriptors 1, 2, and 3 in the descriptor linked list 3 can be improved.

[0071] For example, Figure 7 As shown, the descriptor linked list 4 is sent to the corresponding target computing unit 3 and the target computing unit 4 for processing. The computing subunit 1 and the computing subunit 2 in the target computing unit 3 are respectively used to execute the computing tasks corresponding to the descriptors 1 and 2 in the descriptor linked list 4. The computing subunit 3 in the target computing unit 3 is used to execute the first subtask corresponding to the descriptor 3 in the descriptor linked list 4. The computing subunit 1 in the target computing unit 4 is used to execute the computing task corresponding to the descriptor 4 in the descriptor linked list 4, and the computing subunit 2 in the target computing unit 2 is used to execute the second subtask corresponding to the descriptor 3 in the descriptor linked list 2. Therefore, the execution efficiency of the computing tasks corresponding to the descriptors 1, 2, 3, and 4 in the descriptor linked list 4 can be improved.

[0072] In one embodiment, the descriptor of the computing task includes the address of the computing task and the address of the next descriptor; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending the first descriptor in each descriptor linked list to the corresponding target computing unit, so that each target computing unit executes the computing tasks corresponding to multiple descriptors in the corresponding descriptor linked list according to the address of the computing task in the first descriptor and the address of the next descriptor.

[0073] It should be noted that when sending each descriptor linked list to the corresponding target computing unit for processing, the first descriptor in each descriptor linked list can be sent to the corresponding target computing unit first, without sending the entire descriptor linked list to the corresponding target computing unit, thereby reducing the amount of data in the communication process and improving the efficiency of data interaction. At the same time, it can also avoid misreading during the data interaction process, thereby improving the accuracy of the data in the descriptor.

[0074] It should be noted that, when processing computing tasks corresponding to multiple descriptors in the corresponding descriptor linked list, each target computing unit can execute the computing task corresponding to the first descriptor according to the address of the computing task in the first descriptor. It can also obtain the next descriptor according to the address of the next descriptor in the first descriptor, so as to execute the computing task corresponding to the next descriptor according to the address of the computing task in the next descriptor.

[0075] In one embodiment, the descriptor of a computing task includes a first execution permission or a second execution permission for the computing task, wherein the first execution permission is used to characterize that the computing task can be executed by the corresponding target computing unit, and the second execution permission is used to characterize that the computing task cannot be executed by the corresponding target computing unit; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending each descriptor linked list to the corresponding target computing unit so that each target computing unit executes the computing task corresponding to the first descriptor in the corresponding descriptor linked list including the first execution permission.

[0076] It should be noted that, when processing computing tasks corresponding to multiple descriptors in the corresponding descriptor linked list, each target computing unit may determine whether to process the computing task corresponding to the descriptor according to the execution permission of the computing task in the descriptor. For example, each target computing unit executes the computing task corresponding to the first descriptor including the first execution permission in the corresponding descriptor linked list. Each target computing unit does not execute the computing task corresponding to the descriptor including the second execution permission in the corresponding descriptor linked list.

[0077] In one embodiment, the descriptor of a computing task includes a first execution result, a second execution result, or a third execution result of the computing task, wherein the first execution result is used to characterize that the computing task has not been executed by the corresponding target computing unit, the second execution result is used to characterize that the computing task has been successfully executed by the corresponding target computing unit, and the third execution result is used to characterize that the computing task has failed to be executed by the corresponding target computing unit; each descriptor linked list is sent to the corresponding target computing unit for processing, including: sending each descriptor linked list to the corresponding target computing unit so that each target computing unit executes the computing task corresponding to the second descriptor in the corresponding descriptor linked list including the first execution result or the third execution result.

[0078] It should be noted that when each target computing unit processes the computing tasks corresponding to multiple descriptors in the corresponding descriptor linked list, it can determine whether to process the computing tasks corresponding to the descriptor according to the execution results of the computing tasks in the descriptor. For example, if the computing task corresponding to the second descriptor including the first execution result or the third execution result in the target computing unit corresponding descriptor linked list, it indicates that the computing task has not been executed by the corresponding target computing unit or the execution has failed, so the computing task corresponding to the second descriptor can be executed or executed again. If the computing task corresponding to the descriptor linked list corresponding to each target computing unit includes the computing task corresponding to the descriptor with the second execution permission, it indicates that the computing task has not been successfully executed by the corresponding target computing unit, so there is no need to execute the computing task corresponding to the descriptor.

[0079] In one embodiment, the descriptor of a computing task includes an execution permission of the computing task, and the execution permission includes a first execution permission or a second execution permission, wherein the first execution permission is used to characterize that the computing task can be executed by the corresponding target computing unit, and the second execution permission is used to characterize that the computing task cannot be executed by the corresponding target computing unit; updating at least one descriptor linked list according to the processing results returned by each computing unit, including: updating the execution permissions in multiple descriptors in at least one descriptor linked list according to the processing results returned by each computing unit.

[0080] It should be noted that the processing results returned by the computing unit may include the execution results of multiple descriptors. Based on the returned execution results of the multiple descriptors and the execution logic between the multiple computing tasks, it can be determined which computing tasks corresponding to which descriptors can be executed by the target computing unit. Therefore, the execution permission in its descriptor can be updated from the second execution permission to the first execution permission, thereby ensuring the reliability of the task scheduling method provided in the embodiment of the present application.

[0081] In one embodiment, the descriptor of a computing task includes an execution result of the computing task, and the execution result includes a first execution result, a second execution result, or a third execution result, wherein the first execution result is used to characterize that the computing task has not been executed by the corresponding target computing unit, the second execution result is used to characterize that the computing task has been successfully executed by the corresponding target computing unit, and the third execution result is used to characterize that the computing task has failed to be executed by the corresponding target computing unit; updating at least one descriptor linked list according to the processing results returned by each computing unit, including: updating the execution results in multiple descriptors in at least one descriptor linked list according to the processing results returned by each computing unit.

[0082] It should be noted that the processing result returned by the computing unit may include the execution results of multiple descriptors, and the execution results of multiple descriptors in at least one descriptor linked list are updated according to the execution results of the multiple descriptors returned. For example, if the execution result of a returned descriptor is successful and the descriptor is executed for the first time, the execution result in the corresponding descriptor is updated from the first execution result to the second execution result, thereby ensuring the reliability of the task scheduling method provided in the embodiment of the present application.

[0083] The task scheduling method provided by the above embodiment obtains the demand information of multiple computing tasks, and the demand information includes the type information and quantity information of the computing units required for each computing task; according to the type information and quantity information of the computing units required for each computing task, at least one target computing unit is allocated to multiple computing tasks from multiple computing units; at least one descriptor linked list is constructed according to at least one target computing unit, and each descriptor linked list includes descriptors of different computing tasks connected in sequence; each descriptor linked list is sent to the corresponding target computing unit for processing, and at least one descriptor linked list is updated according to the processing results returned by each computing unit. Through the task scheduling method provided by the embodiment of the present application, the descriptor linked list can be uniformly constructed and updated, and the synchronization and collaboration problems between computing units can be solved at a lower cost, and the target computing unit can be allowed to obtain multiple descriptors in the corresponding descriptor linked list, thereby improving the utilization rate of the target computing unit, thereby improving the execution efficiency of computing tasks corresponding to multiple descriptors.

[0084] See also Figure 8 , Figure 8 A schematic block diagram of a task scheduling chip provided in an embodiment of the present application.

[0085] like Figure 8 As shown, the task scheduling chip 300 includes a processor 301 and a memory 302, and the processor 301 and the memory 302 are connected via a bus 303, such as an I2C (Inter-integrated Circuit) bus.

[0086] Specifically, the processor 301 is used to provide computing and control capabilities to support the operation of the entire task scheduling chip. The processor 301 can be a central processing unit (CPU), and the processor 301 can also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. Among them, the general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0087] Specifically, the memory 302 may be a Flash chip, a read-only memory (ROM) disk, an optical disk, a USB flash drive, or a mobile hard disk.

[0088] The task scheduling chip may include a task scheduling unit, which may be a centralized global scheduler for constructing and updating a descriptor linked list. The task scheduling chip may also include multiple computing units, one of which is used as a centralized global scheduler for constructing and updating a descriptor linked list, and other computing units for executing computing tasks corresponding to multiple descriptors in the descriptor linked list.

[0089] Those skilled in the art will understand that Figure 8 The structure shown in the figure is only a block diagram of a partial structure related to the embodiment of the present application, and does not constitute a limitation on the task scheduling chip to which the embodiment of the present application is applied. The specific task scheduling chip may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0090] The processor is used to run a computer program stored in the memory, and implement any one of the task scheduling methods provided in the embodiments of the present application when executing the computer program.

[0091] In one embodiment, the processor is used to run a computer program stored in the memory, and implements the following steps when executing the computer program:

[0092] Acquire demand information of multiple computing tasks, wherein the demand information includes type information and quantity information of computing units required for each of the computing tasks;

[0093] Allocate at least one target computing unit to the plurality of computing tasks from a plurality of computing units according to the type information and quantity information of the computing units required for each of the computing tasks;

[0094] Constructing at least one descriptor linked list according to the at least one target computing unit, each of the descriptor linked lists comprising descriptors of different computing tasks connected in sequence;

[0095] Each of the descriptor linked lists is sent to the corresponding target computing unit for processing, and the at least one descriptor linked list is updated according to the processing results returned by each of the computing units.

[0096] In one embodiment, at least one of the target computing units includes a plurality of computing subunits; when the processor implements sending each of the descriptor linked lists to the corresponding target computing unit for processing, it is configured to implement:

[0097] Sending the corresponding descriptor linked list to the multiple computing sub-units, so that each computing sub-unit performs the computing task corresponding to the different descriptors in the corresponding descriptor linked list; and / or

[0098] The corresponding descriptor linked list is sent to the multiple computing sub-units, so that each computing sub-unit executes a different sub-task in the computing task corresponding to the same descriptor in the descriptor linked list.

[0099] In one embodiment, the number of the target computing units is at least two, and the descriptor linked lists corresponding to at least two of the target computing units are the same; when the processor implements sending each of the descriptor linked lists to the corresponding target computing unit for processing, it is used to implement:

[0100] Sending the same descriptor linked list to the corresponding at least two target computing units, so that the at least two target computing units perform computing tasks corresponding to different descriptors in the same descriptor linked list; and / or

[0101] The same descriptor linked list is sent to the corresponding at least two target computing units, so that the at least two target computing units execute different subtasks in the computing task corresponding to the same descriptor in the same descriptor linked list.

[0102] In one embodiment, the descriptor of the computing task includes an address of the computing task and an address of a next descriptor; when the processor implements sending each of the descriptor linked lists to the corresponding target computing unit for processing, it is used to implement:

[0103] The first descriptor in each of the descriptor linked lists is sent to the corresponding target computing unit, so that each of the target computing units executes the computing tasks corresponding to the multiple descriptors in the corresponding descriptor linked list according to the address of the computing task in the first descriptor and the address of the next descriptor.

[0104] In one embodiment, the descriptor of the computing task includes a first execution permission or a second execution permission of the computing task, wherein the first execution permission is used to indicate that the computing task can be executed by the corresponding target computing unit, and the second execution permission is used to indicate that the computing task cannot be executed by the corresponding target computing unit; when the processor implements sending each of the descriptor linked lists to the corresponding target computing unit for processing, it is used to implement:

[0105] The descriptor linked lists are sent to the corresponding target computing units, so that each target computing unit executes the computing task corresponding to the first descriptor including the first execution permission in the corresponding descriptor linked list.

[0106] In one embodiment, the descriptor of the computing task includes a first execution result, a second execution result, or a third execution result of the computing task, wherein the first execution result is used to characterize that the computing task is not executed by the corresponding target computing unit, the second execution result is used to characterize that the computing task is successfully executed by the corresponding target computing unit, and the third execution result is used to characterize that the computing task is failed to be executed by the corresponding target computing unit; when the processor implements sending each of the descriptor linked lists to the corresponding target computing unit for processing, it is used to implement:

[0107] The descriptor linked lists are sent to the corresponding target computing units, so that each target computing unit executes the computing task corresponding to the second descriptor in the corresponding descriptor linked list including the first execution result or the third execution result.

[0108] In one embodiment, the descriptor of the computing task includes the following data: an identifier of the computing task, an address of the computing task, an address of a next descriptor, execution permission of the computing task, a type of the computing task, and an execution result of the computing task.

[0109] In one embodiment, the processor, when implementing the constructing at least one descriptor linked list according to the at least one target computing unit, is configured to implement:

[0110] Determining different computing tasks assigned to each of the target computing units;

[0111] Determining the execution order of the different computing tasks assigned to the target computing units according to the dependency relationship between the different computing tasks assigned to the target computing units;

[0112] According to the execution order between the different computing tasks assigned to each of the target computing units, a descriptor linked list corresponding to each of the target computing units is generated.

[0113] It should be noted that those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the task scheduling chip described above can refer to the corresponding process in the aforementioned task scheduling method embodiment, and will not be repeated here.

[0114] An embodiment of the present application also provides a storage medium for computer-readable storage, wherein the storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the steps of any task scheduling method provided in the embodiment of the present application.

[0115] The storage medium may be an internal storage unit of the task scheduling chip described in the above embodiment, such as a hard disk or memory of the task scheduling chip. The storage medium may also be an external storage device of the task scheduling chip, such as a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. equipped on the task scheduling chip.

[0116] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the above disclosed methods may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0117] The serial numbers of the embodiments of the present application are for description only and do not represent the advantages and disadvantages of the embodiments. The above description is only a specific implementation mode of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A task scheduling method, characterized in that: include: Acquire demand information of multiple computing tasks, wherein the demand information includes type information and quantity information of computing units required for each of the computing tasks; Allocate at least one target computing unit to the plurality of computing tasks from a plurality of computing units according to the type information and quantity information of the computing units required for each of the computing tasks; Constructing at least one descriptor linked list according to the at least one target computing unit, each of the descriptor linked lists comprising descriptors of different computing tasks connected in sequence; Each of the descriptor linked lists is sent to the corresponding target computing unit for processing, and the at least one descriptor linked list is updated according to the processing results returned by each of the computing units.

2. The task scheduling method according to claim 1, characterized in that: At least one of the target computing units includes a plurality of computing subunits; The sending each of the descriptor linked lists to the corresponding target computing unit for processing includes: Sending the corresponding descriptor linked list to the multiple computing sub-units, so that each computing sub-unit performs a computing task corresponding to a different descriptor in the corresponding descriptor linked list; and / or The corresponding descriptor linked list is sent to the multiple computing sub-units, so that each computing sub-unit executes a different sub-task in the computing task corresponding to the same descriptor in the descriptor linked list.

3. The task scheduling method according to claim 1, characterized in that: The number of the target computing units is at least two, and the descriptor linked lists corresponding to at least two of the target computing units are the same; The sending each of the descriptor linked lists to the corresponding target computing unit for processing includes: Sending the same descriptor linked list to the corresponding at least two target computing units, so that the at least two target computing units execute computing tasks corresponding to different descriptors in the same descriptor linked list; and / or The same descriptor linked list is sent to the corresponding at least two target computing units, so that the at least two target computing units execute different subtasks in the computing task corresponding to the same descriptor in the same descriptor linked list.

4. The task scheduling method according to claim 1, characterized in that: The descriptor of the computing task includes an address of the computing task and an address of a next descriptor; The sending each of the descriptor linked lists to the corresponding target computing unit for processing includes: The first descriptor in each of the descriptor linked lists is sent to the corresponding target computing unit, so that each of the target computing units executes the computing tasks corresponding to the multiple descriptors in the corresponding descriptor linked list according to the address of the computing task in the first descriptor and the address of the next descriptor.

5. The task scheduling method according to claim 1, characterized in that: The descriptor of the computing task includes a first execution permission or a second execution permission of the computing task, wherein the first execution permission is used to indicate that the computing task can be executed by the corresponding target computing unit, and the second execution permission is used to indicate that the computing task cannot be executed by the corresponding target computing unit; The sending each of the descriptor linked lists to the corresponding target computing unit for processing includes: The descriptor linked lists are sent to the corresponding target computing units, so that each target computing unit executes the computing task corresponding to the first descriptor including the first execution permission in the corresponding descriptor linked list.

6. The task scheduling method according to claim 1, characterized in that: The descriptor of the computing task includes a first execution result, a second execution result or a third execution result of the computing task, wherein the first execution result is used to indicate that the computing task is not executed by the corresponding target computing unit, the second execution result is used to indicate that the computing task is successfully executed by the corresponding target computing unit, and the third execution result is used to indicate that the computing task is failed to be executed by the corresponding target computing unit; The sending each of the descriptor linked lists to the corresponding target computing unit for processing includes: The descriptor linked lists are sent to the corresponding target computing units, so that each target computing unit executes the computing task corresponding to the second descriptor in the corresponding descriptor linked list including the first execution result or the third execution result.

7. The task scheduling method according to claim 1, characterized in that: The descriptor of the computing task includes the following data: an identifier of the computing task, an address of the computing task, an address of a next descriptor, an execution permission of the computing task, a type of the computing task, and an execution result of the computing task.

8. The task scheduling method according to any one of claims 1 to 7, characterized in that: The constructing at least one descriptor linked list according to the at least one target computing unit comprises: Determining different computing tasks assigned to each of the target computing units; Determining the execution order of the different computing tasks assigned to the target computing units according to the dependency relationship between the different computing tasks assigned to the target computing units; According to the execution order between the different computing tasks assigned to each of the target computing units, a descriptor linked list corresponding to each of the target computing units is generated.

9. A task scheduling chip, characterized in that: The task scheduling chip includes a processor, a memory, a computer program stored in the memory and executable by the processor, and a data bus for realizing connection and communication between the processor and the memory, wherein when the computer program is executed by the processor, the task scheduling method as described in any one of claims 1 to 8 is implemented.

10. A storage medium for computer-readable storage, characterized in that: The storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the task scheduling method according to any one of claims 1 to 8.