Program debugging method and device, electronic equipment and storage medium
Through the program debugging method that realizes breakpoint status response on the host and device side of heterogeneous computing devices, the problem of program debugging of heterogeneous computing devices is solved, and an efficient and flexible debugging process is realized, reducing costs and design difficulties.
Patent Information
- Application Number
- CN202510032816.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-08
- Publication Date
- 2025-04-25
AI Technical Summary
The program debugging method of heterogeneous computing devices is different from that of isomorphic computing devices. It is difficult for programmers to use a general breakpoint debugging method, and many computing units on the device do not have the ability to interrupt hardware and resume execution. The ability to increase hardware interrupts will lead to increased design difficulty and manufacturing costs.
By implementing a program debugging method on the host and device side, in response to the triggering and effectiveness changes of breakpoints, the target thread stores program context data, occupies target resources, and executes post-debug programs when the breakpoint state changes to avoid hardware interrupts.
It realizes efficient program debugging on heterogeneous computing devices, reducing testing costs, manufacturing costs and design difficulties, while improving debugging flexibility and efficiency.
Smart Images
Figure CN119883866A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of artificial intelligence technology, and in particular to the technical fields of chips, heterogeneous computing, code compilation, and program debugging. More specifically, the present disclosure provides a program debugging method, device, electronic device, and storage medium. Background Art
[0002] With the development of artificial intelligence technology, the application of heterogeneous computing devices is increasing. Heterogeneous computing devices may include one or more computing units on the host side and one or more computing units on the device side. In heterogeneous computing devices, the type of computing unit on the host side is different from the type of computing unit on the device side. The program debugging method of heterogeneous computing devices is different from that of homogeneous computing devices. Summary of the invention
[0003] The present disclosure provides a program debugging method, apparatus, device and storage medium.
[0004] According to one aspect of the present disclosure, a program debugging method is provided, the method comprising: in response to determining that a first breakpoint of a program executed by a first target thread is triggered, storing program context data corresponding to the first breakpoint in a first storage space corresponding to the first target thread; in response to determining that the first breakpoint is a valid breakpoint, occupying target resources using the first target thread; in response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, executing a debugged program using the first target thread, the debugged program being obtained based on program context data.
[0005] According to another aspect of the present disclosure, a program debugging method is provided, the method comprising: in response to determining that a first breakpoint of a program executed by a first target thread is triggered and determining that a target resource is occupied by the first target thread, displaying program context data corresponding to the first breakpoint; in response to receiving a continue execution instruction, adjusting the first breakpoint from a valid breakpoint to an invalid breakpoint; and releasing the target resource.
[0006] According to another aspect of the present disclosure, a program debugging device is provided, the device comprising: a storage module for storing program context data corresponding to the first breakpoint in a first storage space corresponding to the first target thread in response to determining that a first breakpoint of a program executed by a first target thread is triggered; an occupation module for occupying target resources using the first target thread in response to determining that the first breakpoint is a valid breakpoint; and an execution module for executing a debugged program using the first target thread in response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, wherein the debugged program is obtained based on program context data.
[0007] According to another aspect of the present disclosure, a program debugging device is provided, which includes: a display module, in response to determining that a first breakpoint of a program executed by a first target thread is triggered and determining that a target resource is occupied by the first target thread, displaying program context data corresponding to the first breakpoint; a first adjustment module, in response to receiving a continue execution instruction, adjusting the first breakpoint from a valid breakpoint to an invalid breakpoint; a first release module, in response to releasing the target resource.
[0008] According to another aspect of the present disclosure, an electronic device is provided, comprising the two program debugging devices provided by the present disclosure.
[0009] According to another aspect of the present disclosure, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method provided according to the present disclosure.
[0010] According to another aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided. The computer instructions are used to cause a computer to execute the method provided according to the present disclosure.
[0011] According to another aspect of the present disclosure, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the method provided according to the present disclosure is implemented.
[0012] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present disclosure.
[0014] Figure 1 is a schematic diagram of an exemplary system architecture of an application program debugging method and apparatus according to an embodiment of the present disclosure;
[0015] Figure 2 is a flowchart of a program debugging method according to an embodiment of the present disclosure;
[0016] Figure 3 is a schematic diagram of a program debugging method according to an embodiment of the present disclosure;
[0017] Figure 4 is a flowchart of a program debugging method according to another embodiment of the present disclosure;
[0018] Figure 5is a schematic diagram of a program debugging method according to another embodiment of the present disclosure;
[0019] Figure 6 is a schematic diagram of a heterogeneous computing device according to an embodiment of the present disclosure;
[0020] Figure 7 is a block diagram of a program debugging device according to an embodiment of the present disclosure;
[0021] Figure 8 is a block diagram of a program debugging device according to an embodiment of the present disclosure;
[0022] Fig. 9 is a schematic block diagram of an electronic device according to an embodiment of the present disclosure; and
[0023] Fig.10 The present invention is a block diagram of an electronic device capable of applying an application debugging method according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0024] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.
[0025] Unlike heterogeneous computing devices, homogeneous computing devices may include one type of computing unit. The computing unit may be, for example, a central processing unit (CPU). In a program for a central processing unit, programmers can set breakpoints on the written program through the operating system and program debugging software to view the status of the program when it is running, thereby reducing the difficulty of program development. However, on heterogeneous computing devices, the writing and running of programs are different from those for central processing units. On different heterogeneous computing devices, it is difficult for programmers to use the same method to debug programs. Heterogeneous computing devices have rich and diverse computing units. The diverse computing units have different support for the hardware interrupts that program breakpoints rely on. On heterogeneous computing devices, it is difficult for programmers to use a general breakpoint debugging method.
[0026] In addition, in order to implement program debugging on heterogeneous computing devices, programmers can add breakpoint instructions in the executable program to trigger hardware interrupts and suspend hardware execution. After debugging is completed, execution can be resumed. Therefore, in order to implement program debugging on heterogeneous computing devices, heterogeneous computing devices need to have the ability to accurately interrupt and resume execution. However, many computing units on the device side do not have the ability to interrupt and resume execution by hardware. If the ability to interrupt hardware is increased, the design difficulty and manufacturing cost of the hardware will increase.
[0027] Therefore, in order to achieve efficient program debugging at a lower cost for heterogeneous computing devices, the present disclosure provides a program debugging method, which will be described below.
[0028] Figure 1 is a schematic diagram of an exemplary system architecture for an application debugging method and device according to an embodiment of the present disclosure. It should be noted that: Figure 1 What is shown is merely an example of a system architecture to which the embodiments of the present disclosure can be applied, in order to help those skilled in the art understand the technical content of the present disclosure, but it does not mean that the embodiments of the present disclosure cannot be used in other devices, systems, environments or scenarios.
[0029] like Figure 1 As shown, the system architecture 10 according to this embodiment may include a device end 110 and a host end 120. Data and signals may be transmitted between the device end 110 and the host end 120 via an interface 130. The system architecture 10 may be, for example, the system architecture of the above-mentioned heterogeneous computing device.
[0030] The device end 110 may include a first computing unit 111. The host end 120 may include a second computing unit 122. The instruction set of the second computing unit 122 may be different from the instruction set of the first computing unit 111. The first computing unit 111 may be an artificial intelligence computing unit. The artificial intelligence computing unit may be a graphics processing unit (GPU), a neural network processing unit (NPU) or other computing units. The second computing unit 122 may be a central processing unit.
[0031] The first computing unit and the second computing unit are connected via a high-speed serial computer expansion bus. Figure 1 As shown, the interface 130 may be a peripheral component rapid interconnect interface. Through the interface 130, the first computing unit 111 and the second computing unit 122 may be connected via a high-speed serial computer expansion bus.
[0032] It should be noted that the program debugging method provided in the embodiment of the present disclosure can generally be executed by at least one of the host end 110 and the device end 120. Accordingly, the program debugging apparatus provided in the embodiment of the present disclosure can generally be set in at least one of the server host end 110 and the device end 120.
[0033] It can be understood that the above describes the system architecture of the present disclosure, and the following will describe the method of the present disclosure.
[0034] Figure 2 is a flowchart of a program debugging method according to an embodiment of the present disclosure.
[0035] like Figure 2 As shown, the method 200 may include operations S210 to S230. For example, the method 200 may be performed by the device end 110
[0036] In operation S210 , in response to determining that a first breakpoint of a program executed by a first target thread is triggered, program context data corresponding to the first breakpoint is stored in a first storage space corresponding to the first target thread.
[0037] In the embodiment of the present disclosure, one or more breakpoints may be set in the program, and the one or more breakpoints include a first breakpoint.
[0038] In the disclosed embodiment, the program context data may include one or more lines of code corresponding to the breakpoint, or one or more instructions corresponding to the breakpoint. For example, a thread on the device side may execute instructions of a compiled program. When executing instructions corresponding to the breakpoint in the program, one or more instructions before the breakpoint and one or more instructions after the breakpoint may be used as program context data corresponding to the breakpoint.
[0039] In the embodiment of the present disclosure, the first storage space may be a storage space on the device side. For example, if the computing unit on the device side is a graphics processing unit, the first storage space may be a storage space in a video memory.
[0040] In operation S220 , in response to determining that the first breakpoint is a valid breakpoint, a target resource is occupied by a first target thread.
[0041] In the embodiment of the present disclosure, the breakpoint may be a valid breakpoint. If the first breakpoint is a valid breakpoint, the first target thread may be used to occupy the target resource.
[0042] In the disclosed embodiment, the target resource may be a hardware resource or a software resource. The target resource may be a lock, a target flag, a target register, or other resources. For example, if the target resource is a lock, the lock may be occupied by the first target thread. The lock may lock preset data or may not lock data. For another example, if the target resource is a target flag, the value of the flag may be changed by the first target thread to occupy the target flag. For another example, if the target resource is a target register, the first target thread may be used to write data to the target register to occupy the target register.
[0043] In operation S230 , in response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, the debugged program is executed using the first target thread.
[0044] In the embodiment of the present disclosure, the first breakpoint may be adjusted from a valid breakpoint to an invalid breakpoint.
[0045] In the disclosed embodiment, the debugged program is obtained based on the program context data. For example, if the user debugs the program context data, the debugged program context data can be used to replace the original program context data to obtain the debugged program. Next, the debugged program can be continued to be executed using the first target thread.
[0046] Through the disclosed embodiments, it is determined whether a breakpoint is triggered, whether a breakpoint is valid, and whether a breakpoint is adjusted to invalid, and program context data near the breakpoint can be obtained promptly and quickly without "interruption". Heterogeneous computing device program debugging can be independent of hardware interrupts or soft interrupts, and can also reduce the device-side testing cost, manufacturing cost, and design difficulty of heterogeneous computing devices.
[0047] It can be understood that the method of the present disclosure is described above, and the first target thread will be further described below.
[0048] In some embodiments, the first target thread is one of a plurality of first threads of the device end. For example, the device end may be the device end 110 described above. The plurality of first threads may respectively execute the initial program. If a breakpoint of a program executed by a first thread is triggered, the first thread may serve as the first target thread. One or more breakpoints of the program may include the first breakpoint described above.
[0049] In some embodiments, the plurality of first threads correspond to a plurality of first storage spaces respectively. For example, a first storage space may be allocated to each first thread.
[0050] In some embodiments, the first thread is configured with at least one of a breakpoint effectiveness flag, a breakpoint trigger flag, and a resource occupation flag.
[0051] In the embodiment of the present disclosure, the breakpoint effectiveness flag may indicate whether at least one breakpoint in the program is valid. For example, if a user adds a breakpoint to the program, the value of the breakpoint effectiveness flag of the corresponding first thread may be set to a valid value. That is, the initial value of the breakpoint effectiveness flag may be a valid value.
[0052] In the embodiment of the present disclosure, the breakpoint trigger flag bit may indicate whether at least one breakpoint is triggered. If the value of the breakpoint trigger flag bit is a valid value, it may indicate that the breakpoint of the program executed by the corresponding first thread is triggered.
[0053] In the embodiment of the present disclosure, the resource occupation flag is used to indicate whether the target resource is occupied by the first thread. For example, if the value of the resource occupation flag is a valid value, it can indicate that the corresponding first thread occupies the target resource.
[0054] Through the disclosed embodiment, multiple flags are configured for the threads on the device side, so that the host side and the device side can read the values of the flags to determine whether the breakpoint is triggered, whether the breakpoint is valid, etc. The values of the flags can also be modified and adjusted. Thus, without the need for "interruption", the host side and the device side can determine the state of the breakpoint for debugging, effectively reducing the cost of program debugging.
[0055] It can be understood that the thread on the device side of the present disclosure is described above, and the method of the present disclosure will be further described below.
[0056] Figure 3 is a flowchart of a program debugging method according to another embodiment of the present disclosure.
[0057] like Figure 3 As shown, method 300 can store the program context corresponding to the first breakpoint in the first storage space corresponding to the first target thread. The following will be described in conjunction with operation S311 and operation S312.
[0058] In operation S311, it is determined whether a breakpoint is triggered.
[0059] In an embodiment of the present disclosure, in response to determining that the breakpoint is not triggered, operation S311 is repeatedly performed.
[0060] In the disclosed embodiment, a jump instruction may be set at a breakpoint of a program. When the program breakpoint is executed, the jump instruction at the breakpoint may be executed to jump to operation S312. It is understood that when the jump instruction is executed, it may be determined that the breakpoint is triggered.
[0061] For example, it can be determined whether the breakpoints of the programs executed by the multiple first threads on the device are triggered. If it is determined that the breakpoint of the program of a first thread is triggered, the first thread can be used as the first target thread, and the breakpoint can be used as the first breakpoint.
[0062] In operation S312 , the program context data is stored in a first storage space corresponding to the first target thread.
[0063] For example, the program context corresponding to the first breakpoint may be stored in a first storage space corresponding to the first target thread.
[0064] In the embodiment of the present disclosure, the value of the breakpoint effectiveness flag of the first target thread can be adjusted to a valid value. The value of the breakpoint trigger flag of the first target thread can be adjusted to a valid value. For example, the valid value can be 1, and the invalid value can be 0.
[0065] Next, the method 300 may use the first target thread to occupy the target resource, which will be described below in conjunction with operations S321 to S324.
[0066] In operation S321 , it is determined whether the value of the breakpoint effectiveness flag is a valid value.
[0067] In the disclosed embodiment, the value of the breakpoint effectiveness flag bit can be modified by the host side. As described above, when or after the operation S312 is executed, the value of the breakpoint effectiveness flag bit of the first target thread has been modified to a valid value. However, after the value of the breakpoint effectiveness flag bit of the first target thread is modified to a valid value, the value of the breakpoint effectiveness flag bit may also be modified to an invalid value by the host side. Therefore, operation S321 may be executed to determine whether the breakpoint is still valid.
[0068] In the embodiment of the present disclosure, in response to determining that the value of the breakpoint effectiveness flag is a valid value, operation S322 may be performed.
[0069] In the embodiment of the present disclosure, in response to determining that the value of the breakpoint effectiveness flag is an invalid value, operation S332 may be performed. In addition, the value of the breakpoint trigger flag may be set to an invalid value. In operation S332, program execution may be resumed. For example, in the case where operation S332 is performed after operation S321 is performed, the initial program with the first breakpoint deleted may continue to be executed, or the first breakpoint may be skipped to continue to execute the initial program.
[0070] In operation S322, it is determined whether the breakpoint thread identification value is a target value.
[0071] In the embodiment of the present disclosure, the target value may include a preset identification value. The preset identification value may be a value other than the identification values of the plurality of first threads. For example, the preset identification value may be a maximum unsigned integer value.
[0072] In the embodiment of the present disclosure, in response to determining that the breakpoint thread identification value is not the target value, the operation S321 and the operation S322 may be returned to be executed. When the breakpoint thread identification value is the preset identification value, the host end is processing the breakpoint of other first threads, and it is difficult to debug based on the first breakpoint of the first target thread.
[0073] In the embodiment of the present disclosure, in response to determining that the breakpoint thread identification value is the target value, operation S323 may be performed. When the breakpoint thread identification value is the preset identification value, the host side does not process the breakpoints of other first threads, and debugging may be performed based on the first breakpoint of the first target thread.
[0074] In the embodiment of the present disclosure, in response to determining that the breakpoint thread identification value is the target value and the first breakpoint is a valid breakpoint, the first target thread can be used to occupy the target resource. It can be understood that one or more first threads can simultaneously issue a request to occupy the target resource. Thus, the first target thread may successfully occupy the target resource or fail to occupy it.
[0075] In operation S323 , it is determined whether the target resource is occupied by the first target thread.
[0076] In an embodiment of the present disclosure, in response to determining that the target resource is not occupied by the first target thread, the process may return to operation S321 .
[0077] In the embodiment of the present disclosure, in response to determining that the target resource is occupied by the first target thread, operation S324 may be performed, or the value of the resource occupation flag of the first target thread may be adjusted to a valid value, for example, the valid value may be 1 or 0.
[0078] In operation S324, the breakpoint thread identification value is adjusted to the identification value of the first target thread.
[0079] For example, after the breakpoint thread identification value is adjusted to the identification value of the first target thread, the host end may process the program context data corresponding to the first breakpoint.
[0080] Next, after the first breakpoint is adjusted to an invalid breakpoint, the method 300 may use the first target thread to execute the debugged program, which will be described below in conjunction with operation S331 and operation S332 .
[0081] In operation S331 , it is determined whether the value of the breakpoint effectiveness flag is a valid value.
[0082] In the embodiment of the present disclosure, in response to determining that the value of the breakpoint effectiveness flag is a valid value, operation S331 is repeatedly performed.
[0083] In the embodiment of the present disclosure, in response to determining that the value of the breakpoint effectiveness flag is an invalid value, operation S332 is performed. For example, operation S332 may be performed after the value of the breakpoint effectiveness flag is adjusted from a valid value to an invalid value.
[0084] In operation S332, program execution is resumed.
[0085] In the disclosed embodiment, the first target thread may be used to execute the debugged program. The debugged program may be obtained based on the program context data corresponding to the first breakpoint. For example, if the program context data is not modified during the debugging process, the initial program may continue to be executed.
[0086] It can be understood that the above description is based on the example that the program context data is not adjusted, but the present disclosure is not limited thereto, and the following description will be based on the example that the program context data is adjusted.
[0087] In some embodiments, in response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, executing the debugged program using the first target thread includes: in response to determining that the value of the breakpoint effectiveness flag corresponding to the first target thread is adjusted from a valid value to an invalid value, reading the post-debugging context data from the first storage space corresponding to the first target thread.
[0088] In the disclosed embodiment, the post-debugging context data is obtained based on at least one of the program context data and the user debugging data. For example, after viewing the program context data in the first storage space, the user can modify the program context data. In the post-modification process, the data input by the user can be used as the user debugging data. The post-debugging context data can be obtained based on the user debugging data and the program context data. For another example, the user can also replace all the program context data. In this case, the post-debugging context data can be obtained based on the user debugging data.
[0089] In some embodiments, in response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, executing the debugged program using the first target thread includes: obtaining the adjusted program according to the debugged context data. For example, replacing the program context data of the first breakpoint in the initial program with the debugged context data to obtain the adjusted program.
[0090] In some embodiments, in response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, executing the debugged program using the first target thread includes: executing the debugged program using the first target thread. For example, the debugged program can be executed using the first target thread to resume program execution. Through the embodiments of the present disclosure, during the program debugging process, the program to be continued can be adjusted according to the user's input, which can improve the flexibility of program debugging, improve the efficiency of program debugging, and enhance the user experience.
[0091] It can be understood that the above description uses the target value being the preset identification value as an example to illustrate the present disclosure, but the present disclosure is not limited thereto, which will be described below.
[0092] In some embodiments, the target value may also include an identification value of the first target thread. For example, a user may specify a first thread to view context data of a breakpoint of the execution level of the first thread. If the thread specified by the user is the first target thread, the first target thread may occupy the target resource. Through the disclosed embodiment, the corresponding first thread may be controlled to occupy the target resource according to the identification of the first thread specified by the user, so that the user can view the breakpoint based on the first thread for debugging, which may effectively improve the user experience.
[0093] It can be understood that the method of the present disclosure is described above in conjunction with the device side, and the method of the present disclosure will be described below in conjunction with the host side.
[0094] Figure 4 is a flowchart of a program debugging method according to another embodiment of the present disclosure.
[0095] like Figure 4 As shown, the method 400 includes operations S410 to S430. For example, the method 400 may be executed by the host end 120 described above.
[0096] In operation S410 , in response to determining that a first breakpoint of a program executed by a first target thread is triggered and determining that a target resource is occupied by the first target thread, program context data corresponding to the first breakpoint is displayed.
[0097] In the embodiment of the present disclosure, one or more breakpoints may be set in the program, and the one or more breakpoints include a first breakpoint.
[0098] In the disclosed embodiment, the target resource may be a hardware resource or a software resource. The target resource may be a lock, a target flag, a target register, or other resources. For example, if the target resource is a lock, the lock may be occupied by the first target thread. The lock may lock preset data or may not lock data. For another example, if the target resource is a target flag, the value of the flag may be changed by the first target thread to occupy the target flag. For another example, if the target resource is a target register, the first target thread may be used to write data to the target register to occupy the target register.
[0099] In the disclosed embodiment, the program context data may include one or more lines of code corresponding to the breakpoint or one or more instructions corresponding to the breakpoint. For example, a thread on the device side may execute instructions of a compiled program. When executing instructions corresponding to the breakpoint in the program, one or more instructions before the breakpoint and one or more instructions after the breakpoint may be used as program context data corresponding to the breakpoint.
[0100] In operation S420 , in response to receiving the continue execution instruction, the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint.
[0101] In the embodiment of the present disclosure, the continue execution instruction is used to resume the execution of the program. The continue execution instruction may be provided to the host end by a user, for example.
[0102] In operation S430, the target resource is released.
[0103] In the embodiment of the present disclosure, the first target thread may be controlled to no longer occupy the target resource, that is, the target resource is released by the first target thread.
[0104] Through the disclosed embodiments, it is determined whether the breakpoint is triggered and whether the target resource is occupied, and the program context data near the breakpoint can be obtained quickly and timely in the absence of an "interrupt" situation. Heterogeneous computing device program debugging can be independent of hardware interrupts or soft interrupts, and can also reduce the device-side testing cost, manufacturing cost, and design difficulty of heterogeneous computing devices. The host side can display the program context data of the first thread that occupies the target resource, and can display the program context of the thread that triggers the breakpoint and occupies the target resource to the user in a timely manner, so that the user can debug in a targeted manner.
[0105] It can be understood that the above describes the method of the present disclosure, and the following will describe the first thread of the present disclosure.
[0106] In some embodiments, the first target thread is one of multiple first threads on the device side, the multiple first threads correspond to multiple first storage spaces respectively, the first thread is configured with at least one of a breakpoint effectiveness flag, a breakpoint trigger flag, and a resource occupation flag, the breakpoint effectiveness flag is used to indicate whether at least one breakpoint in the program code is valid, the breakpoint trigger flag is used to indicate whether at least one breakpoint is triggered, and the resource occupation flag is used to indicate whether the target resource is occupied by the first thread, and at least one breakpoint includes a first breakpoint. It can be understood that the above description of the first target thread, the first thread, the breakpoint effectiveness flag, the breakpoint trigger flag, and the resource occupation flag is also applicable to this embodiment, and the present disclosure will not repeat them here.
[0107] It can be understood that the first target thread of the present disclosure is described above, and the thread on the host side of the present disclosure will be described below.
[0108] In some embodiments, the host side is provided with a plurality of second threads. The plurality of second threads correspond to the first threads of the plurality of device sides respectively. For example, each second thread corresponds to a first thread. The second thread corresponding to the first target thread can be used as the second target thread.
[0109] In some embodiments, in some implementations of the above operation S410, displaying the program context data corresponding to the first breakpoint includes: using the second target thread to read the first storage space corresponding to the first target thread to obtain the program context data. As described above, the first storage space corresponding to the first target thread can store the program context data corresponding to the first breakpoint. Using the second target thread to read the first storage space can obtain the program context data corresponding to the first breakpoint.
[0110] In some embodiments, in some implementations of the above operation S410, displaying the program context data corresponding to the first breakpoint includes: displaying the program context data. For example, the program context data can be displayed through a visual interface. For another example, if the program context data stored in the first storage space is a plurality of instructions, the plurality of instructions can be converted into one or more lines of code for display.
[0111] It can be understood that the thread of the present disclosure is described above, and the method on the host side will be further described below.
[0112] Figure 5 is a schematic diagram of a program debugging method according to another embodiment of the present disclosure.
[0113] like Figure 5 As shown, method 500 may display program context data, which will be described below in conjunction with operations S511 to S513.
[0114] In operation S511 , it is determined whether the value of the breakpoint trigger flag is a valid value.
[0115] In the embodiment of the present disclosure, in response to determining that the value of the breakpoint trigger flag corresponding to the first target thread is an invalid value, operation S511 may be repeatedly performed. For example, multiple second threads on the host side may respectively repeatedly perform operation S511 until one second thread determines that the value of the breakpoint trigger flag of the corresponding first thread is a valid value.
[0116] In the embodiment of the present disclosure, in response to determining that the value of the breakpoint trigger flag corresponding to the first target thread is a valid value, operation S512 may be performed. For example, if a second thread determines that the value of the breakpoint trigger flag of the corresponding first thread is a valid value, operation S512 may be performed. The first thread may serve as the first target thread.
[0117] In operation S512, it is determined whether the value of the resource occupation flag is a valid value.
[0118] In an embodiment of the present disclosure, in response to determining that the value of the resource occupied flag of the first target thread is an invalid value, operation S512 may be repeatedly performed until it is determined that the value of the resource occupied flag of the first target thread is a valid value.
[0119] In the embodiment of the present disclosure, in response to determining that the value of the resource occupied flag of the first target thread is a valid value, operation S513 may be performed. For example, if the value of the resource occupied flag of the first target thread is a valid value, it may be determined that the first target thread has occupied the target resource, and operation S513 may be performed.
[0120] In operation S513, the program context data corresponding to the first breakpoint is displayed. For example, the program context data can be displayed in a visual interface. In addition, the breakpoint thread identification value can also be displayed. As mentioned above, at this time, the breakpoint thread identification value can be the identification value of the first target thread. For another example, before or while executing subsequent operations, the value of the resource occupancy flag of the first target thread can also be adjusted to an invalid value. It can be understood that the resource occupancy flag can be read by the host side, and when a valid value has been read, the value of the resource occupancy flag can be adjusted to an invalid value. It can also be understood that operations S511 to S513 can be performed, for example, after the above-mentioned operation S324.
[0121] Next, the method 500 may adjust the first breakpoint from a valid breakpoint to an invalid breakpoint when receiving a continue execution instruction, which will be described below in conjunction with operation S521 and operation S522.
[0122] In operation S521, it is determined whether a continue execution instruction is received.
[0123] In the embodiment of the present disclosure, if the execution-continue instruction is not received, operation S521 may be repeatedly performed until the execution-continue instruction or other instructions are received. For example, the execution-continue instruction and other instructions may be provided by the user to the host end.
[0124] In the embodiment of the present disclosure, if a continue execution instruction is received, operation S522 may be performed.
[0125] In operation S522, the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint.
[0126] For example, the value of the breakpoint effectiveness flag of the first target thread can be adjusted from a valid value to an invalid value. The breakpoint thread identification value can also be adjusted to a preset identification value so that other first threads can send requests to occupy target resources.
[0127] Next, method 500 may release the target resource.
[0128] In operation S530, the target resource is released. For example, the occupation of the target resource by the first target thread may be released. It is understood that after the host performs operations S522 and S530, the device may perform operation S230 or operation S332.
[0129] It can be understood that the above description uses the instruction issued by the user as an example to explain the present disclosure. However, the present disclosure is not limited thereto. In method 500, in response to receiving the thread switching instruction and determining that the second breakpoint of the program code executed by the thread to be switched is triggered, the target resource can be released. This will be described below in conjunction with operations S541 to S544.
[0130] In operation S541, it is determined whether a switching instruction is received.
[0131] In the embodiment of the present disclosure, the switching instruction corresponds to the thread to be switched. The thread to be switched is one of the multiple first threads. For example, the thread to be switched can be a first thread among the multiple first threads except the first target thread.
[0132] In the embodiment of the present disclosure, in response to not receiving a switching instruction, operation S541 may be repeatedly performed until a continue execution instruction or a switching instruction is received.
[0133] In the embodiment of the present disclosure, in response to receiving the switching instruction, operation S542 may be performed.
[0134] In operation S542 , it is determined whether the value of the breakpoint trigger flag bit of the thread to be switched is a valid value.
[0135] In the embodiment of the present disclosure, in response to determining that the value of the breakpoint trigger flag of the thread to be switched is an invalid value, operation S544 may be performed to display a prompt message of the switching failure. For example, if the value of the breakpoint trigger flag of the thread to be switched is an invalid value, it means that the breakpoint of the program executed by the thread to be switched is not triggered.
[0136] In the embodiment of the present disclosure, in response to determining that the value of the breakpoint trigger flag of the thread to be switched is a valid value, operation S543 may be performed. In operation S543, the target resource is released. For example, the target resource occupied by the first target thread may be released so that the thread to be switched occupies the target resource.
[0137] Next, the method 500 further includes operation S550, which will be described below.
[0138] In operation S550, the breakpoint thread identification value is adjusted to the identification value of the thread to be switched. For example, in the case where the breakpoint thread identification value is the identification value of the thread to be switched, if the second breakpoint of the thread to be switched is triggered, the thread to be switched can issue a request to occupy the target resource. As described above, the target resource has been released, and the thread to be switched can occupy the target resource. Through the embodiment of the present disclosure, the corresponding first thread can be controlled to occupy the target resource according to the identification of the first thread specified by the user, so that the user can view the breakpoint based on the first thread for debugging, which can effectively improve the user experience.
[0139] It can be understood that the above text describes the method of the present disclosure in combination with the host side and the device side respectively, and the present disclosure will be further described below in combination with the overall architecture of the host side and the device side.
[0140] Figure 6 is a schematic diagram of a heterogeneous computing device according to an embodiment of the present disclosure.
[0141] like Figure 6 As shown, the heterogeneous computing device 60 may include a host end 610, a device end 620 and an interface 630, and the host end 610 may include a first computing unit 611. The device end 620 may include a second computing unit 622. It can be understood that the above description of the system architecture 10 is also applicable to the heterogeneous computing device 60, and the present disclosure will not repeat it here.
[0142] like Figure 6 As shown, the device end 620 may further include a storage unit 623. The first computing unit 621 may be provided with a plurality of first threads. The storage unit 623 may be provided with a flag bit set for each first thread. For example, for the first thread, a breakpoint effectiveness flag bit f61, a breakpoint trigger flag bit f62, and a resource occupancy flag bit f63 may be configured. The breakpoint effectiveness flag bit f61, the breakpoint trigger flag bit f62, and the resource occupancy flag bit f63 may be accessed by the host end and the device end to read and / or adjust the value of the corresponding flag bit. The device end may further be provided with a target resource and a breakpoint thread identification value, and the breakpoint thread identification value may also be read by the host end and the device end. Thus, based on at least one of the plurality of flag bits, program debugging may be achieved without generating an "interrupt".
[0143] It can be understood that the method of the present disclosure is described above, and the device of the present disclosure will be described below.
[0144] Figure 7 is a block diagram of a program debugging device according to an embodiment of the present disclosure.
[0145] like Figure 7 As shown, the device 701 may include a storage module 7011 , an occupation module 7012 and an execution module 7013 .
[0146] The storage module 7011 is configured to store program context data corresponding to the first breakpoint in a first storage space corresponding to the first target thread in response to determining that a first breakpoint of the program executed by the first target thread is triggered.
[0147] The occupation module 7012 is used to occupy the target resource by using the first target thread in response to determining that the first breakpoint is a valid breakpoint.
[0148] The execution module 7013 is used for executing the debugged program using the first target thread in response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, where the debugged program is obtained according to the program context data.
[0149] In some embodiments, the first target thread is one of multiple first threads on the device side, the multiple first threads correspond to multiple first storage spaces respectively, the first thread is configured with at least one of a breakpoint effectiveness flag, a breakpoint trigger flag and a resource occupancy flag, the breakpoint effectiveness flag is used to indicate whether at least one breakpoint in the program is valid, the breakpoint trigger flag is used to indicate whether at least one breakpoint is triggered, the resource occupancy flag is used to indicate whether the target resource is occupied by the first thread, and at least one breakpoint includes a first breakpoint.
[0150] In some embodiments, the storage module includes: a first adjustment submodule, used to adjust the value of the breakpoint effectiveness flag of the first target thread to a valid value; a second adjustment submodule, used to adjust the value of the breakpoint trigger flag of the first target thread to a valid value; and a storage submodule, used to store the program context data in a first storage space corresponding to the first target thread.
[0151] In some embodiments, the occupation module includes at least one of the following operations: a third adjustment submodule, configured to adjust the value of the resource occupation flag of the first target thread to a valid value in response to determining that the breakpoint thread identification value is a target value and the target resource is occupied by the first target thread. The target value includes a preset identification value. A fourth adjustment submodule, configured to adjust the breakpoint thread identification value to the identification value of the first target thread.
[0152] In some embodiments, the execution module includes: a first reading submodule, for reading the post-debugging context data from the first storage space corresponding to the first target thread in response to determining that the value of the breakpoint effectiveness flag corresponding to the first target thread is adjusted to an invalid value. The post-debugging context data is obtained based on at least one of the program context data and the user debugging data; a first obtaining submodule, for obtaining the adjusted program based on the post-debugging context data. A first execution submodule, for executing the debugged program using the first target thread.
[0153] In some embodiments, the target value also includes an identification value of the first target thread.
[0154] Figure 8 is a block diagram of a program debugging device according to another embodiment of the present disclosure.
[0155] like Figure 8 As shown, the device 802 may include a display module 8021 , a first adjustment module 8022 , and a first release module 8023 .
[0156] The display module 8021 is used to display program context data corresponding to the first breakpoint in response to determining that a first breakpoint of a program executed by a first target thread is triggered and determining that a target resource is occupied by the first target thread.
[0157] The first adjustment module 8022 is configured to adjust the first breakpoint from a valid breakpoint to an invalid breakpoint in response to receiving a continue execution instruction.
[0158] The first releasing module 8023 is used to release the target resource.
[0159] In some embodiments, the first target thread is one of multiple first threads on the device side, the multiple first threads correspond to multiple first storage spaces respectively, the first thread is configured with at least one of a breakpoint effectiveness flag, a breakpoint trigger flag and a resource occupancy flag, the breakpoint effectiveness flag is used to indicate whether at least one breakpoint in the program is valid, the breakpoint trigger flag is used to indicate whether at least one breakpoint is triggered, the resource occupancy flag is used to indicate whether the target resource is occupied by the first thread, and at least one breakpoint includes a first breakpoint.
[0160] In some embodiments, the first target thread is one of a plurality of first threads on the device side. The display module includes: a second reading submodule, configured to use the second target thread to read a first storage space corresponding to the first target thread to obtain program context data. The second target thread is a second thread corresponding to the first target thread among a plurality of second threads on the host side. The first display submodule is configured to display program context data.
[0161] In some embodiments, the display module includes: a second display submodule, configured to display the program context data in response to determining that the value of the breakpoint trigger flag corresponding to the first target thread is a valid value and the value of the resource occupation flag corresponding to the first target thread is a valid value; and a sixth adjustment submodule, configured to adjust the value of the resource occupation flag corresponding to the first target thread to an invalid value.
[0162] In some embodiments, the first adjustment module includes: a seventh adjustment submodule, configured to adjust the value of the breakpoint effectiveness flag corresponding to the first target thread to an invalid value; and an eighth adjustment submodule, configured to adjust the breakpoint thread identification value to a preset identification value.
[0163] In some embodiments, the first target thread is one of a plurality of first threads, and the target resource is occupied by the first thread when the breakpoint thread identifier is a target value, and the target value is a preset identifier value or an identifier value of the first thread. The device further includes: a second release module, which is used to release the target resource in response to receiving a thread switching instruction and determining that a second breakpoint of a program executed by the thread to be switched is triggered. The thread to be switched corresponds to the thread switching instruction, and the thread to be switched is one of a plurality of first threads. A ninth adjustment submodule, which is used to adjust the breakpoint thread identifier value to the identifier value of the thread to be switched so that the thread to be switched occupies the target resource.
[0164] It can be understood that the apparatus of the present disclosure is described above, and the equipment including the apparatus will be described below.
[0165] Fig. 9 is a schematic diagram of an electronic device according to an embodiment of the present disclosure.
[0166] like Fig. 9 As shown, the device 90 may include a first program debugging device 901 and a second program debugging device 902. The first program debugging device may be, for example, the above-mentioned device 701. The second program debugging device may be, for example, the above-mentioned device 802.
[0167] In the technical solution of the present disclosure, the collection, storage, use, processing, transmission, provision and disclosure of user personal information involved are in compliance with the provisions of relevant laws and regulations and do not violate public order and good morals.
[0168] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium and a computer program product.
[0169] Fig.10 A schematic block diagram of an example electronic device 1000 that can be used to implement an embodiment of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.
[0170] like Fig.10 As shown, the device 1000 includes a computing unit 1001, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 1002 or a computer program loaded from a storage unit 1008 to a random access memory (RAM) 1003. In the RAM 1003, various programs and data required for the operation of the device 1000 can also be stored. The computing unit 1001, the ROM 1002, and the RAM 1003 are connected to each other via a bus 1004. An input / output (I / O) interface 1005 is also connected to the bus 1004.
[0171] A number of components in the device 1000 are connected to the I / O interface 1005, including: an input unit 1006, such as a keyboard, a mouse, etc.; an output unit 1007, such as various types of displays, speakers, etc.; a storage unit 1008, such as a disk, an optical disk, etc.; and a communication unit 1009, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 1009 allows the device 1000 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0172] The computing unit 1001 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 1001 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSP), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 1001 performs the various methods and processes described above, such as program debugging methods. For example, in some embodiments, the program debugging method may be implemented as a computer software program, which is tangibly included in a machine-readable medium, such as a storage unit 1008. In some embodiments, part or all of the computer program may be loaded and / or installed on the device 1000 via the ROM 1002 and / or the communication unit 1009. When the computer program is loaded into the RAM 1003 and executed by the computing unit 1001, one or more steps of the program debugging method described above may be performed. Alternatively, in other embodiments, the computing unit 1001 may be configured to execute the program debugging method in any other appropriate manner (for example, by means of firmware).
[0173] Various embodiments of the systems and techniques described above herein may be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard parts (ASSPs), system on chip systems (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0174] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0175] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any suitable combination of the foregoing. More specific examples of machine-readable storage media may include electrical connections based on one or more lines, portable computer disks, hard disks, random access memories, read-only memories, erasable programmable read-only memories (EPROM) or flash memories, optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.
[0176] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a cathode ray tube (CRT) display or a liquid crystal display (LCD)) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0177] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a Local Area Network (LAN), a Wide Area Network (WAN), and the Internet.
[0178] A computer system may include clients and servers. Clients and servers are generally remote from each other and usually interact through a communication network. The relationship of client and server is generated by computer programs running on respective computers and having a client-server relationship to each other.
[0179] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0180] The above specific implementations do not constitute a limitation on the protection scope of the present disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. A program debugging method, comprising: In response to determining that a first breakpoint of a program executed by a first target thread is triggered, storing program context data corresponding to the first breakpoint in a first storage space corresponding to the first target thread; In response to determining that the first breakpoint is a valid breakpoint, occupying a target resource using the first target thread; In response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, the first target thread is used to execute a debugged program, where the debugged program is obtained according to the program context data.
2. The method according to claim 1, wherein: The first target thread is one of multiple first threads on the device side, and the multiple first threads correspond to multiple first storage spaces respectively. The first thread is configured with at least one of a breakpoint effectiveness flag, a breakpoint trigger flag and a resource occupancy flag. The breakpoint effectiveness flag is used to indicate whether at least one breakpoint in the program is valid, the breakpoint trigger flag is used to indicate whether at least one breakpoint is triggered, and the resource occupancy flag is used to indicate whether the target resource is occupied by the first thread, and at least one breakpoint includes the first breakpoint.
3. The method according to claim 2, wherein: The storing the program context data corresponding to the first breakpoint into a first storage space corresponding to the first target thread comprises: Adjusting the value of the breakpoint effectiveness flag of the first target thread to a valid value; Adjusting the value of the breakpoint trigger flag of the first target thread to a valid value; The program context data is stored in a first storage space corresponding to the first target thread.
4. The method according to claim 2, wherein: The using the first target thread to occupy the target resource comprises at least one of the following operations: In response to determining that the breakpoint thread identification value is a target value and the target resource is occupied by the first target thread, adjusting the value of the resource occupation flag bit of the first target thread to a valid value, wherein the target value includes a preset identification value; The breakpoint thread identification value is adjusted to the identification value of the first target thread.
5. The method according to claim 2, wherein: In response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, executing the debugged program using the first target thread includes: In response to determining that the value of the breakpoint effectiveness flag corresponding to the first target thread is adjusted from a valid value to an invalid value, reading post-debugging context data from the first storage space corresponding to the first target thread, wherein the post-debugging context data is obtained according to at least one of the program context data and user debugging data; Obtaining the adjusted program according to the post-debugging context data; The debugged program is executed using the first target thread.
6. The method according to claim 4, wherein: The target value also includes an identification value of the first target thread.
7. A program debugging method, comprising: In response to determining that a first breakpoint of a program executed by a first target thread is triggered and determining that a target resource is occupied by the first target thread, displaying program context data corresponding to the first breakpoint; In response to receiving a continue execution instruction, adjusting the first breakpoint from a valid breakpoint to an invalid breakpoint; Release the target resource.
8. The method according to claim 7, wherein: The first target thread is one of a plurality of first threads on the device side, The displaying of program context data corresponding to the first breakpoint includes: Using a second target thread to read a first storage space corresponding to the first target thread to obtain the program context data, wherein the second target thread is a second thread corresponding to the first target thread among a plurality of second threads on the host side; The program context data is displayed.
9. The method according to claim 7, wherein: The first target thread is one of multiple first threads on the device side, and the multiple first threads correspond to multiple first storage spaces respectively. The first thread is configured with at least one of a breakpoint effectiveness flag, a breakpoint trigger flag and a resource occupancy flag. The breakpoint effectiveness flag is used to indicate whether at least one breakpoint in the program is valid, the breakpoint trigger flag is used to indicate whether at least one breakpoint is triggered, and the resource occupancy flag is used to indicate whether the target resource is occupied by the first thread, and at least one breakpoint includes the first breakpoint.
10. The method according to claim 9, wherein: In response to determining that a first breakpoint of a program executed by a first target thread is triggered and determining that a target resource is occupied by the first target thread, displaying program context data corresponding to the first breakpoint includes: In response to determining that the value of the breakpoint trigger flag corresponding to the first target thread is a valid value and the value of the resource occupation flag corresponding to the first target thread is a valid value, displaying the program context data; The value of the resource occupation flag corresponding to the first target thread is adjusted to an invalid value.
11. The method according to claim 9, wherein: The adjusting the first breakpoint from a valid breakpoint to an invalid breakpoint comprises: Adjusting the value of the breakpoint effectiveness flag corresponding to the first target thread to an invalid value; Adjust the breakpoint thread ID value to the preset ID value.
12. The method according to claim 7, wherein: The first target thread is one of a plurality of first threads, the target resource is occupied by the first thread when the breakpoint thread identifier is a target value, and the target value is a preset identifier value or an identifier value of the first thread, Also includes: In response to receiving a thread switching instruction and determining that a second breakpoint of a program executed by a to-be-switched thread is triggered, releasing the target resource, wherein the to-be-switched thread corresponds to the thread switching instruction and is one of the plurality of first threads; The breakpoint thread identification value is adjusted to the identification value of the thread to be switched, so that the thread to be switched occupies the target resource.
13. A program debugging device, comprising: A storage module, configured to store program context data corresponding to the first breakpoint to a first storage space corresponding to the first target thread in response to determining that a first breakpoint of a program executed by the first target thread is triggered; an occupying module, configured to occupy a target resource using the first target thread in response to determining that the first breakpoint is a valid breakpoint; The execution module is used for executing a debugged program using the first target thread in response to determining that the first breakpoint is adjusted from a valid breakpoint to an invalid breakpoint, wherein the debugged program is obtained according to the program context data.
14. The device according to claim 13, wherein: The first target thread is one of multiple first threads on the device side, and the multiple first threads correspond to multiple first storage spaces respectively. The first thread is configured with at least one of a breakpoint effectiveness flag, a breakpoint trigger flag and a resource occupancy flag. The breakpoint effectiveness flag is used to indicate whether at least one breakpoint in the program is valid, the breakpoint trigger flag is used to indicate whether at least one breakpoint is triggered, and the resource occupancy flag is used to indicate whether the target resource is occupied by the first thread, and at least one breakpoint includes the first breakpoint.
15. A program debugging device, comprising: a display module, configured to display program context data corresponding to the first breakpoint in response to determining that a first breakpoint of a program executed by a first target thread is triggered and determining that a target resource is occupied by the first target thread; A first adjustment module, configured to adjust the first breakpoint from a valid breakpoint to an invalid breakpoint in response to receiving a continue execution instruction; The first releasing module is used to release the target resource.
16. The device according to claim 15, wherein: The first target thread is one of multiple first threads on the device side, and the multiple first threads correspond to multiple first storage spaces respectively. The first thread is configured with at least one of a breakpoint effectiveness flag, a breakpoint trigger flag and a resource occupancy flag. The breakpoint effectiveness flag is used to indicate whether at least one breakpoint in the program is valid, the breakpoint trigger flag is used to indicate whether at least one breakpoint is triggered, and the resource occupancy flag is used to indicate whether the target resource is occupied by the first thread, and at least one breakpoint includes the first breakpoint.
17. An electronic device, comprising a first program debugging device and a second program debugging device, wherein: The first program debugging device is a device as claimed in any one of claims 13 to 14; The second program debugging device is a device as described in any one of claims 15 to 16.
18. An electronic device, comprising: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 12.
19. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to cause the computer to execute the method according to any one of claims 1 to 12.
20. A computer program product comprising a computer program which, when executed by a processor, implements the method according to any one of claims 1 to 12.