Multi-layer optical chip high-precision voltage source matrix interconnection method

Abstract

The invention discloses a multi-layer optical chip high-precision voltage source matrix interconnection method. The method comprises the following steps: S1, designing a multi-layer PCB (Printed Circuit Board) superposition structure; s2, initializing a system, and establishing communication connection with an I2C bus and an SPI bus; s3, a DAC8568 chip and a target channel are selected through an I2C protocol; s4, an initialization configuration instruction is sent to the DAC8568 chip; s5, acquiring operation data of the optical chip and transmitting the operation data to the microcontroller; s6, dynamically calculating the target voltage, and adjusting the output; s7, the state of the DAC8568 chip is monitored, and abnormity is detected; and S8, correcting the voltage output of the abnormal channel. Through multi-layer PCB structure optimization, microcontroller dynamic control and efficient communication protocol combination, high-precision voltage distribution and dynamic adjustment of a multi-layer optical chip are achieved, and the precision, stability and response speed of a system are improved.

Description

Technical Field

[0001] The invention relates to the technical field of optoelectronic chips, and in particular to a method for interconnecting a multi-layer optical chip high-precision voltage source matrix. Background Art

[0002] With the rapid development of modern information technology and communication technology, optical chip technology, as the core support in the fields of optical communication, optical computing and optical sensing, is constantly experiencing innovation and breakthroughs. Optical chips integrate optical and electronic functions into a small, high-density structure to achieve high-speed, low-power information processing and transmission, and have become an important engine for promoting the next generation of optoelectronic technology. In the complex multi-layer optical chip design, different optoelectronic devices need to be driven by precise voltage sources to maintain stable operation. This places stringent requirements on the distribution and regulation of voltage sources, requiring not only extremely high accuracy and stability of the voltage output, but also real-time dynamic adjustment capabilities to cope with the complex demands brought about by load changes and fluctuating working conditions in the optical chip.

[0003] In the prior art, DAC (digital-to-analog converter) chips are usually used to achieve high-precision voltage output to meet the strict requirements of optical chips for voltage sources. As a 16-bit high-resolution, multi-channel output DAC chip, DAC8568 has been widely used in high-precision voltage control scenarios. Communicating with a microcontroller (MCU) through the SPI protocol, DAC8568 can provide precision voltage output for multiple independent channels. However, in practical applications, relying solely on a single DAC chip is usually difficult to meet the needs of complex multi-layer optical chips. In particular, when multiple DAC chips are integrated in a multi-layer PCB structure, the difficulty of voltage distribution and regulation will increase significantly. In the prior art, the voltage source management solution for multi-layer optical chips mainly has the following defects:

[0004] First, the accuracy and stability of the voltage source output of multi-layer optical chips are still limited. Due to the complexity of the multi-layer PCB board structure, the voltage signal is easily affected by noise interference and electromagnetic coupling effects during transmission, resulting in voltage fluctuations. This fluctuation not only affects the performance of optoelectronic devices, but may also have a serious impact on the working stability of the entire optical chip. In addition, traditional voltage distribution schemes usually lack inter-layer signal isolation design, which may cause signal interference between multiple DAC chips, further reducing the accuracy and reliability of voltage output.

[0005] Secondly, the dynamic regulation capability of the voltage source in the prior art is insufficient. During the operation of a multi-layer optical chip, the load demand usually changes with the working state of the optoelectronic device, such as temperature increase, working mode switching, etc. This dynamic demand requires the voltage source to be able to adjust the output in real time to match the actual load. However, the voltage configuration in traditional solutions is usually static and cannot respond quickly according to load changes, resulting in the system being unable to achieve optimal performance under complex operating conditions. Especially in scenarios that require high-frequency switching of working states, this lack of dynamic regulation capability will significantly limit the application capabilities of optical chips.

[0006] Thirdly, the existing communication structure faces the problem of design complexity in the voltage source management of multi-layer optical chips. Usually, the SPI protocol is used for data communication between MCU and DAC chip, while the I2C protocol is used for basic communication management between multiple devices. However, when multiple DAC chips are distributed on different PCB layers, the channel selection and switching need to be realized through the selector module. This solution has high complexity in hardware design, and also brings large communication delay and signal loss. In addition, the traditional solution has a relatively simple control method for the selector module and lacks an intelligent management mechanism, which makes it difficult to effectively support the complex communication requirements of the multi-layer structure.

[0007] Finally, the monitoring and processing mechanisms for abnormal conditions in the existing technical solutions are also insufficient. In a multi-layer optical chip, voltage anomalies in any channel will have an adverse effect on the operation of optoelectronic devices. However, the identification of voltage anomalies in traditional solutions usually relies on simple threshold judgments and fails to comprehensively consider the impact of dynamic environmental changes. In addition, abnormality processing is usually performed manually, lacking an automated and intelligent correction mechanism, resulting in a slow response speed of the system in dealing with sudden problems, making it difficult to meet the reliability requirements of high-performance optical chips.

[0008] Therefore, how to provide a high-precision voltage source matrix interconnection method for multi-layer optical chips is an urgent problem that technicians in this field need to solve. Summary of the invention

[0009] One purpose of the present invention is to propose a multi-layer optical chip high-precision voltage source matrix interconnection method. The present invention adopts a multi-layer PCB board stacking structure, combines the dynamic control of a microcontroller (MCU) and a selector module, and uses SPI and I2C communication protocols to achieve precise voltage source distribution and dynamic adjustment of multiple DAC8568 chips. The system's voltage output configuration, dynamic adjustment mechanism, and abnormal state monitoring and correction method are described in detail, and it has the advantages of high voltage output accuracy, fast dynamic response speed, high communication efficiency, and strong system reliability.

[0010] A high-precision voltage source matrix interconnection method for multi-layer optical chips according to an embodiment of the present invention comprises the following steps:

[0011] S1. Design a multi-layer PCB stacking structure, integrate multiple DAC8568 chips on each PCB, and provide an SPI communication bus connection interface and an I2C management channel supported by a selector module for each DAC8568 chip;

[0012] S2, initializing the system through the microcontroller, establishing communication connections with the I2C bus and the SPI bus, configuring the synchronization mode of the SPI bus and the address selection mode of the I2C bus;

[0013] S3, using the I2C protocol to control the selector module, the microcontroller selects the DAC8568 chip to be operated and its target channel according to the hierarchy of the PCB board and the logical address of the DAC8568 chip;

[0014] S4, sending an initialization configuration instruction to the selected DAC8568 chip through the SPI protocol, setting the initial voltage output values ​​of all channels, and storing the initialized voltage configuration in the microcontroller memory;

[0015] S5, collecting operating data of optoelectronic devices in the optical chip through the sensor module, including current load and voltage demand, and transmitting the collected real-time data to the microcontroller for processing;

[0016] S6. Based on the real-time operation data and load requirements of the optoelectronic device, the microcontroller dynamically calculates the target voltage value, controls the selector module through the I2C protocol to select the target DAC8568 chip and its channel, and sends an update instruction through the SPI protocol to adjust the output voltage;

[0017] S7, periodically monitor the output status of all DAC8568 chips through the I2C protocol, read the voltage value of its channel, and compare the monitoring result with the expected value to detect whether there is any abnormality;

[0018] S8. When an output voltage abnormality is detected, the microcontroller readjusts the voltage output value of the target channel according to the feedback data, selects the relevant chip channel through the selector module and sends a correction instruction.

[0019] Optionally, the S2 specifically includes:

[0020] S21, start the microcontroller and load the system initialization program, including the basic communication configuration of I2C and SPI buses;

[0021] S22, setting the synchronization mode of the SPI bus through the microcontroller, including selecting the master device mode, setting the clock polarity and phase of data transmission:

[0022] T sync =T clk(1+CPOL)+ΔT phase CPHA;

[0023] Among them, T sync Indicates the bus synchronization time, T clk Indicates the clock cycle, CPOL indicates the SPI clock polarity, ΔT phase Indicates the clock phase adjustment time, CPHA indicates the SPI clock phase;

[0024] S23, configure the communication parameters of the SPI bus, including data frame length and data transmission speed, to match the communication requirements of the DAC8568 chip;

[0025] S24, initialize the I2C bus, set the communication rate and data transmission format, and configure it to support the address recognition mode of multiple slave devices;

[0026] S25, assigning unique device addresses to the selector module and the DAC8568 chip on each PCB layer through the I2C bus;

[0027] S26, complete the communication connection test of I2C and SPI buses, confirm that the buses are working properly by sending and receiving test signals, and record the initialization status to the microcontroller memory.

[0028] Optionally, the S3 specifically includes:

[0029] S31, sending instructions to the selector module through the I2C protocol to activate the selector module of the corresponding PCB layer;

[0030] S32, parsing the logic address of the target DAC8568 chip stored in the microcontroller, and matching it with the hierarchical address of the selector module to determine the specific target chip;

[0031] S33, according to the target PCB layer and the logical address of the target DAC8568 chip, use the selector module to select the communication channel connected to the target DAC8568 chip;

[0032] S34, after the selector module completes the channel selection, confirm the activation status of the target DAC8568 chip through the I2C protocol;

[0033] S35, setting the communication mode of the target DAC8568 chip, and establishing a logical connection between the SPI bus and the target DAC8568 chip;

[0034] S36, record the currently selected DAC8568 chip and its channel information to the microcontroller memory.

[0035] Optionally, the S4 specifically includes:

[0036] S41, establish a communication connection with the selected DAC8568 chip through the SPI protocol, send a communication test signal and confirm the communication status, and return a status signal after success;

[0037] S42, sending an initialization command to the target DAC8568 chip, clearing its internal registers, and setting the output voltage values ​​of all channels to initial values;

[0038] S43, select each channel of the DAC8568 chip one by one through the SPI protocol, and send a configuration command to set the initial output voltage of each channel to a specified value, and record the register configuration status of each channel;

[0039] S44. After completing the initialization configuration of all channels, read the feedback voltage value of each channel through the SPI protocol, compare it with the initial voltage, and calculate the error:

[0040] ΔV eff =w abs ·|V init -V feedback |+w var ·σ(V feedback );

[0041] Where, ΔV eff is the comprehensive error, w abs is the absolute error weight, V init is the initial voltage, V feedback is the feedback voltage value, w var is the voltage fluctuation weight, σ(V feedback ) is the standard deviation of the feedback voltage;

[0042] S45, storing the voltage value after the initialization configuration is completed in the memory of the microcontroller, and the storage format thereof is a mapping table between channels and voltage values;

[0043] S46, recording the status of the currently initialized DAC8568 chip, and storing the status information in the operation log of the microcontroller.

[0044] Optionally, the S5 specifically includes:

[0045] S51, collecting operation data of optoelectronic devices in the optical chip through the sensor module, including information related to current current load and voltage demand;

[0046] S52, transmitting the collected operation data to the microcontroller via the data bus, and performing preliminary screening and denoising on the data;

[0047] S53, the microcontroller analyzes the current load state according to the filtered data, extracts the voltage demand information, and matches the result with the current working state of the chip;

[0048] S54, allocating the data of current load and voltage demand to corresponding optoelectronic device channels, and establishing a real-time data model for each channel;

[0049] S55, processing the real-time data through the microcontroller, generating an adjustment plan, and storing the processed real-time data and the adjustment plan in the microcontroller memory.

[0050] Optionally, the S6 specifically includes:

[0051] S61, based on the real-time operation data and load requirements of the optoelectronic devices, the microcontroller analyzes the working status of each optoelectronic device and extracts the current load and voltage requirement information;

[0052] S62, the microcontroller calculates the target voltage value of each photoelectric device according to the analysis result, and compares the calculation result with the output voltage of the current channel to determine the target channel that needs to be adjusted;

[0053] S63, controlling the selector module through the I2C protocol, selecting the target DAC8568 chip and its associated channels that need to be adjusted;

[0054] S64, the microcontroller generates an update instruction to specify the voltage adjustment amount and the new target voltage value of the target channel:

[0055] V new =V current +ΔV err ·(w temp ·F temp +w load ·F load );

[0056] Among them, V new is the updated target voltage value, V current is the output voltage of the current channel, ΔV err is the voltage error of the current channel, w temp and w load are the weights of temperature factor and load factor, respectively. temp is the temperature influence factor, F load is the load influence factor;

[0057] S65, sending an update instruction to the designated channel of the target DAC8568 chip through the SPI protocol to adjust the output voltage in real time;

[0058] S66. After the adjustment is completed, the microcontroller verifies again whether the output voltage reaches the calculated target voltage value, and records the adjustment status to the system log.

[0059] Optionally, the S7 specifically includes:

[0060] S71, periodically polling all channels of the DAC8568 chip through the I2C protocol to collect the current output voltage value of each channel;

[0061] S72, comparing the collected channel voltage value with the corresponding expected value to analyze the working status of the channel;

[0062] S73, judging whether there is any abnormality in the channel according to the comparison result, and marking the channel in the abnormal state;

[0063] S74, record the information of all abnormal channels, including channel numbers and deviation data, and generate an abnormality report;

[0064] S75, storing the monitored states of the normal channel and the abnormal channel in the microcontroller memory respectively;

[0065] S76. Update the status information of the entire voltage source matrix according to the monitoring results.

[0066] The beneficial effects of the present invention are:

[0067] The present invention effectively solves many problems in the prior art through an innovative multi-layer optical chip high-precision voltage source matrix interconnection method and achieves significant beneficial effects. By adopting a multi-layer PCB board superposition structure and an efficient SPI and I2C communication protocol combination, the present invention realizes the precise interconnection and coordinated control of multiple DAC8568 chips, significantly improving the accuracy and stability of voltage output. In view of the problem that voltage signals in multi-layer PCBs are easily interfered by noise, the present invention successfully reduces the impact of inter-layer interference and signal coupling by optimizing the communication path and the dynamic control of the selector module, ensuring that the optoelectronic devices in the multi-layer optical chip can operate stably.

[0068] In addition, the present invention has a powerful dynamic adjustment capability. By real-time monitoring of the load demand in the optical chip, the microcontroller can dynamically adjust the output voltage of each channel based on the collected operating data to meet the precise voltage requirements of the optoelectronic devices under different working conditions. Especially in the scenario of high-frequency working mode switching, the dynamic adjustment mechanism of the present invention can respond quickly, effectively improving the overall performance and operating efficiency of the system. At the same time, by combining intelligent algorithms and real-time feedback in the dynamic adjustment process, the flexibility and adaptability of the system are further enhanced.

[0069] The present invention has also achieved significant breakthroughs in communication efficiency and management capabilities. Through the introduction and optimization design of the selector module, the communication path of multiple DAC chips in the multi-layer PCB structure is successfully simplified, greatly reducing the efficiency problems caused by communication delays and signal conflicts in traditional solutions. At the same time, combining the low-speed management of the I2C protocol with the high-speed communication of the SPI protocol, the present invention significantly improves the communication speed while taking into account the system stability, laying the foundation for the efficient management of complex voltage source matrices.

[0070] More importantly, the present invention has a complete abnormal state monitoring and correction capability. By monitoring the output voltage of all channels in real time and comparing it with the target voltage, it can quickly identify abnormal channels and take automated correction measures, significantly improving the reliability and safety of the system. Combined with an intelligent abnormal priority mechanism, the present invention can also prioritize abnormalities in key channels to ensure that the entire optical chip system can still operate stably when an emergency occurs.

[0071] In summary, the present invention not only overcomes the defects of the prior art, but also provides reliable guarantee for the practical application of high-performance optical chips through technical innovations such as multi-layer structure optimization, intelligent voltage regulation, efficient communication path, and automated abnormal management. The implementation of this technology greatly improves the performance, reliability and operating efficiency of optical chips, creating new possibilities for further development in the fields of optical communication and optical computing. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0073] Figure 1 This is a flow chart of the multi-layer optical chip high-precision voltage source matrix interconnection method proposed by the present invention;

[0074] Figure 2 This is a functional module diagram of the dynamic voltage output adjustment process of the multi-layer optical chip high-precision voltage source matrix interconnection method proposed by the present invention. DETAILED DESCRIPTION

[0075] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0076] refer to Figure 1-2 , a multi-layer optical chip high-precision voltage source matrix interconnection method, comprising the following steps:

[0077] S1. Design a multi-layer PCB stacking structure, integrate multiple DAC8568 chips on each PCB, and provide an SPI communication bus connection interface and an I2C management channel supported by a selector module for each DAC8568 chip;

[0078] S2, initializing the system through the microcontroller, establishing communication connections with the I2C bus and the SPI bus, configuring the synchronization mode of the SPI bus and the address selection mode of the I2C bus;

[0079] S3, using the I2C protocol to control the selector module, the microcontroller selects the DAC8568 chip to be operated and its target channel according to the hierarchy of the PCB board and the logical address of the DAC8568 chip;

[0080] S4, sending an initialization configuration instruction to the selected DAC8568 chip through the SPI protocol, setting the initial voltage output values ​​of all channels, and storing the initialized voltage configuration in the microcontroller memory;

[0081] S5, collecting operating data of optoelectronic devices in the optical chip through the sensor module, including current load and voltage demand, and transmitting the collected real-time data to the microcontroller for processing;

[0082] S6. Based on the real-time operation data and load requirements of the optoelectronic device, the microcontroller dynamically calculates the target voltage value, controls the selector module through the I2C protocol to select the target DAC8568 chip and its channel, and sends an update instruction through the SPI protocol to adjust the output voltage;

[0083] S7, periodically monitor the output status of all DAC8568 chips through the I2C protocol, read the voltage value of its channel, and compare the monitoring result with the expected value to detect whether there is any abnormality;

[0084] S8. When an output voltage abnormality is detected, the microcontroller readjusts the voltage output value of the target channel according to the feedback data, selects the relevant chip channel through the selector module and sends a correction instruction.

[0085] In this implementation, S2 specifically includes:

[0086] S21, start the microcontroller and load the system initialization program, including the basic communication configuration of I2C and SPI buses;

[0087] S22, setting the synchronization mode of the SPI bus through the microcontroller, including selecting the master device mode, setting the clock polarity and phase of data transmission:

[0088] T sync =T clk (1+CPOL)+ΔTphase CPHA;

[0089] Among them, T sync Indicates the bus synchronization time, T clk Indicates the clock cycle, CPOL indicates the SPI clock polarity, ΔT phase Indicates the clock phase adjustment time, CPHA indicates the SPI clock phase;

[0090] S23, configure the communication parameters of the SPI bus, including data frame length and data transmission speed, to match the communication requirements of the DAC8568 chip;

[0091] S24, initialize the I2C bus, set the communication rate and data transmission format, and configure it to support the address recognition mode of multiple slave devices;

[0092] S25, assigning unique device addresses to the selector module and the DAC8568 chip on each PCB layer through the I2C bus;

[0093] S26, complete the communication connection test of I2C and SPI buses, confirm that the buses are working properly by sending and receiving test signals, and record the initialization status to the microcontroller memory.

[0094] In this implementation, S3 specifically includes:

[0095] S31, sending instructions to the selector module through the I2C protocol to activate the selector module of the corresponding PCB layer;

[0096] S32, parsing the logic address of the target DAC8568 chip stored in the microcontroller, and matching it with the hierarchical address of the selector module to determine the specific target chip;

[0097] S33, according to the target PCB layer and the logical address of the target DAC8568 chip, use the selector module to select the communication channel connected to the target DAC8568 chip;

[0098] S34, after the selector module completes the channel selection, confirm the activation status of the target DAC8568 chip through the I2C protocol;

[0099] S35, setting the communication mode of the target DAC8568 chip, and establishing a logical connection between the SPI bus and the target DAC8568 chip;

[0100] S36, record the currently selected DAC8568 chip and its channel information to the microcontroller memory.

[0101] In this implementation, S4 specifically includes:

[0102] S41, establish a communication connection with the selected DAC8568 chip through the SPI protocol, send a communication test signal and confirm the communication status, and return a status signal after success;

[0103] S42, sending an initialization command to the target DAC8568 chip, clearing its internal registers, and setting the output voltage values ​​of all channels to initial values;

[0104] S43, select each channel of the DAC8568 chip one by one through the SPI protocol, and send a configuration command to set the initial output voltage of each channel to a specified value, and record the register configuration status of each channel;

[0105] S44. After completing the initialization configuration of all channels, read the feedback voltage value of each channel through the SPI protocol, compare it with the initial voltage, and calculate the error:

[0106] ΔV eff =w abs ·|V init -V feedback |+w var ·σ(V feedback );

[0107] Where, ΔV eff is the comprehensive error, w abs is the absolute error weight, V init is the initial voltage, V feedback is the feedback voltage value, w var is the voltage fluctuation weight, σ(V feedback ) is the standard deviation of the feedback voltage;

[0108] S45, storing the voltage value after the initialization configuration is completed in the memory of the microcontroller, and the storage format thereof is a mapping table between channels and voltage values;

[0109] S46, recording the status of the currently initialized DAC8568 chip, and storing the status information in the operation log of the microcontroller.

[0110] In this implementation manner, S5 specifically includes:

[0111] S51, collecting operation data of optoelectronic devices in the optical chip through the sensor module, including information related to current current load and voltage demand;

[0112] S52, transmitting the collected operation data to the microcontroller via the data bus, and performing preliminary screening and denoising on the data;

[0113] S53, the microcontroller analyzes the current load state according to the filtered data, extracts the voltage demand information, and matches the result with the current working state of the chip;

[0114] S54, allocating the data of current load and voltage demand to corresponding optoelectronic device channels, and establishing a real-time data model for each channel;

[0115] S55, processing the real-time data through the microcontroller, generating an adjustment plan, and storing the processed real-time data and the adjustment plan in the microcontroller memory.

[0116] In this implementation manner, S6 specifically includes:

[0117] S61, based on the real-time operation data and load requirements of the optoelectronic devices, the microcontroller analyzes the working status of each optoelectronic device and extracts the current load and voltage requirement information;

[0118] S62, the microcontroller calculates the target voltage value of each photoelectric device according to the analysis result, and compares the calculation result with the output voltage of the current channel to determine the target channel that needs to be adjusted;

[0119] S63, controlling the selector module through the I2C protocol, selecting the target DAC8568 chip and its associated channels that need to be adjusted;

[0120] S64, the microcontroller generates an update instruction to specify the voltage adjustment amount and the new target voltage value of the target channel:

[0121] V new =V current +ΔV err ·(w temp ·F temp +w load ·F load );

[0122] Among them, V new is the updated target voltage value, V current is the output voltage of the current channel, ΔV err is the voltage error of the current channel, w temp and w load are the weights of temperature factor and load factor, respectively. temp is the temperature influence factor, F load is the load influence factor;

[0123] S65, sending an update instruction to the designated channel of the target DAC8568 chip through the SPI protocol to adjust the output voltage in real time;

[0124] S66. After the adjustment is completed, the microcontroller verifies again whether the output voltage reaches the calculated target voltage value, and records the adjustment status to the system log.

[0125] In this implementation manner, the S7 specifically includes:

[0126] S71, periodically polling all channels of the DAC8568 chip through the I2C protocol to collect the current output voltage value of each channel;

[0127] S72, comparing the collected channel voltage value with the corresponding expected value to analyze the working status of the channel;

[0128] S73, judging whether there is any abnormality in the channel according to the comparison result, and marking the channel in the abnormal state;

[0129] S74, record the information of all abnormal channels, including channel numbers and deviation data, and generate an abnormality report;

[0130] S75, storing the monitored states of the normal channel and the abnormal channel in the microcontroller memory respectively;

[0131] S76. Update the status information of the entire voltage source matrix according to the monitoring results.

[0132] Embodiment 1:

[0133] In order to verify the feasibility of the present invention in implementation, the present invention is applied to a certain optical communication system. In the test, we used a multi-layer optical chip system with a six-layer PCB board stacking structure. Two DAC8568 chips are integrated on each PCB board, each chip has 8 channels, a total of 96 channels, which are used to provide high-precision voltage support for optical amplifiers and optical modulators. The present invention manages all DAC8568 chips through a microcontroller (MCU), selects the target chip and controls the selector module using the I2C protocol, and then sends dynamic adjustment instructions to the selected channel through the SPI protocol to achieve real-time voltage regulation.

[0134] When the optical amplifier switches from a low-load state to a high-load state, its current demand increases from 1.2A to 3.8A, and the temperature rises to 55°C. In the traditional solution, due to the lack of real-time dynamic adjustment capability, the output voltage fluctuates from the target value of 2.5V to 2.8V, resulting in unstable gain of the optical amplifier. The microcontroller of the present invention calculates the target voltage as 2.503V by monitoring the current load and temperature changes in real time, and quickly locates the target DAC8568 chip through the I2C protocol, and adjusts the output voltage through the SPI protocol. The entire dynamic adjustment process is completed within 12ms to ensure the stable operation of the optical amplifier.

[0135] In terms of abnormal state monitoring, when a channel on a PCB layer is subject to external electromagnetic interference, the output voltage deviates from the target value by more than 0.1V. The feedback mechanism of the present invention detects the abnormality within 30ms and marks the channel as a state to be corrected. Subsequently, the system recalculates and adjusts the deviation to restore the output voltage from 2.62V to the target value of 2.500V, with a deviation of only 0.002V. At the same time, the relevant data is recorded in the log to provide a reference for subsequent system optimization.

[0136] Table 1 Dynamic voltage regulation response time comparison table

[0137]

[0138] Table 2 Abnormal state processing efficiency comparison table

[0139]

[0140] From Table 1, it can be seen that the response speed of the present invention is significantly faster than that of the traditional solution. For example, in the scenario of switching from low load to high load, the response time of the traditional solution is 45ms, while the present invention only takes 12ms, an increase of 73.33%. Similarly, the response time of switching from high load to low load and instantaneous load fluctuation is shortened to 14ms and 8ms, respectively, an increase of 72% and 73.33%, respectively. These data show that the present invention can respond quickly to load changes and significantly improve the dynamic performance of voltage regulation.

[0141] It can be seen from Table 2 that the present invention also exhibits superior performance. For example, the processing time of channel deviation correction is shortened from 120ms of the traditional solution to 30ms, and the efficiency is improved by 75%. In inter-layer interference suppression, the processing time is shortened from 150ms to 50ms, an improvement of 66.67%. These data show that the present invention achieves fast response and efficient processing through intelligent anomaly detection and correction mechanism.

[0142] In summary, the dynamic response performance and exception handling efficiency of the present invention are significantly better than traditional solutions in multiple key indicators, especially in scenarios with frequent load changes or large external interference. The present invention not only achieves faster response speed and higher adjustment accuracy, but also makes breakthrough progress in the efficiency of exception correction and log recording, providing strong support for the efficient operation of complex application scenarios of multi-layer optical chips.

[0143] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A multi-layer optical chip high-precision voltage source matrix interconnection method, characterized in that: The steps include: S1. Design a multi-layer PCB stacking structure, integrate multiple DAC8568 chips on each PCB, and provide an SPI communication bus connection interface and an I2C management channel supported by a selector module for each DAC8568 chip; S2, initializing the system through the microcontroller, establishing communication connections with the I2C bus and the SPI bus, configuring the synchronization mode of the SPI bus and the address selection mode of the I2C bus; S3, using the I2C protocol to control the selector module, the microcontroller selects the DAC8568 chip to be operated and its target channel according to the hierarchy of the PCB board and the logical address of the DAC8568 chip; S4, sending an initialization configuration instruction to the selected DAC8568 chip through the SPI protocol, setting the initial voltage output values ​​of all channels, and storing the initialized voltage configuration in the microcontroller memory; S5, collecting operating data of optoelectronic devices in the optical chip through the sensor module, including current load and voltage demand, and transmitting the collected real-time data to the microcontroller for processing; S6. Based on the real-time operation data and load requirements of the optoelectronic device, the microcontroller dynamically calculates the target voltage value, controls the selector module through the I2C protocol to select the target DAC8568 chip and its channel, and sends an update instruction through the SPI protocol to adjust the output voltage; S7, periodically monitor the output status of all DAC8568 chips through the I2C protocol, read the voltage value of its channel, and compare the monitoring result with the expected value to detect whether there is any abnormality; S8. When an output voltage abnormality is detected, the microcontroller readjusts the voltage output value of the target channel according to the feedback data, selects the relevant chip channel through the selector module and sends a correction instruction.

2. The multi-layer optical chip high-precision voltage source matrix interconnection method according to claim 1 is characterized in that: The S2 specifically includes: S21, start the microcontroller and load the system initialization program, including the basic communication configuration of I2C and SPI buses; S22, setting the synchronization mode of the SPI bus through the microcontroller, including selecting the master device mode, setting the clock polarity and phase of data transmission: T sync =T clk ·(1+CPOL)+ΔT phase ·CPHA; Among them, T sync Indicates the bus synchronization time, T clk Indicates the clock cycle, CPOL indicates the SPI clock polarity, ΔT phase Indicates the clock phase adjustment time, CPHA indicates the SPI clock phase; S23, configure the communication parameters of the SPI bus, including data frame length and data transmission speed, to match the communication requirements of the DAC8568 chip; S24, initialize the I2C bus, set the communication rate and data transmission format, and configure it to support the address recognition mode of multiple slave devices; S25, assigning unique device addresses to the selector module and the DAC8568 chip on each PCB layer through the I2C bus; S26, complete the communication connection test of I2C and SPI buses, confirm that the buses are working properly by sending and receiving test signals, and record the initialization status to the microcontroller memory.

3. The multi-layer optical chip high-precision voltage source matrix interconnection method according to claim 1, characterized in that: The S3 specifically includes: S31, sending instructions to the selector module through the I2C protocol to activate the selector module of the corresponding PCB layer; S32, parsing the logic address of the target DAC8568 chip stored in the microcontroller, and matching it with the hierarchical address of the selector module to determine the specific target chip; S33, according to the target PCB layer and the logical address of the target DAC8568 chip, use the selector module to select the communication channel connected to the target DAC8568 chip; S34, after the selector module completes the channel selection, confirm the activation status of the target DAC8568 chip through the I2C protocol; S35, setting the communication mode of the target DAC8568 chip, and establishing a logical connection between the SPI bus and the target DAC8568 chip; S36, record the currently selected DAC8568 chip and its channel information to the microcontroller memory.

4. The multi-layer optical chip high-precision voltage source matrix interconnection method according to claim 1, characterized in that: The S4 specifically includes: S41, establish a communication connection with the selected DAC8568 chip through the SPI protocol, send a communication test signal and confirm the communication status, and return a status signal after success; S42, sending an initialization command to the target DAC8568 chip, clearing its internal registers, and setting the output voltage values ​​of all channels to initial values; S43, select each channel of the DAC8568 chip one by one through the SPI protocol, and send a configuration command to set the initial output voltage of each channel to a specified value, and record the register configuration status of each channel; S44. After completing the initialization configuration of all channels, read the feedback voltage value of each channel through the SPI protocol, compare it with the initial voltage, and calculate the error: ΔV eff =w abs ·|V init -V feedback |+w var ·σ(V feedback ); Where, ΔV eff is the comprehensive error, w abs is the absolute error weight, V init is the initial voltage, V feedback is the feedback voltage value, w var is the voltage fluctuation weight, σ(V feedback ) is the standard deviation of the feedback voltage; S45, storing the voltage value after the initialization configuration is completed in the memory of the microcontroller, and the storage format thereof is a mapping table between channels and voltage values; S46, recording the status of the currently initialized DAC8568 chip, and storing the status information in the operation log of the microcontroller.

5. The multi-layer optical chip high-precision voltage source matrix interconnection method according to claim 1, characterized in that: The S5 specifically includes: S51, collecting operation data of optoelectronic devices in the optical chip through the sensor module, including information related to current current load and voltage demand; S52, transmitting the collected operation data to the microcontroller via the data bus, and performing preliminary screening and denoising on the data; S53, the microcontroller analyzes the current load state according to the filtered data, extracts the voltage demand information, and matches the result with the current working state of the chip; S54, allocating the data of current load and voltage demand to corresponding optoelectronic device channels, and establishing a real-time data model for each channel; S55, processing the real-time data through the microcontroller, generating an adjustment plan, and storing the processed real-time data and the adjustment plan in the microcontroller memory.

6. The multi-layer optical chip high-precision voltage source matrix interconnection method according to claim 1, characterized in that: The S6 specifically includes: S61, based on the real-time operation data and load requirements of the optoelectronic devices, the microcontroller analyzes the working status of each optoelectronic device and extracts the current load and voltage requirement information; S62, the microcontroller calculates the target voltage value of each photoelectric device according to the analysis result, and compares the calculation result with the output voltage of the current channel to determine the target channel that needs to be adjusted; S63, controlling the selector module through the I2C protocol, selecting the target DAC8568 chip and its associated channels that need to be adjusted; S64, the microcontroller generates an update instruction to specify the voltage adjustment amount and the new target voltage value of the target channel: V new =V current +ΔV err ·(w temp ·F temp +w load ·F load ); Among them, V new is the updated target voltage value, V current is the output voltage of the current channel, ΔV err is the voltage error of the current channel, w temp and w load are the weights of temperature factor and load factor, respectively. temp is the temperature influence factor, F load is the load influence factor; S65, sending an update instruction to the designated channel of the target DAC8568 chip through the SPI protocol to adjust the output voltage in real time; S66. After the adjustment is completed, the microcontroller verifies again whether the output voltage reaches the calculated target voltage value, and records the adjustment status to the system log.

7. The multi-layer optical chip high-precision voltage source matrix interconnection method according to claim 1, characterized in that: The S7 specifically includes: S71, periodically polling all channels of the DAC8568 chip through the I2C protocol to collect the current output voltage value of each channel; S72, comparing the collected channel voltage value with the corresponding expected value to analyze the working status of the channel; S73, judging whether there is any abnormality in the channel according to the comparison result, and marking the channel in the abnormal state; S74, record the information of all abnormal channels, including channel numbers and deviation data, and generate an abnormality report; S75, storing the monitored states of the normal channel and the abnormal channel in the microcontroller memory respectively; S76. Update the status information of the entire voltage source matrix according to the monitoring results.

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