Voltage conversion circuit

Abstract

The embodiment of the invention provides a voltage conversion circuit. The voltage conversion circuit comprises at least two stages of conversion sub-circuits which are connected in sequence, the first stage of conversion sub-circuit is connected to the control voltage output end of a power input circuit and an integrated circuit chip, and the input ends of the other conversion sub-circuits are connected to the output end of the upper stage of conversion sub-circuit; the first-stage conversion sub-circuit is used for receiving a first chip control voltage output by the power supply input circuit and a delay signal output by the integrated circuit chip, and converting the first chip control voltage into a second chip control voltage under the control of the delay signal; the second chip control voltage is output to a next-stage conversion sub-circuit; and the other conversion sub-circuits are used for converting the second chip control voltage to output a target chip voltage. According to the voltage conversion circuit, the voltage conversion circuit is simple in structure, low in cost and good in performance, and the span of voltage conversion of each stage is small.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of automobile technology, and in particular to a voltage conversion circuit. Background Art

[0002] With the advancement of automobile manufacturing technology, users have higher and higher requirements for automobile comfort. As an important part of the car, the seat is the main contact point between the driver and the passenger and the car. Seats with heating function can improve the driving and riding experience.

[0003] The main consideration for seat heating performance is the temperature of the seat. Too high or too low a seat temperature will affect the user's experience. In a seat heating system, the seat is usually heated by a seat heating circuit to control the seat temperature within the temperature range required by the user. In the seat heating circuit, a voltage conversion circuit can be used to provide the seat heating circuit with a heating power supply voltage and a chip control voltage.

[0004] The voltage conversion circuit in the prior art has the problems of complex circuit structure, high cost and poor performance, and the span of voltage conversion is large. Summary of the invention

[0005] In view of this, an embodiment of the present application provides a voltage conversion circuit, which is used to make the voltage conversion circuit simple in structure, low in cost and good in performance, and to make the span of each level of voltage conversion smaller.

[0006] A first aspect provides a voltage conversion circuit, characterized in that it comprises: at least two stages of conversion subcircuits connected in sequence, wherein the first stage of the conversion subcircuit is connected to the control voltage output terminal of the power input circuit and the integrated circuit chip, and the input terminals of the remaining conversion subcircuits are all connected to the output terminals of the previous stage of the conversion subcircuit;

[0007] The first-stage conversion subcircuit is used to receive the first chip control voltage output by the power input circuit and the delay signal output by the integrated circuit chip, convert the first chip control voltage into a second chip control voltage under the control of the delay signal, and output the second chip control voltage to the next-stage conversion subcircuit;

[0008] The remaining conversion sub-circuits are used to convert the second chip control voltage to output a target chip voltage.

[0009] In a possible implementation, the at least two-stage conversion subcircuit includes a first conversion subcircuit and a second conversion subcircuit, the first conversion subcircuit includes a first chip, a first resistance matching module and a first resistor, and the second conversion subcircuit includes a second chip, a second resistance matching module and a second resistor;

[0010] The input signal terminal of the first chip is connected to the control voltage output terminal of the power input circuit, the enable signal terminal of the first chip is connected to the first node, the first node is connected to the integrated circuit chip, the adjustment signal terminal of the first chip is connected to the first resistance matching module, the output signal terminal of the first chip is connected to the second node, the second node is connected to the output terminal of the first conversion sub-circuit, the first terminal of the first resistor is connected to the first node, and the second terminal of the first resistor is connected to the low voltage terminal;

[0011] The input signal terminal of the second chip is connected to the output terminal of the first conversion sub-circuit, the enable signal terminal of the second chip is connected to the third node, the third node is connected to the second end of the second resistor, the first end of the second resistor is connected to the output terminal of the first conversion sub-circuit, the adjustment signal terminal of the second chip is connected to the second resistor matching module, the output signal terminal of the second chip is connected to the fourth node, and the fourth node is connected to the output terminal of the second conversion sub-circuit.

[0012] In a possible implementation, the first resistance matching module includes a third resistor and a fourth resistor;

[0013] The first end of the third resistor is connected to the second node, and the second end of the third resistor is connected to the adjustment signal terminal;

[0014] A first end of the fourth resistor is connected to the adjustment signal end, and a second end of the fourth resistor is connected to the low voltage end.

[0015] In a possible implementation, the second resistance matching module includes a fifth resistor, a sixth resistor, and a seventh resistor;

[0016] The first end of the fifth resistor is connected to the fourth node, the second end of the fifth resistor is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the adjustment signal terminal;

[0017] A first end of the seventh resistor is connected to the adjustment signal end, and a second end of the seventh resistor is connected to the low voltage end.

[0018] In a possible implementation, the first conversion subcircuit further includes a first front-end filtering module, and the first front-end filtering module includes a first capacitor, a second capacitor, and a third capacitor;

[0019] A first end of the first capacitor is connected to the control voltage output end of the power input circuit, and a second end of the first capacitor is connected to the low voltage end;

[0020] A first end of the second capacitor is connected to the control voltage output end of the power input circuit, and a second end of the second capacitor is connected to the low voltage end;

[0021] A first terminal of the third capacitor is connected to the first node, and a second terminal of the third capacitor is connected to the low voltage terminal.

[0022] In a possible implementation, the first conversion sub-circuit further includes a first back-end filtering module, and the first back-end filtering module includes a fourth capacitor and a fifth capacitor;

[0023] A first end of the fourth capacitor is connected to the second node, and a second end of the fourth capacitor is connected to the low voltage end;

[0024] A first terminal of the fifth capacitor is connected to the second node, and a second terminal of the fifth capacitor is connected to the low voltage terminal.

[0025] In a possible implementation, the second conversion sub-circuit further includes a second front-end filtering module, and the second front-end filtering module includes a sixth capacitor, a seventh capacitor, and an eighth capacitor;

[0026] A first end of the sixth capacitor is connected to the output end of the first conversion sub-circuit, and a second end of the sixth capacitor is connected to the low voltage end;

[0027] A first end of the seventh capacitor is connected to the output end of the first conversion sub-circuit, and a second end of the seventh capacitor is connected to the low voltage end;

[0028] A first terminal of the eighth capacitor is connected to the third node, and a second terminal of the eighth capacitor is connected to the low voltage terminal.

[0029] In a possible implementation, the second conversion sub-circuit further includes a second back-end filtering module, and the second back-end filtering module includes a ninth capacitor and a tenth capacitor;

[0030] A first end of the ninth capacitor is connected to the fourth node, and a second end of the ninth capacitor is connected to the low voltage end;

[0031] A first terminal of the tenth capacitor is connected to the fourth node, and a second terminal of the tenth capacitor is connected to the low voltage terminal.

[0032] In a possible implementation, the voltage conversion circuit further includes a power supply voltage sampling circuit, the power supply voltage sampling circuit includes a third chip and a third resistance matching module, and the third chip includes a first triode and a second triode;

[0033] The base of the first transistor is connected to the collector of the second transistor, the collector of the first transistor is connected to the input end of the third resistance matching module, and the emitter of the first transistor is connected to the heating voltage output end of the power input circuit;

[0034] The base of the second transistor is connected to the output end of any one of the conversion sub-circuits, and the emitter of the second transistor is connected to the heating ground;

[0035] The output end of the third resistance matching module is connected to the integrated circuit chip.

[0036] In a possible implementation, the third resistance matching module includes an eighth resistor and a ninth resistor;

[0037] The first end of the eighth resistor is connected to the collector of the first transistor, the second end of the eighth resistor is connected to the fifth node, the first end of the ninth resistor is connected to the fifth node, and the second end of the ninth resistor is connected to the heating ground.

[0038] In a possible implementation, the voltage conversion circuit further includes the power input circuit, and the power input circuit includes an anti-reverse module and a second diode;

[0039] The input end of the anti-reverse module is connected to the battery voltage input end, and the output end of the anti-reverse module is connected to the heating voltage output end;

[0040] An anode of the second diode is connected to the heating voltage output terminal, and a cathode of the second diode is connected to the control voltage output terminal.

[0041] In the technical solution provided in the embodiment of the present application, the voltage conversion circuit includes at least two conversion subcircuits connected in sequence, wherein the first conversion subcircuit is connected to the control voltage output terminal and the integrated circuit chip of the power input circuit, and the input terminals of the remaining conversion subcircuits are all connected to the output terminal of the previous conversion subcircuit; the first conversion subcircuit receives the first chip control voltage output by the power input circuit and the delay signal output by the integrated circuit chip, converts the first chip control voltage into the second chip control voltage under the control of the delay signal, and outputs the second chip control voltage to the next conversion subcircuit; the remaining conversion subcircuits convert the second chip control voltage to output the target chip voltage. The voltage conversion circuit in the embodiment of the present application has a simple structure, low cost and good performance; a multi-stage conversion subcircuit is used to convert the first chip control voltage to obtain the target chip voltage through a multi-stage conversion method, so that the span of each voltage conversion is small, thereby further reducing the cost and enhancing the circuit performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0043] Figure 1A A schematic diagram of the structure of a first conversion sub-circuit provided in an embodiment of the present application;

[0044] Figure 1B A schematic diagram of the structure of a second conversion sub-circuit provided in an embodiment of the present application;

[0045] Figure 2 A schematic diagram of the structure of a power input circuit provided in an embodiment of the present application;

[0046] Figure 3 A schematic diagram of the structure of a power supply voltage sampling circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0047] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0048] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0049] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0050] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0051] An embodiment of the present application provides a voltage conversion circuit, which includes: at least two levels of conversion sub-circuits connected in sequence, wherein the first level of the conversion sub-circuit is connected to the control voltage output terminal of the power input circuit and the integrated circuit chip, and the input terminals of the remaining conversion sub-circuits are all connected to the output terminal of the previous level of the conversion sub-circuit; the first level of the conversion sub-circuit is used to receive the first chip control voltage output by the power input circuit and the delay signal output by the integrated circuit chip, and convert the first chip control voltage into a second chip control voltage under the control of the delay signal, and output the second chip control voltage to the next level of the conversion sub-circuit; the remaining conversion sub-circuits are used to convert the second chip control voltage to output a target chip voltage.

[0052] In the embodiment of the present application, the voltage conversion circuit may include a multi-stage conversion subcircuit to achieve multi-stage conversion of voltage. As an optional solution, the at least two-stage conversion subcircuit includes a first conversion subcircuit and a second conversion subcircuit. In the embodiment of the present application, the voltage conversion circuit includes a two-stage conversion subcircuit as an example for description.

[0053] Figure 1A A schematic diagram of the structure of a first conversion sub-circuit provided in an embodiment of the present application, Figure 1B A schematic diagram of the structure of a second conversion sub-circuit provided in an embodiment of the present application is shown in FIG. Figure 1A and Figure 1B As shown, the voltage conversion circuit includes a two-stage conversion sub-circuit, the two-stage conversion sub-circuit includes a first conversion sub-circuit and a second conversion sub-circuit, the first conversion sub-circuit includes a first chip U1, a first resistor matching module 11 and a first resistor R1, and the second conversion sub-circuit includes a second chip U2, a second resistor matching module 14 and a second resistor R2.

[0054] The input signal terminal IN of the first chip U1 is connected to the control voltage output terminal of the power input circuit, the enable signal terminal EN of the first chip U1 is connected to the first node TP1, the first node TP1 is connected to the integrated circuit chip, the adjustment signal terminal ADJ of the first chip U1 is connected to the first resistance matching module 11, the output signal terminal OUT of the first chip U1 is connected to the second node TP2, the second node TP2 is connected to the output terminal OUT1 of the first conversion sub-circuit, the first end of the first resistor R1 is connected to the first node TP1, and the second end of the first resistor R1 is connected to the low voltage terminal. In addition, the bottom heat dissipation terminal PAD of the first chip U1 is connected to the low voltage terminal, and the ground terminal GND of the first chip U1 is connected to the low voltage terminal.

[0055] The input signal terminal IN of the second chip U2 is connected to the output terminal OUT1 of the first conversion sub-circuit, the enable signal terminal EN of the second chip U2 is connected to the third node TP3, the third node TP3 is connected to the second end of the second resistor R2, the first end of the second resistor R2 is connected to the output terminal OUT1 of the first conversion sub-circuit, the adjustment signal terminal ADJ of the second chip U2 is connected to the second resistor matching module 12, the output signal terminal OUT of the second chip U2 is connected to the fourth node TP4, and the fourth node TP4 is connected to the output terminal OUT2 of the second conversion sub-circuit. In addition, the bottom heat dissipation terminal PAD of the second chip U2 is connected to the low voltage terminal, and the ground terminal GND of the second chip U2 is connected to the low voltage terminal.

[0056] like Figure 1A and Figure 1B As shown, the first chip U1 and the second chip U2 may further include other pin ends, which will not be described in detail in the embodiment of the present application.

[0057] like Figure 1A As shown, the first resistance matching module 11 includes a third resistor R3 and a fourth resistor R4. A first end of the third resistor R3 is connected to the second node TP2, and a second end of the third resistor R3 is connected to the adjustment signal terminal ADJ; a first end of the fourth resistor R4 is connected to the adjustment signal terminal ADJ, and a second end of the fourth resistor R4 is connected to the low voltage terminal.

[0058] like Figure 1A As shown, Figure 1A As shown, the first conversion subcircuit further includes a first front-end filtering module 12, and the first front-end filtering module 12 includes a first capacitor C1, a second capacitor C2, and a third capacitor C3. The first end of the first capacitor C1 is connected to the control voltage output terminal OUT3 of the power input circuit, and the second end of the first capacitor C1 is connected to the low voltage terminal; the first end of the second capacitor C2 is connected to the control voltage output terminal OUT3 of the power input circuit, and the second end of the second capacitor C2 is connected to the low voltage terminal; the first end of the third capacitor C3 is connected to the first node TP1, and the second end of the third capacitor C3 is connected to the low voltage terminal.

[0059] like Figure 1A As shown, the first conversion sub-circuit further includes a first back-end filtering module 13, and the first back-end filtering module 13 includes a fourth capacitor C4 and a fifth capacitor C5. A first end of the fourth capacitor C4 is connected to the second node TP2, and a second end of the fourth capacitor C4 is connected to the low voltage end; a first end of the fifth capacitor C5 is connected to the second node TP2, and a second end of the fifth capacitor C5 is connected to the low voltage end.

[0060] like Figure 1AAs shown, the first conversion sub-circuit further includes a first diode D1 , an anode of the first diode D1 is connected to the integrated circuit chip, and a cathode of the first diode D1 is connected to the first node TP1 .

[0061] like Figure 1A As shown, the first conversion subcircuit further includes a first light emitting diode LED1 and a tenth resistor R10. The anode of the first light emitting diode LED1 is connected to the output terminal OUT1 of the first conversion subcircuit, the cathode of the first light emitting diode LED1 is connected to the first end of the tenth resistor R10, and the second end of the tenth resistor R10 is connected to the low voltage terminal.

[0062] like Figure 1B As shown, the second resistance matching module 14 includes a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7. A first end of the fifth resistor R5 is connected to the fourth node TP4, a second end of the fifth resistor R5 is connected to a first end of the sixth resistor R6, and a second end of the sixth resistor R6 is connected to the adjustment signal terminal ADJ; a first end of the seventh resistor R7 is connected to the adjustment signal terminal ADJ, and a second end of the seventh resistor R7 is connected to the low voltage terminal.

[0063] like Figure 1B As shown, the second conversion subcircuit further includes a second front-end filtering module 15, and the second front-end filtering module 15 includes a sixth capacitor C6, a seventh capacitor C7 and an eighth capacitor C8. The first end of the sixth capacitor C6 is connected to the output terminal OUT1 of the first conversion subcircuit, and the second end of the sixth capacitor C6 is connected to the low voltage terminal; the first end of the seventh capacitor C7 is connected to the output terminal OUT1 of the first conversion subcircuit, and the second end of the seventh capacitor C7 is connected to the low voltage terminal; the first end of the eighth capacitor C8 is connected to the third node TP3, and the second end of the eighth capacitor C8 is connected to the low voltage terminal.

[0064] like Figure 1B As shown, the second conversion sub-circuit further includes a second back-end filtering module 16, and the second back-end filtering module 16 includes a ninth capacitor C9 and a tenth capacitor C10. A first end of the ninth capacitor C9 is connected to the fourth node TP4, and a second end of the ninth capacitor C9 is connected to the low voltage end; a first end of the tenth capacitor C10 is connected to the fourth node TP4, and a second end of the tenth capacitor C10 is connected to the low voltage end.

[0065] like Figure 1B As shown, the second conversion subcircuit further includes a second light emitting diode LED2 and an eleventh resistor R11. The anode of the second light emitting diode LED2 is connected to the output terminal OUT2 of the second conversion subcircuit, the cathode of the second light emitting diode LED2 is connected to the first terminal of the eleventh resistor R11, and the second terminal of the eleventh resistor R11 is connected to the low voltage terminal.

[0066] Figure 2A schematic diagram of a power input circuit provided in an embodiment of the present application is shown in FIG. Figure 2 As shown, the power input circuit includes: an anti-reverse module 18 and a second diode D2. The input end of the anti-reverse module 18 is connected to the battery voltage input end BAT_IN, and the output end of the anti-reverse module 18 is connected to the heating voltage output end OUT4; the anode of the second diode D2 is connected to the heating voltage output end OUT4, and the cathode of the second diode D2 is connected to the control voltage output end OUT3.

[0067] like Figure 2 As shown, the anti-reverse module 18 includes a twelfth capacitor C12, a switch tube M1, a thirteenth capacitor C13, a fourteenth resistor R14, a fifteenth resistor R15 and a third diode D3. The first end of the twelfth capacitor C12 is connected to the battery voltage input terminal BAT_IN, and the second end of the twelfth capacitor C12 is connected to the heating voltage output terminal OUT4; the control end of the switch tube M1 is connected to the sixth node TP6, the first end of the switch tube M1 is connected to the battery voltage input terminal BAT_IN, and the second end of the switch tube M1 is connected to the heating voltage output terminal OUT4; the first end of the thirteenth capacitor C13 is connected to the heating voltage output terminal OUT4, and the second end of the thirteenth capacitor C13 is connected to the sixth node TP6; the first end of the fourteenth resistor R14 is connected to the heating voltage output terminal OUT4, and the second end of the fourteenth resistor R14 is connected to the sixth node TP6; the cathode of the third diode D3 is connected to the heating voltage output terminal OUT4, and the anode of the third diode D3 is connected to the sixth node TP6; the first end of the fifteenth resistor R15 is connected to the sixth node TP6, and the second end of the fifteenth resistor R15 is connected to the heating ground HEAT-GND. The third diode D3 is a voltage stabilizing diode.

[0068] like Figure 2 As shown, the power input circuit also includes a first inductor L1, which is connected between the heating voltage output terminal OUT4 and the anode of the second diode D2. Specifically, the first end of the first inductor L1 is connected to the heating voltage output terminal OUT4, and the second end of the first inductor L1 is connected to the anode of the second diode D2.

[0069] like Figure 2 As shown, the power input circuit also includes a third front-end filter module 19, and the third front-end filter module 19 is connected between the battery voltage input terminal BAT_IN and the heating ground HEAT-GND. As an optional solution, the third front-end filter module 19 includes a fourteenth capacitor C14 and a fifteenth capacitor C15. The first end of the fourteenth capacitor C14 is connected to the battery voltage input terminal BAT_IN, and the second end of the fourteenth capacitor C14 is connected to the first end of the fifteenth capacitor C15; the second end of the fifteenth capacitor C15 is connected to the heating ground HEAT-GND.

[0070] like Figure 2 As shown, the power input circuit also includes a third back-end filter module 20. The third back-end filter module 20 includes a sixteenth capacitor C16, a seventeenth capacitor C17, an eighteenth capacitor C18, a nineteenth capacitor C19 and a twentieth capacitor C20. The first end of the sixteenth capacitor C16 is connected to the heating voltage output terminal OUT4, and the second end of the sixteenth capacitor C16 is connected to the heating ground HEAT-GND; the first end of the seventeenth capacitor C17 is connected to the heating voltage output terminal OUT4, and the second end of the seventeenth capacitor C17 is connected to the heating ground HEAT-GND; the first end of the eighteenth capacitor C18 is connected to the heating voltage output terminal OUT4, and the second end of the eighteenth capacitor C18 is connected to the heating ground HEAT-GND; the first end of the nineteenth capacitor C19 is connected to the heating voltage output terminal OUT4, and the second end of the nineteenth capacitor C19 is connected to the heating ground HEAT-GND; the first end of the twentieth capacitor C20 is connected to the second end of the first inductor L1 and the positive electrode of the second diode D2, and the second end of the twentieth capacitor C20 is connected to the low voltage end.

[0071] like Figure 2 As shown, the power input circuit further includes a fourth diode D4. A first end of the fourth diode D4 is connected to the battery voltage input terminal BAT_IN, and a second end of the fourth diode D4 is connected to the heating ground HEAT-GND. The fourth diode D4 is a transient voltage suppression diode.

[0072] like Figure 2 As shown, the power input circuit also includes a sixteenth resistor R16 and a seventeenth resistor R17. The first end of the sixteenth resistor R16 is connected to the heating ground HEAT-GND, and the second end of the sixteenth resistor R16 is connected to the low voltage end; the first end of the seventeenth resistor R17 is connected to the heating ground HEAT-GND, and the second end of the seventeenth resistor R17 is connected to the low voltage end. As an optional solution, the sixteenth resistor R16 and the seventeenth resistor R17 are both 0Ω resistors.

[0073] As an optional solution, in an embodiment of the present application, the voltage conversion circuit also includes a power supply voltage sampling circuit. Figure 3 A schematic diagram of a power supply voltage sampling circuit provided in an embodiment of the present application is shown in FIG. Figure 3As shown, the power supply voltage sampling circuit includes a third chip U3 and a third resistor matching module 17, and the third chip U3 includes a first transistor Q1 and a second transistor Q2. The base of the first transistor Q1 is connected to the collector of the second transistor Q2, the collector of the first transistor Q1 is connected to the input end of the third resistor matching module 17, and the emitter of the first transistor Q1 is connected to the heating voltage output end OUT4 of the power supply input circuit; the base of the second transistor Q2 is connected to the output end of any conversion sub-circuit, and the emitter of the second transistor Q2 is connected to the heating ground HEAT-GND; the output end of the third resistor matching module 17 is connected to the integrated circuit chip.

[0074] like Figure 3 As shown, the third resistor matching module 17 includes an eighth resistor R8 and a ninth resistor R9. A first end of the eighth resistor R8 is connected to the collector of the first transistor Q1, a second end of the eighth resistor R8 is connected to the fifth node TP5, a first end of the ninth resistor R9 is connected to the fifth node TP5, and a second end of the ninth resistor R9 is connected to the heating ground HEAT-GND.

[0075] like Figure 3 As shown, the power supply voltage sampling circuit also includes a twelfth resistor R12, a first end of the twelfth resistor R12 is connected to the output end of any one of the conversion sub-circuits, and a second end of the twelfth resistor R12 is connected to the base of the second transistor Q2.

[0076] like Figure 3 As shown, the power supply voltage sampling circuit also includes a thirteenth resistor R13, which is connected between the third resistor matching module 17 and the integrated circuit chip. The first end of the thirteenth resistor R13 is connected to the fifth node TP5, and the second end of the thirteenth resistor R13 is connected to the integrated circuit chip.

[0077] like Figure 3 As shown, the power supply voltage sampling circuit further includes an eleventh capacitor C11. A first end of the eleventh capacitor C11 is connected to the integrated circuit chip, and a second end of the eleventh capacitor C11 is connected to the low voltage end.

[0078] like Figure 3 As shown, for example, the output end of any conversion sub-circuit may include the output end OUT1 of the first conversion sub-circuit or the output end OUT2 of the second conversion sub-circuit. In the embodiment of the present application, the output end OUT1 of the first conversion sub-circuit is taken as an example for description.

[0079] In the embodiment of the present application, the low voltage terminal may be a ground terminal GND.

[0080] As an optional solution, the integrated circuit chip may include a microcontroller unit (MCU). In the embodiment of the present application, the integrated circuit chip is described as an MCU.

[0081] Combine the following Figure 1A , Figure 1B , Figure 2 and Figure 3 , the working principle of the voltage conversion circuit provided in the embodiment of the present application is described in detail.

[0082] like Figure 2 As shown, the battery voltage input terminal BAT_IN inputs the battery input voltage (BAT_POWER) to the anti-reverse module 18. The fourth diode D4 can suppress the instantaneous voltage of the battery input voltage (BAT_POWER), thereby protecting the subsequent circuit components from being damaged by the instantaneous surge pulse voltage. The third front-end filter module 19 can filter the battery input voltage (BAT_POWER). The anti-reverse module 18 is forward-conducted when the battery input voltage (BAT_POWER) is forward-connected to output the heating power supply voltage (HEAT_POWER) to the heating voltage output terminal OUT4; or, the anti-reverse module 18 is reversely cut off and not turned on when the battery input voltage (BAT_POWER) is reversely connected. At this time, the anti-reverse module 18 will not output the heating power supply voltage (HEAT_POWER) to the heating voltage output terminal OUT4, thereby achieving the purpose of protecting the circuit. Among them, the heating power supply voltage (HEAT_POWER) can be used to heat the heating wire of the seat cushion.

[0083] like Figure 2 As shown, the first inductor L1 can perform inductor filtering on the heating power supply voltage (HEAT_POWER), thereby effectively suppressing low-frequency influence.

[0084] like Figure 2 As shown, the second diode D2 is forward-conducted when the heating power supply voltage (HEAT_POWER) is forward-connected to output the first chip control voltage to the control voltage output terminal OUT3; or, the second diode D2 is cut off when there is a reverse voltage between the control voltage output terminal OUT3 and the heating voltage output terminal OUT4, thereby protecting the subsequent circuit devices of the second diode D2 from being damaged. Figure 2 As shown, the third back-end filter module 20 can filter the heating power voltage (HEAT_POWER). For example, the first chip control voltage is 12V.

[0085] like Figure 2As shown, the sixteenth resistor R16 and the seventeenth resistor R17 are both connected between the heating ground HEAT-GND and the ground terminal GND to isolate the heating ground HEAT-GND from the ground terminal GND.

[0086] like Figure 1A As shown, the MCU outputs a delay signal (MCU_POWER_DELAY) to the enable signal terminal EN of the first chip U1, and the first chip U1 is turned on or off under the control of the delay signal. Among them, the delay signal can be a square wave signal, and the square wave signal includes a high level and a low level. The first chip U1 is turned on under the control of a high level, and the first chip U1 is turned off under the control of a low level. The third capacitor C3 can filter the delay signal of the first node TP1. The first resistor R1 is a clamping resistor, and the first resistor R1 can perform voltage clamping on the delay signal of the first node TP1. The first diode D1 is forwardly conducted when the delay signal is forwardly connected to output the delay signal to the enable signal terminal EN, or the first diode D1 is reversely cut off and not turned on when the delay signal is reversely connected, so that the delay signal will not be output to the enable signal terminal EN, thereby achieving the purpose of protecting the circuit.

[0087] like Figure 1A As shown, the first chip U1 is turned on under the control of the delay signal, the input signal terminal IN of the first chip U1 receives the first chip control voltage output by the control voltage output terminal OUT3, and the adjustment signal terminal ADJ of the first chip U1 outputs the first adjustment voltage to the node TP0 between the third resistor R3 and the fourth resistor R4. The first capacitor C1 and the second capacitor C2 can filter the first chip control voltage. Under the action of the first adjustment voltage, the output signal terminal OUT of the first chip U1 outputs the second chip control voltage. As an optional solution, the second control chip voltage can be calculated by the formula: V2=K1*(1+R3 / R4), where V2 is the second control chip voltage, K1 is the matching coefficient, R3 is the resistance value of the third resistor, and R4 is the resistance value of the fourth resistor. For example, K1=0.6, R3=22KΩ, R4=3KΩ, then V2=0.6*(1+22K / 3K)=5V. The first back-end filter module 13 can filter the second chip control voltage.

[0088] like Figure 1A As shown, when the output terminal OUT1 of the first conversion sub-circuit outputs the second control chip voltage, under the action of the second control chip voltage, current flows through the first light-emitting diode LED1 and the tenth resistor R10, and the first light-emitting diode LED1 emits light, so that the tester knows that the output terminal OUT1 of the first conversion sub-circuit of the circuit has a voltage output.

[0089] like Figure 1BAs shown, the second resistor R2 is a pull-up resistor. Under the action of the second resistor R2, the voltage of the third node TP3 is pulled up to the second control chip voltage output by the output terminal OUT1 of the first conversion sub-circuit, so that the voltage of the enable signal terminal EN of the second chip U2 is the second control chip voltage, and the second chip U2 is turned on under the control of the second control chip voltage. The sixth capacitor C6 and the seventh capacitor C7 can filter the second control chip voltage output by the output terminal OUT1 of the first conversion sub-circuit, and the eighth capacitor C8 can filter the voltage of the third node TP3.

[0090] like Figure 1B As shown, the second chip U2 is turned on under the control of the second control chip voltage, the input signal terminal IN of the second chip U2 receives the second control chip voltage output by the output terminal OUT1 of the first conversion sub-circuit, and the adjustment signal terminal ADJ of the second chip U2 outputs the second adjustment voltage to the seventh node TP7 between the sixth resistor R6 and the seventh resistor R7. The second chip U2 can make the output signal terminal OUT output the third chip voltage under the action of the second adjustment voltage. As an optional solution, the third control chip voltage can be calculated by the formula: V3=K2*(1+(R5+R6) / R7), wherein V3 is the third control chip voltage, K2 is the matching coefficient, R5 is the resistance value of the fifth resistor, R6 is the resistance value of the sixth resistor, and R7 is the resistance value of the seventh resistor. For example, K2=0.6, R5=5.1KΩ, R6=3.9KΩ, R7=2KΩ, then V3=0.6*(1+(5.1K+3.9K) / 2K)=3.3V. Figure 1B As shown, the third chip voltage outputted by the output terminal OUT2 of the second conversion sub-circuit is 3.3 V. The second back-end filtering module 16 can perform filtering processing on the target chip voltage.

[0091] like Figure 1B As shown, when the output terminal OUT2 of the second conversion sub-circuit outputs the target chip voltage, under the action of the target chip voltage, current flows through the second light-emitting diode LED2 and the eleventh resistor R11, and the second light-emitting diode LED2 emits light, so that the tester knows that the output terminal OUT2 of the second conversion sub-circuit of the circuit has a voltage output.

[0092] like Figure 3 As shown, the second transistor Q2 is turned on under the control of the second control chip voltage outputted from the output terminal OUT1 of the first conversion sub-circuit, so that the first transistor Q1 is turned on under the control of the collector voltage of the second transistor Q2. The turned-on first transistor Q1 outputs the heating power supply voltage (HEAT_POWER) outputted from the heating voltage output terminal OUT4 to the third resistor matching module 17.

[0093] like Figure 3As shown, in the third resistor matching module 17, the eighth resistor R8 and the ninth resistor R9 play a voltage-dividing role on the heating power supply voltage, and the acquisition pin of the MCU acquires the voltage of the fifth node TP5 between the eighth resistor R8 and the ninth resistor R9; the MCU multiplies the acquired voltage (MCU_ADC_POWER) by the matching coefficient of the third resistor matching module 17 to obtain the current power supply voltage; when the MCU determines whether the current power supply voltage is within the threshold range of the heating power supply voltage, if it is determined that the current power supply voltage is within the threshold range of the heating power supply voltage, it is determined that the heating power supply voltage is normal; if it is determined that the current power supply voltage is outside the threshold range of the heating power supply voltage, it is determined that the heating power supply voltage is abnormal. Among them, the matching coefficient can be (R9+R8) / R9, for example, R8=200K, R9=39K, and the matching coefficient is 6.13. The eleventh capacitor C11 can filter the voltage acquired by the MCU.

[0094] like Figure 3 As shown, the twelfth resistor R12 can limit the current of the third chip U3, thereby avoiding damage to the third chip U3. Figure 3 As shown, the thirteenth resistor R13 can play a role in current limiting, thereby achieving the purpose of protecting the MCU.

[0095] In the embodiment of the present application, Figure 1A The first conversion sub-circuit converts the 12V first chip control voltage into a 5V second chip control voltage, and then Figure 1B The second conversion subcircuit converts the 5V second chip control voltage into a 3.3V target chip voltage, thereby realizing a two-stage conversion method for converting the voltage, which reduces the span of the voltage conversion, thereby further reducing the cost and enhancing the circuit performance.

[0096] In the embodiment of the present application, the voltage conversion circuit includes at least two conversion subcircuits connected in sequence, wherein the first conversion subcircuit is connected to the control voltage output terminal of the power input circuit and the MCU, and the input terminals of the remaining conversion subcircuits are all connected to the output terminal of the previous conversion subcircuit; the first conversion subcircuit receives the first chip control voltage output by the power input circuit and the delay signal output by the MCU, and converts the first chip control voltage into the second chip control voltage under the control of the delay signal, and outputs the second chip control voltage to the next conversion subcircuit; the remaining conversion subcircuits convert the second chip control voltage to output the target chip voltage. The voltage conversion circuit in the embodiment of the present application has a simple structure, low cost and good performance; a multi-stage conversion subcircuit is used to convert the first chip control voltage to obtain the target chip voltage by a multi-stage conversion method, so that the span of each level of voltage conversion is small, thereby further reducing the cost and enhancing the circuit performance. In particular, the heat dissipation performance of the voltage conversion circuit is more guaranteed.

[0097] In the embodiment of the present application, the purpose of adjusting the output chip control voltage is achieved by setting the number and resistance values ​​of the resistors in the first resistance matching module.

[0098] The power input circuit used in the embodiment of the present application can achieve the purpose of stabilizing the output chip control voltage.

[0099] In the embodiment of the present application, whether the heating power supply voltage is normal can be detected by the power supply voltage sampling circuit.

[0100] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A voltage conversion circuit, characterized in that: include: At least two stages of conversion subcircuits connected in sequence, wherein the first stage of the conversion subcircuit is connected to the control voltage output terminal of the power input circuit and the integrated circuit chip, and the input terminals of the remaining conversion subcircuits are all connected to the output terminal of the previous stage of the conversion subcircuit; The first-stage conversion subcircuit is used to receive the first chip control voltage output by the power input circuit and the delay signal output by the integrated circuit chip, convert the first chip control voltage into a second chip control voltage under the control of the delay signal, and output the second chip control voltage to the next-stage conversion subcircuit; The remaining conversion sub-circuits are used to convert the second chip control voltage to output a target chip voltage.

2. The voltage conversion circuit according to claim 1, characterized in that: The at least two-stage conversion subcircuit comprises a first conversion subcircuit and a second conversion subcircuit, the first conversion subcircuit comprises a first chip, a first resistance matching module and a first resistor, and the second conversion subcircuit comprises a second chip, a second resistance matching module and a second resistor; The input signal terminal of the first chip is connected to the control voltage output terminal of the power input circuit, the enable signal terminal of the first chip is connected to the first node, the first node is connected to the integrated circuit chip, the adjustment signal terminal of the first chip is connected to the first resistance matching module, the output signal terminal of the first chip is connected to the second node, the second node is connected to the output terminal of the first conversion sub-circuit, the first terminal of the first resistor is connected to the first node, and the second terminal of the first resistor is connected to the low voltage terminal; The input signal terminal of the second chip is connected to the output terminal of the first conversion sub-circuit, the enable signal terminal of the second chip is connected to the third node, the third node is connected to the second end of the second resistor, the first end of the second resistor is connected to the output terminal of the first conversion sub-circuit, the adjustment signal terminal of the second chip is connected to the second resistor matching module, the output signal terminal of the second chip is connected to the fourth node, and the fourth node is connected to the output terminal of the second conversion sub-circuit.

3. The voltage conversion circuit according to claim 2, characterized in that: The first resistance matching module includes a third resistor and a fourth resistor; A first end of the third resistor is connected to the second node, and a second end of the third resistor is connected to the adjustment signal terminal; A first end of the fourth resistor is connected to the adjustment signal end, and a second end of the fourth resistor is connected to the low voltage end.

4. The voltage conversion circuit according to claim 2, characterized in that: The second resistance matching module includes a fifth resistor, a sixth resistor and a seventh resistor; The first end of the fifth resistor is connected to the fourth node, the second end of the fifth resistor is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the adjustment signal terminal; A first end of the seventh resistor is connected to the adjustment signal end, and a second end of the seventh resistor is connected to the low voltage end.

5. The voltage conversion circuit according to claim 2, characterized in that: The first conversion subcircuit further includes a first front-end filtering module, and the first front-end filtering module includes a first capacitor, a second capacitor and a third capacitor; A first end of the first capacitor is connected to the control voltage output end of the power input circuit, and a second end of the first capacitor is connected to the low voltage end; A first end of the second capacitor is connected to the control voltage output end of the power input circuit, and a second end of the second capacitor is connected to the low voltage end; A first terminal of the third capacitor is connected to the first node, and a second terminal of the third capacitor is connected to the low voltage terminal.

6. The voltage conversion circuit according to claim 2, characterized in that: The first conversion sub-circuit further includes a first back-end filtering module, and the first back-end filtering module includes a fourth capacitor and a fifth capacitor; A first end of the fourth capacitor is connected to the second node, and a second end of the fourth capacitor is connected to the low voltage end; A first terminal of the fifth capacitor is connected to the second node, and a second terminal of the fifth capacitor is connected to the low voltage terminal.

7. The voltage conversion circuit according to claim 2, characterized in that: The second conversion sub-circuit further includes a second front-end filtering module, and the second front-end filtering module includes a sixth capacitor, a seventh capacitor and an eighth capacitor; A first end of the sixth capacitor is connected to the output end of the first conversion sub-circuit, and a second end of the sixth capacitor is connected to the low voltage end; A first end of the seventh capacitor is connected to the output end of the first conversion sub-circuit, and a second end of the seventh capacitor is connected to the low voltage end; A first terminal of the eighth capacitor is connected to the third node, and a second terminal of the eighth capacitor is connected to the low voltage terminal.

8. The voltage conversion circuit according to claim 2, characterized in that: The second conversion sub-circuit further includes a second back-end filtering module, and the second back-end filtering module includes a ninth capacitor and a tenth capacitor; A first end of the ninth capacitor is connected to the fourth node, and a second end of the ninth capacitor is connected to the low voltage end; A first terminal of the tenth capacitor is connected to the fourth node, and a second terminal of the tenth capacitor is connected to the low voltage terminal.

9. The voltage conversion circuit according to claim 1, characterized in that: The voltage conversion circuit further includes a power supply voltage sampling circuit, the power supply voltage sampling circuit includes a third chip and a third resistance matching module, and the third chip includes a first triode and a second triode; The base of the first transistor is connected to the collector of the second transistor, the collector of the first transistor is connected to the input end of the third resistance matching module, and the emitter of the first transistor is connected to the heating voltage output end of the power input circuit; The base of the second transistor is connected to the output end of any one of the conversion sub-circuits, and the emitter of the second transistor is connected to the heating ground; The output end of the third resistance matching module is connected to the integrated circuit chip.

10. The voltage conversion circuit according to claim 9, characterized in that: The third resistance matching module includes an eighth resistor and a ninth resistor; The first end of the eighth resistor is connected to the collector of the first transistor, the second end of the eighth resistor is connected to the fifth node, the first end of the ninth resistor is connected to the fifth node, and the second end of the ninth resistor is connected to the heating ground.

11. The voltage conversion circuit according to claim 1, characterized in that: The voltage conversion circuit also includes the power input circuit, which includes an anti-reverse module and a second diode; The input end of the anti-reverse module is connected to the battery voltage input end, and the output end of the anti-reverse module is connected to the heating voltage output end; An anode of the second diode is connected to the heating voltage output terminal, and a cathode of the second diode is connected to the control voltage output terminal.

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