A decoding method of an LDPC code based on column layering to reduce error flooring

Abstract

The application discloses a kind of LDPC code decoding methods for reducing error flat layer based on column layering, belong to channel coding technical field.The decoding of LDPC code is susceptible to the influence of trap set in high signal-to-noise ratio area, information transmission approach is blocked in the decoding process, leading to decoding failure, performance curve drops and flattens, limiting its application in some low error flat layer required scenarios.This method groups all variable nodes in the decoding process by column, all variable nodes in a group are processed in parallel, after decoding failure caused by decoding into trap set, the process of post-processing is increased, according to the check result of check node, the weight of check node transmitting information to variable node is modified, and the final result is obtained by decoding again.The application can effectively make the decoding process jump out of trap set, significantly improve the performance of LDPC code in high signal-to-noise ratio area, and reduce error flat layer.

Description

Technical Field

[0001] This invention belongs to the field of channel coding and decoding technology in the field of communications, and specifically relates to an LDPC code decoding method based on column layering to reduce the error plane. Background Technology

[0002] In modern communication systems, channel coding is one of the core technologies for improving data transmission reliability. With the rapid development of communication technology and the continuous increase in data transmission rates, signals are easily affected by noise, interference, and other factors during transmission, leading to data errors. Channel coding introduces redundant information into the data, enabling the receiver to correct errors when it receives signals containing erroneous signals, thereby effectively improving data reliability. Continuous innovation and optimization of channel coding technology are fundamental to ensuring the efficient and stable operation of modern communication systems.

[0003] LDPC codes are a commonly used channel coding scheme. Through iterative decoding methods such as the belief propagation algorithm, they can approach the Shannon limit under low signal-to-noise ratio conditions, achieving efficient error correction. With the improvement of computing power, research on LDPC codes has received widespread attention and made significant progress in the field of communications. Compared with traditional error-correcting codes, LDPC codes have stronger resistance to noise interference and perform better in large-scale data transmission scenarios. LDPC codes have been widely used in modern communication technologies, such as Wi-Fi, LTE, 5G and other wireless communication standards, as well as satellite communication, fiber optic communication, and other fields, becoming one of the key technologies in efficient and high-speed communication systems.

[0004] Despite the excellent error correction performance of LDPC codes, they face the error flattening problem under certain channel conditions. Error flattening is a phenomenon where, under very high signal-to-noise ratios (SNR), the bit error rate (BER) plateaus and cannot be further reduced. When the SNR is sufficiently high, the LDPC code, after a certain number of iterations of decoding, shows a significant decrease in BER, but after a certain point, the BER no longer decreases significantly and remains at a low level. This phenomenon is usually due to certain special types of error modes, especially those related to codeword structure, such as trap sets, which are difficult to correct effectively by the iterative decoding process. Solving the error flattening problem is crucial for further improving the performance of LDPC codes, especially in applications with extremely high data reliability requirements, such as satellite communications, where error flattening can significantly affect the actual performance of the system. Therefore, researching LDPC code decoding methods to reduce error flattening is of great significance for improving the application effect of LDPC codes in practical communication systems. Summary of the Invention

[0005] Purpose of the invention: To address the error leveling problem in LDPC code decoding, this invention proposes a column-based layered LDPC code decoding method to reduce the error leveling. This decoding method, when codewords enter the trap set during the decoding process, effectively enables the decoding process to escape the trap set by adjusting the weight of information transmitted from the check node to the variable node, thereby improving the decoding success rate and reducing the error leveling.

[0006] Technical Solution: A column-based hierarchical LDPC code decoding method to reduce the error plane. This method groups all variable nodes by column and processes all variable nodes in a group in parallel during decoding. Due to the influence of trap sets, if decoding fails due to entering a trap set, a post-processing step is added. The post-processing first obtains the verification results of all check nodes, and adjusts the weight of information transmitted from check nodes to variable nodes during post-processing based on the verification results. Specifically, it increases the weight of information transmitted from check nodes that fail verification and decreases the weight of information transmitted from some check nodes that pass verification. Decoding is then performed again to obtain the final decoding result. By modifying the weight of information transmitted from check nodes to variable nodes, this method adds a certain perturbation to the decoding process, enabling codewords to escape the current trap set, improving the decoding success rate, and thus effectively improving the error plane. The specific steps are as follows:

[0007] 1) Post-processing initialization: Record the verification results of the verification nodes after decoding fails due to entering the trap set; group the variable nodes, i.e., layer them by column; initialize the number of iterations to one;

[0008] 2) Mark the verification nodes that need to increase the weight of the transmitted information: Based on the verification results of the verification nodes, mark the set C1 of verification nodes that failed the verification; the verification nodes in set C1 are the verification nodes that need to increase the weight of the transmitted information.

[0009] 3) Mark the verification nodes that need to have their transmitted information weight reduced: In the interconnection network that transmits information from the verification nodes to the variable nodes, mark all variable node sets V1 that are connected to the set C1 of verification nodes that failed verification; In the interconnection network that transmits information from the variable nodes to the verification nodes, mark all verification node sets C2 that are connected to the set V1 of variable nodes, where set C1 is a subset of set C2; Define set C3 as the verification nodes in set C2 that are not in set C1; The verification nodes in set C3 are the verification nodes that need to have their transmitted information weight reduced.

[0010] 4) Calculate the information passed from the check node to the adjacent variable node: When the number of iterations is equal to one, adjust the weight of the information passed from the check node to the variable node according to the marking result. Set the absolute value of the information passed from the check node in set C1 to the adjacent variable node as S1, and set the absolute value of the information passed from the check node in set C3 to the adjacent variable node as S2. S1 and S2 are the absolute values ​​of the enhanced and weakened information, respectively. They can be determined by simulation based on the main trap set structure of the specific LDPC codeword. The absolute value of the information passed by other unmarked check nodes is the minimum or second smallest value of the information stored in the check node. The absolute value of the information is then combined with the sign bit and passed to the variable node. When the number of iterations is greater than one, according to the sorted result of the information stored in the check node, if the variable node to which the information is passed is the source of the minimum value, then the second smallest value is selected and combined with the calculated sign bit and passed to the variable node. Otherwise, the minimum value is selected and combined with the calculated sign bit for passing.

[0011] 5) Calculate the information passed from the variable node to the adjacent check nodes: Each time, calculate the information passed from the variable node to the check nodes adjacent to the current variable node. The information passed is the sum of the initialization information of the variable node and the information passed from all check nodes connected to the variable node to the variable node, minus the information passed from the check nodes to the variable node.

[0012] 6) Update the information of the verification nodes: Sort the information received by each verification node from the adjacent variable nodes according to the absolute value, update the minimum and second minimum absolute values ​​of the information received by each verification node from the variable nodes and the variable nodes from which they originate, and record the signs of all information;

[0013] 7) Repeat steps 4) to 6) until all variable nodes are processed, which is counted as one iteration; perform decoding decision. If the information completely passes the check matrix, the decoding ends. Otherwise, if the number of iterations is less than the maximum number of iterations in post-processing, increment the number of iterations by one and repeat steps 4) to 6). When the number of iterations reaches the maximum number of iterations in post-processing, the decoding ends.

[0014] The beneficial effects of this method are as follows: When initial decoding fails due to entering a trap set, based on the verification results of the check nodes, the currently failed check nodes are the check nodes in the trap set structure. Through the structure of the check matrix and the interconnection network for information transmission between check nodes and variable nodes, we can mark the set of variable nodes with decoding failures (V1), the set of check nodes with high verification confidence (C1), and the set of check nodes with low verification confidence (C3). In the first iteration of post-processing decoding, by enhancing the information transmitted from check node set C1 to connected variable nodes and weakening the information transmitted from check node set C3 to connected variable nodes, we can effectively improve the set of variable nodes. The method flips some of the decoded variable nodes in V1 that fail to decode, allowing the decoding process to escape the trap set and ultimately achieve successful decoding. This method is widely applicable to different LDPC codewords. The values ​​of the enhanced or weakened information strengths S1 and S2 can be selected according to the structure of the parity check matrix of the LDPC codeword and the structure of its corresponding main trap set. In some scenarios with extremely high requirements for low error levels, the post-processing stage can be repeated, using different S1 and S2 parameters in different post-processing stages to further enhance the effect of reducing error levels. This method only requires adding a post-processing tag-related module to the column-based layered decoder architecture to implement the post-processing function, resulting in low hardware overhead. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the LDPC code decoding method based on column layering to reduce error planes as described in this invention.

[0016] Figure 2 This is a schematic diagram of the LDPC code decoder architecture based on column layering to reduce error planes as described in this invention. Detailed Implementation

[0017] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention.

[0018] In this example, the specific steps of the complete LDPC code initial decoding process and post-processing process based on column hierarchy are as follows:

[0019] 1) Decoding initialization: Divide the variable nodes into L groups, i.e., layer by column; initialize each variable node, and obtain the initial log-likelihood ratio of each variable node based on the information of the transmission channel; set the initial maximum number of decoding iterations M and the post-processing maximum number of iterations N, and set the current iteration number to one;

[0020] 2) Calculate the information passed from the check node to the adjacent variable nodes: In the initial decoding stage, when the number of iterations is equal to one, since the check node has not obtained the information of all adjacent variable nodes, the information passed from the check node to the adjacent variable nodes is zero. When the number of iterations is greater than one, according to the sorted result of the information received by the check node, if the variable node to which the information is passed is the source of the minimum value, then the second smallest value is selected and merged with the calculated sign bit and passed to the variable node; otherwise, the minimum value is selected and merged with the calculated sign bit and passed.

[0021] 3) Calculate the information passed from the variable node to the adjacent verification node: Each time, calculate the information passed from the variable node to the verification node adjacent to the current variable node. When the number of iterations is one, the information passed is the initialization information of the variable node. When the number of iterations is greater than one, the information passed is the sum of the initialization information of the variable node and the information passed from all the verification nodes connected to the variable node to the variable node, minus the information passed from the verification node to the variable node.

[0022] 4) Update the information of the verification nodes: Sort the information received by each verification node from the adjacent variable nodes according to the absolute value, update the minimum and second minimum absolute values ​​of the information received by each verification node from the variable nodes and the variable nodes from which they originate, and record the signs of all information.

[0023] 5) Repeat steps 2) to 4) L times, which is counted as one iteration; perform decoding decision. If the information completely passes the parity check matrix, the decoding ends. Otherwise, if the number of iterations is less than M, increment the number of iterations by one and repeat steps 2) to 4). When the number of iterations equals M, enter the post-processing stage and initialize the number of iterations to one again.

[0024] 6) Mark the verification nodes whose weights need to be modified: Based on the verification results of the verification nodes, mark the set C1 of verification nodes that failed verification; through the interconnection network that transmits information from the verification nodes to the variable nodes, mark the set V1 of all variable nodes connected to the set C1 of verification nodes that failed verification; through the interconnection network that transmits information from the variable nodes to the verification nodes, mark the set C2 of all verification nodes connected to the set V1 of variable nodes, where set C1 is a subset of set C2, and set C3 is defined as the verification nodes in set C2 other than set C1; the verification nodes in set C1 are marked as verification nodes that need to increase the weight of the transmitted information, and the verification nodes in set C3 are marked as verification nodes that need to decrease the weight of the transmitted information.

[0025] 7) Calculate the information passed from the check node to the adjacent variable node: In the post-processing decoding stage, when the number of iterations is one, the absolute value of the information passed from the check node in set C1 to the adjacent variable node is set as S1, the absolute value of the information passed from the check node in set C3 to the adjacent variable node is set as S2, and the absolute value of the information passed by other unmarked check nodes is the minimum or second smallest value of the information stored in the check node. The absolute value of the information is then combined with the sign bit and passed to the variable node. When the number of iterations is greater than one, based on the sorted result of the information stored in the check node, if the variable node to which the information is passed is the source of the minimum value, the second smallest value is selected and combined with the calculated sign bit and passed to the variable node. Otherwise, the minimum value is selected and combined with the calculated sign bit for passing.

[0026] 8) Calculate the information passed from the variable node to the adjacent check nodes: Each time, calculate the information passed from the variable node to the check nodes adjacent to the current variable node. The information passed is the sum of the initialization information of the variable node and the information passed from all check nodes connected to the variable node to the variable node, minus the information passed from the check nodes to the variable node.

[0027] 9) Update the information of the check nodes: Sort the information received by each check node from the adjacent variable nodes according to the absolute value, update the minimum and second minimum absolute values ​​of the information received by each check node from the variable nodes and the variable nodes from which they originate, and record the signs of all information;

[0028] 10) Based on the marking results, repeat steps 7) to 9) L times, which is recorded as one iteration; perform decoding decision. If the information completely passes the parity check matrix, the decoding ends. Otherwise, if the number of iterations is less than N, increment the number of iterations by one and repeat steps 7) to 9). When the number of iterations equals N, the decoding ends.

Claims

1. A column-layered LDPC code decoding method for reducing error levels, characterized in that... Includes the following steps: 1) Post-processing initialization: Record the verification results of the verification nodes after decoding fails due to entering the trap set; Group the variable nodes, i.e., layer them by column; Initialize the number of iterations to one; 2) Mark the verification nodes that need to increase the weight of the transmitted information: Based on the verification results of the verification nodes, mark the set C1 of verification nodes that failed the verification; the verification nodes in set C1 are the verification nodes that need to increase the weight of the transmitted information. 3) Mark the verification nodes that need to have their transmitted information weight reduced: Mark all variable node sets V1 that are connected to the set of verification nodes C1 that failed verification; then mark all verification node sets C2 that are connected to the set of variable node sets V1, where set C1 is a subset of set C2; define set C3 as the verification nodes in set C2 excluding set C1; the verification nodes in set C3 are the verification nodes that need to have their transmitted information weight reduced. 4) Calculate the information passed from the verification node to the adjacent variable node: When the number of iterations is one, adjust the weight of the information passed from the verification node to the variable node according to the marking result. Set the absolute value of the information passed from the verification node in set C1 to the adjacent variable node as S1, set the absolute value of the information passed from the verification node in set C3 to the adjacent variable node as S2, and the absolute value of the information passed from other unmarked verification nodes is the minimum or second smallest value of the information stored in the verification node. Then, merge the absolute value of the information with the sign bit and pass it to the variable node. When the number of iterations is greater than one, according to the sorted result of the information stored in the verification node, if the variable node to which the information is passed is the source of the minimum value, then select the second smallest value and merge it with the calculated sign bit and pass it to the variable node. Otherwise, select the minimum value and merge it with the calculated sign bit and pass it. 5) Calculate the information passed from the variable node to the adjacent check nodes: Each time, calculate the information passed from the variable node to the check nodes adjacent to the current variable node. The information passed is the sum of the initialization information of the variable node and the information passed from all check nodes connected to the variable node to the variable node, minus the information passed from the check nodes to the variable node. 6) Update the information of the verification nodes: Sort the information received by each verification node from the adjacent variable nodes according to the absolute value, update the minimum and second minimum absolute values ​​of the information received by each verification node from the variable nodes and the variable nodes from which they originate, and record the signs of all information; 7) Repeat steps 4) to 6) until all variable nodes are processed, which is counted as one iteration; perform decoding decision. If the information completely passes the check matrix, the decoding ends. Otherwise, if the number of iterations is less than the maximum number of iterations in post-processing, increment the number of iterations by one and repeat steps 4) to 6). When the number of iterations reaches the maximum number of iterations in post-processing, the decoding ends.

2. The verification node process for marking information that needs to be increased according to claim 1, characterized in that: The verification results of the verification nodes after the initial decoding failure are stored, and the set C1 of the verification nodes that failed the verification is marked as the verification nodes that need to increase the weight of the transmitted information.

3. The verification node process according to claim 1, which requires reducing the weight of transmitted information, is characterized in that: The interconnected network that transmits information from verification nodes to variable nodes marks all variable node sets V1 connected to the set C1 of verification nodes that failed verification; the interconnected network that transmits information from variable nodes to verification nodes marks all verification node sets C2 connected to the set V1 of variable nodes, where set C1 is a subset of set C2, and set C3 is defined as the verification nodes in set C2 other than set C1; the verification nodes in set C3 are the verification nodes whose information transmission weight needs to be reduced.

4. The process of calculating the information passed from the verification node to the adjacent variable nodes according to claim 1, characterized in that: In the first iteration, the information weights passed from the check nodes to the variable nodes need to be adjusted according to the marking results. The absolute value of the information passed by the check nodes marked as needing to increase the information weight is S1, and the absolute value of the information passed by the check nodes marked as needing to decrease the information weight is S2. The absolute values ​​of the information passed by other check nodes are the minimum or second minimum values. The absolute values ​​of the information are then combined with the sign bit and passed to the variable nodes. S1 and S2 are the absolute values ​​of the enhanced and weakened information, respectively, which can be determined by simulation based on the main trap set structure of the specific LDPC codeword.

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