Anti-interference random sequence frequency hopping and frequency synchronization method and system and storage medium

Abstract

The invention provides an anti-interference random sequence frequency hopping and frequency synchronization method and system and a storage medium, and the method comprises the steps: obtaining a communication frequency band between a master node and a slave node, dividing the communication frequency band into N intervals, selecting a frequency point in each interval through a pseudo-random sequence, and generating a mapping table; the master node performs frequency point switching communication at the first frequency fm, and the slave node performs frequency point switching communication at the second frequency fs until link communication connection is established; in response to the link communication connection established between the master node and the slave node, the master node sends the data frame of the current period to the slave node, and the slave node analyzes the data frame to complete time synchronization; a frequency hopping time interval is set, a timer is started for timing during each frequency hopping, and next frequency hopping is started when timing is completed; and indexing a target frequency point of next frequency hopping from the mapping table by using the pseudo-random number, and realizing frequency hopping and frequency synchronization of the link according to the target frequency point. According to the frequency hopping method, the anti-interference performance and the stability of the communication bandwidth can be ensured at the same time.

Description

Technical Field

[0001] The present application relates to the field of wireless communication technology, and in particular to an interference-resistant random sequence frequency hopping and frequency synchronization method, system and storage medium. Background Art

[0002] Frequency hopping communication technology refers to a communication method in which the carrier frequency of the transmission signal between the sender and the receiver is controlled by a pseudo-random code and changes discretely according to a predetermined rule. With the development of drone technology, frequency hopping communication technology is now also used between the ground receiving end (i.e. the sending end) and the sky end (i.e. the receiving end) of drones.

[0003] There are two mainstream frequency hopping communication methods at present: 1) Before communication, the signal strength of the fixed signal list is traversed, and the optimal signal is selected for communication at a fixed frequency. This method needs to interrupt the communication link when traversing the channel, which has poor real-time performance and a high risk of interference to fixed channel communication. 2) Set thresholds such as signal quality and strength during communication. When it is lower than the threshold, perform rapid tentative frequency hopping of other pre-stored frequency points, and perform frequency hopping when a better frequency point is detected. This method has better anti-interference and real-time performance, but still has many shortcomings, such as: the threshold definition is difficult, there are many unknown scenarios, and there is a potential risk of communication disconnection for scenarios that have not been considered; the real-time performance of frequency hopping is insufficient, and there is a lag in switching to a better frequency point, which makes it impossible to continuously guarantee a high level and stable communication bandwidth, especially in complex radio environments, such as urban areas, where the bandwidth fluctuates greatly.

[0004] The above solutions cannot guarantee both anti-interference and stability of communication bandwidth. Therefore, it is necessary to provide an anti-interference random sequence frequency hopping and frequency synchronization method, system and storage medium to solve the above technical problems. Summary of the invention

[0005] In order to solve the above technical problems, the present application proposes an interference-resistant random sequence frequency hopping and frequency synchronization method, system and storage medium.

[0006] According to a first aspect of the present application, an anti-interference random sequence frequency hopping and frequency synchronization method is proposed for communication between a master node and a slave node, comprising: Obtain a communication frequency band between the master node and the slave node, and divide it into N intervals, select a frequency point in each interval using a pseudo-random sequence, and generate a mapping table containing N frequency points, where N is an integer greater than 2; The master node randomly selects a frequency point from the mapping table and uses the first frequency f m To perform frequency switching communication, the slave node randomly selects a frequency from the mapping table and transmits the frequency to the second frequency f sPerform frequency switching communication until the master node establishes a link communication connection with the slave node, where f s =N×f m ; In response to the master node establishing a link communication connection with the slave node, the master node sends a data frame of this cycle to the slave node, and the slave node parses the data frame to complete time synchronization; Setting a frequency hopping time interval, starting a timer at each frequency hopping, and starting the next frequency hopping when the timer is completed; The target frequency point of the next frequency hopping is indexed from the mapping table using a pseudo-random number, and the frequency hopping and frequency synchronization of the link are realized according to the target frequency point.

[0007] Preferably, the master node includes a microcontroller, and the process of generating the pseudo-random sequence includes: Generate a random number seed using a high-precision timestamp and a unique identifier UID of the microcontroller; Based on the random number seed, generate the pseudo-random sequence using a random number generator; The accuracy of the high-precision timestamp is at the microsecond level.

[0008] Preferably, the timer includes a main timer and an auxiliary timer, and the setting of the frequency hopping time interval, starting the timer for each frequency hopping, and starting the next frequency hopping when the timer is finished, includes: Setting a frequency hopping time interval, using the main timer and the auxiliary timer to simultaneously time the frequency hopping interval each time the frequency hopping occurs; When the counting interval of the main timer in the current cycle arrives, a modulo operation is performed on the counting value of the auxiliary timer in the current cycle and the counting interval of the auxiliary timer in one cycle; If the remainder result is not 0, the counting interval of the main timer in the current cycle or the next cycle is compensated and corrected according to the remainder result; Starting the next frequency hopping when the main timer finishes timing; The accuracy of the main timer is higher than that of the auxiliary timer.

[0009] Preferably, the pseudo-random number generation process includes: A modulo operation is performed on the timestamp of the auxiliary timer and a preset random seed to obtain the pseudo-random number, wherein the preset random seed is a positive integer between [2, N].

[0010] Preferably, when the number N of frequency points included in the mapping table is an integer of ten, the preset random seed value is N-1.

[0011] Preferably, the master node sends the data frame of this cycle to the slave node, and the slave node parses the data frame to complete time synchronization, including: The master node inserts the timestamp of the master node into the first K bytes of the data frame, where K is a positive integer ≥ 3; Recording the transmission time of the data frame between the master node and the slave node; The slave node receives the data frame and parses the timestamp of the master node, and synchronizes the local timestamp according to the timestamp of the master node and the transmission time of the data frame.

[0012] According to the second aspect of the present application, an interference-resistant random sequence frequency hopping and frequency synchronization system is proposed, comprising a master node and a slave node, wherein the master node and the slave node are used to execute the interference-resistant random sequence frequency hopping and frequency synchronization method provided in any embodiment of the first aspect above, to form a wireless communication link.

[0013] Preferably, the master node is a drone remote controller, and the slave node is a drone sky terminal.

[0014] According to the third aspect of the present application, an electronic device is proposed, comprising: one or more processors; a memory for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the electronic device implements the interference-resistant random sequence frequency hopping and frequency synchronization method provided in any embodiment of the first aspect above.

[0015] According to a fourth aspect of the present application, a computer-readable storage medium is proposed, on which a computer program is stored. When the program is executed by a processor, an interference-resistant random sequence frequency hopping and frequency synchronization method provided in any embodiment of the first aspect is implemented.

[0016] The present application proposes an interference-resistant random sequence frequency hopping and frequency synchronization method, system and storage medium. By adopting highly random and unique pseudo-random sequences and pseudo-random numbers, dynamic adjustment of frequency hopping time intervals, timestamp synchronization and other mechanisms, there is no need to define a frequency hopping threshold, and the frequency points are evenly selected. Frequency hopping disperses signal energy, which not only improves the stability of the communication bandwidth, but also reduces interference to other devices. At the same time, it enhances the anti-interference ability and the difficulty of signal interception and cracking, and has good applicability in almost any wireless communication scenario. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate the embodiments and are used together with the description to explain the principles of the present invention. It will be easy to recognize other embodiments and many expected advantages of the embodiments because they become better understood by reference to the following detailed description. The elements of the accompanying drawings are not necessarily to scale with each other. The same reference numerals refer to corresponding similar parts.

[0018] Figure 1 is a flow chart of a random sequence frequency hopping and frequency synchronization method for anti-interference according to an embodiment of the present application; Figure 2 is a flow chart of dynamic adjustment of the frequency hopping time interval of the master timer according to an embodiment of the present application; Figure 3 is a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to a specific embodiment of the present application; Figure 4 is a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to another specific embodiment of the present application; Figure 5 is a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to another specific embodiment of the present application; Figure 6 is a schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0019] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and Examples. It should be understood that the specific embodiments described herein are only configured to explain the present invention and are not configured to limit the present invention. For those skilled in the art, the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present invention by illustrating examples of the present invention.

[0020] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0021] The present application proposes an interference-resistant random sequence frequency hopping and frequency synchronization method for communication between a master node and a slave node. Figure 1 A flow chart of a random sequence frequency hopping and frequency synchronization method for anti-interference according to an embodiment of the present application is shown. Figure 1 As shown, the method comprises the following steps: Step S10: Obtain the communication frequency band between the master node and the slave node, and divide it into N intervals, select a frequency point in each interval using a pseudo-random sequence, and generate a mapping table containing N frequency points, where N is an integer greater than 2.

[0022] Specifically, the communication frequency band is divided into N intervals to ensure that the frequency points in each interval can be selected, and the signal energy is dispersed by evenly selecting the frequency points and frequency hopping. Then, a frequency point is selected in each interval through a pseudo-random sequence to obtain a highly random frequency point mapping table.

[0023] It should be noted that the value of N is preferably a whole number, so that the calculated frequency hopping interval will be an integer, which is convenient for subsequent timers to count. In this embodiment, N is 20. In other implementations, the value of N can be adjusted according to actual needs, and is not limited here.

[0024] In a specific embodiment, the master node includes a microcontroller (MCU), and the pseudo-random sequence is generated by a random number generator. The specific generation process is as follows: a high-precision timestamp is used to fuse the unique identifier UID of the microcontroller of the master node to generate a random number seed, and based on the random number seed, a pseudo-random sequence is generated by a random number generator.

[0025] In this way, the generated pseudo-random number seed has high randomness and uniqueness, thereby ensuring the high randomness of the generated pseudo-random sequence, making it difficult for the signal to be interfered with or blocked, while increasing the difficulty of intercepting and cracking the signal.

[0026] In this embodiment, the accuracy of the high-precision timestamp is at the microsecond level. In other implementations, the accuracy of the high-precision timestamp can also be adjusted according to actual needs, which is not limited here.

[0027] Step S20: The master node randomly selects a frequency point from the mapping table and uses the first frequency f m To perform frequency switching communication, the slave node randomly selects a frequency from the mapping table and transmits the frequency to the second frequency f s The frequency switching communication is performed until the master node and the slave node establish a link communication connection, where f s =N×f m .

[0028] Specifically, before the master node and the slave node establish a wireless link communication connection, the master node uses slow hopping logic and the slave node uses fast hopping logic. In a specific embodiment, the master node hops once per second, that is, the master node switches the frequency at a frequency of 1HZ, and the slave node hops 20 times per second, that is, the slave node switches the frequency at a frequency of 20HZ. Since there are only 20 frequency points in the mapping table, it is guaranteed that the slave node can establish a link communication connection with the master node within 1 second.

[0029] It should be noted that, in this embodiment, the first frequency f m The value is 1HZ, the second frequency f s The value is 20HZ. In other implementations, when f s =N×f m Under the condition of m and the second frequency f s The value of can be adjusted according to actual needs and is not limited here.

[0030] Step S30: In response to the master node establishing a link communication connection with the slave node, the master node sends the data frame of this cycle to the slave node, and the slave node parses the data frame to complete time synchronization.

[0031] In a specific embodiment, step S30 specifically includes: Step S31: The master node inserts the timestamp of the master node into the first K bytes of the data frame sent in this cycle, where K is a positive integer ≥3.

[0032] Step S32: Record the transmission time of the data frame between the master node and the slave node.

[0033] Step S33: The slave node receives the data frame and parses the timestamp of the master node, and synchronizes the local timestamp according to the timestamp of the master node and the transmission time of the data frame.

[0034] In this embodiment, the value of K is 4.

[0035] It should be noted that, in this embodiment, taking a timestamp with a precision of 100 microseconds as an example, a field with a length of 4 bytes can continuously record a timestamp of about 300 days. Therefore, it can be understood that in other embodiments, the value of K can be adjusted according to actual working conditions, and K can be a positive integer greater than 3 or 4, and even in the case of a low timestamp precision, K can be a positive integer less than 3.

[0036] Step S40: setting a frequency hopping time interval, starting a timer for each frequency hopping, and starting the next frequency hopping when the timer is finished.

[0037] In a specific embodiment, the timer is a timer module of a microcontroller of a master node, and the timer includes a master timer and a slave timer, wherein the accuracy of the master timer is higher than that of the slave timer. Figure 2 FIG. 4 shows a flow chart of dynamically adjusting the frequency hopping time interval of the master timer according to an embodiment of the present application, such as Figure 2 As shown, step S40 specifically includes: Step S41: setting the frequency hopping time interval, and using the main timer and the auxiliary timer to simultaneously time the frequency hopping interval each time the frequency hopping occurs.

[0038] Step S42: When the counting interval of the current cycle of the main timer arrives, a modulo operation is performed on the counting value of the current cycle of the auxiliary timer and its counting interval within one cycle.

[0039] Step S43: Determine whether the remainder result is 0, if not, execute step S44; if yes, execute step S45.

[0040] Step S44: Compensate and correct the counting interval of the main timer in the current cycle or the next cycle according to the remainder result.

[0041] Step S45: When the main timer finishes timing, the next frequency hopping starts.

[0042] In this embodiment, before the master node and the slave node establish a link communication connection, the slave node uses 20HZ to perform frequency hopping to attempt to establish a link communication connection with the master node. Therefore, after the master node and the slave node establish a link communication connection, the frequency of 20HZ continues to be used for frequency hopping, that is, the frequency hopping time interval is 50ms, which facilitates the timing of the main timer and the auxiliary timer.

[0043] In this embodiment, the accuracy of the main timer used is microseconds, and the accuracy of the auxiliary timer used is hundreds of microseconds. In other implementations, under the condition that the accuracy of the main timer is higher than the accuracy of the auxiliary timer, the main timer and auxiliary timer with different accuracies can also be selected according to actual needs, and there is no limitation here.

[0044] Specifically, the frequency hopping time interval is 50ms. For the microsecond main timer, the timing interval of each cycle is 50000×1μs, and the corresponding counting interval within one cycle is theoretically 50000 times; for the hundred-microsecond auxiliary timer, the timing interval of each cycle is 500×100μs, and the corresponding counting interval within one cycle is theoretically 500 times.

[0045] However, although the main timer has high precision, in particular, for the MCU timer, the higher the timer precision, the higher the clock frequency is required to support its high-precision timing, and the MCU with a high clock frequency is more susceptible to external interference during operation, resulting in increased timing errors. On the contrary, the auxiliary timer has lower precision and is less susceptible to external interference.

[0046] Therefore, in this embodiment, a secondary timer with lower precision is added to dynamically adjust and compensate the counting interval of the main timer to ensure the accuracy of the frequency hopping time interval, thereby maintaining the stability of the communication bandwidth. The following will explain the process of the secondary timer dynamically adjusting and compensating the counting interval of the main timer with an example.

[0047] When the counting interval of the main timer in the current cycle reaches 50,000 times, assuming that the actual timing interval has only passed 49,900 μs, it means that the main timer jumps too fast and an error occurs. At this time, the count value displayed by the auxiliary timer in the current cycle is 499. The remainder operation of 499 and 500 (499%500) is 1. Therefore, the main timer is compensated for 1×100 μs in the current cycle, that is, the counting interval of the main timer in the current cycle is 100 times more, which is 50,100 times.

[0048] When the counting interval of the main timer in the current cycle reaches 50000 times, assuming that the actual timing interval has passed 50100μs, it means that the main timer jumps slowly and an error occurs. At this time, the count value displayed by the auxiliary timer in the current cycle is 501. The remainder operation of 501 and 500 (501%500) is 1. Therefore, the main timer is corrected by 1×100μs in the next cycle, that is, the counting interval of the main timer in the next cycle is 100 times less, which is 49900 times.

[0049] Step S50: using a pseudo-random number to index the target frequency point of the next frequency hopping from the mapping table, and realizing the frequency hopping and frequency synchronization of the link according to the target frequency point.

[0050] Specifically, a target frequency point with high randomness is obtained by indexing from a mapping table through a pseudo-random number, and the master node and the slave node implement frequency hopping and frequency synchronization of the wireless communication link according to the target frequency point.

[0051] In a specific embodiment, the pseudo-random number generation process includes: performing a modulo operation on the timestamp of the auxiliary timer and a preset random seed to obtain a pseudo-random number, wherein the preset random seed is a positive integer between [2, N], and N is the number of frequency points included in the mapping table.

[0052] Specifically, the timestamp of the auxiliary timer is the accumulated count value of the auxiliary timer. Since the timestamp of the auxiliary timer changes in each cycle, a modulo operation is performed on the timestamp of the auxiliary timer and the preset random seed to obtain a highly random modulo result, so that the target frequency point for the next frequency hopping indexed in the mapping table is also highly random, making it difficult for the signal to be interfered or blocked, and further increasing the difficulty of intercepting and cracking the signal.

[0053] In a specific embodiment, when the number N of frequency points included in the mapping table is an integer of ten, the preset random seed value is N-1. The advantages of this embodiment will be explained below with an example.

[0054] When the value range of the preset random seed is between [2, N], the modulo operation is performed on the timestamp of the auxiliary timer and the preset random seed, and the modulo result obtained will be a positive integer less than N. When N is a ten, take N as 20 as an example: if the preset random seed is also 20, without considering the large error of the auxiliary timer for a long time, the cumulative count value of the auxiliary timer after each cycle changes relatively stably, so the modulo operation is performed on the timestamp of the auxiliary timer and 20, and the modulo result obtained usually only changes back and forth between a few values, and the randomness is not high; if the preset random seed is a relatively small number such as 2, 3, 4..., the modulo operation is performed on the timestamp of the auxiliary timer and the preset random seed, and the modulo result obtained will also only change back and forth between 0, 1, 2, 3..., and the target frequency point indexed in the mapping table will eventually switch back and forth between the 1st, 2nd, 3rd, 4th... frequency points, and cannot cover the entire mapping table, and the randomness is not high.

[0055] Therefore, in this embodiment, when N is a ten, for example, N is 20, the preset random seed value is N-1, that is, the preset random seed is 19. In this way, the timestamp of the auxiliary timer is modulo the preset random seed, and the modulo result obtained will change back and forth between 0, 1, 2, 3...18, and finally the target frequency indexed in the mapping table will switch back and forth between the 1st, 2nd, 3rd, 4th...19th frequency points, with high randomness, and basically covering all the frequency points in the mapping table (except the 20th frequency point will not be randomly obtained). Through the above method, the anti-interference performance of the communication link can be further improved to ensure the reliability and stability of the communication.

[0056] It should be noted that the above embodiment is only a preferred embodiment of the preset random seed value, but is not a limitation on the preset random seed value. When N is not a whole ten, the preset random seed value can also be N-1.

[0057] In summary, the present application proposes an anti-interference random sequence frequency hopping and frequency synchronization method, which uses a highly random and unique pseudo-random sequence to evenly select frequency points and disperse signal energy by frequency hopping, thereby improving both the stability of the communication bandwidth and the anti-interference ability. The master node adopts slow hopping logic, the slave node adopts fast hopping logic, and synchronizes the timestamp after establishing the link connection to achieve fast and highly stable frequency hopping communication. Then, a microsecond master timer is used to time the frequency hopping interval, and a hundred microsecond auxiliary timer is used to dynamically correct the frequency hopping interval to solve the cumulative time error and floating problems that may occur under complex working conditions, thereby ensuring the reliability of the frequency hopping frequency and the frequency hopping interval, thereby further maintaining the stability of the communication bandwidth. Then, a highly random random number is generated based on the timestamp of the auxiliary timer and the preset random seed, and the target frequency point for the next frequency hopping is obtained by indexing from the mapping table, further improving the anti-interference of the communication link and ensuring the reliability and stability of the communication.

[0058] According to the above-mentioned anti-interference random sequence frequency hopping and frequency synchronization method, based on the same inventive concept, the present application also proposes an anti-interference random sequence frequency hopping and frequency synchronization system. Figure 3 FIG. 4 shows a block diagram of a random sequence frequency hopping and frequency synchronization system for anti-interference according to a specific embodiment of the present application. Figure 3 As shown, the system includes a master node 100 and a slave node 200, and the master node 100 and the slave node 200 are used to execute the anti-interference random sequence frequency hopping and frequency synchronization method provided in any of the above embodiments to form a wireless communication link.

[0059] In a specific embodiment, the master node 100 is a drone remote controller, and the slave node 200 is a drone air terminal, thereby forming a one-machine-one-controller drone digital image transmission system.

[0060] In a specific embodiment, both the remote control and the air end are equipped with a communication module, which includes a radio frequency chip and a microcontroller (MCU). The remote control and the air end achieve wireless communication through the communication module.

[0061] Figure 4 FIG. 4 shows a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to another specific embodiment of the present application. Figure 4 As shown, in another specific embodiment, a plurality of master nodes 100 may be provided, thereby forming a one-machine-multiple-controller UAV digital image transmission system.

[0062] Figure 5 FIG. 4 shows a block diagram of a random sequence frequency hopping and frequency synchronization system for anti-interference according to another specific embodiment of the present application. Figure 5 As shown, in another specific embodiment, a plurality of slave nodes 200 may be provided, thereby forming a UAV digital image transmission system that controls multiple drones.

[0063] According to the above-mentioned anti-interference random sequence frequency hopping and frequency synchronization method, based on the same inventive concept, the present application also proposes an electronic device. Figure 6 A schematic diagram of an electronic device according to an embodiment of the present application is shown. Figure 6 As shown, the electronic device includes: one or more processors 301, a memory 302, a bus 303 and a communication interface 304. Among them, the one or more processors 301, the memory 302 and the communication interface 304 are connected via the bus 303. The memory 302 is used to store one or more programs. When the one or more programs are executed by the one or more processors 301, the electronic device implements the anti-interference random sequence frequency hopping and frequency synchronization method provided in any of the above embodiments.

[0064] According to the above-mentioned anti-interference random sequence frequency hopping and frequency synchronization method, based on the same inventive concept, the present application also proposes a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the anti-interference random sequence frequency hopping and frequency synchronization method provided by any of the above-mentioned embodiments is implemented.

[0065] In the embodiments of the present application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device / system / method embodiments described above are only schematic. For example, the division of the units can be a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0066] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0067] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0068] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk and other media that can store program codes.

[0069] Obviously, those skilled in the art can make various modifications and changes to the embodiments of the present invention without departing from the spirit and scope of the present invention. In this way, if these modifications and changes are within the scope of the claims of the present invention and their equivalents, the present invention is also intended to cover these modifications and changes. The word "comprising" does not exclude the presence of other elements or steps not listed in the claims. The simple fact that certain measures are recorded in mutually different dependent claims does not indicate that the combination of these measures cannot be used to profit. Any reference numerals in the claims should not be considered to limit the scope.

Claims

1. An anti-interference random sequence frequency hopping and frequency synchronization method for communication between a master node and a slave node, characterized in that: include: Obtain a communication frequency band between the master node and the slave node, and divide it into N intervals, select a frequency point in each interval using a pseudo-random sequence, and generate a mapping table containing N frequency points, where N is an integer greater than 2; The master node randomly selects a frequency point from the mapping table and uses the first frequency f m To perform frequency switching communication, the slave node randomly selects a frequency from the mapping table and transmits the frequency to the second frequency f s Perform frequency switching communication until the master node establishes a link communication connection with the slave node, where f s =N×f m ; In response to the master node establishing a link communication connection with the slave node, the master node sends a data frame of this cycle to the slave node, and the slave node parses the data frame to complete time synchronization; Setting a frequency hopping time interval, starting a timer at each frequency hopping, and starting the next frequency hopping when the timer is completed; The target frequency point of the next frequency hopping is indexed from the mapping table using a pseudo-random number, and the frequency hopping and frequency synchronization of the link are realized according to the target frequency point.

2. The method according to claim 1, characterized in that The master node includes a microcontroller, and the generation process of the pseudo-random sequence includes: Generate a random number seed using a high-precision timestamp and a unique identifier UID of the microcontroller; Based on the random number seed, generate the pseudo-random sequence using a random number generator; The accuracy of the high-precision timestamp is at the microsecond level.

3. The method according to claim 1, characterized in that The timer includes a main timer and an auxiliary timer, and the setting of the frequency hopping time interval starts the timer at each frequency hopping, and starts the next frequency hopping when the timer finishes timing, including: Setting a frequency hopping time interval, using the main timer and the auxiliary timer to simultaneously time the frequency hopping interval each time the frequency hopping occurs; When the counting interval of the main timer in the current cycle arrives, a modulo operation is performed on the counting value of the auxiliary timer in the current cycle and the counting interval of the auxiliary timer in one cycle; If the remainder result is not 0, the counting interval of the main timer in the current cycle or the next cycle is compensated and corrected according to the remainder result; Starting the next frequency hopping when the main timer finishes timing; The accuracy of the main timer is higher than that of the auxiliary timer.

4. The method according to claim 3, characterized in that: The pseudo-random number generation process includes: A modulo operation is performed on the timestamp of the auxiliary timer and a preset random seed to obtain the pseudo-random number, wherein the preset random seed is a positive integer between [2, N].

5. The method according to claim 4, characterized in that When the number N of frequency points included in the mapping table is an integer of ten, the preset random seed value is N-1.

6. The method according to claim 1, characterized in that The master node sends the data frame of this cycle to the slave node, and the slave node parses the data frame to complete time synchronization, including: The master node inserts the timestamp of the master node into the first K bytes of the data frame, where K is a positive integer ≥ 3; Recording the transmission time of the data frame between the master node and the slave node; The slave node receives the data frame and parses the timestamp of the master node, and synchronizes the local timestamp according to the timestamp of the master node and the transmission time of the data frame.

7. An anti-interference random sequence frequency hopping and frequency synchronization system, characterized in that: It comprises a master node and a slave node, wherein the master node and the slave node are used to execute the method according to any one of claims 1 to 6 to form a wireless communication link.

8. The system according to claim 7, characterized in that The master node is the drone remote controller, and the slave node is the drone sky terminal.

9. An electronic device, characterized in that: include: one or more processors; A memory for storing one or more programs, which, when executed by the one or more processors, enables the electronic device to implement the method as claimed in any one of claims 1 to 6.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to any one of claims 1 to 6 is implemented.

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