An optical signal processing circuit and an image sensor

Abstract

The present invention discloses a processing circuit for optical signals and an image sensor, which relates to the field of electronic information. The first compensation switch is correspondingly connected to the compensation pixel, and the second compensation switch is correspondingly connected to the photosensitive pixel. The controller controls the first compensation switch and the second compensation switch to perform time-division multiplexing, and turns on the first compensation switch and the second compensation switch at different times, so that the readout module can respectively read out the first voltage signal corresponding to the compensation pixel and the second voltage signal corresponding to the photosensitive pixel, thereby obtaining the current illumination information by using the difference between the voltage signals read twice. The compensation pixel not only has the same resistance value as that of the photosensitive pixel when the photosensitive pixel is not irradiated by light, but also the first end of the compensation pixel and the first end of the photosensitive pixel are connected to the same potential, so that the photosensitive pixel and the compensation pixel are implemented by the same circuit architecture, avoiding the compensation error caused by inconsistent circuit structures, increasing the characteristic consistency between the photosensitive pixel and the compensation pixel, and improving the compensation effect of the compensation pixel.

Description

Technical Field

[0001] The present invention relates to the field of electronic information, and particularly to a processing circuit for optical signals and an image sensor. Background Art

[0002] As an important device for obtaining visual information, an image sensor can convert the sensed optical signal into an electrical signal for output, and can be applied in fields such as photography, videography, and imaging. With the continuous development and wide application of image sensors, users' requirements for their performance are also constantly increasing. For resistive modulation type photosensitive devices, it is necessary to measure the resistance change of the device caused by light illumination to obtain light illumination information. Therefore, it is necessary to separately obtain the device resistance without the influence of light illumination and the device resistance after being illuminated. Among them, how to obtain the device resistance without the influence of light illumination has become a technical problem that urgently needs to be solved at present. Summary of the Invention

[0003] The object of the present invention is to provide a processing circuit for optical signals and an image sensor, in which the first ends of the compensation pixels and the photosensitive pixels are connected to the same potential, so that the photosensitive pixels and the compensation pixels are implemented using the same circuit architecture, avoiding compensation errors caused by inconsistent circuit structures, increasing the characteristic consistency of the photosensitive pixels and the compensation pixels, and improving the compensation effect of the compensation pixels.

[0004] To solve the above technical problem, the present invention provides a processing circuit for optical signals, including:

[0005] Compensation pixels, the first ends of which are connected to the first ends of the photosensitive pixels at the same potential, the resistance value of the compensation pixels remains fixed and is equal to the resistance value of the photosensitive pixels when not illuminated;

[0006] A first compensation switch, the first end of which is connected to the second end of the compensation pixel;

[0007] A second compensation switch, the first end of which is connected to the second end of the photosensitive pixel;

[0008] A controller, the first output end of which is connected to the control end of the first compensation switch, and the second output end of which is connected to the control end of the second compensation switch, and is used to separately control the conduction of the first compensation switch and the conduction of the second compensation switch in non-overlapping time periods;

[0009] A readout module, the input ends of which are respectively connected to the second ends of the first compensation switch and the second compensation switch, and is used to convert the compensation current flowing through the compensation pixel into a first voltage signal when the first compensation switch is conducting, and convert the photocurrent flowing through the photosensitive pixel into a second voltage signal when the second compensation switch is conducting.

[0010] Optionally, the image sensor includes a pixel array composed of a plurality of photosensitive pixels, and i photosensitive pixels in the pixel array share a compensation pixel; i is a positive integer;

[0011] The controller is further configured to control, in non-overlapping time periods, the conduction of a first compensation switch connected to the shared compensation pixel and the conduction of second compensation switches connected to the i compensation pixels, respectively.

[0012] Optionally, the i photosensitive pixels are symmetrically arranged around the shared compensation pixel with the shared compensation pixel as the center.

[0013] Optionally, the readout module includes:

[0014] A logarithmic conversion module, with an input end connected to the photosensitive pixel, configured to perform logarithmic conversion on the photocurrent flowing through the photosensitive pixel to generate a voltage signal that has a logarithmic relationship with the photocurrent;

[0015] An output buffer module, with an input end connected to the output end of the logarithmic conversion module, configured to buffer and output the voltage signal.

[0016] Optionally, the output buffer module includes:

[0017] A source follower, with a control end connected to the output end of the logarithmic conversion module, configured to amplify and output the voltage signal output by the logarithmic conversion module;

[0018] A first current biasing module, with an output end connected to one end of the source follower and serving as the output end of the output buffer module, configured to provide a biasing current for the source follower.

[0019] Optionally, the image sensor includes a pixel array composed of a plurality of photosensitive pixels; the output buffer module further includes:

[0020] A strobe switch, with a control end receiving an output selection signal, a first end connected to one end of the source follower, and a second end connected to the output end of the first current biasing module, configured to conduct when the photosensitive pixel is selected for output and turn off when the photosensitive pixel is not selected for output.

[0021] Optionally, a first end of the photosensitive pixel is connected to a first power supply, and a second end is connected to the input end of the logarithmic conversion module. The logarithmic conversion module includes:

[0022] A first amplification unit of class A;

[0023] For any first amplification unit, the first amplification unit includes a first switching transistor and a first amplifying switch transistor. The control end of the first amplifying switch transistor is connected to the first end of the first switching transistor and serves as the first input end of the first amplification unit. The first end of the first amplifying switch transistor serves as the second input end of the first amplification unit. The second end of the first switching transistor serves as the first output end of the first amplification unit. The control end of the first switching transistor is connected to the second end of the first amplifying switch transistor and serves as the second output end of the first amplification unit;

[0024] The first input end of the first-stage first amplification unit is connected to the second end of the photosensitive pixel. The second input end of the first-stage first amplification unit is connected to the second power supply. The first output end of the A-stage first amplification unit is grounded. The first output end of the i-stage first amplification unit is connected to the first input end of the (i + 1)-stage first amplification unit. The second output end of the i-stage first amplification unit is connected to the second input end of the (i + 1)-stage first amplification unit; A is a positive integer, and i is a positive integer less than A;

[0025] The second current bias module has its output end connected to the second output end of the A-stage first amplification unit and serves as the output end of the logarithmic conversion module.

[0026] Optionally, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module. The logarithmic conversion module includes:

[0027] B-stage second amplification units;

[0028] For any second amplification unit, the second amplification unit includes a fifth switching transistor and a fourth amplifying switch transistor. The control end of the fourth amplifying switch transistor is connected to the first end of the fifth switching transistor and serves as the first input end of the second amplification unit. The first end of the fourth amplifying switch transistor serves as the second input end of the second amplification unit. The second end of the fifth switching transistor serves as the first output end of the second amplification unit. The control end of the fifth switching transistor is connected to the second end of the fourth amplifying switch transistor and serves as the second output end of the second amplification unit;

[0029] The first input end of the first-stage second amplification unit is connected to the second end of the photosensitive pixel. The second input end of the first-stage second amplification unit is grounded. The first output end of the B-stage second amplification unit is connected to the second power supply. The first output end of the j-stage second amplification unit is connected to the first input end of the (j + 1)-stage second amplification unit. The second output end of the j-stage second amplification unit is connected to the second input end of the (j + 1)-stage second amplification unit; B is a positive integer, and j is a positive integer less than B;

[0030] The fifth current bias module has an output terminal connected to the second output terminal of the second amplification unit of the B-th stage and serves as the output terminal of the logarithmic conversion module.

[0031] To solve the above technical problems, the present invention also provides an image sensor, including photosensitive pixels and the processing circuit for optical signals as described above. The input terminal of the processing circuit for optical signals is connected to the photosensitive pixels and is used to convert the optical signals captured by the photosensitive pixels into electrical signals.

[0032] The present invention provides a processing circuit for optical signals, including compensation pixels, a first compensation switch, a second compensation switch tube, a controller, and a readout module. The first compensation switch is correspondingly connected to the compensation pixels, and the second compensation switch is correspondingly connected to the photosensitive pixels. The controller controls the first compensation switch and the second compensation switch for time-division multiplexing, turning on the first compensation switch and the second compensation switch at different times, so that the readout module can respectively read out the first voltage signal corresponding to the compensation pixels and the second voltage signal corresponding to the photosensitive pixels. Thus, the current illumination information is obtained by using the difference between the two read voltage signals. The compensation pixels not only have the same resistance value as the photosensitive pixels when not irradiated by light, but also the first ends of the compensation pixels and the photosensitive pixels are connected to the same potential, enabling the photosensitive pixels and the compensation pixels to be implemented using the same circuit architecture, avoiding compensation errors caused by inconsistent circuit structures, increasing the characteristic consistency between the photosensitive pixels and the compensation pixels, and improving the compensation effect of the compensation pixels.

[0033] The present invention also provides an image sensor having the same beneficial effects as the above-mentioned processing circuit for optical signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required in the prior art and the embodiments. Obviously, the following-described drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0035] Figure 1 FIG. is a schematic structural diagram of a processing circuit for optical signals provided by the present invention;

[0036] Figure 2 FIG. is a schematic structural diagram of another processing circuit for optical signals provided by the present invention;

[0037] Figure 3 FIG. is a schematic diagram of an arrangement manner of a pixel array provided by the present invention;

[0038] Figure 4 FIG. is a schematic diagram of another arrangement manner of a pixel array provided by the present invention;

[0039] Figure 5 Schematic diagram of the structure of a processing circuit for optical signals using a pixel array provided by the present invention;

[0040] Figure 6 Schematic diagram of the control signal waveform of a pixel array provided by the present invention;

[0041] Figure 7 Schematic diagram of the structure of a readout circuit for optical signals when a photosensitive pixel is connected to a high bias voltage provided by the present invention;

[0042] Figure 8 Schematic diagram of the structure of a readout circuit for optical signals when a photosensitive pixel is connected to a low bias voltage provided by the present invention;

[0043] Figure 9 Schematic diagram of the structure of another readout circuit for optical signals provided by the present invention;

[0044] Figure 10 Schematic diagram of the setting mode of an output buffer circuit provided by the present invention;

[0045] Figure 11 Schematic diagram of another setting mode of an output buffer circuit provided by the present invention;

[0046] Figure 12 Schematic diagram of the structure of the first logarithmic conversion module when a photosensitive pixel is connected to a high bias voltage provided by the present invention;

[0047] Figure 13 Schematic diagram of the structure of the second logarithmic conversion module when a photosensitive pixel is connected to a high bias voltage provided by the present invention;

[0048] Figure 14 Schematic diagram of the structure of the third logarithmic conversion module when a photosensitive pixel is connected to a high bias voltage provided by the present invention;

[0049] Figure 15 Schematic diagram of the structure of the fourth logarithmic conversion module when a photosensitive pixel is connected to a high bias voltage provided by the present invention;

[0050] Figure 16 Schematic diagram of the structure of the first logarithmic conversion module when a photosensitive pixel is connected to a low bias voltage provided by the present invention;

[0051] Figure 17 Schematic diagram of the structure of the second logarithmic conversion module when a photosensitive pixel is connected to a low bias voltage provided by the present invention;

[0052] Figure 18 Schematic diagram of the structure of the third logarithmic conversion module when a photosensitive pixel is connected to a low bias voltage provided by the present invention;

[0053] Figure 19Schematic diagram of the structure of the logarithmic conversion module when the fourth photosensitive pixel is connected to a low bias voltage provided by the present invention. Detailed implementation manners

[0054] The core of the present invention is to provide a processing circuit for optical signals and an image sensor. The first end of the compensation pixel and the first end of the photosensitive pixel are connected to the same potential, so that the photosensitive pixel and the compensation pixel are implemented using the same circuit architecture, avoiding the compensation error caused by inconsistent circuit structures, increasing the characteristic consistency between the photosensitive pixel and the compensation pixel, and improving the compensation effect of the compensation pixel.

[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0056] Please refer to Figure 1 , Figure 1 Schematic diagram of the structure of a processing circuit for optical signals provided by the present invention; please refer to Figure 2 , Figure 2 Schematic diagram of the structure of another processing circuit for optical signals provided by the present invention; to solve the above technical problems, the present invention provides a processing circuit for optical signals, including:

[0057] A compensation pixel 11, the first end of which is connected to the first end of the photosensitive pixel to the same potential. The resistance value of the compensation pixel 11 is fixed and equal to the resistance value of the photosensitive pixel when not irradiated by light;

[0058] A first compensation switch SW, the first end of which is connected to the second end of the compensation pixel 11;

[0059] A second compensation switch SL, the first end of which is connected to the second end of the photosensitive pixel;

[0060] A controller 12, the first output end of which is connected to the control end of the first compensation switch SW, and the second output end of which is connected to the control end of the second compensation switch SL, for respectively controlling the conduction of the first compensation switch SW and the conduction of the second compensation switch SL in non-overlapping time periods;

[0061] A readout module 13, the input end of which is respectively connected to the second end of the first compensation switch SW and the second end of the second compensation switch SL, for converting the compensation current flowing through the compensation pixel 11 into a first voltage signal when the first compensation switch SW is conducting, and converting the photocurrent flowing through the photosensitive pixel into a second voltage signal when the second compensation switch SL is conducting.

[0062] It can be understood that when the reading module 13 reads the electrical signal corresponding to the optical signal captured by the photosensitive pixel, it also needs to obtain the electrical signal corresponding to the photosensitive pixel in the absence of light irradiation. Therefore, in the present invention, a compensation pixel 11 is provided in the optical signal processing circuit. The compensation pixel 11 is a non-photosensitive / weakly photosensitive pixel unit, which can characterize the resistance and other characteristics of the photosensitive pixel when not irradiated by light. Therefore, when the reading module 13 needs to determine the illumination condition corresponding to the second voltage signal of the currently read photosensitive pixel, it can determine the resistance and other characteristics of the photosensitive pixel in the absence of light by separately reading the first voltage signal of the compensation pixel 11, and then determine the optical signal such as the light intensity captured by the current photosensitive pixel by comparing the two voltage signals and other methods.

[0063] It is not difficult to understand that since the compensation pixel 11 itself serves as the reference of the photosensitive pixel, the circuit architecture and other implementation methods of the compensation pixel 11 in application are preferably the same as those of the photosensitive pixel. Therefore, the first ends of the compensation pixel 11 and the photosensitive pixel need to be connected to the same potential, such as being connected to the power supply or grounded, and the second ends are both connected to the input end of the reading module 13, so as to make the compensation pixel 11 and the photosensitive pixel maintain the uniformity of the circuit structure, avoid the pixel characteristic differences caused by the circuit structure differences, and ensure the compensation effect. At the same time, considering that in the process of sensor production, the characteristics of Pixels (pixels) are non-uniform, and the differences in the resistance and other characteristics of Pixels located farther away are greater. Therefore, when designing the photosensitive pixel and the compensation pixel 11, the compensation pixel 11 is arranged near the photosensitive pixel as close as possible to avoid the influence of the pixel characteristic differences caused by the position differences on the compensation effect. The compensation pixel 11 and the photosensitive pixel are connected to the backend analog reading module 13 via their respective corresponding compensation switches. The analog reading module 13 can have a logarithmic conversion function. The first compensation switch SW and the second compensation switch SL are turned on at different times, so that the backend circuit reads the compensation pixel 11 and the photosensitive pixel respectively, and uses the difference between the two read signals as the optical signal.

[0064] It should be noted that in order to ensure the compensation effect, the compensation pixel 11 and the photosensitive pixel are designed to be as consistent as possible in all aspects. Therefore, the signal readouts of the two need to be completely independent. In the present invention, the first compensation switch SW and the second compensation switch SL are set to independently realize the signal readouts of the compensation pixel 11 and the photosensitive pixel respectively. When the first compensation switch SW is turned on, the readout module 13 reads out the signal of the compensation pixel 11. When the second compensation switch SL is turned on, the readout module 13 reads out the signal of the photosensitive pixel. Thus, the on-time of the first compensation switch SW and the on-time of the second compensation switch SL must be two completely non-overlapping time periods. If the first compensation switch SW is turned on starting from the first moment and turned off at the second moment, switching to the off state; the second compensation switch SL is turned on starting from the third moment and turned off at the fourth moment, switching to the off state; then any moment between the first moment and the second moment (including the first moment and the second moment) and any moment between the third moment and the fourth moment (including the third moment and the fourth moment) do not overlap. The readout of the compensation pixel 11 can be carried out before the readout of the corresponding photosensitive pixel or after the readout of the corresponding photosensitive pixel. The present application does not make a special limitation here.

[0065] It can be understood that the present invention uses the non-photosensitive / weakly photosensitive compensation pixel 11 near the photosensitive pixel, and controls the readout module 13 to read out signals in a time-division multiplexing manner respectively, improving the matching degree between the photosensitive pixel and the compensation pixel 11. The present application does not make a special limitation on the specific type and implementation manner of the compensation pixel 11, etc. Taking the photosensitive pixel using two-dimensional sheet materials (graphene or molybdenum disulfide) as an example, this type of photosensitive pixel includes two nodes, namely an electrode terminal and a signal readout terminal, and its photosensitive part is composed of two-dimensional material graphene distributed between the two nodes and quantum dots connected to the graphene. The material of the quantum dots can be cadmium sulfide, cadmium selenide, cadmium telluride, zinc selenide, lead sulfide, lead selenide, indium phosphide, etc. Using quantum dots as the photosensitive material can optimize the wavelength of the absorbed light. For example, using PbS can absorb and measure light in the short-wave infrared band, and using a non-photosensitive pixel or a weakly photosensitive pixel made of the same material as the two-dimensional sheet material in the foregoing photosensitive pixel as the compensation pixel 11. It can be realized by removing the quantum dots on the two-dimensional material of the photosensitive pixel, or by placing a light-blocking layer (such as using wiring metal as the light-blocking layer) above the photosensitive pixel. For example, photosensitive quantum dots can be fabricated on the two-dimensional material to realize the photosensitive pixel, and the corresponding quantum dots are not fabricated on the same two-dimensional material to realize the compensation pixel 11.

[0066] It should be noted that the specific types and implementation manners of the first compensation switch SW, the second compensation switch SL, the controller 12, and the readout module 13 are not particularly limited in this application. The first compensation switch SW and the second compensation switch SL can be implemented by various types of controllable switches, such as MOS transistors (Metal-Oxide-Semiconductor Field-Effect Transistors), etc. The controller 12 can be implemented by various types of control chips and processors, etc.

[0067] It is not difficult to understand that for a resistive modulation type photosensitive device, especially a sensor using a new material represented by a two-dimensional sheet material (graphene or molybdenum disulfide) + quantum dots as the photosensitive device, the pixel senses light through the change of the resistance value, and measures the change of the device resistance caused by light to obtain the light information. Therefore, it is inevitably necessary to know the change amount of the resistance when there is light and when there is no light, that is, it is necessary to obtain the device resistance without the influence of light and the device resistance after being irradiated by light, and the measurement of the change amount is as accurate as possible. The present invention adopts photosensitive pixels and compensation pixels 11 with the same circuit architecture, avoiding the compensation error caused by inconsistent device structures and making the compensation effect better. At the same time, when designing, the positions of the compensation pixels 11 and the photosensitive pixels are placed nearby to further increase the characteristic consistency between the photosensitive pixels and the compensation pixels 11 and make the compensation effect better. The consistency of the performance of the device is ensured from both the layout distance and the circuit architecture aspects. At the same time, on the basis of setting non-photosensitive / weakly photosensitive devices near the photosensitive device, the method of sharing compensation pixels by multiple photosensitive pixels can also be adopted to reduce the area occupied by non-photosensitive / weakly photosensitive devices while obtaining the resistance change.

[0068] The present invention provides a processing circuit for optical signals, including compensation pixels 11, a first compensation switch SW, a second compensation switch SL tube, a controller 12, and a readout module 13. The first compensation switch SW is correspondingly connected to the compensation pixels 11, and the second compensation switch SL is correspondingly connected to the photosensitive pixels. The controller 12 controls the first compensation switch SW and the second compensation switch SL for time-division multiplexing, turning on the first compensation switch SW and the second compensation switch SL at different times, so that the readout module 13 can respectively read out the first voltage signal corresponding to the compensation pixels 11 and the second voltage signal corresponding to the photosensitive pixels, and thereby obtain the current light information by using the difference between the two read voltage signals. The compensation pixels 11 not only have the same resistance value as the photosensitive pixels when not irradiated by light, but also the first ends of the compensation pixels 11 and the photosensitive pixels are connected to the same potential, so that the photosensitive pixels and the compensation pixels 11 are implemented by the same circuit architecture, avoiding the compensation error caused by inconsistent circuit structures, increasing the characteristic consistency between the photosensitive pixels and the compensation pixels 11, and improving the compensation effect of the compensation pixels 11.

[0069] Based on the above embodiments:

[0070] Please refer to Figure 3 , Figure 3 which is a schematic diagram of an arrangement manner of a pixel array provided by the present invention; please refer to Figure 4 , Figure 4 which is another schematic diagram of an arrangement manner of a pixel array provided by the present invention; As an alternative embodiment, the image sensor includes a pixel array composed of a plurality of photosensitive pixels, and i photosensitive pixels in the pixel array share a compensation pixel 11; i is a positive integer;

[0071] The controller 12 is further configured to control the conduction of the first compensation switch SW connected to the shared compensation pixel 11 and the conduction of the second compensation switch SL connected to the i compensation pixels 11 respectively in non-overlapping time periods.

[0072] It is not difficult to understand that in order to reduce the volume of the entire image sensor, when multiple photosensitive pixels are used in the image sensor, the same compensation pixel 11 can be used by multiple photosensitive pixels. Generally, the image sensor uses a pixel array to implement photosensing. Therefore, it can be preset that i photosensitive pixels share a compensation pixel 11. At this time, in order to read out the signals of each photosensitive pixel sharing the same compensation pixel 11 separately, it is necessary to avoid the situation where the voltage signal cannot be normally output when the compensation switch corresponding to the compensation pixel 11 and the photosensitive pixel is turned on at the same time or the compensation switches corresponding to two photosensitive pixels are turned on at the same time and the potentials connected to the first ends of the two are the same. That is, when i photosensitive pixels share a compensation pixel 11, for this group of pixels, the controller 12 needs to set at least i + 1 non-overlapping time periods to realize the signal output of this group of pixels. A preferred embodiment is to read the compensation pixel 11 again each time the photosensitive pixel is read out. At this time, the controller 12 needs to set 2 × i non-overlapping time periods to realize the signal output of this group of pixels.

[0073] Specifically, by sharing the compensation pixel 11, the number of compensation pixels 11 that need to be provided in the image sensor can be effectively reduced, thereby reducing the optical information loss generated during light signal capture, and reducing the cost and volume of the entire processing circuit and the image sensor.

[0074] As an alternative embodiment, the i photosensitive pixels are symmetrically arranged around the shared compensation pixel 11 with the shared compensation pixel 11 as the center.

[0075] It can be understood that when designing the pixel array, it is necessary to consider the layout distance between the compensation pixel 11 and the corresponding photosensitive pixel, and arrange the compensation pixel 11 adjacent to the corresponding photosensitive pixel. Therefore, when i photosensitive pixels share one compensation pixel 11, the corresponding photosensitive pixels can be symmetrically arranged around the compensation pixel 11 as the center. The specific symmetrical arrangement method and the like are not particularly limited in this application, and it can also be arranged asymmetrically, as long as the layout distance between each photosensitive pixel and the corresponding compensation pixel 11 remains at a small value. It can be realized by means of array arrangement, etc. to achieve a regular pixel array, or other arrangement methods can also be used. A preferred embodiment is that i photosensitive pixels are centrosymmetric with the compensation pixel 11 as the center.

[0076] As a specific embodiment, taking the array arrangement as an example, in every 3x3 = 9 pixels, 8 photosensitive pixels can share one compensation pixel 11, and the 8 photosensitive pixels and the compensation pixel 11 can be arranged in an array in the shape of a 3x3 magic square as shown in Figure 3 Also, 3 photosensitive pixels can share one compensation pixel 11, and the 3 photosensitive pixels and the compensation pixel 11 can be arranged in an array in the shape of a 2x2 quadrilateral as shown in Figure 4 Since there is pixel multiplexing, time-division multiplexing needs to be considered between each corresponding photosensitive pixel and the compensation pixel 11 when reading data.

[0077] Please refer to Figure 5 , Figure 5 which is a schematic structural diagram of a processing circuit for optical signals when using a pixel array provided by the present invention; please refer to Figure 6 , Figure 6 which is a schematic diagram of the control signal waveform of a pixel array provided by the present invention; taking 3 photosensitive pixels sharing one compensation pixel 11 as an example, as shown in Figure 5As shown, the first compensation switch includes SWA corresponding to photosensitive pixel A, SWB corresponding to photosensitive pixel B, and SWC corresponding to photosensitive pixel C, and the second compensation switch includes SLA corresponding to photosensitive pixel A, SLB corresponding to photosensitive pixel B, and SLC corresponding to photosensitive pixel C. The control of the compensation switches in the array can be performed with a 2x2 repetition period. Since the four pixels in a group of 2x2 pixels need to be time-division multiplexed, a group of pixels includes photosensitive pixel A, photosensitive pixel B, photosensitive pixel C, and a compensation pixel. Therefore, when the selection switch SEL is a row selection switch, that is, the controller 12 controls the corresponding selection switch SEL through the row selection signal RowSel, and each time in units of rows, the selection switch SEL corresponding to the photosensitive pixels in one row is turned on to achieve simultaneous reading of one row of data. When using a row parallel reading circuit to read and perform analog-to-digital conversion on the optical signal after Log transformation, one set of horizontal control signal groups needs to be used for every 2 rows. The horizontal control signal group includes three independent row selection signals RowSelA, RowSelB, and RowSelC respectively for photosensitive pixel A, photosensitive pixel B, and photosensitive pixel C, a compensation pixel selection signal SWComp, and a photosensitive pixel selection signal SWLight. And one set of analog-to-digital conversion circuits is shared by every two columns. The signal waveform of a driving method of the horizontal control signal is as Figure 6 shown. For a group of pixels in these two rows, it is necessary to read photosensitive pixel A, photosensitive pixel B, and photosensitive pixel C separately in three times. When RowSelA is at a high level, the controller 12 first reads the compensation pixel corresponding to photosensitive pixel A by setting SWComp1A high. After the reading is completed, it controls the selection switches of all photosensitive pixels A in the first row of the pixel array to conduct, and the reading module 13 reads all photosensitive pixels A in the first row. When RowSelB is at a high level, the controller 12 first reads the compensation pixel corresponding to photosensitive pixel B by setting SWComp1B high. After the reading is completed, it controls the selection switches of all photosensitive pixels B in the first row of the pixel array to conduct, and the reading module 13 reads all photosensitive pixels B in the first row. When RowSelC is at a high level, the controller 12 first reads the compensation pixel corresponding to photosensitive pixel C by setting SWComp1C high. After the reading is completed, it controls the selection switches of all photosensitive pixels C in the second row of the pixel array to conduct, and the reading module 13 reads all photosensitive pixels C in the second row. This process is repeated to achieve reading of all pixels in a 2Nx2M (row x column) pixel array.

[0078] Specifically, when there is sharing of compensation pixels, it is necessary to consider the arrangement of compensation pixels when designing the pixel array. The pixel array is designed by comprehensively considering the arrangement distance between the compensation pixels and the corresponding photosensitive pixels. At the same time, when designing the control logic of the pixel array, it is also necessary to consider the time-division multiplexing among the pixels in the same group, and then combine row selection or column selection to realize the reading of all pixels in the entire pixel array, thereby improving the reading efficiency of the pixels.

[0079] As an alternative embodiment, the reading module includes:

[0080] A logarithmic conversion module 1, with its input end connected to the photosensitive pixel, for performing logarithmic conversion on the photocurrent flowing through the photosensitive pixel to generate a voltage signal having a logarithmic relationship with the photocurrent;

[0081] An output buffer module 2, with its input end connected to the output end of the logarithmic conversion module 1, for buffering and outputting the voltage signal.

[0082] It is not difficult to understand that, in order to achieve more accurate and reliable reading of optical signals, the present invention provides a logarithmic conversion module 1 in the optical signal reading module. After the logarithmic conversion module 1 performs logarithmic conversion on the photocurrent flowing through the photosensitive pixel, a corresponding voltage signal is generated, and the optical signal is read based on the voltage signal. The logarithmic conversion module 1 is connected in series with the photosensitive pixel. When there is light irradiation on the photosensitive pixel, its resistance value changes with the change of the optical signal, and the resistance value has an exponential relationship with the irradiance of light; under the condition that the power supply connected to the photosensitive pixel remains unchanged, the photocurrent flowing through the photosensitive pixel is inversely proportional to the resistance value of the photosensitive pixel. Therefore, the photocurrent flowing through the photosensitive pixel can also effectively represent the optical signal received by the photosensitive pixel and has an exponential relationship with the irradiance of light. After the photocurrent flowing through the photosensitive pixel is input into the logarithmic conversion module 1, the logarithmic conversion module 1 performs logarithmic conversion on it to obtain a voltage signal having a linear relationship with the irradiance of light. Thus, the mechanism of exponential transformation in the photosensitive pixel is offset by using logarithmic transformation, and linear compensation of light intensity is efficiently achieved.

[0083] It can be understood that considering that the voltage signal obtained after the conversion by the logarithmic conversion module 1 may have abnormal jitter due to noise and interference signals, etc., and considering that the voltage signal read out by the readout module also needs to be input into circuits such as the analog-to-digital conversion circuit and the host computer for further processing to implement functions such as image generation, in the readout module of the optical signal, the present invention further provides an output buffer module 2. The voltage signal output by the logarithmic conversion module 1 will pass through the output buffer module 2 to realize the final readout of the electrical signal. The output buffer module 2 can not only play a role in signal isolation, avoiding the mutual interference of signals between other circuit modules and the logarithmic conversion module 1, preventing the voltage signal from being affected by possible noise, interference signals, etc. in the subsequent circuit, but also absorb abnormal reverse current and back electromotive force, protecting the logarithmic conversion module 1 and ensuring the safety and reliability of the entire readout module. At the same time, by setting the output buffer module 2, the signal quality of the voltage signal can be further improved. The output buffer module can shape the voltage signal, realize the level matching of the voltage signal, improve the driving ability of the voltage signal, etc., ensure the complete transmission of the voltage signal, and reduce the signal jitter; improve the stability and reliability of the entire readout module.

[0084] It should be noted that the specific types and implementation methods of the logarithmic conversion circuit and the output buffer module 2 are not particularly limited in this application. It can be implemented by a circuit architecture composed of devices such as MOS transistors and bipolar transistors. The specific types and implementation methods of the photosensitive pixels can also be set and adjusted according to the actual application situation, and are not particularly limited in this application. Please refer to Figure 7 , Figure 7 which is a schematic structural diagram of a readout module for an optical signal when a photosensitive pixel is connected to a high bias voltage provided by the present invention; please refer to Figure 8 , Figure 8 which is a schematic structural diagram of a readout module for an optical signal when a photosensitive pixel is connected to a low bias voltage provided by the present invention; VDD is the supply voltage, and Rpix represents the resistance of the photosensitive pixel; there are two possibilities in the application of the photosensitive pixel. One is that the photosensitive pixel needs to be connected to a high bias voltage for application (Vdd represents the high bias voltage in this embodiment), and the other is that the pixel needs to be connected to a low bias voltage for application (GND represents the low bias voltage in this embodiment).

[0085] It is not difficult to understand that the present invention can be applied to various devices such as image sensors that use resistance modulation type photosensitive pixels. Please refer to Figure 9 , Figure 9Schematic diagram of another light signal readout module provided by the present invention; a node of the electrode terminal in the photosensitive pixel is connected to a bias voltage, and a node of the signal readout terminal is connected to the logarithmic conversion module 1. The logarithmic conversion module 1 converts the photocurrent into a voltage signal, and the magnitude of this voltage signal has a logarithmic relationship with the magnitude of the photocurrent. Then, this voltage is buffered and signal-amplified by the source follower SF of the output buffer module 2, and then connected to the shared signal readout line in the pixel array via the strobe switch SEL, thereby realizing the readout and conversion of the light signal. The logarithmic conversion module 1 is used to process the photocurrent of the photosensitive pixel to generate a voltage signal with better linearity and dynamic range. By using the logarithmic conversion module 1, compression of the exponential signal is achieved, and the relationship between the output voltage signal and the input light intensity signal returns to a linear relationship. Thus, problems such as poor linearity of the readout signal and limited dynamic range are solved.

[0086] Please refer to Figure 10 , Figure 10 Schematic diagram of an arrangement method of an output buffer circuit provided by the present invention; please refer to Figure 11 , Figure 11 Schematic diagram of another arrangement method of an output buffer circuit provided by the present invention; as an optional embodiment, the output buffer module 2 includes:

[0087] A source follower SF, whose control end is connected to the output end of the logarithmic conversion module 1, and is used to amplify and output the voltage signal output by the logarithmic conversion module 1;

[0088] A first current bias module Q31, whose output end is connected to one end of the source follower SF and serves as the output end of the output buffer module 2, and is used to provide a bias current for the source follower SF.

[0089] It is not difficult to understand that the transformed voltage signal needs to be further buffered and amplified before being read out. The output buffer module 2 can specifically be implemented by a source follower SF. The voltage signal output by the logarithmic conversion module 1 acts on the gate of the source follower SF, causing the potential of the source of the source follower SF to change with the change of the voltage signal, thereby realizing the function of voltage following. At the same time, the input impedance of the source follower SF itself is relatively high, which can effectively buffer the voltage signal. Considering that the source follower SF needs to work in a specific state, generally the saturation region can realize the buffering and amplification of the input signal. Therefore, a first current bias module Q31 needs to be set in the output buffer module 2 to provide a bias current for the source follower SF to support its operation in the saturation region, ensuring that the source follower SF can effectively buffer and amplify the voltage signal. The specific types and implementation methods of the source follower SF and the first current bias module Q31 are not particularly limited in this application.

[0090] As a specific embodiment, as Figure 10 shown, the source follower SF can be implemented by a PMOS transistor with its drain grounded. The first current bias module Q31 can be implemented by a PMOS transistor with its source connected to the power supply and its gate connected to a preset fixed bias voltage Vbias_peri, generating a fixed bias current to be supplied to the source follower SF. The specific value and implementation method of the bias voltage connected to the first current bias module Q31 are not particularly limited in this application. As Figure 11 shown, the source follower SF can be implemented by an NMOS transistor with its drain connected to the power supply. The first current bias module Q31 can be implemented by an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias_peri. The source of the source follower is connected to the analog-to-digital conversion circuit through a selection switch SEL, so as to further convert the voltage signal output by the read voltage into a digital signal, facilitating subsequent processing by devices such as a processor. Figure 10 Shown is the implementation method when the switching transistor in the logarithmic conversion module, the current bias module in the logarithmic conversion module, and the output buffer module use the same power supply and share the same ground. In practical applications, the implementation methods of the power supply and the grounding point used by the switching transistor in the logarithmic conversion module, the current bias module in the logarithmic conversion module, and the output buffer module can be different. That is, the VDD connected to the fifth switching transistor Q15, the VDD connected to the fifth current bias module Q35, and the VDD connected to the first current bias module Q31 can be implemented using different power supplies, and the grounding points of the photosensitive pixel, the fourth amplifying switch transistor Q24, and the source follower SF can also be implemented in different ways.

[0091] Specifically, by using the source follower SF to implement the output buffer module 2, it can effectively buffer and amplify the converted voltage signal. At the same time, the first current bias module Q31 is set to ensure the accurate application of the source follower SF, improving the accuracy and stability of the finally output voltage signal and ensuring the accuracy and reliability of the entire read module.

[0092] As an alternative embodiment, the image sensor includes a pixel array composed of a plurality of photosensitive pixels; the read module further includes:

[0093] A selection switch SEL, with its control terminal connected to an output selection signal, its first terminal connected to one end of the source follower SF, and its second terminal connected to the output terminal of the first current bias module Q31, for conducting when the photosensitive pixel is selected for output and turning off when the photosensitive pixel is not selected for output.

[0094] It can be understood that in an image sensor, multiple photosensitive pixels are generally arranged in an array to achieve a detailed, comprehensive, and complete image presentation through the pixel array. At this time, the light signal readout module needs to read out the signals of all photosensitive pixels in the pixel array. Therefore, for the convenience of management and the accurate readout of each photosensitive pixel, several selection switches SEL are also provided in the readout module, which are connected in one-to-one correspondence with several photosensitive pixels in the pixel array. The selection switch SEL is connected in series between the source electrode of the source follower SF and the output end of the readout module, and can control whether the voltage signal finally obtained by the readout module is output. When a certain selection switch SEL is turned on, the readout module outputs the voltage signal converted by the corresponding photosensitive pixel. When a certain selection switch SEL is turned off, the voltage signal converted by the corresponding photosensitive pixel will not be output to the subsequent circuit, thereby achieving the accurate readout of the voltage signals corresponding to different photosensitive pixels. The specific type and implementation method of the selection switch SEL are not particularly limited in this application. The specific type and implementation method of the output selection signal for controlling its operation can be set and connected according to the actual application situation, and are not particularly limited in this application. As Figure 10 and Figure 11 shown, the selection switch SEL can be directly implemented by a PMOS transistor or an NMOS transistor connected in series with the source follower SF.

[0095] It can be understood that for different biasing methods of the photosensitive pixels, a corresponding logarithmic conversion module 1 and different output buffer modules 2 need to be set, and different source followers SF and other methods are used to cover each photosensitive pixel in the image sensor, so as to realize the readout of the light signals obtained by the entire image sensor, so as to realize functions such as image display.

[0096] Specifically, the accurate readout of the signals corresponding to each photosensitive pixel in the pixel array application scenario can be achieved by setting the selection switch SEL. At the same time, the signals corresponding to multiple photosensitive pixels can be read out simultaneously through methods such as row selection signals or column selection signals, improving the readout speed of the light signals, effectively reducing the number of circuit connections, and simplifying the circuit structure. Further considering the setting method of the readout module in the case of the pixel array, the flexibility of the readout module is improved, and the applicable range is expanded.

[0097] Please refer to Figure 12 , Figure 12 which is a schematic structural diagram of the logarithmic conversion module when the first photosensitive pixel is connected to the high bias voltage provided by the present invention; please refer to Figure 13 , Figure 13 which is a schematic structural diagram of the logarithmic conversion module when the second photosensitive pixel is connected to the high bias voltage provided by the present invention; As an optional embodiment, the first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0098] The first amplification unit of level A;

[0099] For any first amplification unit, the first amplification unit includes a first switching transistor Q11 and a first amplifying switching transistor Q21. The control terminal of the first amplifying switching transistor Q21 is connected to the first end of the first switching transistor Q11 and serves as the first input terminal of the first amplification unit. The first end of the first amplifying switching transistor Q21 serves as the second input terminal of the first amplification unit. The second end of the first switching transistor Q11 serves as the first output terminal of the first amplification unit. The control terminal of the first switching transistor Q11 is connected to the second end of the first amplifying switching transistor Q21 and serves as the second output terminal of the first amplification unit;

[0100] The first input terminal of the first amplification unit of the first stage is connected to the second end of the photosensitive pixel. The second input terminal of the first amplification unit of the first stage is connected to the second power supply. The first output terminal of the first amplification unit of level A is grounded. The first output terminal of the first amplification unit of the i-th stage is connected to the first input terminal of the first amplification unit of the (i + 1)-th stage. The second output terminal of the first amplification unit of the i-th stage is connected to the second input terminal of the first amplification unit of the (i + 1)-th stage; A is a positive integer, and i is a positive integer less than A;

[0101] The second current bias module Q32, the output terminal of which is connected to the second output terminal of the first amplification unit of level A and serves as the output terminal of the logarithmic conversion module 1.

[0102] It is not difficult to understand that when the photosensitive pixel is in a state of being connected to a high bias voltage, the logarithmic conversion module 1 can be implemented by using a first amplification unit of type A. For any stage of the first amplification unit, including the first conversion switch transistor Q11 and the first amplification switch transistor Q21, the first conversion switch transistor Q11 and the first amplification switch transistor Q21 cooperate to perform logarithmic conversion and signal amplification on the photocurrent corresponding to the second terminal voltage Vsens of the photosensitive pixel, and then convert it into a voltage signal Vsig_log for output. The first conversion switch transistor Q11 plays a role in logarithmic conversion, and the first amplification switch transistor Q21 plays a role in signal amplification. The specific types and implementation methods of the first conversion switch transistor Q11 and the first amplification switch transistor Q21 are not particularly limited in this application. They can be implemented by using switching devices such as MOS transistors and bipolar transistors, or can be implemented in other ways. Considering that the first conversion switch transistor Q11 and the first amplification switch transistor Q21 in the first amplification unit need to work in a specific operating state to achieve the corresponding logarithmic conversion and signal amplification functions, a second current bias module Q32 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the first conversion switch transistor Q11 and the first amplification switch transistor Q21. The specific type of the second current bias module Q32 and the specific value of the bias current it provides and other implementation methods are not particularly limited in this application. The specific types and implementation methods of the first power supply and the second power supply are not particularly limited in this application. They can be implemented by using the same power supply, or can be implemented by selecting different power supplies according to actual application requirements.

[0103] As a specific embodiment, as Figure 12 shown, the logarithmic conversion module 1 includes a stage of the first amplification unit, and the second current bias module Q32 is implemented by using an NMOS transistor with the source grounded and the gate connected to a preset fixed bias voltage Vbias. As Figure 13 shown, the logarithmic conversion module 1 includes two stages of the first amplification unit, and the second current bias module Q32 is implemented by using an NMOS transistor with the source grounded and the gate connected to a preset fixed bias voltage Vbias.

[0104] Specifically, the logarithmic conversion module 1 composed of the first conversion switch transistor Q11, the first amplification switch transistor Q21, and the second current bias module Q32 can be specifically used to implement the logarithmic conversion of the photocurrent flowing through the photosensitive pixel. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout module.

[0105] Please refer to Figure 14 , Figure 14 which is the structural schematic diagram of the logarithmic conversion module when the third photosensitive pixel is connected to a high bias voltage provided by the present invention; as an optional embodiment, the first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0106] The second amplification switch transistor Q22, with its first terminal connected to the second power supply.

[0107] The second conversion switch transistor Q12, with its first terminal connected to the control terminal of the second amplification switch transistor Q22 and the second terminal of the photosensitive pixel respectively.

[0108] The third conversion switch transistor Q13, with its first terminal connected to the second terminal of the second conversion switch transistor Q12 and the control terminal of the second conversion switch transistor Q12 respectively, and its second terminal grounded.

[0109] The third current bias module Q33, with its output terminal connected to the control terminal of the third conversion switch transistor Q13 and the second terminal of the second amplification switch transistor Q22 respectively, and serving as the output terminal of the logarithmic conversion module 1.

[0110] It can be understood that when the photosensitive pixel is in a state of being connected to a high bias voltage, the logarithmic conversion module 1 may specifically include the second amplification switch transistor Q22, the second conversion switch transistor Q12, the third conversion switch transistor Q13, and the third current bias module Q33. The second conversion switch transistor Q12 and the third conversion switch transistor Q13 play a role in logarithmic conversion, and the second amplification switch transistor Q22 plays a role in signal amplification. For the specific types and implementation manners of the second amplification switch transistor Q22, the second conversion switch transistor Q12, and the third conversion switch transistor Q13, the present application does not make specific limitations here. They can be implemented by switch devices such as MOS transistors and bipolar transistors, or other methods can also be used. Considering that the second amplification switch transistor Q22, the second conversion switch transistor Q12, and the third conversion switch transistor Q13 all need to work in specific working states to achieve the corresponding logarithmic conversion and signal amplification functions, a third current bias module Q33 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the second amplification switch transistor Q22, the second conversion switch transistor Q12, and the third conversion switch transistor Q13. The present application does not make specific limitations here on the specific type of the third current bias module Q33 and the specific value of the bias current it provides and other implementation manners. As Figure 14 shown, the third current bias module Q33 is implemented by an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias.

[0111] Specifically, the logarithmic conversion module 1 composed of the second amplification switch transistor Q22, the second conversion switch transistor Q12, the third conversion switch transistor Q13, and the third current bias module Q33 can be used to achieve the logarithmic conversion of the signal. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout module.

[0112] Please refer to Figure 15 , Figure 15FIG. 0 is a schematic structural diagram of a fourth photosensitive pixel connected to a high bias logarithmic conversion module provided by the present invention; as an alternative embodiment, a first end of the photosensitive pixel is connected to a first power supply, and a second end is connected to an input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0113] A third amplification switch transistor Q23, with a first end connected to a second power supply;

[0114] A fourth conversion switch transistor Q14, with a first end connected to a control end of the third amplification switch transistor Q23 and a second end of the photosensitive pixel respectively, and a control end connected to a first preset bias voltage;

[0115] A fourth current bias module Q34, with an output end connected to a second end of the fourth conversion switch transistor Q14 and a second end of the third amplification switch transistor Q23 respectively, and serving as an output end of the logarithmic conversion module 1.

[0116] It is not difficult to understand that when the photosensitive pixel is in a state of being connected to a high bias, the logarithmic conversion module 1 may specifically include a third amplification switch transistor Q23, a fourth conversion switch transistor Q14, and a fourth current bias module Q34. The fourth conversion switch transistor Q14 plays a role in logarithmic conversion, and the third amplification switch transistor Q23 plays a role in signal amplification. The specific types and implementation methods of the third amplification switch transistor Q23 and the fourth conversion switch transistor Q14 are not particularly limited in this application. They can be implemented using switching devices such as MOS transistors and bipolar transistors, or other methods can be used. Considering that the third amplification switch transistor Q23 needs to work in a specific working state to achieve the corresponding signal amplification function, a fourth current bias module Q34 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the third amplification switch transistor Q23. At the same time, the control end of the fourth conversion switch transistor Q14 is connected to a first preset bias voltage to ensure its stable bias and guarantee its logarithmic conversion function. The specific type of the fourth current bias module Q34 and the specific value of the bias current it provides and other implementation methods are not particularly limited in this application. The specific value of the first preset bias voltage and its implementation method are not particularly limited in this application, and can be set and adjusted according to the actual application situation of the fourth conversion switch. As Figure 15 shown, the fourth current bias module Q34 is implemented using an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias2.

[0117] Specifically, a logarithmic conversion module 1 composed of a third amplification switch transistor Q23, a fourth conversion switch transistor Q14, and a fourth current bias module Q34 can be specifically used to achieve the logarithmic conversion of the photocurrent flowing through the photosensitive pixel. The entire circuit structure is simple and easy to implement, which is beneficial to the simple implementation of the entire readout module.

[0118] It can be understood that when the photosensitive pixel is in a state of being connected to a low bias voltage, the bias voltage connected to the first end of the photosensitive pixel changes from a high bias voltage to a low bias voltage. The setting method of the logarithmic conversion module 1 can refer to the setting method when the photosensitive pixel is connected to a high bias voltage, and it only needs to be symmetric with it.

[0119] Please refer to Figure 16 , Figure 16 FIG. Figure 17 , Figure 17 is a schematic structural diagram of the logarithmic conversion module when the first photosensitive pixel of the present invention is connected to a low bias voltage; Please refer to

[0120] The output end of the fifth current biasing module Q35 is connected to the second output end of the Bth-stage second amplification unit and serves as the output end of the logarithmic conversion module 1. As Figure 16 shown, the logarithmic conversion module 1 includes a first-stage second amplification unit, and the fifth current biasing module Q35 is implemented by an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias. As Figure 17 shown, the logarithmic conversion module 1 includes two-stage second amplification units, and the fifth current biasing module Q35 is implemented by an NMOS transistor with its source grounded and its gate connected to a preset fixed bias voltage Vbias.

[0121] Please refer to Figure 18 , Figure 18FIG. 0 is a schematic structural diagram of a logarithmic conversion module when the third photosensitive pixel is connected to a low bias voltage; As an optional embodiment, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0122] The fifth amplification switch transistor Q25, with the first end grounded;

[0123] The sixth conversion switch transistor Q16, with the first end connected to the control end of the fifth amplification switch transistor Q25 and the second end of the photosensitive pixel respectively;

[0124] The seventh conversion switch transistor Q17, with the first end connected to the second end and the control end of the sixth conversion switch transistor Q16 respectively, and the second end connected to the second power supply;

[0125] The sixth current biasing module Q36, with the output end connected to the control end of the seventh conversion switch transistor Q17 and the second end of the fifth amplification switch transistor Q25 respectively, and serving as the output end of the logarithmic conversion module 1. As Figure 18 shown, the sixth current biasing module Q36 is implemented by an NMOS transistor with the source grounded and the gate connected to a preset fixed bias voltage Vbias.

[0126] Please refer to Figure 19 , Figure 19 FIG. 20 is a schematic structural diagram of a logarithmic conversion module when the fourth photosensitive pixel is connected to a low bias voltage. As an optional embodiment, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module 1. The logarithmic conversion module 1 includes:

[0127] The sixth amplification switch transistor Q26, with the first end grounded;

[0128] The eighth conversion switch transistor Q18, with the first end connected to the second end of the photosensitive pixel and the control end of the sixth amplification switch transistor Q26 respectively, and the control end connected to a second preset bias voltage;

[0129] The seventh current biasing module Q37, with the output end connected to the second end of the eighth conversion switch transistor Q18 and the second end of the sixth amplification switch transistor Q26 respectively, and serving as the output end of the logarithmic conversion module 1. As Figure 19 shown, the seventh current biasing module Q37 can be implemented by an NMOS transistor with the source grounded and the gate connected to a preset fixed bias voltage Vbias2.

[0130] To solve the above technical problems, the present invention also provides an image sensor, including photosensitive pixels and a processing circuit for optical signals as described above. The input end of the processing circuit for optical signals is connected to the photosensitive pixels, and is used to convert the optical signals captured by the photosensitive pixels into electrical signals.

[0131] For the introduction of an image sensor provided by the present invention, please refer to the embodiments of the above optical signal processing circuit, and the present invention will not be elaborated herein.

[0132] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the various embodiments, reference can be made to each other. In this specification, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variation thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0133] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A processing circuit for optical signals, characterized in that, Comprising: A compensation pixel, the first end of which is connected to the first end of the photosensitive pixel to access the same potential. The resistance value of the compensation pixel is fixed and unchanged, and is equal to the resistance value of the photosensitive pixel when not irradiated by light. The photosensitive pixel is a photosensitive pixel implemented using a two-dimensional sheet material. The photosensitive part of the photosensitive pixel implemented using a two-dimensional sheet material is composed of a two-dimensional material and quantum dots distributed between two nodes, and the quantum dots are used as the photosensitive material. Correspondingly, the compensation pixel is realized by not fabricating quantum dots on the same two-dimensional material. A first compensation switch, the first end of which is connected to the second end of the compensation pixel. A second compensation switch, the first end of which is connected to the second end of the photosensitive pixel. A controller, the first output end of which is connected to the control end of the first compensation switch, and the second output end of which is connected to the control end of the second compensation switch, and is used to control the conduction of the first compensation switch and the conduction of the second compensation switch respectively in non-overlapping time periods. A readout module, the input end of which is respectively connected to the second end of the first compensation switch and the second end of the second compensation switch, and is used to convert the compensation current flowing through the compensation pixel into a first voltage signal when the first compensation switch is conducting, and convert the photocurrent flowing through the photosensitive pixel into a second voltage signal when the second compensation switch is conducting. The image sensor includes a pixel array composed of a plurality of photosensitive pixels, and i photosensitive pixels in the pixel array share one compensation pixel; i is a positive integer. The controller is further used to control the conduction of the first compensation switch corresponding to the shared compensation pixel and the conduction of the second compensation switches corresponding to the i compensation pixels respectively in non-overlapping time periods. And each time the photosensitive pixel is read out, the compensation pixel is read out again. The readout module includes: A logarithmic conversion module, the input end of which is connected to the photosensitive pixel, and is used to perform logarithmic conversion on the photocurrent flowing through the photosensitive pixel to generate a voltage signal having a logarithmic relationship with the photocurrent. An output buffer module, the input end of which is connected to the output end of the logarithmic conversion module, and is used to buffer the voltage signal and then output it. For a plurality of photosensitive pixels, the optical signal processing circuit includes a plurality of readout modules respectively connected to the plurality of photosensitive pixels one by one.

2. The optical signal processing circuit according to claim 1, characterized in that, The i photosensitive pixels are symmetrically arranged around the shared compensation pixel with the shared compensation pixel as the center.

3. The optical signal processing circuit according to claim 1, characterized in that, The output buffer module includes: A source follower, the control end of which is connected to the output end of the logarithmic conversion module, and is used to amplify and output the voltage signal output by the logarithmic conversion module. A first current biasing module, the output end of which is connected to one end of the source follower and serves as the output end of the output buffer module, and is used to provide a biasing current for the source follower.

4. The optical signal processing circuit according to claim 3, wherein, The image sensor includes a pixel array composed of a plurality of photosensitive pixels; the output buffer module further includes: A strobe switch, the control end of which accesses an output selection signal, the first end of which is connected to one end of the source follower, and the second end of which is connected to the output end of the first current biasing module, and is used to conduct when the photosensitive pixel is selected for output and turn off when the photosensitive pixel is not selected for output.

5. The optical signal processing circuit according to claim 1, wherein The first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module. The logarithmic conversion module includes: The first amplification unit of level A; For any first amplification unit, the first amplification unit includes a first conversion switch transistor and a first amplification switch transistor. The control end of the first amplification switch transistor is connected to the first end of the first conversion switch transistor and serves as the first input end of the first amplification unit. The first end of the first amplification switch transistor serves as the second input end of the first amplification unit. The second end of the first conversion switch transistor serves as the first output end of the first amplification unit. The control end of the first conversion switch transistor is connected to the second end of the first amplification switch transistor and serves as the second output end of the first amplification unit; The first input end of the first amplification unit of the first stage is connected to the second end of the photosensitive pixel. The second input end of the first amplification unit of the first stage is connected to the second power supply. The first output end of the first amplification unit of level A is grounded. The first output end of the first amplification unit of the i-th stage is connected to the first input end of the first amplification unit of the i+1-th stage. The second output end of the first amplification unit of the i-th stage is connected to the second input end of the first amplification unit of the i+1-th stage; A is a positive integer, and i is a positive integer less than A; The second current biasing module, the output end of which is connected to the second output end of the first amplification unit of level A and serves as the output end of the logarithmic conversion module.

6. The optical signal processing circuit according to claim 1, wherein, The first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module. The logarithmic conversion module includes: The second amplification unit of level B; For any second amplification unit, the second amplification unit includes a fifth conversion switch transistor and a fourth amplification switch transistor. The control end of the fourth amplification switch transistor is connected to the first end of the fifth conversion switch transistor and serves as the first input end of the second amplification unit. The first end of the fourth amplification switch transistor serves as the second input end of the second amplification unit. The second end of the fifth conversion switch transistor serves as the first output end of the second amplification unit. The control end of the fifth conversion switch transistor is connected to the second end of the fourth amplification switch transistor and serves as the second output end of the second amplification unit; The first input end of the first amplification unit of the first stage is connected to the second end of the photosensitive pixel. The second input end of the first amplification unit of the first stage is grounded. The first output end of the second amplification unit of level B is connected to the second power supply. The first output end of the second amplification unit of the j-th stage is connected to the first input end of the second amplification unit of the j+1-th stage. The second output end of the second amplification unit of the j-th stage is connected to the second input end of the second amplification unit of the j+1-th stage; B is a positive integer, and j is a positive integer less than B; The fifth current biasing module, the output end of which is connected to the second output end of the second amplification unit of level B and serves as the output end of the logarithmic conversion module.

7. An image sensor, characterized in that, It includes a photosensitive pixel and the processing circuit for the optical signal as described in any one of claims 1 to 6. The input end of the processing circuit for the optical signal is connected to the photosensitive pixel and is used to convert the optical signal captured by the photosensitive pixel into an electrical signal.

Images