Array substrate manufacturing method, display panel and manufacturing method thereof, and display device

Abstract

This application provides a method for fabricating an array substrate, a display panel and the same method, and a display device. The display panel has a display area and a peripheral area surrounding the display area. The display panel includes an array substrate and a color filter substrate. The color filter substrate includes a first substrate and a black matrix layer. The array substrate includes a substrate and, along the thickness direction of the substrate, a gate layer, a gate insulating layer, a source / drain layer, a first insulating layer, and an electrode layer sequentially disposed on the substrate. The display panel also includes a driving circuit disposed on the substrate and located in the peripheral area. The driving circuit includes a first via and a second via. The electrode layer covers the first via and the second via, so that the gate layer and the source / drain layer are electrically connected through the electrode layer to form the driving circuit. A second insulating layer is disposed on the side of the electrode layer away from the substrate. The orthographic projection of the second insulating layer on the substrate is the same as the orthographic projection of the black matrix layer on the substrate.

Description

Technical Field

[0001] This application belongs to the field of display technology, and more specifically, relates to a method for preparing an array substrate, a display panel and the same method, and a display device. Background Technology

[0002] Display devices typically undergo reliability testing before leaving the factory, such as high-temperature and high-humidity environment testing. As consumers demand increasingly higher reliability from display devices, stringent high-temperature and high-humidity conditions, such as boiling water, dual 85°C, and 65 / 95°C, are constantly being pushed to new limits. The frame adhesive used to encapsulate display panels is primarily composed of resin, and the alignment film (PI) is primarily composed of polyimide. Both of these materials are hydrophobic and easily absorb water, allowing moisture to easily penetrate the display panel under high-temperature and high-humidity conditions.

[0003] In related technologies, display panels include a color filter substrate, a liquid crystal layer, and an array substrate. A driving circuit is disposed in the peripheral area of ​​the array substrate side of the display panel. The driving circuit includes a first via and a second via formed on a first insulating layer. An electrode layer covers the first and second vias to electrically connect the gate layer and the source / drain layer through the electrode layer. When moisture enters the display panel, the two vias in the driving circuit are easily exposed to moisture and undergo electrochemical corrosion, leading to display abnormalities and poor reliability of the display panel. Summary of the Invention

[0004] The embodiments of this application provide a method for fabricating an array substrate, a display panel and the same method, and a display device. By covering the electrode layer above the via of the driving circuit on the array substrate side in the related art with a second insulating layer, moisture is blocked during environmental testing, thus protecting the driving circuit. Moreover, the orthographic projection of the second insulating layer on the substrate is the same as the orthographic projection of the black matrix layer in the color filter substrate on the substrate. Thus, the second insulating layer can be fabricated using a photomask of the black matrix, eliminating the need for additional photomask costs. This improves the reliability of the display panel without significantly increasing costs.

[0005] In a first aspect, this application provides a display panel having a display area and a peripheral area surrounding the display area. The display panel includes an array substrate and a color filter substrate. The color filter substrate includes a first substrate and a black matrix layer. The array substrate includes a substrate base and, along the thickness direction of the substrate base, a gate layer, a gate insulating layer, a source / drain layer, a first insulating layer, and an electrode layer sequentially disposed on the substrate base. The display panel further includes a driving circuit disposed on the substrate base and located in the peripheral area. The driving circuit includes a first via and a second via. The first via penetrates the first insulating layer to the source / drain layer, and the second via penetrates the first insulating layer to the gate layer. The electrode layer covers the first via and the second via, so that the gate layer and the source / drain layer are electrically connected through the electrode layer to form the driving circuit. A second insulating layer is disposed on the side of the electrode layer away from the substrate base, and the orthographic projection of the second insulating layer on the substrate base is the same as the orthographic projection of the black matrix layer on the substrate base.

[0006] In some embodiments, the black matrix layer includes a first black matrix portion located in the display area and a second black matrix portion located in the peripheral area. The first black matrix portion is distributed in a mesh pattern and has multiple openings. The second black matrix portion is annular. The orthographic projection of the second insulating layer on the substrate is the same as the orthographic projection of the second black matrix portion on the substrate.

[0007] In some embodiments, the first black matrix includes a plurality of first strips and a plurality of second strips, the plurality of first strips being spaced apart along a first direction, the plurality of second strips being spaced apart along a second direction, the second direction being perpendicular to the first direction; two adjacent first strips and two adjacent second strips form the opening, and a filter layer is provided on the black matrix layer, the filter layer including a plurality of color resists, the plurality of color resists corresponding one-to-one with the plurality of openings.

[0008] In some embodiments, a semiconductor active layer is further provided between the gate insulating layer and the source-drain layer; the source-drain layer includes a source and a drain located in the display area and a conductive electrode located in the peripheral area, the source being connected to the semiconductor active layer and the drain being connected to the semiconductor active layer to form a thin film transistor.

[0009] In some embodiments, the electrode layer includes a first electrode region located in the peripheral region and a second electrode region located in the display region, wherein the first electrode region covers the first insulating layer, the first via, and the second via located in the peripheral region.

[0010] Secondly, this application also provides a method for fabricating an array substrate, wherein the array substrate is the array substrate in the display panel described in the first aspect, and the method for fabricating the array substrate includes:

[0011] A gate layer and a gate insulating layer are sequentially formed on the substrate along the thickness direction of the substrate.

[0012] A source / drain layer and a first insulating layer are formed on the gate insulating layer, wherein the first insulating layer covers the source / drain layer;

[0013] A first via and a second via are formed in the first insulating layer. The first via penetrates the first insulating layer to the source-drain layer. The second via is located at the end of the source-drain layer and penetrates from the first insulating layer to the gate layer.

[0014] An electrode layer is formed in the first insulating layer, the electrode layer covers the first via and the second via, and the gate layer and the source and drain layers are electrically connected through the electrode layer to form a driving circuit;

[0015] The second insulating layer is formed on the electrode layer using a first photomask;

[0016] The first photomask is the photomask used to prepare the black matrix layer.

[0017] In some embodiments, after the second insulating layer is formed on the electrode layer using the first photomask, the method further includes:

[0018] The portion of the second insulating layer located in the display area of ​​the display panel is etched away, while the portion located in the peripheral area of ​​the display panel is retained.

[0019] In some embodiments, forming a source / drain layer and a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source / drain layer, includes:

[0020] A semiconductor active layer and a pixel electrode are formed between the gate insulating layers;

[0021] A source-drain layer is formed on the gate insulating layer, the source-drain layer covers the semiconductor active layer, and the source-drain layer covers a portion of the pixel electrode;

[0022] A third via is formed through the source and drain layers to form a source and drain that are connected to the semiconductor active layer;

[0023] A first insulating layer is formed on the gate insulating layer, the first insulating layer covering the source-drain layer and the third via.

[0024] Thirdly, this application also provides a method for manufacturing a display panel, including the method for manufacturing an array substrate as described in the second aspect, and forming a black matrix layer on a first substrate using the first photomask.

[0025] Fourthly, this application also provides a display device, including a housing and the display panel described in the first aspect, the display panel being disposed on the housing.

[0026] The beneficial effects of the display panel provided in this application are as follows: Compared with the prior art, the display panel provided in this application covers the electrode layer above the first and second vias on the first insulating layer on the array substrate side in the related art with a second insulating layer. In this way, during environmental testing, the second insulating layer can act as a barrier to protect the driving circuit from moisture, thereby improving the reliability of the display panel. Moreover, the orthographic projection of the second insulating layer on the substrate is the same as the orthographic projection of the black matrix layer in the color filter substrate on the substrate. Thus, the second insulating layer can be fabricated using a photomask of the black matrix, eliminating the need for additional photomask costs, thereby improving the reliability of the display panel without significantly increasing costs. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a partial structural schematic diagram of the display panel provided in Embodiment 1 of this application;

[0029] Figure 2 for Figure 1 A schematic diagram of the array substrate structure;

[0030] Figure 3 This is a top view of the second insulating layer structure provided in Embodiment 1 of this application;

[0031] Figure 4 for Figure 3 A magnified view of the second insulating layer at the dotted line in the display area;

[0032] Figure 5 This is a flowchart illustrating the fabrication process of the array substrate provided in Embodiment 2 of this application;

[0033] Figure 6 for Figure 5 The specific preparation flow chart for step S120 is shown below;

[0034] Figure 7 This is a flowchart illustrating the fabrication process of the array substrate provided in Embodiment 3 of this application;

[0035] Figure 8 This is a schematic diagram of the array substrate provided in Embodiment 3 of this application;

[0036] Figure 9 This is a flowchart illustrating the fabrication process of the color filter substrate for the display panel provided in Embodiment 4 of this application.

[0037] Figure 10 This is a partial structural schematic diagram of the display device provided in Embodiment 5 of this application.

[0038] The following are the labeling elements in the figure:

[0039] 100. Display panel; 200. Housing;

[0040] 1. Array substrate; 101. Display area; 102. Peripheral area; 2. Color filter substrate; 3. Liquid crystal layer; 4. Frame adhesive; 5. Spacer;

[0041] 11. Substrate; 12. Gate layer; 13. Gate insulating layer; 130. Pixel electrode; 14. Source / drain layer; 141. Source; 142. Drain; 143. Conductive electrode; 15. First insulating layer; 16. Electrode layer; 161. First electrode region; 162. Second electrode region; 17. Second insulating layer; 18. Semiconductor active layer; 19. Second alignment film;

[0042] 20. Opening; 21. First substrate; 22. Black matrix layer; 221. First black matrix section; 2211. First strip; 2212. Second strip; 222. Second black matrix section; 23. Filter layer; 230. Color resist; 24. Protective film; 25. First alignment film;

[0043] 31. First via; 32. Second via. Detailed Implementation

[0044] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0045] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0046] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0047] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0048] Display devices typically undergo reliability testing before leaving the factory, such as high-temperature and high-humidity environment testing. As consumers demand increasingly higher reliability from display devices, stringent high-temperature and high-humidity conditions, such as boiling water, dual 85°C, and 65 / 95°C, are constantly being pushed to new limits. The frame adhesive used to encapsulate display panels is primarily composed of resin, and the alignment film (PI) is primarily composed of polyimide. Both of these materials are hydrophobic and easily absorb water, allowing moisture to easily penetrate the display panel under high-temperature and high-humidity conditions.

[0049] In related technologies, display panels include a color filter substrate, a liquid crystal layer, and an array substrate. A driving circuit is disposed in the peripheral area of ​​one side of the array substrate. The driving circuit includes a first via and a second via formed on a first insulating layer. An electrode layer covers the first and second vias to electrically connect the gate layer and the source / drain layer, forming the driving circuit. Because only one electrode layer covers the first and second vias, when moisture enters the display panel, the two vias in the driving circuit are easily exposed to moisture and undergo electrochemical corrosion, leading to display abnormalities and poor reliability of the display panel.

[0050] To address the aforementioned technical problems, the present application provides a second insulating layer covering the electrode layer above the first and second vias on the first insulating layer. During environmental testing, the two insulating layers on either side of the electrode layer act as a barrier against moisture, protecting the drive circuit and thus improving the reliability of the display panel. Furthermore, the second insulating layer can be formed using the same photomask used to fabricate a layer in the display panel. The same photomask used to fabricate the black matrix layer can be used when fabricating the second insulating layer on the electrode layer, eliminating the need for additional photomask costs and improving the reliability of the display panel without significantly increasing costs.

[0051] Example 1

[0052] like Figure 1 and Figure 2 As shown, this application provides a display panel 100, which has a display area 101 and a peripheral area 102 located around the display area 101. The display panel 100 includes an array substrate 1 and a color filter substrate 2. The color filter substrate 2 includes a first substrate 21 and a black matrix layer 22. The array substrate 1 includes a substrate 11 and a gate layer 12, a gate insulating layer 13, a source / drain layer 14, a first insulating layer 15, and an electrode layer 16 sequentially disposed on the substrate 11 along the thickness direction of the substrate 11. The display panel 100 also includes a driving circuit disposed on the substrate 11. The driving circuit is located in the peripheral region 102. The driving circuit includes a first via 31 and a second via 32. The first via 31 penetrates the first insulating layer 15 to the source-drain layer 14, and the second via 32 penetrates the first insulating layer 15 to the gate layer 12. The electrode layer 16 covers the first via 31 and the second via 32 so that the gate layer 12 and the source-drain layer 14 are electrically connected through the electrode layer 16 to form the driving circuit. A second insulating layer 17 is provided on the side of the electrode layer 16 away from the substrate 11. The orthographic projection of the second insulating layer 17 on the substrate 11 is the same as the orthographic projection of the black matrix layer 22 on the substrate 11.

[0053] The first substrate 21 is further provided with a light filter layer 23 and a protective film 24. The light filter layer 23 includes multiple color resists 230, which may include red, green, and blue. The array substrate 1 and the color filter substrate 2 are also provided with a liquid crystal layer 3, which includes liquid crystal and spacers 5, with the spacers 5 serving a supporting function. Of course, the multiple color resists 230 may also include only one or two of red, green, and blue to achieve the display of a specific color.

[0054] By covering the electrode layer 16 on the array substrate 1 side and above the first via 31 and the second via 32 of the driving circuit with a second insulating layer 17, the second insulating layer 17 can protect the driving circuit from moisture during environmental testing, thereby improving the reliability of the display panel 100. Furthermore, the orthographic projection of the second insulating layer 17 onto the substrate 11 is the same as the orthographic projection of the black matrix layer 22 in the color filter substrate 2 onto the substrate 11. Therefore, the second insulating layer 17 can be fabricated using a black matrix photomask, eliminating the need for additional photomask costs and improving the reliability of the display panel 100 without significantly increasing costs. Simultaneously, by adding a fabrication step of the second insulating layer 17 to the array substrate 1 in the related technology, the display panel 100 can be modified, improving not only the reliability of the display panel 100 in the related technology but also reducing modification costs.

[0055] It should be noted that the display panel 100 usually also includes frame adhesive 4, which mainly serves to protect and encapsulate the display panel 100.

[0056] like Figure 2 As shown, in some embodiments, a semiconductor active layer 18 and a pixel electrode 130 are further provided between the gate insulating layer 13 and the source-drain layer 14; the source-drain layer 14 includes a source and a drain located in the display area 101 and a conductive electrode 143 located in the peripheral area 102. The source is connected to the semiconductor active layer 18 and the drain is connected to the semiconductor active layer 18 to form a thin film transistor.

[0057] like Figure 2 As shown, in some embodiments, the electrode layer 16 includes a first electrode region 161 located in the peripheral region 102 and a second electrode region 162 located in the display region 101. The first electrode region 161 covers the first insulating layer 15, the first via 31 and the second via 32 located in the peripheral region 102.

[0058] The aforementioned electrode layer 16 is typically made of ITO (indium tin oxide). The first electrode region 161 located in the peripheral region 102 mainly serves to electrically connect the gate layer 12 and the source / drain layer 14 through the first via 31 and the second via 32. The second electrode region 162 located in the display region 101 is a common electrode. The second electrode region 162 works together with the pixel electrode 130 on the gate insulating layer 13 to deflect the liquid crystal in the liquid crystal layer 3, thereby displaying the image.

[0059] like Figure 1 and Figure 2 As shown, the color filter substrate 2 has a first alignment film 25 on the side near the liquid crystal layer 3, and the array substrate 1 also includes a second alignment film 19. The first alignment film 25 is located on both sides of the liquid crystal layer 3 and mainly plays the role of controlling the alignment direction of the liquid crystal.

[0060] like Figure 3 As shown, in some embodiments, the black matrix layer 22 includes a first black matrix portion 221 located in the display area 101 and a second black matrix portion 222 located in the peripheral area 102. The first black matrix portion 221 is distributed in a mesh pattern and has a plurality of openings 20. The second black matrix portion 222 is annular. The orthographic projection of the second insulating layer 17 on the substrate 11 is the same as the orthographic projection of the second black matrix portion 222 on the substrate 11.

[0061] With the above configuration, when fabricating the second insulating layer 17, at least the area located in the peripheral region 102 is covered by the second insulating layer 17, while whether the area within the display region 101 is covered by the second insulating layer 17 is not limited. When forming the second insulating layer 17, the same pattern as the black matrix layer 22 can be directly formed on the display region 101 and the peripheral region 102 using the same photomask as the black matrix layer 22, i.e., a ring shape in the peripheral region 102 and a mesh shape in the display region 101; alternatively, a pattern identical only to the ring shape in the peripheral region 102 can be formed, while the portion of the second insulating layer 17 within the display region 101 is either omitted or, if necessary, etched away later. This design allows users to fabricate the panel according to different requirements, enabling the display panel 100 to be applied to different scenarios.

[0062] like Figure 3 and Figure 4 As shown, in some embodiments, the first black matrix portion 221 includes a plurality of first strips 2211 and a plurality of second strips 2212, the plurality of first strips 2211 being along a first direction (e.g., Figure 3 Arranged at intervals in the horizontal direction, with multiple second strips 2212 along the second direction (e.g., horizontal direction). Figure 3 The first two first strips 2211 and the second two second strips 2212 are arranged at intervals in the vertical direction, and the second direction is perpendicular to the first direction. An opening 20 is formed by two adjacent first strips 2211 and two adjacent second strips 2212. A filter layer 23 is provided on the black matrix layer 22. The filter layer 23 includes multiple color resists 230, and the multiple color resists 230 correspond one-to-one with the multiple openings 20.

[0063] With the above configuration, although a second insulating layer 17 is added to the array substrate 1 side of the display panel 100, since the array substrate 1 and the color filter substrate 2 are used together, and the orthographic projection of the second insulating layer 17 onto the substrate 11 is the same as the orthographic projection of the black matrix layer 22 onto the substrate 11, the area corresponding to the added second insulating layer 17 and the color resist 230 is empty and can allow light to pass through. Therefore, the added second insulating layer 17 will not affect the light output of the display surface, so that the display panel 100 can achieve the goal of balancing high reliability and good display effect.

[0064] Example 2

[0065] like Figure 5 As shown, this application also provides a method for fabricating an array substrate, wherein the array substrate is the array substrate in the display panel of Embodiment 1, and the method for fabricating the array substrate includes:

[0066] Step S110: Along the thickness direction of the substrate, a gate layer and a gate insulating layer are sequentially formed on the substrate.

[0067] Step S120: A source-drain layer and a first insulating layer are formed on the gate insulating layer, wherein the first insulating layer covers the source-drain layer;

[0068] Step S130: A first via and a second via are formed in the first insulating layer. The first via penetrates the first insulating layer to the source-drain layer. The second via is located at the end of the source-drain layer and penetrates from the first insulating layer to the gate layer.

[0069] Step S140: An electrode layer is formed in the first insulating layer, the electrode layer covers the first via and the second via, and the gate layer and the source and drain layers are electrically connected through the electrode layer to form a driving circuit.

[0070] Step S150: Form a second insulating layer on the electrode layer using a first photomask;

[0071] The first photomask is the photomask used to prepare the black matrix layer.

[0072] By forming a second insulating layer on the electrode layer using a first photomask, the orthographic projection of the second insulating layer onto the substrate of the array substrate prepared through the above steps is identical to the orthographic projection of the black matrix layer in the color filter substrate onto the substrate. This not only allows the second insulating layer to protect the driving circuit from moisture during environmental testing, thus improving the reliability of the display panel, but also eliminates the need for additional photomask costs by using a black matrix layer during the fabrication of the second insulating layer. This improves the reliability of the display panel without significantly increasing costs. Furthermore, by adding a second insulating layer fabrication step to the array substrate in related technologies, the display panel can be modified, improving its reliability while maintaining low modification costs.

[0073] like Figure 6 As shown, a source / drain layer and a first insulating layer are formed on the gate insulating layer, the first insulating layer covering the source / drain layer, including:

[0074] Step S121: Form a semiconductor active layer and a pixel electrode on the gate insulating layer;

[0075] Step S122: A source-drain layer is formed on the gate insulating layer, the source-drain layer covers the semiconductor active layer, and the source-drain layer covers part of the pixel electrode;

[0076] Step S123: Form a third via through the source and drain layers to form the source and drain connected to the semiconductor active layer;

[0077] Step S124: A first insulating layer is formed on the gate insulating layer, the first insulating layer covering the source and drain layers and the third via.

[0078] It should be noted that after step S123, the source and drain are connected to the semiconductor active layer to form a thin film transistor. The number of thin film transistors is the same as the number of the third vias mentioned above.

[0079] Step S110 is executed before step S121, and steps S130 to S150 continue after step S124 until the desired result is formed. Figure 2 The array substrate shown.

[0080] Example 3

[0081] The method for preparing the array substrate in Example 3 differs from that in Example 2 in that, after forming the second insulating layer on the electrode layer using the first photomask, step S160 is further included.

[0082] like Figure 7 and Figure 8 As shown, the method for fabricating the array substrate in this embodiment includes:

[0083] Step S110: Along the thickness direction of the substrate, a gate layer and a gate insulating layer are sequentially formed on the substrate.

[0084] Step S120: A source-drain layer and a first insulating layer are formed on the gate insulating layer, wherein the first insulating layer covers the source-drain layer;

[0085] Step S130: A first via and a second via are formed in the first insulating layer. The first via penetrates the first insulating layer to the source-drain layer. The second via is located at the end of the source-drain layer and penetrates from the first insulating layer to the gate layer.

[0086] Step S140: An electrode layer is formed in the first insulating layer, the electrode layer covers the first via and the second via, and the gate layer and the source and drain layers are electrically connected through the electrode layer to form a driving circuit.

[0087] Step S150: A second insulating layer is formed on the electrode layer using a first photomask; wherein, the first photomask is the photomask used to prepare the black matrix layer;

[0088] Step S160: Etch away the portion of the second insulating layer located in the display area of ​​the display panel, leaving the portion located in the peripheral area of ​​the display panel.

[0089] The structure of the array substrate formed according to the above steps is as follows: Figure 8 As shown.

[0090] The array substrate prepared by the above steps not only improves the reliability of the display panel, but also further reduces the impact on the display. At the same time, by etching away the portion of the second insulating layer located in the display area of ​​the display panel and retaining the portion located in the peripheral area of ​​the display panel, the thickness of the display panel in the display area is reduced, which helps to control the overall thickness of the display panel. This allows the display panel to achieve the goals of high reliability, high display quality, and thinness.

[0091] Example 4

[0092] This application also provides a method for fabricating a display panel, including a method for fabricating an array substrate, and step S210: forming a black matrix layer on a first substrate using a first photomask.

[0093] In particular, the method for preparing the array substrate in the display panel of Example 4 is the same as the method for preparing it in Example 2 or Example 3 above, such as... Figures 5-7 As shown.

[0094] like Figure 9 As shown, the fabrication process of the color filter substrate of the display panel in this embodiment includes:

[0095] Step S210: After forming a black matrix layer on the first substrate using a first photomask, the method further includes:

[0096] Step S220: Form a filter layer, a protective film, and an alignment film on the first substrate.

[0097] This process is used to manufacture a color filter substrate for use with an array substrate, such as... Figure 1 As shown;

[0098] Finally, the color filter substrate, liquid crystal layer, and array substrate are assembled together to form a display panel, such as... Figure 1 As shown.

[0099] The fabrication process of the color filter substrate in this embodiment and the assembly process of the color filter substrate, liquid crystal layer, and array substrate of the display panel can be manufactured using conventional methods, and will not be described in detail here. Furthermore, the display panel of this embodiment achieves the same effects as that of Embodiment 2, and will not be described in detail here either.

[0100] Example 5

[0101] like Figure 1 and 10 As shown, this application also provides a display device, including a housing 200 and a display panel 100 of Embodiment 1, wherein the display panel 100 is disposed on the housing 200.

[0102] The display panel 100 includes an array substrate 1, a color filter substrate 2, and a liquid crystal layer 3. The display panel 100 has a display area 101 and a peripheral area 102 surrounding the display area 101. The color filter substrate 2 includes a first substrate 21, a black matrix layer 22, a light filter layer 23, and a protective film 24. The light filter layer 23 includes multiple color resists 230, which may include red, green, and blue. The array substrate 1 includes a substrate 11, and along the thickness direction of the substrate 11, a gate layer 12, a gate insulating layer 13, a semiconductor active layer 18, a pixel electrode 130, a source / drain layer 14, a first insulating layer 15, and an electrode layer 16 are sequentially disposed on the substrate 11. The display panel 100 also includes a driving circuit disposed on the substrate 11, and the driving circuit is located in the peripheral area 102 of the display panel 100. The driving circuit includes... The circuit includes a first via 31 and a second via 32. The first via 31 penetrates the first insulating layer 15 to the source / drain layer 14, and the second via 32 penetrates the first insulating layer 15 to the gate layer 12. The electrode layer 16 covers the first via 31 and the second via 32 so that the gate layer 12 and the source / drain layer 14 are electrically connected through the electrode layer 16 to form a driving circuit. A second insulating layer 17 is provided on the side of the electrode layer 16 away from the substrate 11. The orthographic projection of the second insulating layer 17 on the substrate 11 is the same as the orthographic projection of the black matrix layer 22 on the substrate 11.

[0103] By covering the electrode layer 16 on the array substrate 1 side and above the first via 31 and the second via 32 of the driving circuit with a second insulating layer 17, the second insulating layer 17 can protect the driving circuit from moisture during environmental testing, thereby improving the reliability of the display panel 100. Furthermore, the orthographic projection of the second insulating layer 17 onto the substrate 11 is the same as the orthographic projection of the black matrix layer 22 in the color filter substrate 2 onto the substrate 11. Therefore, the second insulating layer 17 can be fabricated using a black matrix photomask, eliminating the need for additional photomask costs and improving the reliability of the display panel 100 without significantly increasing costs. Simultaneously, by adding a fabrication step of the second insulating layer 17 to the array substrate 1 in the related technology, the display panel 100 can be modified, improving not only the reliability of the display panel 100 in the related technology but also reducing modification costs.

[0104] The above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A display panel having a display area (101) and a peripheral area (102) surrounding the display area (101), the display panel comprising an array substrate (1) and a color filter substrate (2), the color filter substrate (2) comprising a first substrate (21) and a black matrix layer (22), the array substrate (1) comprising a substrate (11) and, along the thickness direction of the substrate (11), a gate layer (12), a gate insulating layer (13), a source / drain layer (14), a first insulating layer (15), and an electrode layer (16) sequentially disposed on the substrate (11); characterized in that, The display panel further includes a driving circuit disposed on the substrate (11), and the driving circuit is located in the peripheral area (102). The driving circuit includes a first via and a second via. The first via penetrates the first insulating layer (15) to the source-drain layer (14), and the second via penetrates the first insulating layer (15) to the gate layer (12). The electrode layer (16) covers the first via and the second via, so that the gate layer (12) and the source-drain layer (14) are electrically connected through the electrode layer (16) to form the driving circuit. The electrode layer (16) has a second insulating layer (17) on the side away from the substrate (11), and the orthographic projection of the second insulating layer (17) on the substrate (11) is the same as the orthographic projection of the black matrix layer (22) on the substrate (11). The second insulating layer (17) is formed using the same photomask used to prepare the black matrix layer (22); the second insulating layer (17) is only disposed in the peripheral area (102), and the portion of the second insulating layer (17) in the display area (101) is etched away.

2. The display panel according to claim 1, characterized in that, The black matrix layer (22) includes a first black matrix portion (221) located in the display area (101) and a second black matrix portion (222) located in the peripheral area (102). The first black matrix portion (221) is distributed in a mesh pattern and has multiple openings (20). The second black matrix portion (222) is annular. The orthographic projection of the second insulating layer (17) on the substrate (11) is the same as the orthographic projection of the second black matrix portion (222) on the substrate (11).

3. The display panel according to claim 2, characterized in that, The first black matrix section (221) includes a plurality of first strips (2211) and a plurality of second strips (2212). The plurality of first strips (2211) are arranged at intervals along a first direction, and the plurality of second strips (2212) are arranged at intervals along a second direction, the second direction being perpendicular to the first direction. The opening (20) is formed by two adjacent first strips (2211) and two adjacent second strips (2212). A filter layer (23) is provided on the black matrix layer (22). The filter layer (23) includes multiple color resists (230), and the multiple color resists (230) correspond one-to-one with the multiple openings (20).

4. The display panel according to claim 1, characterized in that, A semiconductor active layer (18) is further provided between the gate insulating layer (13) and the source drain layer (14). The source-drain layer (14) includes a source (141) and a drain (142) located in the display area (101) and a conductive electrode (143) located in the peripheral area (102). The source (141) is connected to the semiconductor active layer (18), and the drain (142) is connected to the semiconductor active layer (18) to form a thin film transistor.

5. The display panel according to claim 1, characterized in that, The electrode layer (16) includes a first electrode area (161) located in the peripheral area (102) and a second electrode area (162) located in the display area (101). The first electrode area (161) covers the first insulating layer (15), the first via (31) and the second via (32) located in the peripheral area (102).

6. A method for preparing an array substrate, wherein the array substrate is the array substrate in the display panel according to any one of claims 1 to 5, characterized in that, include: A gate layer and a gate insulating layer are sequentially formed on the substrate along the thickness direction of the substrate. A source / drain layer and a first insulating layer are formed on the gate insulating layer, wherein the first insulating layer covers the source / drain layer; A first via and a second via are formed in the first insulating layer, wherein the first via penetrates the first insulating layer to the source and drain layer; The second via is located at the end of the source-drain layer and extends from the first insulating layer to the gate layer; An electrode layer is formed in the first insulating layer, the electrode layer covers the first via and the second via, and the gate layer and the source and drain layers are electrically connected through the electrode layer to form a driving circuit; The second insulating layer is formed on the electrode layer using a first photomask; The first photomask is the photomask used to prepare the black matrix layer.

7. The method for fabricating an array substrate according to claim 6, characterized in that, After the second insulating layer is formed on the electrode layer using the first photomask, the method further includes: The portion of the second insulating layer located in the display area of ​​the display panel is etched away, while the portion located in the peripheral area of ​​the display panel is retained.

8. The method for fabricating an array substrate according to claim 6 or 7, characterized in that, The method of forming a source / drain layer and a first insulating layer on the gate insulating layer, wherein the first insulating layer covers the source / drain layer, includes: A semiconductor active layer and a pixel electrode are formed between the gate insulating layers; A source-drain layer is formed on the gate insulating layer, the source-drain layer covers the semiconductor active layer, and the source-drain layer covers a portion of the pixel electrode; A third via is formed through the source and drain layers to form a source and drain that are connected to the semiconductor active layer; A first insulating layer is formed on the gate insulating layer, the first insulating layer covering the source-drain layer and the third via.

9. A method for manufacturing a display panel, characterized in that, include: The method for preparing the array substrate as described in any one of claims 6 to 8; A black matrix layer is formed on the first substrate using the first photomask.

10. A display device, characterized in that, include: case, The display panel as described in any one of claims 1 to 5, wherein the display panel is disposed on the housing.

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