Supplementary enhancement information (SEI) manifest indication

Abstract

A video decoder may: receive a supplemental enhancement information (SEI) processing order SEI message; decoding a syntax element in the SEI processing order SEI message, the syntax element indicating a preferred processing order of the SEI message in the bitstream; and processing the SEI messages present in the bitstream according to the preferred processing order.

Description

[0001] This application claims priority to U.S. Patent Application No. 18 / 332,098 filed on June 9, 2023, U.S. Provisional Application No. 63 / 367,973 filed on July 8, 2022, U.S. Provisional Application No. 63 / 378,789 filed on October 7, 2022, U.S. Provisional Application No. 63 / 382,004 filed on November 2, 2022, and U.S. Provisional Application No. 63 / 481,896 filed on January 27, 2023, the entire contents of each application are incorporated herein by reference. U.S. patent application No. 18 / 332,098, filed on June 9, 2023, claims the benefit of U.S. Provisional Application No. 63 / 367,973, filed on July 8, 2022, U.S. Provisional Application No. 63 / 378,789, filed on October 7, 2022, U.S. Provisional Application No. 63 / 382,004, filed on November 2, 2022, and U.S. Provisional Application No. 63 / 481,896, filed on January 27, 2023. Technical Field

[0002] The present disclosure relates to video encoding and video decoding. Background Art

[0003] Digital video capabilities may be incorporated into a wide range of devices, including digital televisions, digital live broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio telephones, so-called "smart phones", video teleconferencing devices, video streaming devices, etc. Digital video devices implement video coding techniques, such as those described in standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), ITU-T H.266 / Versatile Video Coding (VVC), and extensions of such standards, as well as proprietary video codecs / formats such as AOMedia Video 1 (AV1) developed by the Alliance for Open Media. Video devices may more efficiently send, receive, encode, decode, and / or store digital video information by implementing such video coding techniques.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be partitioned into video blocks, which may also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial predictions of reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture may use spatial predictions of reference samples in neighboring blocks in the same picture or temporal predictions of reference samples in other reference pictures. Pictures may be referred to as frames, and reference pictures may be referred to as reference frames. Summary of the invention

[0005] In general, the present disclosure describes techniques for encoding and decoding video data, including techniques for encoding and decoding syntax elements in supplemental enhancement information (SEI) processing order SEI messages. The techniques of the present disclosure include decoding a manifest SEI payload type syntax element (e.g., manifest_sei_payload_type) that indicates a preferred ordering for processing SEI messages. The present disclosure also describes techniques for decoding SEI processing order SEI messages, which include decoding one or more syntax elements that indicate a processing order for particular syntax elements. Processing SEI messages according to a preferred ordering can improve user experience and video encoder performance, including in use cases that include a neural network post-filter and / or a thin film grain synthesis process.

[0006] In one example, the present disclosure describes a method for processing video data, including: receiving an SEI processing order SEI message; decoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decoding a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and processing the first SEI message and the second SEI message according to the preferred processing order.

[0007] In another example, the present disclosure describes a device configured to process video data, the device comprising: a memory configured to store video data; and one or more processors coupled to the memory, wherein the device is configured to: receive an SEI processing order SEI message; decode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and process the first SEI message and the second SEI message according to the preferred processing order.

[0008] In another example, the present disclosure describes an apparatus configured to process video data, the apparatus comprising: a unit for receiving an SEI processing order SEI message; a unit for decoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; a unit for decoding a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and a unit for processing the first SEI message and the second SEI message according to the preferred processing order.

[0009] In another example, the present disclosure describes a non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors configured to process video data to perform the following operations: receive an SEI processing order SEI message; decode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and process the first SEI message and the second SEI message according to the preferred processing order.

[0010] In another example, the present disclosure describes a method for processing video data, the method comprising: generating an SEI processing order SEI message; encoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of the first SEI message present in the bitstream; and encoding a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0011] In another example, the present disclosure describes a device configured to process video data, the device comprising: a memory configured to store video data; and one or more processors coupled to the memory, wherein the device is configured to perform the following operations: generate an SEI processing order SEI message; encode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of the first SEI message present in the bitstream; and encode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0012] In another example, the present disclosure describes an apparatus configured to process video data, the apparatus comprising: a unit for generating an SEI processing order SEI message; a unit for encoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of the first SEI message present in the bitstream; and a unit for encoding a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0013] In another example, the present disclosure describes a non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors configured to process video data to perform the following operations: generate an SEI processing order SEI message; encode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of the first SEI message present in the bitstream; and encode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0014] The details of one or more examples are set forth in the accompanying drawings and the description that follows. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0016] Figure 2 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0017] Figure 3 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0018] Figure 4 is a flowchart illustrating an example method for encoding a current block according to techniques of this disclosure.

[0019] Figure 5 is a flow chart illustrating an example method for decoding a current block according to techniques of this disclosure.

[0020] Figure 6 is a flow chart illustrating an example method for processing SEI manifest SEI messages according to techniques of this disclosure.

[0021] Figure 7 is a flow chart illustrating an example method for decoding SEI processing order SEI messages in accordance with techniques of this disclosure.

[0022] Figure 8 is a flow chart illustrating an example method for encoding SEI processing order SEI messages in accordance with techniques of this disclosure. DETAILED DESCRIPTION

[0023] Supplemental Enhancement Information (SEI) message is the type of data structure used in video decoding. SEI message is not used to carry video or audio data itself. On the contrary, SEI message contains metadata that provides additional information about the encoded video stream. This information can be used to enhance the quality of the decoded video, indicate a preferred output process, provide information about the encoded video stream, or be used for other purposes. Some example types of SEI messages can include information about the initial buffering time required before the playback of the video starts, timing information related to the current picture in the video stream, information about how to display the video when the aspect ratio of the video does not match the aspect ratio of the display, information indicating whether the video needs to be rotated or flipped before display, and other types of information.

[0024] SEI messages can be inserted into a video stream by an encoder and can then be interpreted and operated by a decoder. However, decoding of SEI messages is generally not required for decoding a video stream. SEI messages allow a wide range of video enhancements and additional features to be implemented without changing the core video encoding and decoding process.

[0025] In some example video codecs, a SEI manifest SEI message may be encoded and sent in an encoded video bitstream. The SEI manifest SEI message conveys information about SEI messages that are indicated as being expected (e.g., possibly) present or not present in the encoded video bitstream. The previous SEI manifest SEI message lists the SEI messages present in the bitstream, but does not indicate any processing order of the bitstream. The technology of the present disclosure includes decoding an SEI manifest payload type syntax element (e.g., manifest_sei_payload_type) that indicates a preferred order for processing SEI messages. The present disclosure also describes a technique for decoding an SEI processing order SEI message, which includes decoding one or more syntax elements that indicate a processing order for a particular syntax element. Processing SEI messages according to a preferred order can improve user experience and video encoder performance, including in use cases that include a neural network post-filter and / or a film particle synthesis process.

[0026] In one example, a video decoder may be configured to perform the following operations: receive an SEI processing order SEI message; decode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and process the first SEI message and the second SEI message according to the preferred processing order.

[0027] Figure 1 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of the present disclosure. The techniques of the present disclosure are generally directed to the decoding (encoding and / or decoding) of video data. Generally, video data includes any data used to process video. Therefore, video data can include original, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata (such as signaling data).

[0028] like Figure 1As shown in , in this example, system 100 includes source device 102, which provides encoded video data to be decoded and displayed by target device 116. Specifically, source device 102 provides video data to target device 116 via computer-readable medium 110. Source device 102 and target device 116 may include any of a wide range of devices, including: desktop computers, notebook (i.e., laptop) computers, mobile devices, tablet computers, set-top boxes, telephone handsets (such as, smart phones), televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, broadcast receiver devices, etc. In some cases, source device 102 and target device 116 may be equipped for wireless communication, and thus may be referred to as wireless communication devices.

[0029] exist Figure 1 In the example of, source device 102 includes video source 104, memory 106, video encoder 200 and output interface 108. Target device 116 includes input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of target device 116 can be configured to apply the technology for processing SEI message. Therefore, source device 102 represents an example of video encoding device, and target device 116 represents an example of video decoding device. In other examples, source device and target device may include other components or arrangements. For example, source device 102 can receive video data from an external video source (such as, external camera). Similarly, target device 116 can interface with external display device instead of including integrated display device.

[0030] Figure 1 The system 100 shown in is just an example. Generally, any digital video encoding and / or decoding device can perform the technology for processing SEI messages. The source device 102 and the target device 116 are only examples of such decoding devices, wherein the source device 102 generates decoded video data for transmission to the target device 116. The present disclosure refers to a "decoding" device as a device that performs decoding (encoding and / or decoding) of data. Therefore, the video encoder 200 and the video decoder 300 represent examples of decoding devices, specifically, respectively represent video encoders and video decoders. In some examples, the source device 102 and the target device 116 can operate in a substantially symmetrical manner, so that each of the source device 102 and the target device 116 includes a video encoding and decoding component. Therefore, the system 100 can support one-way or two-way video transmission between the source device 102 and the target device 116, for example, for video streaming, video playback, video broadcasting or video telephony.

[0031] Generally, video source 104 represents the source of video data (i.e., original, uncoded video data), and provides a continuous series of pictures (also referred to as "frames") of video data to video encoder 200, which encodes data for pictures. Video source 104 of source device 102 may include a video capture device, such as a camera, a video archive containing previously captured original video, and / or a video feed interface for receiving video from a video content provider. As another alternative, video source 104 may generate computer graphics-based data as source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes captured, pre-captured, or computer-generated video. Video encoder 200 may rearrange pictures from the order received (sometimes referred to as "display order") into a decoding order for decoding. Video encoder 200 may generate a bitstream comprising encoded video data. Source device 102 may then output the encoded video data onto computer-readable medium 110 via output interface 108 for receipt and / or retrieval by, for example, input interface 122 of target device 116 .

[0032] The memory 106 of the source device 102 and the memory 120 of the target device 116 represent general purpose memory. In some examples, the memory 106, 120 can store original video data, for example, the original video from the video source 104 and the original, decoded video data from the video decoder 300. In addition or alternatively, the memory 106, 120 can store software instructions executable by, for example, the video encoder 200 and the video decoder 300, respectively. In this example, although the memory 106 and the memory 120 are shown separately from the video encoder 200 and the video decoder 300, it should be understood that the video encoder 200 and the video decoder 300 can also include internal memory for functionally similar or equivalent purposes. In addition, the memory 106, 120 can store, for example, encoded video data output from the video encoder 200 and input to the video decoder 300. In some examples, portions of the memory 106, 120 can be allocated as one or more video buffers, for example, to store original, decoded and / or encoded video data.

[0033] The computer-readable medium 110 may represent any type of medium or device capable of transmitting the encoded video data from the source device 102 to the target device 116. In one example, the computer-readable medium 110 represents a communication medium for enabling the source device 102 to transmit the encoded video data directly to the target device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard (such as a wireless communication protocol), the output interface 108 can modulate a transmission signal including the encoded video data, and the input interface 122 can demodulate the received transmission signal. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network (such as the Internet). The communication medium may include a router, a switch, a base station, or any other device that may be useful in facilitating communication from the source device 102 to the target device 116.

[0034] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, target device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0035] In some examples, source device 102 may output the encoded video data to file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Target device 116 may access the stored video data from file server 114 via streaming or downloading.

[0036] The file server 114 may be any type of server device capable of storing encoded video data and sending the encoded video data to the target device 116. The file server 114 may represent a web server (e.g., for a website), a server configured to provide a file transfer protocol service (such as a file transfer protocol (FTP) or a one-way file transfer (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a multimedia broadcast multicast service (MBMS) or an enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. The file server 114 may additionally or alternatively implement one or more HTTP streaming protocols, such as dynamic adaptive streaming over HTTP (DASH), HTTP live streaming (HLS), real-time streaming protocol (RTSP), HTTP dynamic streaming, etc.

[0037] The target device 116 may access the encoded video data from the file server 114 through any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both, suitable for accessing the encoded video data stored on the file server 114. The input interface 122 may be configured to operate according to any one or more of the various protocols discussed above for retrieving or receiving media data from the file server 114, or other such protocols for retrieving media data.

[0038] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transmit data (e.g., encoded video data) according to a cellular communication standard (e.g., 4G, 4G-LTE (Long Term Evolution), Advanced LTE, 5G, etc.). In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transmit data (e.g., encoded video data) according to other wireless standards (e.g., IEEE 802.11 specifications, IEEE 802.15 specifications (e.g., ZigBee 5G, etc.). TM ),Bluetooth TMStandards, etc.) to transmit data (such as encoded video data). In some examples, source device 102 and / or target device 116 may include corresponding system-on-chip (SoC) devices. For example, source device 102 may include a SoC device to perform functions attributed to video encoder 200 and / or output interface 108, and target device 116 may include a SoC device to perform functions attributed to video decoder 300 and / or input interface 122.

[0039] The techniques of the present disclosure may be applied to video decoding to support any of a variety of multimedia applications, such as over-the-air television broadcasts, cable television transmissions, satellite television transmissions, Internet streaming video transmissions (such as Dynamic Adaptive Streaming over HTTP (DASH)), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0040] The input interface 122 of the target device 116 receives the encoded video bitstream from the computer-readable medium 110 (e.g., a communication medium, a storage device 112, a file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200, which is also used by the video decoder 300, such as syntax elements with values ​​describing characteristics and / or processing of video blocks or other decoded units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays the decoded pictures of the decoded video data to the user. The display device 118 can represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0041] although Figure 1 Not shown, but in some examples, the video encoder 200 and the video decoder 300 can each be integrated with an audio encoder and / or an audio decoder, and can include appropriate MUX-DEMUX units, or other hardware and / or software, to process a multiplexed stream including both audio and video in a common data stream.

[0042] The video encoder 200 and the video decoder 300 can each be implemented as any of a variety of suitable encoder and / or decoder circuit systems, such as, one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the technology is partially implemented in software, the device can store instructions for the software in a suitable non-temporary computer-readable medium and use one or more processors to execute the instructions in the hardware to perform the technology of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, any of which can be integrated as part of a combined encoder / decoder (CODEC) in a corresponding device. The device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device (such as a cellular phone).

[0043] Video encoder 200 and video decoder 300 can operate according to video coding standards, such as ITU-TH.265, also known as high-efficiency video coding (HEVC) or its extensions (such as multi-view and / or scalable video coding extensions). Alternatively, video encoder 200 and video decoder 300 can operate according to other proprietary or industry standards, such as ITU-TH.266, also known as universal video coding (VVC). In other examples, video encoder 200 and video decoder 300 can operate according to proprietary video codec / format, such as AOMedia Video 1 (AV1), an extension of AV1 and / or a subsequent version of AV1 (e.g., AV2). In other examples, video encoder 200 and video decoder 300 can operate according to other proprietary formats or industry standards. However, the technology of the present disclosure is not limited to any specific decoding standard or format. Generally, video encoder 200 and video decoder 300 can be configured to perform the technology of the present disclosure in combination with any video decoding technology using SEI messages.

[0044] Generally, the video encoder 200 and the video decoder 300 can perform block-based decoding of pictures. The term "block" generally refers to a structure that includes data to be processed (e.g., encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block may include a two-dimensional matrix of samples of luminance and / or chrominance data. Generally, the video encoder 200 and the video decoder 300 can decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, the video encoder 200 and the video decoder 300 can decode luminance and chrominance components instead of decoding red, green, and blue (RGB) data for samples of a picture, wherein the chrominance components may include both red hue chrominance components and blue hue chrominance components. In some examples, the video encoder 200 converts the received RGB formatted data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, a pre-processing and post-processing unit (not shown) may perform these conversions.

[0045] The present disclosure may generally refer to the decoding (e.g., encoding and decoding) of a picture to include the process of encoding or decoding data for a picture. Similarly, the present disclosure may refer to the decoding of a block of a picture to include the process of encoding or decoding data for a block, for example, prediction and / or residual decoding. The encoded video bitstream generally includes a series of values ​​for syntax elements that represent decoding decisions (e.g., decoding modes) and partitioning of a picture into blocks. Therefore, references to the decoding of a picture or a block should generally be understood as the decoded values ​​of the syntax elements used to form the picture or block.

[0046] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video decoder (such as the video encoder 200) partitions a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video decoder partitions the CTU and CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node", and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video decoder may further partition the PU and TU. For example, in HEVC, a residual quadtree (RQT) represents the partitioning of a TU. In HEVC, a PU represents inter-frame prediction data, and a TU represents residual data. An intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.

[0047] As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to VVC. According to VVC, a video decoder (such as the video encoder 200) partitions a picture into a plurality of coding tree units (CTUs). The video encoder 200 may partition the CTU according to a tree structure (such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure). The QTBT structure removes the concept of multiple partition types, such as the separation between CU, PU, ​​and TU of HEVC. The QTBT structure includes two levels: a first level partitioned according to quadtree partitioning, and a second level partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to the coding units (CUs).

[0048] In the MTT partitioning structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of ternary tree (TT) (also known as ternary tree (TT)) partitioning. Ternary or ternary tree partitioning is a partitioning that splits a block into three sub-blocks. In some examples, ternary or ternary tree partitioning divides a block into three sub-blocks without dividing the original block through the center. The partitioning types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0049] When operating according to the AV1 codec, the video encoder 200 and the video decoder 300 may be configured to decode the video data in the block. In AV1, the largest decoded block that can be processed is called a super block. In AV1, a super block may be 128×128 luma samples or 64×64 luma samples. However, in subsequent video decoding formats (e.g., AV2), super blocks may be defined by different (e.g., larger) luma sample sizes. In some examples, the super block is the top layer of the block quadtree. The video encoder 200 may further divide the super block into smaller decoding blocks. The video encoder 200 may use square or non-square partitioning to divide the super block and other decoding blocks into smaller blocks. Non-square blocks may include N / 2×N, N×N / 2, N / 4×N, and N×N / 4 blocks. The video encoder 200 and the video decoder 300 may perform separate prediction and transform processes on each decoding block in the decoding block.

[0050] AV1 also defines tiles of video data. A tile is a rectangular array of super blocks that can be decoded independently of other tiles. That is, the video encoder 200 and the video decoder 300 can encode and decode coded blocks within a tile, respectively, without using video data from other tiles. However, the video encoder 200 and the video decoder 300 can perform filtering across tile boundaries. Tiles can be consistent or inconsistent in size. Tile-based decoding can enable parallel processing and / or multi-threading of encoder and decoder implementations.

[0051] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma and chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for corresponding chroma components).

[0052] The video encoder 200 and the video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, super block partitioning, or other partitioning structures.

[0053] In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples of a picture having three sample arrays, or a CTB of samples of a monochrome picture or a picture coded using three separate color planes and syntax structures for coding the samples. A CTB can be an N×N block of samples for some value of N, so that the division of components into CTBs is a partition. A component is an array or a single sample from one of the three arrays (luminance and two chroma) that make up a picture in a 4:2:0, 4:2:2, or 4:4:4 color format, or an array or a single sample of the array that makes up a picture in a monochrome format. In some examples, a coding block is an MxN block of samples for some values ​​of M and N, so that the division of the CTB into coding blocks is a partition.

[0054] Blocks (e.g., CTUs or CUs) may be grouped in a picture in various ways. As an example, a block may refer to a rectangular area of ​​a CTU row within a particular tile in a picture. A tile may be a rectangular area of ​​a CTU within a particular tile column and a particular tile row in a picture. A tile column refers to a rectangular area of ​​a CTU having a height equal to the height of the picture and a width specified by a syntax element (e.g., such as in a picture parameter set). A tile row refers to a rectangular area of ​​a CTU having a height specified by a syntax element (e.g., such as in a picture parameter set) and a width equal to the width of the picture.

[0055] In some examples, a tile may be segmented into a plurality of blocks, each of which may include one or more CTU rows within the tile. A tile that is not segmented into a plurality of blocks may also be referred to as a block. However, a block that is a true subset of a tile may not be referred to as a tile. The blocks in a picture may also be arranged in slices. A slice may be an integer number of blocks of a picture, which may be exclusively contained in a single network abstraction layer (NAL) unit. In some examples, a slice includes a plurality of complete tiles or a continuous sequence of complete blocks of only one tile.

[0056] The present disclosure may use "N×N" and "N times N" interchangeably to refer to the sample size of a block (such as a CU or other video block) in terms of vertical and horizontal dimensions, for example, 16×16 samples or 16 times 16 samples. Generally, a 16×16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Similarly, an N×N CU generally has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. In addition, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include N×M samples, where M is not necessarily equal to N.

[0057] The video encoder 200 encodes video data for a CU representing prediction and / or residual information and other information. The prediction information indicates how the CU will be predicted in order to form a prediction block for the CU. The residual information generally represents the sample-by-sample difference between samples of the CU and the prediction block before encoding.

[0058] In order to predict a CU, the video encoder 200 can generally form a prediction block for the CU by inter-frame prediction or intra-frame prediction. Inter-frame prediction generally refers to predicting a CU from data of a previously decoded picture, while intra-frame prediction generally refers to predicting a CU from previously decoded data of the same picture. In order to perform inter-frame prediction, the video encoder 200 can use one or more motion vectors to generate a prediction block. The video encoder 200 can generally perform motion search to identify a reference block that closely matches the CU (e.g., in terms of the difference between the CU and the reference block). The video encoder 200 can use the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean square difference (MSD), or other such difference calculations to calculate a difference metric to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 can use unidirectional prediction or bidirectional prediction to predict the current CU.

[0059] Some examples of VVC also provide an affine motion compensation mode, which can be considered an inter-frame prediction mode. In the affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion (such as zooming in or out, rotation, perspective motion, or other irregular motion types).

[0060] To perform intra prediction, the video encoder 200 can select an intra prediction mode to generate a prediction block. Some examples of VVC provide sixty-seven intra prediction modes, including various directional modes as well as planar modes and DC modes. Generally, the video encoder 200 selects an intra prediction mode that describes samples adjacent to a current block (e.g., a block of a CU) from which samples of the current block are predicted. Assuming that the video encoder 200 decodes CTUs and CUs in a raster scan order (left to right, top to bottom), such samples can generally be above, above left, or to the left of the current block in the same picture as the current block.

[0061] The video encoder 200 encodes data representing a prediction mode for the current block. For example, for an inter-frame prediction mode, the video encoder 200 may encode data representing which inter-frame prediction mode is used among various available inter-frame prediction modes and motion information for the corresponding mode. For example, for unidirectional or bidirectional inter-frame prediction, the video encoder 200 may encode motion vectors using advanced motion vector prediction (AMVP) or merge mode. The video encoder 200 may use a similar mode to encode motion vectors for affine motion compensation mode.

[0062] AV1 includes two general techniques for encoding and decoding coded blocks of video data. The two general techniques are intra-frame prediction (e.g., prediction within a frame or spatial prediction) and inter-frame prediction (e.g., prediction between frames or temporal prediction). In the context of AV1, when an intra-frame prediction mode is used to predict a block of a current frame of video data, the video encoder 200 and the video decoder 300 do not use video data from other frames of the video data. For most intra-frame prediction modes, the video encoder 200 encodes a block of the current frame based on the difference between the sample values ​​in the current block and the prediction values ​​generated from the reference samples in the same frame. The video encoder 200 determines the prediction values ​​generated from the reference samples based on the intra-frame prediction mode.

[0063] After prediction of a block (such as intra prediction or inter prediction), the video encoder 200 may calculate residual data for the block. The residual data (such as a residual block) represents the sample-by-sample difference between the block and the prediction block for the block formed using the corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to generate transformed data in a transform domain rather than a sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 may apply a secondary transform after the primary transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc. The video encoder 200 generates transform coefficients after the application of one or more transforms.

[0064] As described above, after any transform to produce transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to potentially reduce the amount of data used to represent the transform coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 may reduce the bit depth associated with some or all of the transform coefficients. For example, the video encoder 200 may round an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bitwise right shift of the value to be quantized.

[0065] After quantization, the video encoder 200 can scan the transform coefficients to generate a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan can be designed to place the higher energy (and therefore lower frequency) transform coefficients at the front of the vector and the lower energy (and therefore higher frequency) transform coefficients at the back of the vector. In some examples, the video encoder 200 can scan the quantized transform coefficients using a predefined scan order to generate a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 can perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 can entropy encode the one-dimensional vector, for example, according to context adaptive binary arithmetic coding (CABAC). The video encoder 200 can also entropy encode the values ​​of the syntax elements describing the metadata associated with the encoded video data for use by the video decoder 300 to decode the video data.

[0066] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. The context may be related to, for example, whether neighboring values ​​of the symbol are zero values. The probability determination may be based on the context assigned to the symbol.

[0067] The video encoder 200 may also generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, for example in a picture header, a block header, a slice header, or other syntax data, such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS), to the video decoder 300. The video decoder 300 may likewise decode such syntax data to determine how to decode the corresponding video data.

[0068] In this way, the video encoder 200 can generate a bitstream including encoded video data (e.g., syntax elements describing partitioning a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks). Finally, the video decoder 300 can receive the bitstream and decode the encoded video data.

[0069] In general, the video decoder 300 performs a process that is inverse to the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 may use CABAC to decode the values ​​of the syntax elements of the bitstream in a manner substantially similar to but inverse to the CABAC encoding process of the video encoder 200. The syntax elements may define partitioning information for partitioning a picture into CTUs and partitioning each CTU according to a corresponding partitioning structure (such as a QTBT structure) to define CUs of the CTUs. The syntax elements may also define prediction and residual information for a block (e.g., a CU) of video data.

[0070] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to reproduce a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (sample by sample) to reproduce the original block. The video decoder 300 may perform additional processing, such as performing a deblocking process to reduce visual artifacts along the boundaries of the block. The present disclosure may generally refer to "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to conveying the values ​​of syntax elements and / or other data used to decode the encoded video data. That is, the video encoder 200 may signal the values ​​of syntax elements in the bitstream. Generally, signaling refers to generating values ​​in the bitstream. As described above, source device 102 may transmit the bitstream to destination device 116 in substantially real time, or in non-real time, such as may occur when storing syntax elements to storage device 112 for later retrieval by destination device 116 .

[0071] According to the techniques of the present disclosure, as will be explained in more detail below, the video decoder 300 may be configured to perform the following operations: receive an SEI processing order SEI message; decode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of the first SEI message present in the bitstream; decode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of the second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and process the first SEI message and the second SEI message according to the preferred processing order. Similarly, the video encoder 200 may be configured to perform the following operations: generate an SEI processing order SEI message; encode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of the first SEI message present in the bitstream; and encode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of the second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0072] An example SEI manifest SEI message is specified in ITU-T H.265. The SEI manifest SEI message conveys information about SEI messages that are indicated as being expected (eg, possibly) to be present or not present in the coded bitstream.

[0073] Table 1 shows an example SEI manifest SEI message syntax from H.265.

[0074] Table 1 SEI list SEI message syntax

[0075] sei_manifest(payloadSize){ Descriptors manifest_num_sei_msg_types u(16) for(i=0;i<manifest_num_sei_msg_types;i++){ manifest_sei_payload_type[i] u(16) manifest_sei_description[i] u(8) } }

[0076] The semantics of the syntax elements of Table 1 are as follows.

[0077] The syntax element manifest_num_sei_msg_types specifies the number of SEI message types for which information is provided in the SEI manifest SEI message.

[0078] The syntax element manifest_sei_payload_type[i] indicates the payloadType value of the i-th type SEI message for which information is provided in the SEI manifest SEI message. When m is not equal to n, the values ​​of manifest_sei_payload_type[m] and manifest_sei_payload_type[n] shall not be exactly the same.

[0079] The syntax element manifest_sei_description[i] provides information about the SEI message, where payloadType is equal to manifest_sei_payload_type[i] as specified in Table 2.

[0080] Table 2 Explanation of manifest_sei_description[i]

[0081]

[0082] In the above Table 2, CVS represents a coded video sequence. The descriptor u(8) indicates that the syntax element is coded using an unsigned integer coded with 8 bits. The descriptor u(16) indicates that the syntax element is coded using an unsigned integer coded with 16 bits.

[0083] Sean McCarthy et al., "SEI processing order SEI message in VVC (Draft 1)", from the 27th meeting of the ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29 Joint Video Experts Group (JVET) (via teleconference) on July 13-22, 2022 (hereinafter referred to as "JVET-AA2027"), describes the specification of the syntax and semantics for the SEI processing order SEI message in the VVC standard (Rec. ITU-T H.266 | ISO / IEC 23090-3). The SEI processing order SEI message indicates the preferred processing order of different types of SEI messages that may be present in the bitstream.

[0084] An example of SEI processing order SEI message syntax is shown below.

[0085] sei_processing_order(payloadSize){ Descriptors for(i=0,b=0;b<payloadSize;i++,b+=3){ po_sei_payload_type[i] u(16) po_sei_processing_order[i] u(8) } }

[0086] The syntax element po_sei_processing_order[i] indicates the preferred processing order of the i-th SEI message payloadType equal to po_sei_payload_type[i].

[0087] The syntax element po_sei_processing_order[m] greater than 0 and equal to po_sei_processing_order[n] indicates that the preferred order for processing the m-th and n-th payloadTypes is unknown or unspecified, or is determined by external means not specified in this specification.

[0088] The syntax element po_sei_processing_order[i] equal to 0 specifies that the preferred order for processing the i-th payloadType is unknown or unspecified, or is determined by external means not specified in this specification.

[0089] Such as ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29 Joint Video Experts Group (JVET) from July 13 to 22, 2022

[0090] As described in "AHG9: SEI processing order SEI message" by Peng Yin et al. at the 27th meeting (via conference call) (hereinafter referred to as "JVET-AA0102"), testing has shown that the order of processing information carried in the SEI message may be very important to better ensure acceptable video system performance or user experience for use cases including neural network post filters, thin film particle synthesis processes, or other types of post filtering processes. Such post filtering processes are preferably performed in a preferred order specified by the encoder (e.g., video encoder 200), as swapping the order at the decoder side (e.g., video decoder 300) may result in suboptimal results. Previous SEI manifest SEI messages listed the SEI messages present in the bitstream, but did not indicate a preferred processing order. The present disclosure enhances the SEI manifest SEI message to indicate a preferred processing order.

[0091] As described above, JVET-AA2027 explicitly specifies an example of a preferred processing order. However, such an explicit indication of a preferred processing order may not be necessary and may introduce additional parsing and sorting complexity. It may also not be necessary to signal an unknown or unspecified processing order, or to determine the order by external means. In addition, the syntax element po_sei_payload_type[i] uses 16 bits, while the syntax element po_sei_processing_order[I] uses 8 bits. In cases where the value of the syntax element payloadType exceeds 255, the po_sei_processing_order syntax element cannot indicate the worst-case processing order for each payloadType.

[0092] Manifest SEI Payload Type

[0093] In general, the video encoder 200 and the video decoder 300 may be configured to process a syntax element in a SEI manifest SEI message that indicates a preferred processing order for SEI messages present in a bitstream. In a specific example, the video encoder 200 and the video decoder 300 may be configured to process a manifest SEI payload type syntax element (e.g., manifest_sei_payload_type) using the following updated semantics. In general, the manifest SEI payload type syntax element indicates the type of payload used for an i-th type SEI message. As shown below, the semantics of manifest_sei_payload_type are defined such that the order in which the manifest_sei_payload_type is received indicates a preferred order for processing SEI messages of the associated type. The following<add> and< / add> The enhancement of the semantics of the syntax element manifest_sei_payload_type is shown between the tags:

[0094] manifest_sei_payload_type[i] indicates the payloadType value of the i-th type SEI message for which information is provided in the SEI manifest SEI message. When m is not equal to n, the values ​​of manifest_sei_payload_type[m] and manifest_sei_payload_type[n] shall not be exactly the same. <add> The order of manifest_sei_payload_type[i] indicates the preferred order for processing any SEI messages with the associated manifest_sei_payload_type[i]. SEI messages with payloadType equal to manifest_sei_payload_type[j] (where j is less than i) should be processed before SEI messages with payloadType equal to manifest_sei_payload_type[i].< / add>

[0095] That is, according to the techniques of the present disclosure, the video decoder 300 may be configured to parse and decode manifest_sei_payload_type[i], where the order of manifest_sei_payload_type[i] indicates a preferred order for processing any SEI messages with associated manifest_sei_payload_type[i]. An SEI message with a payloadType equal to manifest_sei_payload_type[j] (where j is less than i) should be processed before an SEI message with a payloadType equal to manifest_sei_payload_type[i].

[0096] In another example, the order of manifest SEI payload type syntax elements (e.g., manifest_sei_payload_type[i]) with corresponding manifest descriptions (e.g., manifest_sei_description[i]) not equal to 0 indicates a preferred order for processing any existing SEI messages with payloadType equal to manifest_sei_payload_type[i]. For example, in a case where there are two SEI messages (one message with payloadType equal to manifest_sei_payload_type[i] and one message with payloadType equal to manifest_sei_payload_type[j], where j is less than i and the values ​​of manifest_sei_description[i] and manifest_sei_description[j] are not equal to 0), the SEI message with payloadType equal to manifest_sei_payload_type[j] is prioritized before the SEI message with payloadType equal to manifest_sei_payload_type[i] is processed at the video decoder 300.

[0097] In another example, the order of manifest SEI payload type syntax elements (e.g., manifest_sei_payload_type[i]) with corresponding manifest descriptions (e.g., manifest_sei_description[i]) equal to a particular value (e.g., 1) indicates a preferred order for processing any existing SEI messages with payloadType equal to manifest_sei_payload_type[i]. For example, in a case where there are two SEI messages (one message having payloadType equal to manifest_sei_payload_type[i] and one message having payloadType equal to manifest_sei_payload_type[j], where j is less than i and the values ​​of manifest_sei_description[i] and manifest_sei_description[j] are both equal to 1), the SEI message having payloadType equal to manifest_sei_payload_type[j] is prioritized before the SEI message having payloadType equal to manifest_sei_payload_type[i] is processed at the video decoder 300.

[0098] In one example of the present disclosure, the video decoder 300 may be configured to perform the following operations: receive a supplemental enhancement information (SEI) manifest SEI message; decode a syntax element in the SEI manifest SEI message, the syntax element indicating a preferred processing order of SEI messages indicated by the SEI manifest SEI message present in the bitstream; and process the SEI messages present in the bitstream according to the preferred processing order. In one example, the syntax element is a manifest SEI payload type syntax element. In a further example, the manifest SEI payload type syntax element is a manifest_sei_payload_type[i] syntax element.

[0099] In one example, the order of the manifest_sei_payload_type[i] syntax elements indicates a preferred order for processing any SEI messages having the associated manifest_sei_payload_type[i]. In a further example, in order to process SEI messages present in the bitstream according to the preferred processing order, the video decoder 300 is configured to process a SEI message having a payloadType equal to manifest_sei_payload_type[j] (where j is less than i) before processing a SEI message having a payloadType equal to manifest_sei_payload_type[i].

[0100] Inference of the preferred processing order

[0101] In another example of the present disclosure, it is proposed to remove the syntax element po_sei_processing_order[i] from the SEI message. Instead, the video decoder 300 can be configured to infer the preferred processing order to be the same as the signaling order of the signaled payloadType. That is, the video encoder 200 and the video decoder 300 are not configured to decode the po_sei_processing_order[i] syntax element indicating the preferred processing order of the i-th SEI message payloadType equal to po_sei_payload_type[i]. Instead, the video decoder 300 is configured to infer the preferred processing order of the i-th SEI message payloadType to be the same as the signaling order of the signaled payloadType.

[0102] For the above JVET-AA2027 technology, the modified SEI message syntax is as follows. Specifically, the po_sei_processing_order[i] syntax element is removed, and the for loop is changed from "for(i = 0, b = 0; b < payloadSize; i++, b += 3)" to "for(i = 0, b = 0; b < payloadSize; i++, b += 2)".

[0103] sei_processing_order(payloadSize){ Descriptors for(i=0,b=0;b<payloadSize;i++,b+=2){ po_sei_payload_type[i] u(16) } }

[0104] For the above JVET-AA2027 technology, the modified semantics are as follows. The added items are shown between the tags <add> and< / add> .

[0105]

[0106]

[0107] Interaction between payload types and processing order

[0108] In another example, the video encoder 200 and the video decoder 300 can be configured to use the same type of decoding for both the payload type (e.g., po_sei_payload_type[i]) and the processing order (e.g., po_sei_processing_order[i]) syntax elements. For example, the video encoder 200 and the video decoder 300 are configured to use u(8) decoding (unsigned integer decoding using 8 bits) for both the payload type (e.g., po_sei_payload_type[i]) and the processing order (e.g., po_sei_processing_order[i]) syntax elements. Alternatively, the video encoder 200 and the video decoder 300 can be configured to use u(16) decoding (unsigned integer decoding using 16 bits) for both the payload type (e.g., po_sei_payload_type[i]) and the processing order (e.g., po_sei_processing_order[i]) syntax elements. Using the same decoding for the two syntax elements can avoid problems in future implementations with more payload types.

[0109] Two examples of the modified SEI processing order SEI message syntax are as follows.

[0110] Example 1 where two syntax elements use u(8) decoding.

[0111] sei_processing_order(payloadSize){ Descriptors for(i=0,b=0;b<payloadSize;i++,b+=2){ po_sei_payload_type[i] u(8) po_sei_processing_order[i] u(8) } }

[0112] Example 2 where two syntax elements are coded using u(16).

[0113] sei_processing_order(payloadSize){ Descriptors for(i=0,b=0;b<payloadSize;i++,b+=4){ po_sei_payload_type[i] u(16) po_sei_processing_order[i] u(16) } }

[0114] In some cases, each processing order syntax element (e.g., po_sei_processing_order) in a SEI processing order SEI message may share the same value. This situation indicates that there is no preferred processing order among all SEI messages associated with the SEI processing order SEI message. To resolve this ambiguity, the present disclosure proposes that the video encoder 200 and the video decoder 300 operate according to constraints that do not allow such situations. That is, the video encoder 200 and the video decoder 300 may be configured so that the syntax element po_sei_processing_order[i] does not have the same value. In one example, such a constraint is implemented as follows:

[0115] SEI processing order is required. The SEI message shall contain at least two processing order syntax elements po_sei_processing_order[i] and po_sei_processing_order[j] with different values, where i is not equal to j.

[0116] Thus, in one example of the present disclosure, the video decoder 300 may be configured to perform the following operations: receive an SEI processing order SEI message; decode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and process the first SEI message and the second SEI message according to the preferred processing order. Similarly, the video encoder 200 may be configured to perform the following operations: generate an SEI processing order SEI message; encode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of the first SEI message present in the bitstream; and encode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0117] The first syntax element and the second syntax element may be a po_sei_processing_order[i] syntax element, where the value of i indicates a specific SEI message. The video encoder 200 and the video decoder 300 may also be configured to decode an SEI payload type syntax element, where the SEI payload type syntax element uses a first decoding technique. The video encoder 200 and the video decoder 300 may also decode the first syntax element using a first decoding technique. The first decoding technique may be an 8-bit unsigned integer (u(8)) decoding technique or a 16-bit unsigned integer (u(16)) decoding technique.

[0118] T35 SEI News

[0119] When the SEI payload type in the SEI processing order SEI message is user data registered by a T35 SEI message, there may be multiple T35 SEI messages in the bitstream. Each T35 message may have a different country code, provider code, application identifier, and / or application mode. In general, the T35 message defines the format and allocation of country codes and other signaling information for international telecommunication networks. The T35 message can provide a standardized way to identify and control various aspects of telecommunication services across different countries and regions.

[0120] In another example of the present disclosure, the video encoder 200 and the video decoder 300 can be configured to encode and decode these T35 codes (e.g., country code, provider code, application identifier, and / or application mode) in the SEI processing order SEI message to identify a specific T35 SEI message and the associated processing order. An example syntax structure is shown below.

[0121] sei_processing_order(payloadSize){ Descriptors po_num_sei_msg_types_minus2 u(16) for(i=0;i<(po_num_sei_msg_types+2);i++){ po_sei_payload_type[i] u(16) if(po_sei_payload_type[i]==4){ po_t35_country_code[i] u(8) if(po_t35_country_code==0xFF) po_t35_country_code_extension_byte u(8) po_num_t35_payload_bytes[i] ue(v) for(j=0;j<po_num_t35_payload_bytes[i];j++){ po_t35_code[i][j] u(8) } } po_sei_processing_order[i] u(16) } }

[0122] po_t35_country_code[i] is the itu_t_t35_country_code of the i-th SEI message.

[0123] po_t35_country_code_extension_byte[i] is the itu_t_t35_country_code_extension_byte of the i-th SEI message.

[0124] po_num_t35_payload_bytes[i] specifies the number of po_t35_code associated with the i-th SEI message present in the SEI processing order SEI message.

[0125] po_t35_code[i][j] is the j-th itu_t_t35_payload_byte of the ith SEI message.

[0126] In another example, when the SEI message in the SEI processing order SEI message is a T35 SEI message, the first N bytes of the associated T35 SEI message may be indicated in the SEI processing order SEI message for identification.

[0127] Generally, the video encoder 200 and / or the video decoder 300 may be configured to decode a syntax element indicating the first N bytes of a SEI message. In one example, the SEI message is a T35 SEI message, wherein the T35 SEI message indicates at least a country code.

[0128] The example syntax structure is shown below.

[0129] sei_processing_order(payloadSize){ Descriptors po_num_sei_msg_types_minus2 u(16) for(i=0;i<(po_num_sei_msg_types+2);i++){ po_sei_payload_type[i] u(16) if(po_sei_payload_type[i]==4){ po_num_t35_bytes[i] ue(v) for(j=0;j<po_num_t35_bytes[i];j++){ po_t35_byte[i][j] u(8) } } po_sei_processing_order[i] u(16) } }

[0130] po_num_t35_bytes[i] specifies the number of bytes associated with the i-th SEI message present in the SEI processing order SEI message.

[0131] po_t35_byte[i][j] is the j-th byte value of the i-th SEI message.

[0132] In another example, it is proposed that the SEI processing order SEI message should not indicate the processing order of user data registered by the T35 SEI message.

[0133] When the SEI payload type in the SEI processing order SEI message is a user data unregistered SEI message, there may be multiple user data unregistered SEI messages in the bitstream. Each data unregistered SEI message may have a different uuid_iso_iec_11578 value. In another example of the present disclosure, the video encoder 200 and the video decoder 300 may be configured to encode and decode the data unregistered SEI message to indicate the uuid_iso_iec_11578 of the corresponding user data unregistered SEI message in the SEI processing order SEI message for identification.

[0134] The example syntax structure is shown below.

[0135] sei_processing_order(payloadSize){ Descriptors po_num_sei_msg_types_minus2 for(i=0;i<(po_num_sei_msg_types+2);i++){ po_sei_payload_type[i] u(16) if(po_sei_payload_type[i]==5) po_uuid_iso_iec_11578[i] u(128) po_sei_processing_order[i] u(16) } }

[0136] po_uuid_iso_iec_11578 is the uuid_iso_iec_11578 of the ith SEI message.

[0137] Prefix information

[0138] In another example, for any type of SEI message in which prefix information (such as, the first N bytes or bits of the SEI message) is present, the SEI processing order SEI message can be further enhanced to identify the purpose of the SEI message when there are several messages of the same type but with different purposes and their processing order may be relevant.

[0139] SEI Processing Order An example of the syntax structure of a SEI message is shown below.

[0140]

[0141]

[0142] po_prefix_bit_present_flag equal to 1 indicates that the prefix bit of the SEI message may be present in the SEI processing order SIE message.

[0143] po_num_prefix_bit specifies the number of prefix bits of the i-th SEI message to be present.

[0144] po_prefix_bit specifies the value of the j-th prefix bit of the ith SEI message.

[0145] In this example, the video encoder 200 and the video decoder 300 may be configured to decode a prefix presence flag (e.g., po_prefix_bit_present_flag), wherein the prefix presence flag indicates whether a prefix syntax element (e.g., po_num_prefix_bit and / or po_prefix_bit) is present in the SEI processing order SEI message. The prefix syntax element may indicate a prefix bit or prefix byte for the SEI message. The video encoder 200 and the video decoder 300 may decode the prefix syntax element based on the prefix presence flag.

[0146] For example, when the prefix syntax element indicates a value of a prefix bit for a SEI message, the video encoder 200 and the video decoder 300 may decode a plurality of prefix bit syntax elements indicating a plurality of prefix syntax elements present in a SEI processing order SEI message. For example, when the prefix syntax element indicates a value of a prefix byte for a first SEI message, the video encoder 200 and the video decoder 300 may decode a plurality of prefix byte syntax elements indicating a plurality of prefix syntax elements present in a SEI processing order SEI message.

[0147] Another syntax structure example of SEI processing order SEI message is as follows.

[0148]

[0149]

[0150] po_num_sei_msg_types specifies the number of SEI message types for which there is no prefix information.

[0151] po_num_sei_msg_types_w_prefix indicates the number of SEI message types for which associated prefix information exists.

[0152] Additional syntax elements may be signaled to indicate the bit or byte offset of the location of the prefix bits or bytes of the SEI message.

[0153] The following constraints are proposed to ensure that the same SEI message is not treated differently within the CVS.

[0154] SEI messages with the same payloadType and the same prefix SEI message bits (when present) should have the same SEI processing order value.

[0155] Figure 2 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 2 The techniques are provided for explanation purposes and should not be considered as limiting the techniques widely illustrated and described in this disclosure. For explanation purposes, this disclosure describes the video encoder 200 according to the techniques of VVC (ITU-T H.266 in development) and HEVC (ITU-T H.265). However, the techniques of this disclosure may be performed by video encoding devices configured for other video coding standards and video coding formats, such as AV1 and successors to the AV1 video coding format.

[0156] exist Figure 2In the example of , the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filtering unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any one or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filtering unit 216, the DPB 218, and the entropy coding unit 220 can be implemented in one or more processors or processing circuit systems. For example, the units of the video encoder 200 can be implemented as one or more circuits or logic elements as part of a hardware circuit system or as part of a processor, ASIC, or FPGA. In addition, the video encoder 200 may include additional or alternative processors or processing circuit systems to perform these and other functions.

[0157] The video data memory 230 may store video data to be encoded by the components of the video encoder 200. The video encoder 200 may receive video data from, for example, the video source 104 ( Figure 1 ) receives video data stored in video data memory 230. DPB 218 can act as a reference picture memory, which stores reference video data for predicting subsequent video data by video encoder 200. Video data memory 230 and DPB 218 can be formed by any memory device in a variety of memory devices, such as, dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. Video data memory 230 and DPB 218 can be provided by the same memory device or a separate memory device. In various examples, video data memory 230 can be on chip with other components of video encoder 200 as shown, or off chip relative to those components.

[0158] In the present disclosure, references to the video data memory 230 should not be interpreted as limited to memory internal to the video encoder 200 (unless specifically described as such), or limited to memory external to the video encoder 200 (unless specifically described as such). Rather, references to the video data memory 230 should be understood as a reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data for a current block to be encoded). Figure 1 The memory 106 may also provide temporary storage for outputs from the various units of the video encoder 200 .

[0159] Figure 2 The various units are shown to assist in understanding the operations performed by the video encoder 200. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. A fixed-function circuit refers to a circuit that provides a specific function and pre-sets the operations that can be performed. A programmable circuit refers to a circuit that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit may execute software or firmware that causes the programmable circuit to operate in a manner defined by instructions of the software or firmware. A fixed-function circuit may execute software instructions (e.g., to receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more of the units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

[0160] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed by programmable circuits. In an example where the operation of the video encoder 200 is performed using software executed by programmable circuits, the memory 106 ( Figure 1 ) may store instructions (eg, object code) for software received and executed by the video encoder 200, or another memory (not shown) within the video encoder 200 may store such instructions.

[0161] The video data memory 230 is configured to store the received video data. The video encoder 200 may retrieve a picture of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be original video data to be encoded.

[0162] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra-block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0163] The mode selection unit 202 generally coordinates multiple encoding passes to test combinations of encoding parameters and the resulting rate-distortion values ​​for such combinations. The encoding parameters may include a partitioning of a CTU into CUs, a prediction mode for a CU, a transform type for residual data of a CU, a quantization parameter for residual data of a CU, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than other tested combinations.

[0164] The video encoder 200 may partition a picture retrieved from the video data memory 230 into a series of CTUs, and encapsulate one or more CTUs in a slice. The mode selection unit 202 may partition the CTUs of the picture according to a tree structure, such as the MTT structure, QTBT structure, super block structure, or quadtree structure described above. As described above, the video encoder 200 may form one or more CUs from partitioning the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks".

[0165] In general, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for the current block (e.g., the current CU, or in HEVC, the overlapping portion of the PU and the TU). For inter prediction of the current block, the motion estimation unit 222 can perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously decoded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 can calculate a value representing the degree of similarity of the potential reference block to the current block, for example, based on the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), etc. The motion estimation unit 222 can generally perform these calculations using the sample-by-sample difference between the current block and the reference block under consideration. The motion estimation unit 222 can identify the reference block with the lowest value produced by these calculations, thereby indicating the reference block that most closely matches the current block.

[0166] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of the reference block in the reference picture relative to the position of the current block in the current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, for unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate the values ​​of the prediction block according to one or more interpolation filters. In addition, for bidirectional inter prediction, the motion compensation unit 224 may retrieve data for two reference blocks identified by the corresponding motion vectors and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0167] When operating according to the AV1 video coding format, the motion estimation unit 222 and the motion compensation unit 224 may be configured to encode coding blocks of video data (e.g., both luma and chroma coding blocks) using translational motion compensation, affine motion compensation, overlapped block motion compensation (OBMC), and / or composite intra prediction.

[0168] As another example, for intra prediction or intra prediction decoding, the intra prediction unit 226 can generate a prediction block from samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can mathematically approximately combine the values ​​of neighboring samples and fill in these calculated values ​​in a defined direction across the current block to produce a prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average of samples adjacent to the current block and generate a prediction block to include the resulting average for each sample of the prediction block.

[0169] When operating according to the AV1 video coding format, the intra prediction unit 226 may be configured to encode a coding block of video data (e.g., both luma and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, luma to chroma (CFL) prediction, intra block copy (IBC), and / or palette mode. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes.

[0170] The mode selection unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives the original, uncoded version of the current block from the video data memory 230 and receives the prediction block from the mode selection unit 202. The residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, the residual generation unit 204 may also determine the difference between the sample values ​​in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0171] In an example where the mode selection unit 202 partitions the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As indicated above, the size of the CU may refer to the size of the luma coding block of the CU, and the size of the PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2N×2N, the video encoder 200 may support PU sizes of 2N×2N or N×N for intra-prediction, and symmetric PU sizes of 2N×2N, 2N×N, N×2N, N×N, or the like for inter-prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning for PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter-prediction.

[0172] In an example where mode selection unit 202 does not further partition a CU into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As described above, the size of a CU may refer to the size of the luma coding block of the CU. Video encoder 200 and video decoder 300 may support CU sizes of 2N×2N, 2N×N, or N×2N.

[0173] For other video coding techniques, such as intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding (to name a few examples), the mode selection unit 202 generates a prediction block for the current block being encoded via a corresponding unit associated with the coding technique. In some examples, such as palette mode coding, the mode selection unit 202 may not generate a prediction block, but instead generates syntax elements indicating how to reconstruct the block based on the selected palette. In such a mode, the mode selection unit 202 can provide these syntax elements to the entropy coding unit 220 to be encoded.

[0174] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0175] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform multiple transforms on the residual block, for example, a primary transform and a secondary transform (such as a rotation transform). In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0176] When operating in accordance with AV1, the transform processing unit 206 may apply one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 may apply a horizontal / vertical transform combination, which may include a discrete cosine transform (DCT), an asymmetric discrete sine transform (ADST), a flipped ADST (e.g., an ADST in reverse order), and an identity transform (IDTX). When the identity transform is used, the transform is skipped in one of the vertical or horizontal directions. In some examples, the transform process may be skipped.

[0177] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce a loss of information, and therefore, the quantized transform coefficients may have a lower precision than the original transform coefficients produced by the transform processing unit 206.

[0178] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although potentially with a certain degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples of the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0179] The filtering unit 216 may perform one or more filtering operations on the reconstructed block. For example, the filtering unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, the operations of the filtering unit 216 may be skipped.

[0180] When operating in accordance with AV1, the filtering unit 216 may perform one or more filtering operations on the reconstructed block. For example, the filtering unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In other examples, the filtering unit 216 may apply a constrained directional enhancement filter (CDEF), which may be applied after deblocking and may include the application of a non-separable, non-linear, low-pass directional filter based on an estimated edge direction. The filtering unit 216 may also include a loop recovery filter, which is applied after CDEF and may include a separable symmetric normalized Wiener filter or a dual self-guided filter.

[0181] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in an example where the operation of the filtering unit 216 is not performed, the reconstruction unit 214 can store the reconstructed blocks to the DPB 218. In an example where the operation of the filtering unit 216 is performed, the filtering unit 216 can store the filtered reconstructed blocks to the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve a reference picture formed by the reconstructed (and potentially filtered) blocks from the DPB 218 to perform inter-frame prediction on blocks of subsequently encoded pictures. In addition, the intra-frame prediction unit 226 can use the reconstructed blocks of the current picture in the DPB 218 to perform intra-frame prediction on other blocks in the current picture.

[0182] In general, the entropy coding unit 220 may entropy encode syntax elements received from other functional components of the video encoder 200. For example, the entropy coding unit 220 may entropy encode a quantized transform coefficient block from the quantization unit 208. As another example, the entropy coding unit 220 may entropy encode a prediction syntax element (e.g., motion information for inter-frame prediction or intra-mode information for intra-frame prediction) from the mode selection unit 202. The entropy coding unit 220 may perform one or more entropy coding operations on the syntax element (which is another example of video data) to generate entropy-encoded data. For example, the entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable to variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential Golomb coding operation, or another type of entropy coding operation on the data. In some examples, the entropy coding unit 220 may operate in a bypass mode, in which the syntax element is not entropy encoded.

[0183] The video encoder 200 may output a bitstream including entropy-encoded syntax elements required to reconstruct a block of a slice or picture. Specifically, the entropy encoding unit 220 may output a bitstream.

[0184] According to AV1, the entropy coding unit 220 can be configured as a symbol-to-symbol adaptive multi-symbol arithmetic decoder. The syntax elements in AV1 include an alphabet of N elements, and the context (e.g., a probability model) includes a set of N probabilities. The entropy coding unit 220 can store the probabilities as an n-bit (e.g., 15-bit) cumulative distribution function (CDF). The entropy coding unit 220 can perform recursive scaling using an update factor based on the alphabet size to update the context.

[0185] The operations described above are described with respect to blocks. Such descriptions should be understood as operations for luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are the luma and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are the luma and chroma components of a PU.

[0186] In some examples, operations performed with respect to luma coding blocks need not be repeated for chroma coding blocks. As an example, operations for identifying motion vectors (MVs) and reference pictures for luma coding blocks need not be repeated to identify MVs and reference pictures for chroma blocks. Instead, the MVs for luma coding blocks may be scaled to determine MVs for chroma blocks, and the reference pictures may be the same. As another example, the intra prediction process may be the same for luma coding blocks and chroma coding blocks.

[0187] The video encoder 200 represents an example of a device configured to encode video data, the device comprising: a memory configured to store the video data; and one or more processing units implemented in a circuit system and configured to: generate an SEI processing order SEI message; encode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of the first SEI message present in the bitstream; and encode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of the second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0188] Figure 3 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 3 It is provided for the purpose of explanation and does not limit the techniques widely illustrated and described in this disclosure. For the purpose of explanation, this disclosure describes the video decoder 300 according to the techniques of VVC (ITU-T H.266 in development) and HEVC (ITU-T H.265). However, the techniques of this disclosure can be performed by video decoding devices configured for other video decoding standards.

[0189] exist Figure 3 In the example of , the video decoder 300 includes a decoded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filtering unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filtering unit 312, and the DPB 314 may be implemented in one or more processors or processing circuit systems. For example, the units of the video decoder 300 may be implemented as one or more circuits or logic elements as part of a hardware circuit system or as part of a processor, ASIC, or FPGA. In addition, the video decoder 300 may include additional or alternative processors or processing circuit systems to perform these and other functions.

[0190] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units that perform predictions according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra-block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0191] When operating in accordance with AV1, the motion compensation unit 316 may be configured to decode coding blocks of video data (e.g., both luma and chroma coding blocks) using translational motion compensation, affine motion compensation, OBMC, and / or composite inter-intra prediction, as described above. The intra prediction unit 318 may be configured to decode coding blocks of video data (e.g., both luma and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, CFL, intra-block copy (IBC), and / or palette mode, as described above.

[0192] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. The video bitstream may be obtained, for example, from computer readable medium 110 ( Figure 1 ) obtains video data stored in CPB memory 320. CPB memory 320 may include a CPB that stores encoded video data (e.g., syntax elements) from an encoded video bitstream. Moreover, CPB memory 320 may store video data other than syntax elements of decoded pictures, such as temporary data representing outputs from various units of video decoder 300. DPB 314 generally stores decoded pictures, and video decoder 300 may output decoded pictures and / or use them as reference video data when decoding subsequent data or pictures of the encoded video bitstream. CPB memory 320 and DPB 314 may be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or separate memory devices. In various examples, CPB memory 320 may be on-chip with other components of video decoder 300, or off-chip relative to those components.

[0193] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1) retrieves the decoded video data. That is, memory 120 may utilize CPB memory 320 to store data as discussed above. Likewise, when some or all of the functions of video decoder 300 are implemented in software to be performed by the processing circuitry of video decoder 300, memory 120 may store instructions to be executed by video decoder 300.

[0194] Figure 3 The various units shown in FIG. 3 are shown to aid in understanding the operations performed by the video decoder 300. The units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 2 , a fixed-function circuit refers to a circuit that provides a specific function and pre-sets the operations that can be performed. A programmable circuit refers to a circuit that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. A fixed-function circuit can execute software instructions (for example, to receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more of the units in the unit may be different circuit blocks (fixed function or programmable), and in some examples, one or more of the units in the unit may be an integrated circuit.

[0195] The video decoder 300 may include an ALU, an EFU, a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example in which the operation of the video decoder 300 is performed by software executed on the programmable circuit, an on-chip or off-chip memory may store instructions (e.g., object code) of the software received and executed by the video decoder 300.

[0196] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to reproduce the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filtering unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0197] Generally, the video decoder 300 reconstructs a picture block by block. The video decoder 300 may perform a reconstruction operation on each block individually (wherein a currently reconstructed (ie, decoded) block may be referred to as a "current block").

[0198] The entropy decoding unit 302 may entropy decode syntax elements defining the quantized transform coefficients of the quantized transform coefficient block and transform information such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization and likewise determine a degree of inverse quantization for the inverse quantization unit 306 to apply. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0199] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

[0200] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 can generate the prediction block. In this case, the prediction information syntax element can indicate a reference picture in DPB 314 (from which the reference block is retrieved) and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 can generally generate a prediction block in a manner substantially similar to that described with respect to motion compensation unit 224 ( Figure 2 ) to perform the inter-frame prediction process in the manner described.

[0201] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 can generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Moreover, the intra-prediction unit 318 can generally generate a prediction block in a manner substantially similar to that described with respect to the intra-prediction unit 226 ( Figure 2 ) to perform the intra prediction process. The intra prediction unit 318 can retrieve data of samples adjacent to the current block from the DPB 314.

[0202] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0203] The filtering unit 312 may perform one or more filtering operations on the reconstructed block. For example, the filtering unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filtering unit 312 may not necessarily be performed in all examples.

[0204] The video decoder 300 may store the reconstructed block in the DPB 314. For example, in examples where the operations of the filtering unit 312 do not need to be performed, the reconstruction unit 310 may store the reconstructed block to the DPB 314. In examples where the operations of the filtering unit 312 are performed, the filtering unit 312 may store the filtered reconstructed block to the DPB 314. As discussed above, the DPB 314 may provide reference information (such as samples of the current picture for intra-frame prediction and previously decoded pictures for subsequent motion compensation) to the prediction processing unit 304. In addition, the video decoder 300 may output a decoded picture (e.g., a decoded video) from the DPB 314 for subsequent presentation on a display such as a video processor. Figure 1 on a display device 118 of the display device.

[0205] In this way, the video decoder 300 represents an example of a video decoding device, which includes: a memory configured to store video data; and one or more processing units implemented in a circuit system and configured to: receive an SEI processing order SEI message; decode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and process the first SEI message and the second SEI message according to the preferred processing order.

[0206] Figure 4 2 is a flowchart illustrating an example method for encoding a current block according to the techniques of the present disclosure. The current block may include a current CU. Although with respect to the video encoder 200 ( Figure 1 and 2 ), but it should be understood that other devices may be configured to perform similar Figure 4 method of method of method.

[0207] In this example, the video encoder 200 initially predicts a current block (350). For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, the video encoder 200 may calculate the difference between the original uncoded block for the current block and the prediction block. The video encoder 200 may then transform the residual block and quantize the transform coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During or after the scan, the video encoder 200 may entropy encode the transform coefficients (358). For example, the video encoder 200 may encode the transform coefficients using CAVLC or CABAC. The video encoder 200 may then output the entropy encoded data of the block (360).

[0208] Figure 5 1 is a flowchart illustrating an example method for decoding a current block of video data according to the techniques of the present disclosure. The current block may include a current CU. Although with respect to the video decoder 300 ( Figure 1 and 3 ), but it should be understood that other devices may be configured to perform similar Figure 5 method of method of method.

[0209] The video decoder 300 may receive entropy-encoded data for a current block, such as entropy-encoded prediction information and entropy-encoded data for transform coefficients of a residual block corresponding to the current block (370). The video decoder 300 may entropy decode the entropy-encoded data to determine the prediction information for the current block and reproduce the transform coefficients of the residual block (372). The video decoder 300 may predict the current block (374), for example, using an intra-frame or inter-frame prediction mode as indicated by the prediction information for the current block, to calculate a prediction block for the current block. The video decoder 300 may then inverse scan the reproduced transform coefficients (376) to create a block of quantized transform coefficients. The video decoder 300 may then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (378). The video decoder 300 may finally decode the current block by combining the prediction block and the residual block (380).

[0210] Figure 61 is a flowchart illustrating an example method for processing a SEI list SEI message according to the techniques of the present disclosure. The video decoder 300 may be configured to perform the following operations: receive a supplemental enhancement information (SEI) list SEI message (600); decode a syntax element in the SEI list SEI message indicating a preferred processing order of SEI messages present in a bitstream indicated by the SEI list SEI message (602); and process the SEI messages present in the bitstream according to the preferred processing order (604).

[0211] Figure 7 is a flow chart illustrating an example method for decoding SEI processing order SEI messages in accordance with techniques of this disclosure. Figure 7 The techniques may be performed by one or more structural components of the video decoder 300 .

[0212] In one example, the video decoder 300 is configured to receive a supplemental enhancement information (SEI) processing order SEI message (700). The video decoder 300 may: decode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order for a first SEI message present in a bitstream (702); and decode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order for a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values ​​(704). The video decoder 300 may then process the first SEI message and the second SEI message according to the preferred processing order. In one example, the first syntax element and the second syntax element are po_sei_processing_order[i] syntax elements, wherein the value of i indicates a specific SEI message.

[0213] In a further example of the present disclosure, the video decoder 300 may be configured to decode the SEI payload type syntax element using a first decoding technique. The video decoder 300 is also configured to decode the first syntax element described above using a first decoding technique. In one example, the first decoding technique is an 8-bit unsigned integer (u(8)) decoding technique. In another example, the first decoding technique is a 16-bit unsigned integer (u(16)) decoding technique.

[0214] In a further example of the present disclosure, the video decoder 300 may be configured to decode a third syntax element indicating first N bytes of the first SEI message.In an example, the first SEI message is a T35 SEI message, wherein the T35 SEI message indicates at least a country code.

[0215] In a further example of the present disclosure, the video decoder 300 may be configured to perform the following operations: decode a prefix presence flag, wherein the prefix presence flag indicates whether a prefix syntax element is present in an SEI processing order SEI message, the prefix syntax element indicating a prefix bit or prefix byte for a first SEI message; and decode the prefix syntax element based on the prefix presence flag. In one example, the prefix syntax element indicates a value of a prefix bit for a first SEI message, and the video decoder 300 is further configured to decode a plurality of prefix bit syntax elements indicating a plurality of prefix syntax elements present in an SEI processing order SEI message. In another example, the prefix syntax element indicates a value of a prefix byte for a first SEI message, and the video decoder 300 is further configured to decode a plurality of prefix byte syntax elements indicating a plurality of prefix syntax elements present in an SEI processing order SEI message.

[0216] Figure 8 is a flow chart illustrating an example method for encoding SEI processing order SEI messages in accordance with techniques of this disclosure. Figure 8 The techniques may be performed by one or more structural components of the video encoder 200.

[0217] In one example, the video encoder 200 is configured to generate a supplemental enhancement information (SEI) processing order SEI message (800). The video encoder 200 may also: encode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream (802); and encode a second syntax element in the SEI processing order SEI message, the second syntax element indicating a preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values ​​(804).

[0218] In another example of the present disclosure, the video encoder 200 is further configured to encode the SEI payload type syntax using a first encoding technique, and is further configured to encode the first syntax element described above using the first encoding technique. In one example, the first encoding technique is a 16-bit unsigned integer (u(16)) encoding technique. In another example, the first encoding technique is an 8-bit unsigned integer (u(8)) encoding technique.

[0219] In another example, the video encoder 200 may be configured to encode a third syntax element indicating first N bytes of the first SEI message.In one example, the first SEI message is a T35 SEI message, wherein the T35 SEI message indicates at least a country code.

[0220] In another example, the video encoder 200 may be configured to encode a prefix presence flag, wherein the prefix presence flag indicates whether a prefix syntax element is present in the SEI processing order SEI message, the prefix syntax element indicating a prefix bit or prefix byte for the first SEI message. The video encoder 200 may encode the prefix syntax element based on the prefix presence flag.

[0221] Illustrative aspects of the disclosure are described below.

[0222] Aspect 1A - A method for processing video data, the method comprising: receiving a supplemental enhancement information (SEI) list SEI message; decoding a syntax element in the SEI list SEI message, the syntax element indicating a preferred processing order of SEI messages indicated by the SEI list SEI message present in a bitstream; and processing the SEI messages present in the bitstream according to the preferred processing order.

[0223] Aspect 2A - The method of aspect 1A, wherein the syntax element is a manifest SEI payload type syntax element.

[0224] Aspect 3A - The method according to aspect 2A, wherein the manifest SEI payload type syntax element is a manifest_sei_payload_type[i] syntax element.

[0225] Aspect 4A - The method of aspect 3A, wherein the order of the manifest_sei_payload_type[i] syntax elements indicates the preferred order for processing any SEI messages having the associated manifest_sei_payload_type[i].

[0226] Aspect 5A-A method according to Aspect 4A, wherein processing the SEI message present in the bitstream according to the preferred processing order includes: processing the SEI message having a payloadType equal to manifest_sei_payload_type[j] before processing the SEI message having a payloadType equal to manifest_sei_payload_type[i], wherein j is less than i.

[0227] Aspect 6A - An apparatus for decoding video data, the apparatus comprising: one or more means for performing the method according to any of aspects 1A-5A and 13A-17A.

[0228] Aspect 7A - The apparatus of aspect 6A, wherein the one or more units include one or more processors implemented in a circuit system.

[0229] Aspect 8A - The apparatus according to any one of aspects 6A and 7A, further comprising: a memory for storing the video data.

[0230] Aspect 9A - The apparatus according to any of aspects 6A-8A, further comprising: a display configured to display the decoded video data.

[0231] Aspect 10A—The device of any of Aspects 6A-9A, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0232] Aspect 11A - The apparatus of any of Aspects 6A-10A, wherein the apparatus comprises a video decoder.

[0233] Aspect 12A - A computer-readable storage medium having instructions stored thereon, which, when executed, cause one or more processors to perform the method according to any of Aspects 1A-5A.

[0234] Aspect 13A—A method according to Aspect 1A, wherein the syntax element comprises an array of SEI message payload type values, wherein the order of the SEI message payload type values ​​in the array corresponds to the preferred processing order of SEI messages in the bitstream.

[0235] Aspect 14A - The method according to any one of aspects 1A-5A or 13A, wherein the preferred processing order indicates that a first SEI message payload type is to be processed before a second SEI message payload type, the method further comprising:

[0236] Receiving a second SEI message having the second SEI message payload type in the bitstream; after receiving the second SEI message, receiving a first SEI message having the first SEI message payload type in the bitstream; and processing the first SEI message before the second SEI message according to the preferred processing order.

[0237] Aspect 15A - A method for processing video data, the method comprising: receiving a supplemental enhancement information (SEI) processing order SEI message; inferring a preferred processing order of SEI messages present in a bitstream indicated by the SEI processing order SEI message based on a signaling order of payload types; and processing the SEI messages present in the bitstream according to the preferred processing order.

[0238] Aspect 16A - The method according to aspect 15A further comprises: coding two or more syntax elements in the SEI processing order SEI message using unsigned integer coding using 8 bits.

[0239] Aspect 17A - The method according to aspect 15A further comprises: coding two or more syntax elements in the SEI processing order SEI message using unsigned integer coding using 16 bits.

[0240] Aspect 18A - The method according to aspect 15A further comprises: decoding at least two po_sei_processing_order syntax elements in the SEI processing order SEI message, wherein the two po_sei_processing_order syntax elements have different values.

[0241] Aspect 19A-The method according to Aspect 15A also includes: decoding the SEI payload type in the SEI processing order SEI message, wherein the SEI payload type is user data registered by the T35 SEI message; and based on the SEI payload type being the user data registered by the T35 SEI message, decoding one or more of the country code, provider code, application identifier or application mode of the T35 SEI message used in the SEI processing order SEI message.

[0242] Aspect 20A - The method according to aspect 15A further comprises: decoding a syntax element indicating the first N bytes of the T35 SEI message.

[0243] Aspect 21A-The method according to Aspect 15A also includes: decoding the SEI payload type in the SEI processing order SEI message, wherein the SEI payload type is a SEI message of user data registration; and decoding the syntax element indicating the uuid_iso_iec_11578 value based on the SEI payload type being the SEI message of user data registration.

[0244] Aspect 1B - A method for processing video data, the method comprising: receiving a supplemental enhancement information (SEI) processing order SEI message; decoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decoding a second syntax element in the SEI processing order SEI message, the second syntax element indicating the preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and processing the first SEI message and the second SEI message according to the preferred processing order.

[0245] Aspect 2B - The method according to aspect 1B, wherein the first syntax element and the second syntax element are po_sei_processing_order[i] syntax elements, wherein the value of i indicates a specific SEI message.

[0246] Aspect 3B - The method according to any one of Aspects 1B-2B also includes: decoding the SEI payload type syntax element using a first decoding technique, and wherein decoding the first syntax element includes decoding the first syntax element using the first decoding technique.

[0247] Aspect 4B-A method according to aspect 3B, wherein the first decoding technique is an 8-bit unsigned integer (u(8)) decoding technique.

[0248] Aspect 5B-A method according to aspect 3B, wherein the first decoding technique is a 16-bit unsigned integer (u(16)) decoding technique.

[0249] Aspect 6B - The method according to any of aspects 1B-5B further includes: decoding a third syntax element indicating the first N bytes of the first SEI message.

[0250] Aspect 7B - The method according to aspect 6B, wherein the first SEI message is a T35 SEI message, wherein the T35 SEI message indicates at least a country code.

[0251] Aspect 8B-The method according to any one of Aspects 1B-7B also includes: decoding a prefix existence flag, wherein the prefix existence flag indicates whether a prefix syntax element exists in the SEI processing order SEI message, and the prefix syntax element indicates a prefix bit or prefix byte used for the first SEI message; and decoding the prefix syntax element based on the prefix existence flag.

[0252] Aspect 9B - A method according to Aspect 8B, wherein the prefix syntax element indicates a value of a prefix bit used for the first SEI message, and the method further comprises: decoding multiple prefix bit syntax elements indicating multiple prefix syntax elements present in the SEI processing order SEI message.

[0253] Aspect 10B - A method according to Aspect 8B, wherein the prefix syntax element indicates a value of a prefix byte used for the first SEI message, and the method further includes: decoding multiple prefix byte syntax elements indicating multiple prefix syntax elements present in the SEI processing order SEI message.

[0254] Aspect 11B - A device configured to process video data, the device comprising: a memory configured to store the video data; and one or more processors coupled to the memory, wherein the device is configured to perform the following operations: receive a supplemental enhancement information (SEI) processing order SEI message; decode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decode a second syntax element in the SEI processing order SEI message, the second syntax element indicating the preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values; and process the first SEI message and the second SEI message according to the preferred processing order.

[0255] Aspect 12B - The apparatus of aspect 11B, wherein the first syntax element and the second syntax element are po_sei_processing_order[i] syntax elements, wherein the value of i indicates a specific SEI message.

[0256] Aspect 13B - An apparatus according to any one of Aspects 11B-12B, wherein the apparatus is further configured to perform the following operations: decode the SEI payload type syntax element using a first decoding technique, and wherein, in order to decode the first syntax element, the apparatus is configured to decode the first syntax element using the first decoding technique.

[0257] Aspect 14B - The apparatus of aspect 13B, wherein the first decoding technique is an 8-bit unsigned integer (u(8)) decoding technique.

[0258] Aspect 15B - The apparatus according to Aspect 13B, wherein the first decoding technique is a 16-bit unsigned integer (u(16)) decoding technique.

[0259] Aspect 16B - An apparatus according to any of aspects 11B-15B, wherein the apparatus is further configured to: decode a third syntax element indicating first N bytes of the first SEI message.

[0260] Aspect 17B - The apparatus of aspect 16B, wherein the first SEI message is a T35 SEI message, wherein the T35 SEI message indicates at least a country code.

[0261] Aspect 18B - An apparatus according to any one of Aspects 11B-17B, wherein the apparatus is further configured to perform the following operations: decode a prefix existence flag, wherein the prefix existence flag indicates whether a prefix syntax element exists in the SEI processing order SEI message, and the prefix syntax element indicates a prefix bit or prefix byte used for the first SEI message; and decode the prefix syntax element based on the prefix existence flag.

[0262] Aspect 19B - An apparatus according to Aspect 18B, wherein the prefix syntax element indicates a value of a prefix bit used for the first SEI message, and wherein the apparatus is further configured to: decode multiple prefix bit syntax elements indicating multiple prefix syntax elements present in the SEI processing order SEI message.

[0263] Aspect 20B - An apparatus according to Aspect 18B, wherein the prefix syntax element indicates a value of a prefix byte used for the first SEI message, and wherein the apparatus is further configured to: decode multiple prefix byte syntax elements indicating multiple prefix syntax elements present in the SEI processing order SEI message.

[0264] Aspect 21B - A method for processing video data, the method comprising: generating a supplemental enhancement information (SEI) processing order SEI message; encoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; and encoding a second syntax element in the SEI processing order SEI message, the second syntax element indicating the preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0265] Aspect 22B - The method according to aspect 21B also includes: encoding the SEI payload type syntax element using a first encoding technique, and wherein encoding the first syntax element includes: encoding the first syntax element using the first encoding technique.

[0266] Aspect 23B-A method according to aspect 22B, wherein the first encoding technique is a 16-bit unsigned integer (u(16)) encoding technique.

[0267] Aspect 24B - The method according to any of aspects 21B-23B further includes: encoding a third syntax element indicating the first N bytes of the first SEI message.

[0268] Aspect 25B-The method according to any one of Aspects 21B-24B also includes: encoding a prefix existence flag, wherein the prefix existence flag indicates whether a prefix syntax element exists in the SEI processing order SEI message, and the prefix syntax element indicates a prefix bit or prefix byte used for the first SEI message; and encoding the prefix syntax element based on the prefix existence flag.

[0269] Aspect 26B - A device configured to process video data, the device comprising: a memory configured to store the video data; and one or more processors coupled to the memory, wherein the device is configured to perform the following operations: generate a supplemental enhancement information (SEI) processing order SEI message; encode a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; and encode a second syntax element in the SEI processing order SEI message, the second syntax element indicating the preferred processing order of a second SEI message present in the bitstream, wherein the first syntax element and the second syntax element have different values.

[0270] Aspect 27B - An apparatus according to Aspect 26B, wherein the apparatus is further configured to: encode an SEI payload type syntax element using a first encoding technique, and wherein, in order to encode the first syntax element, the apparatus is configured to: encode the first syntax element using the first encoding technique.

[0271] Aspect 28B-The apparatus according to Aspect 27B, wherein the first encoding technique is a 16-bit unsigned integer (u(16)) encoding technique.

[0272] Aspect 29B - An apparatus according to any one of aspects 26B-28B, wherein the apparatus is further configured to: encode a third syntax element indicating the first N bytes of the first SEI message.

[0273] Aspect 30B - An apparatus according to any one of Aspects 26B-29B, wherein the apparatus is further configured to: encode a prefix existence flag, wherein the prefix existence flag indicates whether a prefix syntax element exists in the SEI processing order SEI message, and the prefix syntax element indicates a prefix bit or prefix byte used for the first SEI message; and encode the prefix syntax element based on the prefix existence flag.

[0274] It should be appreciated that, depending on the example, certain actions or events of any of the techniques described herein may be performed in a different sequence, may be added, combined, or excluded entirely (e.g., not all described actions or events are required for practice of the technique). In addition, in some examples, actions or events may be performed simultaneously, e.g., via multithreading, interrupt handling, or multiple processor execution, rather than sequentially.

[0275] In one or more examples, the described functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored or transmitted as one or more instructions or codes on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media (which corresponds to tangible media such as data storage media) or communication media, including any media that facilitates, for example, transferring a computer program from one place to another according to a communication protocol. In this manner, computer-readable media may generally correspond to: (1) a non-temporary tangible computer-readable storage medium, or (2) a communication medium (such as a signal or carrier wave). Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures for implementing the techniques described in the present disclosure. A computer program product may include a computer-readable medium.

[0276] By way of example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage devices, flash memory or any other medium that can be used to store the desired program code in the form of instructions or data structures and can be accessed by a computer. Moreover, any connection is appropriately referred to as a computer-readable medium. For example, if a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technologies such as infrared, radio and microwaves are used to send instructions from a website, server or other remote source, the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technologies such as infrared, radio and microwaves are all included in the definition of the medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carriers, signals or other temporary media, but are directed to non-temporary, tangible storage media. Disks and optical disks as used herein include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks and blue discs, wherein disks usually magnetically copy data, and optical discs use lasers to optically copy data. The above combination should also be included in the scope of computer-readable media.

[0277] Instructions may be performed by one or more processors, such as one or more DSPs, general-purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuit systems. Therefore, the terms "processor" and "processing circuit system" as used herein may refer to any of the aforementioned structures or any other structures suitable for implementing the techniques described herein. In addition, in some aspects, the functionality described herein may be provided in dedicated hardware and / or software modules configured for encoding and decoding or incorporated in a combined codec. Moreover, the technology may be fully implemented in one or more circuits or logic elements.

[0278] The techniques of the present disclosure may be implemented in a variety of devices or apparatuses, including wireless handsets, integrated circuits (ICs), or collections of ICs (e.g., chipsets). Various components, modules, or units are described in the present disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily need to be implemented by different hardware units. Instead, as described above, the various units may be combined in a codec hardware unit, or provided by a collection of interoperable hardware units (including one or more processors as described above) in combination with appropriate software and / or firmware.

[0279] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for processing video data, the method comprising: Receiving Supplemental Enhancement Information (SEI) processing order SEI message; decoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decoding a second syntax element in the SEI processing order SEI message, the second syntax element indicating the preferred processing order of second SEI messages present in the bitstream, wherein the first syntax element and the second syntax element have different values; as well as The first SEI message and the second SEI message are processed according to the preferred processing order.

2. The method according to claim 1, wherein: The first syntax element and the second syntax element are po_sei_processing_order[i] syntax elements, where the value of i indicates a specific SEI message.

3. The method according to claim 1, further comprising: Decoding the SEI payload type syntax element using a first decoding technique, and The decoding of the first syntax element includes: using the first decoding technology to decode the first syntax element.

4. The method according to claim 3, wherein: The first decoding technique is an 8-bit unsigned integer (u(8)) decoding technique.

5. The method according to claim 3, wherein: The first decoding technique is a 16-bit unsigned integer (u(16)) decoding technique.

6. The method according to claim 1, further comprising: A third syntax element indicating first N bytes of the first SEI message is decoded.

7. The method according to claim 6, wherein: The first SEI message is a T35 SEI message, wherein the T35 SEI message indicates at least a country code.

8. The method according to claim 1, further comprising: decoding a prefix presence flag, wherein the prefix presence flag indicates whether a prefix syntax element is present in the SEI processing order SEI message, the prefix syntax element indicating a prefix bit or a prefix byte for the first SEI message; and The prefix syntax element is decoded based on the prefix presence flag.

9. The method according to claim 8, wherein: The prefix syntax element indicates a value of a prefix bit for the first SEI message, the method further comprising: A plurality of prefix bit syntax elements indicating a plurality of prefix syntax elements present in the SEI processing order SEI message are decoded.

10. The method according to claim 8, wherein: The prefix syntax element indicates a value of a prefix byte used for the first SEI message, the method further comprising: A plurality of prefix bytes syntax elements indicating a plurality of prefix syntax elements present in the SEI processing order SEI message are decoded.

11. An apparatus configured to process video data, the apparatus comprising: a memory configured to store the video data; as well as One or more processors coupled to the memory, wherein the apparatus is configured to: Receiving Supplemental Enhancement Information (SEI) processing order SEI message; decoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of a first SEI message present in a bitstream; decoding a second syntax element in the SEI processing order SEI message, the second syntax element indicating the preferred processing order of second SEI messages present in the bitstream, wherein the first syntax element and the second syntax element have different values; and The first SEI message and the second SEI message are processed according to the preferred processing order.

12. The device according to claim 11, wherein The first syntax element and the second syntax element are po_sei_processing_order[i] syntax elements, where the value of i indicates a specific SEI message.

13. The device according to claim 11, wherein: The device is also configured to: Decoding the SEI payload type syntax element using a first decoding technique, and In order to decode the first syntax element, the device is configured to: use the first decoding technology to decode the first syntax element.

14. The device according to claim 13, wherein: The first decoding technique is an 8-bit unsigned integer (u(8)) decoding technique.

15. The device according to claim 13, wherein: The first decoding technique is a 16-bit unsigned integer (u(16)) decoding technique.

16. The device according to claim 11, wherein The device is also configured to: A third syntax element indicating first N bytes of the first SEI message is decoded.

17. The device according to claim 16, wherein: The first SEI message is a T35 SEI message, wherein the T35 SEI message indicates at least a country code.

18. The device according to claim 11, wherein The device is also configured to perform the following operations: decoding a prefix presence flag, wherein the prefix presence flag indicates whether a prefix syntax element is present in the SEI processing order SEI message, the prefix syntax element indicating a prefix bit or a prefix byte for the first SEI message; and The prefix syntax element is decoded based on the prefix presence flag.

19. The device according to claim 18, wherein: The prefix syntax element indicates a value of a prefix bit for the first SEI message, and wherein the apparatus is further configured to: A plurality of prefix bit syntax elements indicating a plurality of prefix syntax elements present in the SEI processing order SEI message are decoded.

20. The device according to claim 18, wherein The prefix syntax element indicates a value of a prefix byte for the first SEI message, and wherein the apparatus is further configured to: A plurality of prefix bytes syntax elements indicating a plurality of prefix syntax elements present in the SEI processing order SEI message are decoded.

21. A method for processing video data, the method comprising: Generate Supplemental Enhancement Information (SEI) processing order SEI message; encoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of first SEI messages present in the bitstream; as well as A second syntax element is encoded in the SEI processing order SEI message, the second syntax element indicating the preferred processing order of second SEI messages present in the bitstream, wherein the first syntax element and the second syntax element have different values.

22. The method according to claim 21, further comprising: encoding the SEI payload type syntax element using a first encoding technique, and The encoding of the first syntax element includes: encoding the first syntax element using the first encoding technology.

23. The method according to claim 22, wherein: The first encoding technique is a 16-bit unsigned integer (u(16)) encoding technique.

24. The method according to claim 21, further comprising: A third syntax element indicating first N bytes of the first SEI message is encoded.

25. The method of claim 21, further comprising: encoding a prefix presence flag, wherein the prefix presence flag indicates whether a prefix syntax element is present in the SEI processing order SEI message, the prefix syntax element indicating a prefix bit or a prefix byte for the first SEI message; and The prefix syntax element is encoded based on the prefix presence flag.

26. An apparatus configured to process video data, the apparatus comprising: a memory configured to store the video data; as well as One or more processors coupled to the memory, wherein the apparatus is configured to: Generate Supplemental Enhancement Information (SEI) processing order SEI message; encoding a first syntax element in the SEI processing order SEI message, the first syntax element indicating a preferred processing order of first SEI messages present in a bitstream; and A second syntax element is encoded in the SEI processing order SEI message, the second syntax element indicating the preferred processing order of second SEI messages present in the bitstream, wherein the first syntax element and the second syntax element have different values.

27. The device according to claim 26, wherein: The device is also configured to: encoding the SEI payload type syntax element using a first encoding technique, and In order to encode the first syntax element, the device is configured to: use the first encoding technology to encode the first syntax element.

28. The device according to claim 27, wherein The first encoding technique is a 16-bit unsigned integer (u(16)) encoding technique.

29. The device according to claim 26, wherein: The device is also configured to: A third syntax element indicating first N bytes of the first SEI message is encoded.

30. The device according to claim 26, wherein: The device is also configured to: encoding a prefix presence flag, wherein the prefix presence flag indicates whether a prefix syntax element is present in the SEI processing order SEI message, the prefix syntax element indicating a prefix bit or a prefix byte for the first SEI message; and The prefix syntax element is encoded based on the prefix presence flag.

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