An instruction data transmission method, system and device and storage medium

Abstract

The application discloses an instruction data transmission method, system and device and a storage medium, relates to the field of printing device control, and comprises the following steps: identifying the instruction type of an operation instruction parsed by a printing task, and sending each operation instruction of a target instruction type to a corresponding target printing data transmission network; a shared data channel of the target printing data transmission network stores each operation instruction into a first shared memory, and sequentially sends an execution trigger instruction of each operation instruction to an instruction execution process, so that the instruction execution process extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory, and stores an instruction execution result into a second shared memory; and an instruction generation process extracts each instruction execution result from the second shared memory through the shared data channel. The application configures corresponding target printing data transmission networks for different instruction types, avoids blocking a shared channel by long-time operation instructions, and improves the printing task execution efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of printing device control, and particularly relates to an instruction data transmission method, system and device and a storage medium. BACKGROUND

[0002] In order to solve the problem of low data transmission efficiency caused by the need to call the operating system kernel to realize data extraction and transmission in the printing task execution process of the traditional printing device, the existing printing device configures shared memory for each thread for executing a printing task, so that each thread realizes data extraction and transmission by directly accessing the shared memory, thereby omitting the step of calling the operating system kernel and improving the data transmission efficiency.

[0003] However, since each thread for executing a printing task in the existing printing device accesses the shared memory through a shared channel, and a printing task usually includes multiple operation instructions, when the data required by a certain operation instruction is too much, the time consumption of the data extraction and transmission process of the operation instruction will increase, thereby causing the shared channel to be blocked, and further causing subsequent operation instructions to be unable to be executed in time, thereby reducing the execution efficiency of the printing task. Therefore, how to improve the execution efficiency of the printing task has become a problem to be solved. SUMMARY

[0004] In view of the above problems, the present application provides an instruction data transmission method, system, device and storage medium to realize the purpose of improving the execution efficiency of a printing task. The specific scheme is as follows:

[0005] The first aspect of the present application provides an instruction data transmission method, comprising:

[0006] parsing a printing task output by an instruction generation process to obtain a plurality of operation instructions, and identifying the instruction types of the operation instructions, wherein the instruction types at least include a short time consumption type and a long time consumption type;

[0007] sending each operation instruction of a target instruction type to a target printing data transmission network corresponding to the target instruction type, so that an instruction execution process executes each operation instruction by using the target printing data transmission network, wherein the target instruction type is any one of the short time consumption type and the long time consumption type, the target printing data transmission network includes a shared data channel, a first shared memory and a second shared memory, and the process of executing each operation instruction by the instruction execution process by using the target printing data transmission network comprises:

[0008] The shared data channel stores each operation instruction into the first shared memory, and sends an execution trigger instruction of each operation instruction to the instruction execution process in sequence according to the storage sequence of the operation instruction, so that the instruction execution process extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory through the shared data channel, and stores an instruction execution result into the second shared memory through the shared data channel after executing the operation instruction.

[0009] The shared data channel sends an extraction trigger instruction to the instruction generation process when detecting that each instruction execution result is stored into the second shared memory, so that the instruction generation process extracts each instruction execution result from the second shared memory through the shared data channel.

[0010] In a possible implementation, the shared data channel stores each operation instruction into the first shared memory, and sends an execution trigger instruction of each operation instruction to the instruction execution process in sequence according to the storage sequence of the operation instruction, so that the instruction execution process extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory through the shared data channel, and stores an instruction execution result into the second shared memory through the shared data channel after executing the operation instruction, including:

[0011] The shared data channel adds each operation instruction of the target instruction type received to an operation instruction queue, identifies an instruction execution thread identifier in each operation instruction, and generates an execution trigger instruction of each operation instruction based on each instruction execution thread identifier;

[0012] Each operation instruction in the operation instruction queue is stored into the first shared memory in sequence according to the storage sequence of each operation instruction added to the operation instruction queue, and the execution trigger instruction of the operation instruction is sent to a target instruction execution thread in the instruction execution process when the operation instruction derives the operation queue;

[0013] For each operation instruction: the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; and the target instruction execution thread stores the execution result of the operation instruction into the second shared memory through the shared data channel.

[0014] In a possible implementation, the shared data channel comprises: an uplink channel and a downlink channel, the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; and the target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the shared data channel, comprising:

[0015] The target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the uplink channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction.

[0016] The target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the downlink channel, and a bandwidth of the uplink channel is greater than a bandwidth of the downlink channel.

[0017] In a possible implementation, the storage order of the operation instructions in the operation instruction queue is that the operation instructions in the operation instruction queue are stored to the first shared memory in sequence, and when the operation instruction derives the operation queue, the execution trigger instruction of the operation instruction is sent to the target instruction execution thread in the instruction execution process, comprising:

[0018] An operation instruction stored first in the operation instruction queue is determined as a current operation instruction.

[0019] The current operation instruction is stored to the first shared memory, and whether the execution data set corresponding to the current operation instruction exists in the first shared memory is detected.

[0020] In a case where the execution data set corresponding to the current operation instruction exists, the execution trigger instruction of the operation instruction is sent to the target instruction execution thread, so that the target instruction execution thread extracts the current operation instruction and the execution data set corresponding to the current operation instruction from the first shared memory.

[0021] In a case where the current operation instruction and its corresponding execution data set extraction are detected to be completed, the current operation instruction is updated to be only later than one operation instruction of the current operation instruction which is not updated in the storage sequence in the operation queue, and the current operation instruction is stored to the first shared memory, and whether the execution data set corresponding to the current operation instruction exists in the first shared memory is detected.

[0022] The second aspect of the present application provides an instruction data transmission system, comprising: an instruction analysis module, an instruction management module, and at least two target printing data transmission networks, the target printing data transmission network comprising a shared data channel, a first shared memory, and a second shared memory,

[0023] The instruction analysis module is configured to analyze a print task output by an instruction generation process, obtain a plurality of operation instructions, and identify instruction types of the operation instructions, the instruction types comprising at least a short time-consuming type and a long time-consuming type.

[0024] The instruction management module is configured to send operation instructions of a target instruction type to a target printing data transmission network corresponding to the target instruction type, so that an instruction execution process executes the operation instructions using the target printing data transmission network, the target instruction type being any one of the short time-consuming type and the long time-consuming type, and the target printing data transmission network being configured as follows during execution of the operation instructions by the instruction execution process:

[0025] The shared data channel stores the operation instructions to the first shared memory and sends execution trigger instructions of the operation instructions to the instruction execution process in sequence according to the storage sequence of the operation instructions, so that the instruction execution process extracts the operation instructions and execution data sets corresponding to the operation instructions from the first shared memory through the shared data channel, and stores instruction execution results to the second shared memory through the shared data channel after executing the operation instructions;

[0026] In a case where the shared data channel detects that the instruction execution results are stored to the second shared memory, the shared data channel sends extraction trigger instructions to the instruction generation process, so that the instruction generation process extracts the instruction execution results from the second shared memory through the shared data channel.

[0027] In a possible implementation, the shared data channel stores each operation instruction into the first shared memory, and sends an execution trigger instruction of each operation instruction to the instruction execution process in a storage order of the operation instructions, so that the instruction execution process extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory through the shared data channel, and stores an instruction execution result into the second shared memory through the shared data channel after executing the operation instruction, and is specifically configured as follows:

[0028] The shared data channel adds each operation instruction of the target instruction type received to an operation instruction queue, identifies an instruction execution thread identifier in each operation instruction, and generates an execution trigger instruction of each operation instruction based on each instruction execution thread identifier;

[0029] Each operation instruction in the operation instruction queue is stored into the first shared memory in the storage order of each operation instruction added to the operation instruction queue, and the execution trigger instruction of the operation instruction is sent to a target instruction execution thread in the instruction execution process when the operation instruction extracts the operation queue;

[0030] For each operation instruction: the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; and the target instruction execution thread stores the execution result of the operation instruction into the second shared memory through the shared data channel.

[0031] In a possible implementation, the shared data channel includes an uplink channel and a downlink channel, and the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; and the target instruction execution thread stores the execution result of the operation instruction into the second shared memory through the shared data channel is configured as follows:

[0032] The target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the uplink channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction;

[0033] The target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the downlink channel, and the bandwidth of the uplink channel is greater than the bandwidth of the downlink channel.

[0034] In a possible implementation, the shared data channel is configured to, in the storage order of the operation instructions added into the operation instruction queue, store each operation instruction in the operation instruction queue into the first shared memory in sequence, and when the operation instruction derives the operation queue, send the execution trigger instruction of the operation instruction to a target instruction execution thread in the instruction execution process.

[0035] determine the first stored operation instruction in the operation instruction queue as a current operation instruction;

[0036] store the current operation instruction into the first shared memory, and detect whether the execution data set corresponding to the current operation instruction exists in the first shared memory;

[0037] in the case that the execution data set corresponding to the current operation instruction exists, send the execution trigger instruction of the operation instruction to the target instruction execution thread, so that the target instruction execution thread extracts the current operation instruction and the execution data set corresponding thereto from the first shared memory;

[0038] in the case that the current operation instruction and the execution data set corresponding thereto are detected to be extracted completely, update the current operation instruction to one operation instruction in the storage order only later than the un-updated current operation instruction in the operation queue, and perform the operation step of storing the current operation instruction into the first shared memory and detecting whether the execution data set corresponding to the current operation instruction exists in the first shared memory.

[0039] The third aspect of the present application provides an electronic device, comprising at least one processor and a memory connected with the processor, wherein:

[0040] The memory is configured to store a computer program;

[0041] The processor is configured to execute the computer program, so that the electronic device can implement the instruction data transmission method of the first aspect or any implementation manner of the first aspect.

[0042] The fourth aspect of the present application provides a computer storage medium, the storage medium carries one or more computer programs, when the one or more computer programs are executed by an electronic device, the electronic device can implement the instruction data transmission method of the first aspect or any implementation manner of the first aspect.

[0043] By the technical solutions, the instruction data transmission method, system, device and storage medium provided by the application, by dividing the operation instructions into at least short time-consuming type and long time-consuming type, and configuring the operation instructions of the target instruction type to be sent to the target printing data transmission network corresponding to the target instruction type, the instruction execution process executes the operation instructions by using the target printing data transmission network, thereby avoiding the influence of the operation instructions of the long time-consuming type on the operation instructions of the short time-consuming type, and improving the execution efficiency of the operation instructions. Moreover, by configuring the shared data channel to store the operation instructions to the first shared memory, and sending the execution trigger instructions of the operation instructions to the instruction execution process in the order of storage of the operation instructions, the instruction execution process extracts the operation instructions and the execution data set corresponding to the operation instructions from the first shared memory through the shared data channel, and stores the instruction execution result to the second shared memory through the shared data channel after executing the operation instructions, so that the application avoids the read-write conflict, and does not need to execute the next operation instruction after receiving the instruction execution result of the current operation instruction, thereby improving the execution efficiency of the operation instructions. It can be seen that the application improves the execution efficiency of the printing task. BRIEF DESCRIPTION OF DRAWINGS

[0044] The above and other features, advantages, and aspects of the present disclosure will become more apparent by describing in detail the following specific embodiments with reference to the attached drawings. Throughout the drawings, the same or similar reference numerals refer to the same or similar elements. It should be understood that the drawings are schematic, and the original and elements are not necessarily drawn according to the scale.

[0045] Figure 1 A flowchart of an instruction data transmission method provided by the application;

[0046] Figure 2 A flowchart of identifying the instruction type of each operation instruction provided by the application;

[0047] Figure 3 A structural schematic diagram of a printing task execution module of a printing device provided by the application;

[0048] Figure 4 A flowchart of executing the operation instructions of the short time-consuming type provided by the application;

[0049] Figure 5 A block diagram of an instruction data transmission system provided by the application;

[0050] Figure 6 A structural schematic diagram of an electronic device provided by the application. DETAILED DESCRIPTION

[0051] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is for explaining specific embodiments only and is not intended to limit the scope of this application.

[0052] The embodiments of this application will now be described with reference to the accompanying drawings. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are equally applicable to similar technical problems.

[0053] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms are interchangeable where appropriate; this is merely a way of distinguishing objects with the same attributes in the embodiments of this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, so that a process, method, system, product, or apparatus that comprises a series of elements is not necessarily limited to those elements, but may include other elements not explicitly listed or inherent to those processes, methods, products, or apparatuses.

[0054] It should be noted that, in actual application scenarios, the present application improves the execution efficiency of the print task compared with the prior art. Specifically, the prior art only configures one shared memory and one shared channel. When the data required by a certain operation instruction is too much, it will cause the time consumption of the data extraction and transmission process of the operation instruction to increase, thereby causing channel blocking and long-time occupation of the shared memory, and further causing the subsequent operation instruction to be unable to be executed in time, thereby reducing the execution efficiency of the print task. Moreover, since the complete execution process of an operation instruction includes extraction, execution and instruction execution result feedback of the operation instruction, and since there is only one shared memory, in order to avoid read-write conflict, the instruction execution process can only extract the next operation instruction and the corresponding execution data from the shared memory after storing the instruction execution result of the current operation instruction to the shared memory. It can be seen that the prior art reduces the execution efficiency of the print task. The present application divides the operation instructions into at least short-time-consuming type and long-time-consuming type, and configures the target print data transmission network corresponding to the target instruction type to which each operation instruction of the target instruction type is sent, so that the instruction execution process executes each operation instruction using the target print data transmission network, thereby avoiding the influence of the operation instruction of the long-time-consuming type on the operation instruction of the short-time-consuming type, and improving the execution efficiency of the operation instruction. Moreover, by configuring the shared data channel to store each operation instruction to the first shared memory, and in accordance with the storage order of the operation instructions, the execution trigger instruction of each operation instruction is sent to the instruction execution process in sequence, so that the instruction execution process extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel, and stores the instruction execution result to the second shared memory through the shared data channel after executing the operation instruction. Compared with the prior art, the present application avoids read-write conflict, and does not need to execute the next operation instruction after receiving the instruction execution result of the current operation instruction, thereby improving the execution efficiency of the operation instruction. It can be seen that the present application improves the execution efficiency of the print task.

[0055] The first aspect of the present application provides an instruction data transmission method, as shown in the accompanying drawings, which comprises: Figure 1

[0056] S101, parse the print task output by the instruction generation process, obtain a plurality of operation instructions, and identify the instruction type of each operation instruction, which at least includes short-time-consuming type and long-time-consuming type.

[0057] It should be noted that, in actual application scenarios, in the execution of the above Figure 1 ​Before the instruction data transmission method shown, the target printing data transmission network needs to be initialized and configured, and the content of the initialization and configuration includes at least: configuring the bandwidth of the shared data channel, allocating storage resources for the first shared memory and the second shared memory, and constructing the communication interface of the instruction generation process and the instruction execution process with the target printing data transmission network.

[0058] It should be noted that in actual application scenarios, the instruction generation process can be a process in the printing device for generating corresponding print tasks for corresponding client operations. The instruction generation process can include multiple instruction generation threads.

[0059] It should be noted that in actual application scenarios, the above-mentioned Figure 1 There are many ways to implement step S101, and one example is provided here: as shown in Figure 2 The flowchart for identifying the instruction type of each operation instruction is as follows: steps A1 to A3.

[0060] Step A1, read the instruction configuration file of the print task output by the instruction generation process. And trigger step A2.

[0061] Step A2, use the preset segmentation script to parse the instruction configuration file according to the preset instruction set, and obtain each operation instruction in the print task. And trigger step A3.

[0062] The above-mentioned preset instruction set can be a data set constructed based on a printer instruction set. The above-mentioned printer instruction set can be of various types, including but not limited to: ESC command set, PCL command set, PostScript command set, CPCL command set, etc.

[0063] Step A3, according to the instruction identifier of each operation instruction, find the instruction type corresponding to the instruction identifier from the preset instruction type mapping relationship table.

[0064] In one possible implementation, the above-mentioned preset instruction type mapping relationship table is a data table for storing the mapping relationship between instruction identifiers and instruction types. The above-mentioned mapping relationship can be determined based on the execution time of each operation instruction in actual application scenarios. For example, for operation instructions such as starting printing, stopping printing, adjusting job order, deleting job, uploading job, and querying print status, since no additional data needs to be loaded, the single execution time of the above-mentioned operation instructions is relatively short, and therefore the instruction type of the above-mentioned operation instructions can be determined as short time-consuming type. For operation instructions such as reading and writing nozzle voltage, loading materials, and obtaining material list, which need to obtain a large amount of data, the instruction type thereof can be determined as long time-consuming type.

[0065] It should be noted that in actual application scenarios, the above instruction types can be further refined based on the execution time of each operation instruction, and for the refined instruction types, only the corresponding target print data transmission network needs to be configured. The specific content of the above instruction types is not limited and elaborated.

[0066] S102, each operation instruction of the target instruction type is sent to the target print data transmission network corresponding to the target instruction type, so that the instruction execution process executes each operation instruction using the target print data transmission network, the target instruction type is any one of the short time-consuming type and the long time-consuming type, the target print data transmission network includes a shared data channel, a first shared memory and a second shared memory, and the process of the instruction execution process executing each operation instruction using the target print data transmission network includes:

[0067] The shared data channel stores each operation instruction in the first shared memory, and sends execution trigger instructions of each operation instruction to the instruction execution process in turn according to the storage order of the operation instructions, so that the instruction execution process extracts the operation instruction and the corresponding execution data set from the first shared memory through the shared data channel, and stores the instruction execution result in the second shared memory through the shared data channel after executing the operation instruction;

[0068] It should be noted that in actual application scenarios, due to the difference in the amount of data required by different operation instructions during execution, the execution time of different types of operation instructions is different. Therefore, the present application sends each operation instruction of the target instruction type to the target print data transmission network corresponding to the target instruction type, so that the instruction execution process executes each operation instruction using the target print data transmission network, thereby avoiding the influence of the long time-consuming type operation instruction on the short time-consuming type operation instruction, improving the execution efficiency of the operation instruction, and further improving the execution efficiency of the print task.

[0069] It should be noted that in actual application scenarios, the storage space size of the above first shared memory and second shared memory, and the bandwidth of the above shared data channel, can be set according to the average data size of the operation instruction and the instruction execution result in the actual application scenario, and the present application does not make too many limitations and elaborations.

[0070] It should be noted that in the actual application scenario, the shared data channel stores each operation instruction in the first shared memory, and sends the execution trigger instruction of each operation instruction to the instruction execution process in turn according to the storage order of the operation instruction, so that the present application does not need to execute the next operation instruction again in the case of receiving the instruction execution result of the current operation instruction, thereby improving the execution efficiency of the operation instruction. The shared data channel sends the extraction trigger instruction to the instruction generation process when detecting that each instruction execution result is stored in the second shared memory, so that the instruction generation process extracts each instruction execution result from the second shared memory through the shared data channel.

[0071] It should be noted that in the actual application scenario, the first shared memory is configured to store operation instructions and their corresponding execution data sets, and the second shared memory is configured to store instruction execution results, thereby avoiding the risk of read-write conflict caused by simultaneous read and write operations on one shared memory data.

[0072] The present application divides the operation instructions into at least short-time type and long-time type, and configures the target instruction type to send each operation instruction to the target print data transmission network corresponding to the target instruction type, so that the instruction execution process executes each operation instruction using the target print data transmission network, thereby avoiding the influence of long-time type operation instructions on short-time type operation instructions, and improving the execution efficiency of operation instructions. And by configuring a shared data channel to store each operation instruction in the first shared memory, and sending the execution trigger instruction of each operation instruction to the instruction execution process in turn according to the storage order of the operation instruction, the instruction execution process extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel, and stores the instruction execution result in the second shared memory through the shared data channel after executing the operation instruction, so that the present application avoids read-write conflict while improving the execution efficiency of operation instructions without executing the next operation instruction in the case of receiving the instruction execution result of the current operation instruction. It can be seen that the present application improves the execution efficiency of the print task.

[0073] In one possible implementation, the shared data channel stores each operation instruction in the first shared memory, and sends the execution trigger instruction of each operation instruction to the instruction execution process in turn according to the storage order of the operation instruction, so that the instruction execution process extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel, and stores the instruction execution result in the second shared memory through the shared data channel after executing the operation instruction, including:

[0074] The shared data channel adds each operation instruction of the target instruction type received to an operation instruction queue, identifies an instruction execution thread identifier in each operation instruction, and generates an execution trigger instruction of each operation instruction based on the instruction execution thread identifier;

[0075] In the order of storage of each operation instruction added to the operation instruction queue, each operation instruction in the operation instruction queue is stored to the first shared memory in turn, and the execution trigger instruction of the operation instruction is sent to the target instruction execution thread in the instruction execution process when the operation instruction export operation queue is exported;

[0076] For each operation instruction: the target instruction execution thread extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; the target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the shared data channel.

[0077] It should be noted that in actual application scenarios, the above shared data channel can be a communication thread for executing data transmission.

[0078] It should be noted that in actual application scenarios, sending each operation instruction of the target instruction type to the shared data channel can be implemented by using a data sending function (such as SendData) integrated in the instruction generation process. The target instruction execution thread responding to the execution trigger instruction of the operation instruction can be implemented by using a data receiving function (RcvData) configured in the instruction execution process.

[0079] In a possible implementation, the shared data channel includes: an uplink channel and a downlink channel, the target instruction execution thread extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; the target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the shared data channel, including:

[0080] The target instruction execution thread extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory through the uplink channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction;

[0081] The target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the downlink channel, and the bandwidth of the uplink channel is greater than the bandwidth of the downlink channel.

[0082] It should be noted that in actual application scenarios, the shared data channel is further subdivided into an uplink channel and a downlink channel by configuration, so as to avoid channel blocking and data interference caused by simultaneous transmission of data extracted from the first shared memory and data stored in the second shared memory in the shared data channel, thereby improving the execution accuracy and efficiency of the operation instruction.

[0083] In order to facilitate the understanding of the above target print data transmission network, a possible implementation of the present application is described as follows:

[0084] As shown in the structure diagram of a print task execution module of a print device, it includes an instruction generation process, two target print data transmission networks (a first print data transmission network and a second print data transmission network) and an instruction execution process. Among them, the first print data transmission network includes a first shared data channel, a first shared memory and a second shared memory, and the second print data transmission network includes a second shared data channel, a third shared memory and a fourth shared memory. Figure 3

[0085] In a possible implementation, according to the storage order of the operation instruction queue, each operation instruction in the operation instruction queue is stored in the first shared memory in turn, and when the operation instruction export operation queue is exported, the execution trigger instruction of the operation instruction is sent to the target instruction execution thread in the instruction execution process, including:

[0086] Determine the first stored operation instruction in the operation instruction queue as the current operation instruction;

[0087] Store the current operation instruction in the first shared memory, and detect whether the execution data set corresponding to the current operation instruction exists in the first shared memory;

[0088] In the case where the execution data set corresponding to the current operation instruction exists, the execution trigger instruction of the operation instruction is sent to the target instruction execution thread, so that the target instruction execution thread extracts the current operation instruction and its corresponding execution data set from the first shared memory;

[0089] In the case where the current operation instruction and its corresponding execution data set are extracted, the current operation instruction is updated to an operation instruction in the operation queue which is only later than the un-updated current operation instruction in storage order, and the operation steps of storing the current operation instruction in the first shared memory and detecting whether the execution data set corresponding to the current operation instruction exists in the first shared memory are executed.

[0090] It should be noted that in actual application scenarios, in order to facilitate the understanding of the complete execution process of an operation instruction, a possible implementation of the present application is described as follows:​Figure 4 As shown, it is a flow chart for executing a short time type of operation instruction, and the specific operation steps are as follows:

[0091] Step S401, the shared data channel determines the first stored operation instruction in the operation queue as the current operation instruction, and triggers step S402.

[0092] Step S402, the shared data channel stores the current operation instruction to the first shared memory, and judges whether there is an execution data set corresponding to the current operation instruction in the first shared memory. If yes, step S403 is triggered. If no, step S404 is triggered.

[0093] Step S403, the shared data channel sends an execution trigger instruction including the target instruction execution thread identifier to the instruction process. And step S405 is triggered.

[0094] Step S404, the shared data channel sends a data set construction trigger instruction to the first shared memory. And step S402 is triggered.

[0095] In a possible implementation, the above-mentioned data set construction trigger instruction is an instruction for triggering the first shared memory to aggregate the data required for executing the current operation instruction and construct the above-mentioned execution data set.

[0096] Step S405, the shared data channel monitors whether the target instruction execution thread extracts the current operation instruction and its corresponding execution data set. If yes, steps S406 and S407 are triggered. If no, step S405 is triggered.

[0097] Step S406, the shared data channel updates the current operation instruction to an operation instruction in the operation queue which is only later than the un-updated current operation instruction in storage order. And step S402 is triggered.

[0098] Step S407, the shared data channel monitors whether the writing process of the target instruction execution thread to the second shared memory writing the instruction execution result including the instruction identifier of the current operation instruction is ended. If yes, step S408 is triggered, if no, step S407 is triggered.

[0099] Step S408, the shared data channel sends an extraction trigger instruction with the instruction identifier of the current operation instruction to the instruction generation process. And step S409 is triggered.

[0100] Step S409, the shared data channel monitors whether the extraction operation of the instruction generation process to the instruction execution result with the instruction identifier of the current operation instruction is ended, if yes, step S407 is triggered, if no, step S409 is triggered.

[0101] A second aspect of this application provides an instruction data transmission system, such as... Figure 5 As shown, the instruction data transmission system includes: an instruction parsing module 501, an instruction management module 502, and at least two target print data transmission networks 503. The target print data transmission networks include a shared data channel, a first shared memory, and a second shared memory.

[0102] The instruction parsing module 501 is used to parse the printing task output by the instruction generation process, obtain multiple operation instructions, and identify the instruction type of each operation instruction. The instruction types include at least short-duration type and long-duration type.

[0103] The instruction management module 502 is used to send each operation instruction of the target instruction type to the target print data transmission network 503 corresponding to the target instruction type, so that the instruction execution process can use the target print data transmission network to execute each operation instruction. The target instruction type is either a short-duration type or a long-duration type. The target print data transmission network is set as follows during the execution of each operation instruction by the instruction execution process:

[0104] The shared data channel stores each operation instruction in the first shared memory and sends the execution trigger instructions of each operation instruction to the instruction execution process in the order in which the operation instructions are stored, so that the instruction execution process can retrieve the operation instructions and the execution dataset corresponding to the operation instructions from the first shared memory through the shared data channel, and store the instruction execution result in the second shared memory through the shared data channel after executing the operation instructions.

[0105] When the shared data channel detects that the execution results of each instruction are stored in the second shared memory, it sends a fetch trigger instruction to the instruction generation process, so that the instruction generation process can retrieve the execution results of each instruction from the second shared memory through the shared data channel.

[0106] In one possible implementation, the shared data channel stores each operation instruction in the first shared memory and sends execution trigger instructions for each operation instruction to the instruction execution process sequentially according to the storage order of the operation instructions. This allows the instruction execution process to retrieve the operation instructions and the corresponding execution dataset from the first shared memory through the shared data channel. Specifically, when storing the instruction execution result in the second shared memory after executing the operation instructions, the channel is configured as follows:

[0107] The shared data channel adds each operation instruction of the target instruction type to the operation instruction queue, identifies the instruction execution thread identifier in each operation instruction, and generates the execution trigger instruction for each operation instruction based on the instruction execution thread identifier.

[0108] In the order of storage of the operation instruction queue according to the storage order of each operation instruction added into the operation instruction queue, each operation instruction in the operation instruction queue is stored into the first shared memory, and when the operation instruction export operation queue is exported, the execution trigger instruction of the operation instruction is sent to the target instruction execution thread in the instruction execution process;

[0109] For each operation instruction: the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain the execution result of the operation instruction; the target instruction execution thread stores the execution result of the operation instruction into the second shared memory through the shared data channel.

[0110] In a possible implementation, the shared data channel includes: an uplink channel and a downlink channel, the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain the execution result of the operation instruction; when the target instruction execution thread stores the execution result of the operation instruction into the second shared memory through the shared data channel, the shared data channel is set to:

[0111] The target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the uplink channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain the execution result of the operation instruction;

[0112] The target instruction execution thread stores the execution result of the operation instruction into the second shared memory through the downlink channel, and the bandwidth of the uplink channel is greater than the bandwidth of the downlink channel.

[0113] In a possible implementation, the shared data channel is set to: in the order of storage of the operation instruction queue according to the storage order of each operation instruction added into the operation instruction queue, each operation instruction in the operation instruction queue is stored into the first shared memory, and when the operation instruction export operation queue is exported, the execution trigger instruction of the operation instruction is sent to the target instruction execution thread in the instruction execution process.

[0114] The first operation instruction stored in the operation instruction queue is determined as the current operation instruction;

[0115] The current operation instruction is stored into the first shared memory, and whether the execution data set corresponding to the current operation instruction exists in the first shared memory is detected;

[0116] In the case that the execution data set corresponding to the current operation instruction exists, the execution triggering instruction of the operation instruction is sent to the target instruction execution thread to make the target instruction execution thread extract the current operation instruction and the execution data set corresponding thereto from the first shared memory;

[0117] In the case that the current operation instruction and the execution data set corresponding thereto are extracted, the current operation instruction is updated to be one operation instruction in the operation queue which is only later than the un-updated current operation instruction in the storage order, and the operation steps of storing the current operation instruction into the first shared memory, and detecting whether the execution data set corresponding to the current operation instruction exists in the first shared memory are executed.

[0118] The third aspect of the present application provides an electronic device, comprising at least one processor and a memory connected with the processor, wherein:

[0119] The memory is used for storing a computer program;

[0120] The processor is used for executing the computer program, so that the electronic device can implement the instruction data transmission method of the first aspect or any implementation manner of the first aspect.

[0121] The structure diagram of the electronic device provided by the third aspect of the present application is shown in Figure 6 The electronic device in the embodiments of the present application can include but is not limited to fixed terminals such as mobile phones, notebook computers, PDAs (personal digital assistants), PADs (tablets), desktop computers and the like. Figure 6 The electronic device shown is only an example, and should not bring any limitation to the functions and use range of the embodiments of the present application.

[0122] As shown in Figure 6 The electronic device can include a processing device (such as a central processing unit, a graphics processing unit, etc.) 601 which can perform various appropriate actions and processes according to programs stored in a read-only memory (ROM) 602 or programs loaded from a storage device 608 into a random access memory (RAM) 603. In the state that the electronic device is powered on, various programs and data required for the operation of the electronic device are also stored in the RAM 603. The processing device 601, the ROM 602 and the RAM 603 are connected with each other through a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0123] Generally, the following devices can be connected to the I / O interface 605: input devices 606, including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, and the like; output devices 607, including, for example, a liquid crystal display (LCD), a speaker, a vibrator, and the like; storage devices 608, including, for example, a memory card, a hard disk, and the like; and communication devices 609. The communication devices 609 can allow the electronic device to communicate wirelessly or via a wired connection with other devices to exchange data. Although Figure 6 An electronic device having various devices is shown, but it is understood that all of the shown devices are not required to be implemented or present. More or fewer devices can alternatively be implemented or present.

[0124] The fourth aspect of the present application provides a computer storage medium, the storage medium carries one or more computer programs, when the one or more computer programs are executed by an electronic device, the electronic device can execute the instruction data transmission method of the first aspect or any implementation manner of the first aspect.

[0125] In addition, it should be noted that the above-described device embodiments are only schematic, and the units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e. they can be located in one place, or distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the present embodiment. In addition, the connection relationship between the modules in the device embodiment provided by the present application indicates that there is a communication connection between them, which can be implemented as one or more communication buses or signal lines.

[0126] From the above description of the embodiments, those skilled in the art can clearly understand that the present application can be realized by means of software and necessary general hardware, of course, it can also be realized by special hardware including special integrated circuit, special CPU, special memory, special components, etc. Generally, functions completed by computer programs can be easily realized by corresponding hardware, and specific hardware structures for realizing the same function can also be various, such as analog circuit, digital circuit or special circuit, etc. However, for the present application, software program implementation is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of software product, which is stored in a readable storage medium, such as a computer's floppy disk, U disk, mobile hard disk, ROM, RAM, magnetic disk or optical disk, etc., including a plurality of instructions to make a computer device (which can be a personal computer, training device, or network device, etc.) execute the methods described in various embodiments of the present application.

[0127] In the above embodiments, the implementation can be wholly or partially by software, hardware, firmware, or any combination thereof. When implemented by software, the implementation can be wholly or partially in the form of a computer program product.

[0128] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are wholly or partially generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another, for example, the computer instructions can be transmitted from one website, computer, training device or data center to another website, computer, training device or data center through wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can store or a data storage device such as a training device, a data center, etc. integrated with one or more available media. The available medium can be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (SSD)), etc.

Claims

1. An instruction data transfer method, characterized by, The method comprises the following steps: analyzing the print task output by the instruction generation process to obtain a plurality of operation instructions, and identifying the instruction type of each operation instruction, wherein the instruction type at least includes a short time-consuming type and a long time-consuming type; sending each operation instruction of a target instruction type to a target print data transmission network corresponding to the target instruction type, so that the instruction execution process executes each operation instruction using the target print data transmission network, wherein the target instruction type is any one of the short time-consuming type and the long time-consuming type, the target print data transmission network includes a shared data channel, a first shared memory and a second shared memory, the shared data channel includes an uplink channel and a downlink channel, the bandwidth of the uplink channel is greater than the bandwidth of the downlink channel, and the process of the instruction execution process executing each operation instruction using the target print data transmission network includes: storing each operation instruction in the first shared memory through the shared data channel, and sequentially sending execution trigger instructions of each operation instruction to the instruction execution process in the order of storage of the operation instruction, so that the instruction execution process extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory through the shared data channel, and stores the instruction execution result in the second shared memory through the shared data channel after executing the operation instruction; the shared data channel sends an extraction trigger instruction to the instruction generation process when detecting that each instruction execution result is stored in the second shared memory, so that the instruction generation process extracts each instruction execution result from the second shared memory through the shared data channel.

2. The instruction data transfer method of claim 1, wherein, storing each operation instruction in the first shared memory through the shared data channel, and sequentially sending execution trigger instructions of each operation instruction to the instruction execution process in the order of storage of the operation instruction, so that the instruction execution process extracts the operation instruction and an execution data set corresponding to the operation instruction from the first shared memory through the shared data channel, and stores the instruction execution result in the second shared memory through the shared data channel after executing the operation instruction, including: the shared data channel adds each operation instruction of the target instruction type received to an operation instruction queue, identifies the instruction execution thread identifier in each operation instruction, and generates the execution trigger instruction of each operation instruction based on each instruction execution thread identifier; in the order of storage of each operation instruction joining the operation instruction queue, sequentially store each operation instruction in the operation instruction queue in the first shared memory, and when the operation instruction exports the operation instruction queue, send the execution trigger instruction of the operation instruction to the target instruction execution thread in the instruction execution process; The target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction, to obtain an execution result of the operation instruction.

3. The instruction data transfer method of claim 2, wherein, The target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction, to obtain an execution result of the operation instruction. The target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the shared data channel, including: The target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction, to obtain an execution result of the operation instruction. The target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the shared data channel, including:

4. The method of claim 2, wherein, The storage order of the operation instruction queue according to each operation instruction in turn stores each operation instruction in the operation instruction queue to the first shared memory, and when the operation instruction derives the operation instruction queue, the execution trigger instruction of the operation instruction is sent to the target instruction execution thread in the instruction execution process, including: An operation instruction stored first in the operation instruction queue is determined as a current operation instruction; The current operation instruction is stored to the first shared memory, and it is detected whether the execution data set corresponding to the current operation instruction exists in the first shared memory; In the case where the execution data set corresponding to the current operation instruction exists, the execution trigger instruction of the operation instruction is sent to the target instruction execution thread, so that the target instruction execution thread extracts the current operation instruction and the execution data set corresponding thereto from the first shared memory; In the case where it is detected that the current operation instruction and the execution data set corresponding thereto are extracted, the current operation instruction is updated to one operation instruction in the operation instruction queue which is only later than the current operation instruction which is not updated in the storage order, and the operation step of storing the current operation instruction to the first shared memory and detecting whether the execution data set corresponding to the current operation instruction exists in the first shared memory is executed.

5. An instruction data transfer system, characterized by including: The instruction analysis module, the instruction management module and at least two target printing data transmission networks, the target printing data transmission network comprising a shared data channel, a first shared memory and a second shared memory, the shared data channel comprising an uplink channel and a downlink channel, a bandwidth of the uplink channel being greater than a bandwidth of the downlink channel, The instruction analysis module is configured to analyze a printing task output by an instruction generation process, obtain a plurality of operation instructions, and identify instruction types of the operation instructions, the instruction types comprising at least a short time-consuming type and a long time-consuming type; The instruction management module is configured to send operation instructions of a target instruction type to a target printing data transmission network corresponding to the target instruction type, so that an instruction execution process executes the operation instructions using the target printing data transmission network, the target instruction type being any one of the short time-consuming type and the long time-consuming type, and the target printing data transmission network being configured as follows during execution of the operation instructions by the instruction execution process: The shared data channel stores the operation instructions in the first shared memory and sends execution trigger instructions of the operation instructions to the instruction execution process in a storage order of the operation instructions, so that the instruction execution process extracts the operation instructions and an execution data set corresponding to the operation instructions from the first shared memory through the shared data channel, and stores instruction execution results in the second shared memory through the shared data channel after executing the operation instructions; The shared data channel sends extraction trigger instructions to the instruction generation process when detecting that the instruction execution results are stored in the second shared memory, so that the instruction generation process extracts the instruction execution results from the second shared memory through the shared data channel.

6. The instruction data transfer system of claim 5, wherein, The shared data channel stores the operation instructions in the first shared memory and sends execution trigger instructions of the operation instructions to the instruction execution process in a storage order of the operation instructions, so that the instruction execution process extracts the operation instructions and an execution data set corresponding to the operation instructions from the first shared memory through the shared data channel, and stores instruction execution results in the second shared memory through the shared data channel after executing the operation instructions; The shared data channel adds the operation instructions of the target instruction type received to an operation instruction queue, identifies instruction execution thread identifiers in the operation instructions, and generates execution trigger instructions of the operation instructions based on the instruction execution thread identifiers; The shared data channel stores the operation instructions in the first shared memory in the storage order of the operation instructions in the operation instruction queue, and sends the execution trigger instructions of the operation instructions to target instruction execution threads in the instruction execution process when the operation instructions are exported from the operation instruction queue. For each operation instruction, the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; The target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the shared data channel.

7. The instruction data transfer system of claim 6, wherein, For each operation instruction, the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; the target instruction execution thread is set to: For each operation instruction, the target instruction execution thread extracts the operation instruction and the execution data set corresponding to the operation instruction from the first shared memory through the shared data channel in response to the execution trigger instruction of the operation instruction, and executes the operation instruction based on the execution data set of the operation instruction to obtain an execution result of the operation instruction; The target instruction execution thread stores the execution result of the operation instruction to the second shared memory through the shared data channel.

8. The instruction data transfer system of claim 6, wherein, The shared data channel is set to: Determine the first stored operation instruction in the operation instruction queue as a current operation instruction; Store the current operation instruction to the first shared memory and detect whether the execution data set corresponding to the current operation instruction exists in the first shared memory; In the case where the execution data set corresponding to the current operation instruction exists, send the execution trigger instruction of the operation instruction to the target instruction execution thread, so that the target instruction execution thread extracts the current operation instruction and the execution data set corresponding thereto from the first shared memory; In the case where it is detected that the current operation instruction and the execution data set corresponding thereto are extracted completely, update the current operation instruction to one operation instruction in the operation instruction queue which is only later than the un-updated current operation instruction in the storage order, and perform the operation step of storing the current operation instruction to the first shared memory and detecting whether the execution data set corresponding to the current operation instruction exists in the first shared memory.

9. An electronic device, comprising: The memory is configured to store a computer program. The memory is configured to store a computer program. The processor is configured to execute the computer program to enable the electronic device to implement the instruction data transmission method according to any one of claims 1 to 4.

10. A computer storage medium, characterized in that The storage medium carries one or more computer programs, and when the one or more computer programs are executed by the electronic device, the electronic device is enabled to implement the instruction data transmission method according to any one of claims 1 to 4.

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