A lossless compression circuit, chip and device for pulse waveform data

Abstract

The application discloses a lossless compression circuit, chip and equipment for pulse waveform data, wherein the lossless compression circuit comprises an input flow control module, a division module, an LZ77 compressor, a conversion module, a check module, a Huffman encoder and an output flow control module; the input flow control module is used for receiving input data flow and realizing flow control; the division module is used for dividing the input data flow into data blocks; the LZ77 compressor is used for realizing data compression of the LZ77 compression algorithm; the conversion module is used for converting the compression result into a symbol of Huffman coding; the check module is used for calculating the length len and the cyclic redundancy check code of the whole data flow; the Huffman encoder is used for realizing Huffman coding algorithm coding; and the output flow control module is used for outputting data according to a specified compression format. The application aims to realize the lossless compression of electroencephalogram signals by combining the Deflate algorithm with the LZ77 compression algorithm and the Huffman coding algorithm based on hardware, so as to improve the processing efficiency of the pulse waveform data of the electroencephalogram signals.

Description

Technical Field

[0001] The present invention relates to signal compression technology in the field of brain-computer interface, and in particular to a lossless compression circuit, chip and device for pulse waveform data. Background Art

[0002] A brain-computer interface (BCI) refers to a technology that establishes a direct connection pathway between the human brain's nerves and an external device with high biocompatibility, enabling information exchange and functional integration between the nervous system and external devices. Invasive wireless brain-computer interfaces are highly invasive and technically complex BCI technologies. They record and control brain activity by implanting electrodes or sensors into the brain and transmitting and receiving signals through wireless communication technology. Signal compression is a process that reduces the signal representation by reducing the amount of data or utilizing redundant information in the data while retaining sufficient information for subsequent analysis and diagnosis. The amount of data collected by multiple electrodes of an invasive wireless brain-computer interface at a high sampling rate is extremely large, but its power consumption budget and transmission bandwidth are limited, and real-time response requirements are high. Signal compression is an effective solution to the above problems.

[0003] The Deflate algorithm is a lossless data compression technology widely used in formats such as ZIP, gzip, and PNG. The Deflate algorithm combines the LZ77 algorithm and Huffman coding (1) Huffman coding) to achieve compression through two main stages: first, the LZ77 algorithm is used to detect and replace repeated data sequences, and second, Huffman coding is used to further compress the data. Implementations of the Deflate algorithm are widely available, and many programming languages ​​have corresponding libraries that can be used. For example, C language programs often use the zlib library to implement Deflate compression. However, how to apply the Deflate algorithm to the pulse waveform data compression of signals in the field of brain-computer interface, especially how to improve the execution efficiency of the Deflate algorithm for high-throughput EEG signals, has become a key technical problem that needs to be solved urgently. Summary of the Invention

[0004] Technical problem to be solved by the present invention: In response to the above-mentioned problems of the prior art, a lossless compression circuit, chip and device for pulse waveform data are provided. The present invention aims to achieve lossless compression of EEG signals based on hardware by using the Deflate algorithm combined with the LZ77 compression algorithm and the Huffman coding algorithm, thereby improving the processing efficiency of EEG signal pulse waveform data.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0006] A lossless compression circuit for pulse waveform data, comprising:

[0007] Input flow control module, used to receive input data stream and implement flow control;

[0008] A partitioning module is used to divide the input data stream into data blocks of fixed size;

[0009] LZ77 compressor, used to implement the LZ77 compression algorithm in the Deflate algorithm to compress data blocks;

[0010] A conversion module, for converting the output of the LZ77 compression algorithm into Huffman coding symbols;

[0011] A check module is used to receive the data stream output by the LZ77 compressor and calculate the length len and cyclic redundancy check code of the entire data stream;

[0012] Huffman encoder, used to implement the Huffman coding algorithm in the Deflate algorithm, and encode and output the data compressed by the LZ77 compression algorithm;

[0013] Output flow control module, used to organize the encoded output according to the specified compression format specification and output;

[0014] The input flow control module, the division module, and the LZ77 compressor are connected in sequence, the LZ77 compressor is respectively connected to the input ends of the conversion module and the verification module, the output ends of the conversion module and the verification module are respectively connected to the input ends of the Huffman encoder, the output end of the Huffman encoder is connected to the input end of the output flow control module, and the lossless compression circuit adopts a pipeline design, wherein the input flow control module constitutes the first stage of the pipeline, the division module constitutes the second stage of the pipeline, the LZ77 compressor constitutes the third stage of the pipeline, the conversion module and the verification module both constitute the fourth stage of the pipeline, the Huffman encoder constitutes the fifth stage of the pipeline, and the output flow control module constitutes the sixth stage of the pipeline.

[0015] Optionally, the input flow control module includes two 8-bit buffers for receiving data input in AXI-Stream format and implementing flow control, and the two 8-bit buffers are used to receive data input in AXI-Stream format in turn.

[0016] Optionally, the partitioning module includes a counter and a comparator, the counter is used to count according to the data received in AXI-Stream format, the output end of the counter and the preset threshold BLK_MIN are used as the input of the comparator, and the comparator is used to take out data of the preset threshold BLK_MIN size from the input flow control module as a data block when the count value of the counter is equal to the preset threshold BLK_MIN.

[0017] Optionally, the LZ77 compressor adopts a pipeline design, and the stages of the pipeline design include:

[0018] The data receiving phase A is used to receive the input signal and determine whether it is in the data block and whether the pipeline should be started;

[0019] Delay processing stage B is used to introduce delays to balance the speed differences of different operations and ensure data synchronization in the pipeline;

[0020] Hash calculation phase C, used to calculate the hash value of the current data block for fast matching in subsequent phases;

[0021] Hash table read and write phase D is used to write the current position information into the hash table and read possible matching positions from the hash table based on the hash value;

[0022] Matching phase E is used to prepare the data required for matching search;

[0023] The search phase F performs the actual match check, which involves searching the hash table using a sliding window based on the hash value to determine if there are duplicate strings within the sliding window and matching them. If there are multiple identical strings, the string with the longest matching length L and the closest distance is selected, and the distance D between the two starting positions is calculated. Finally, the content of the duplicate string can be represented by an index consisting of (byte, L, D), where byte is the original character of the current data block.

[0024] The matching decision stage G is used to make a decision based on the matching search result to determine whether to output the original character in the case of non-matching or output the index information in the case of matching;

[0025] The original character encoding stages H and J are used to prepare the output of the original characters in the case of non-matching;

[0026] The final output stage K is used to integrate non-matching situations and matching situations, use the type signal nlz to distinguish between original characters and index information, and generate the final output signal.

[0027] Optionally, when searching in the hash table through a sliding window based on the hash value, the sliding window size used is 16384, the hash value size is 4096, the hash value width is 14 bits, the search distance is 16383 to cover the entire data block, and four buffers BUFFER are used to store the lower 2 bits of the storage address of the data for searching.

[0028] Optionally, the conversion module converts the output of the LZ77 compression algorithm into Huffman coded symbols, including merging the original characters and the matching length len into the symbol [8:0]symbol, and determining the additional number of bits required to encode these symbols based on a preset matching length partition comparison table; or merging the distance D in the index with the matching length len of the matching check to use a distance dist, and determining the additional number of bits required to encode these symbols based on a preset matching length partition comparison table, to form two data streams of distance [8:0]dist and symbol [8:0]symbol.

[0029] Optionally, the Huffman encoder is used to perform Huffman encoding on the two data streams of distance [8:0]dist and symbol [8:0]symbol output by the conversion module, and the length len and cyclic redundancy check code of the data stream output by the check module, and output a compressed data stream with a data width of 4 bytes and a total of 32 bits according to the GZIP format requirements. The Huffman encoder uses a finite state machine FSM to manage the data compression process. The finite state machine FSM includes:

[0030] Idle state R_IDLE: used to receive data and write it into the data buffer buffer_data. If the length of the data stream len exceeds the preset threshold MIN_LEN, the dynamic Huffman flag is set to use, waiting for the end of the block input EOB, and starting to construct the dynamic Huffman tree r_dynamic until the construction is completed huffman_ed. At this time, the read and write addresses are different, and the ready state R_PREPARE is entered;

[0031] Preparation state R_PREPARE: used to prepare the GIZP header. If the data stream is a new data stream r_l_sos, it is first initialized to the GIZP header, initializes the first stage of the output stream pipeline, and then jumps to the GZIP header output state R_GZIP_HEADER_2~3; if it is not the latest data stream, first use the output stream pipeline to output a 3-bit data block start identifier, and if the dynamic Huffman method r_dynamic is used, jump to the dynamic Huffman tree header output state R_DYN_HEADER_1~3; if the static Huffman method is used, jump to the dynamic Huffman tree output state R_DYN_OUTTREE; the output stream pipeline is used to output the encoding result in a pipeline manner;

[0032] GZIP header output state R_GZIP_HEADER_2~3: used to output the header information required by the GZIP file format. If the dynamic Huffman method is used, it jumps to the dynamic Huffman tree header output state R_DYN_HEADER_1~3, otherwise it jumps to the dynamic Huffman tree output state R_DYN_OUTTREE;

[0033] Dynamic Huffman tree head output state R_DYN_HEADER_1~3: used to output the description information of the Huffman tree, and after output, jump to the dynamic Huffman tree output state R_DYN_OUTTREE;

[0034] Dynamic Huffman tree output state R_DYN_OUTTREE: used to output the constructed Huffman tree, and after output, jump to the Huffman coding output state R_HUFFMAN_OUT;

[0035] Huffman coding output state R_HUFFMAN_OUT: used to read the data buffer buffer_data, take out the LZ77 encoded data, convert it into Huffman coding, and output it to the buffer. After output, jump to the end block symbol output state R_EOB_SYMBOL;

[0036] End block symbol output state R_EOB_SYMBOL: used to output the block end symbol EOB indicating the end of the data block in LZ77 compression, and jump to the post-processing state R_POST_PARE after output;

[0037] Post-processing state R_POST_PARE: used to adjust the read and write pointers to prepare for the next compression. If the output block ends, it jumps to the GZIP tail output state R_GZIP_FOOTER_1~3, otherwise it jumps to the idle state R_IDLE;

[0038] GZIP footer output state R_GZIP_FOOTER_1~3: used to output the footer information required by the GZIP file format, including the CRC checksum and the original data length. After output, it jumps to the idle state R_IDLE;

[0039] The output stream pipeline includes the following stages:

[0040] Initial processing stage A, reads the raw data from the buffer and performs preliminary processing based on the data type: sets the output enable signal, determines whether it is the start, end or end of the stream, and extracts the symbol data and the number of additional bits;

[0041] Lookup stage B, query the Huffman table. If a static Huffman tree is used, this stage will query the static Huffman table to obtain the Huffman code and length of each symbol, and process the dynamic flag related to the dynamic Huffman tree;

[0042] Coding stage C, obtain Huffman code, according to the results of dynamic Huffman tree or static Huffman table, obtain the Huffman code and code length of each symbol and distance. If it is a dynamic Huffman tree, reverse bit operation will be used to obtain the correct code;

[0043] High and low bit merging stage D, bit stream merging, merges the high and low bit Huffman codes in the same cycle, merges the code and length information from the encoding stage C into a unified bit stream, and calculates the number of merged bits;

[0044] In the bitstream merging stage E, the bitstream is merged across clock cycles, 32-bit data is output, and the shift register t_bits is used to temporarily store the encoding. The bits are aligned to ensure that the output data is aligned in bytes. If the number of valid bits in the shift register t_bitc is greater than 32, the lower 32 bits of the merged bitstream are output to the register e_data in a low-byte to high-byte manner. The part exceeding 32 bits is right-shifted to the low bit of the shift register t_bits. At the same time, the byte valid signal byte_cnt is used to indicate that the bytes in the 32 bits are valid, and the stream end signal last is generated to indicate the end of the current block. The final GZIP compressed AXI-Stream format output stream is generated, which is composed of the output signal e_en, the lower 32 bits of the bitstream in the register e_data, the byte valid signal byte_cnt, and the stream end signal last.

[0045] Optionally, the output flow control module includes an internal buffer for caching output data, and dynamically controls the input data flow based on the filling status of the internal buffer based on the output flow control signal i_stall_n. When the internal buffer is close to full, the output flow control signal i_stall_n is set to notify the sender to pause sending data to achieve elastic flow control.

[0046] In addition, the present invention also provides a chip, comprising a data input circuit, a data compression circuit and a data processing circuit connected in sequence, wherein the data compression circuit is the lossless compression circuit for pulse waveform data.

[0047] In addition, the present invention also provides an electronic device, comprising a microprocessor and a memory connected to each other, wherein the microprocessor includes the lossless compression circuit for pulse waveform data.

[0048] Compared with the prior art, the present invention mainly has the following advantages: BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 Schematic diagram of the structure of the lossless compression circuit in an embodiment of the present invention.

[0050] Figure 2 Schematic diagram of the flow of the LZ77 compression algorithm used in an embodiment of the present invention.

[0051] Figure 3 This is an example of a hash table for the LZ77 compression algorithm in an embodiment of the present invention.

[0052] Figure 4 Schematic diagram of the architecture of the LZ77 compressor in an embodiment of the present invention.

[0053] Figure 5 Schematic diagram of the pipeline implementation of the LZ77 compressor in an embodiment of the present invention.

[0054] Figure 6 Schematic diagram of the sliding window of the LZ77 compressor in an embodiment of the present invention.

[0055] Figure 7 1 is an example of Huffman tree construction in an embodiment of the present invention, where (a) is the initial Huffman tree; (b) is the Huffman tree after merging 1 and 2; (c) is the Huffman tree after merging 3 and 4; and (d) is the Huffman tree after merging 6 and 7.

[0056] Figure 8 This is a Deflate tree obtained based on the Huffman tree construction example in an embodiment of the present invention.

[0057] Figure 9 Schematic diagram of the Huffman encoder architecture in an embodiment of the present invention.

[0058] Figure 10 Schematic diagram of the state transition of the finite state machine FSM in an embodiment of the present invention.

[0059] Figure 11 Schematic diagram of the Huffman encoder data output stream pipeline in an embodiment of the present invention.

[0060] Figure 12 Schematic diagram of the workflow of the lossless compression circuit in an embodiment of the present invention.

[0061] Legend: 1. Input flow control module; 2. Division module; 21. Counter; 22. Comparator; 3. LZ77 compressor; 4. Conversion module; 5. Verification module; 6. Huffman encoder; 7. Output flow control module. DETAILED DESCRIPTION

[0062] The lossless compression circuit for pulse waveform data in this embodiment mainly realizes the accelerated operation of the Deflate algorithm in a hardware-based manner, such as Figure 1 As shown, the lossless compression circuit for pulse waveform data in this embodiment includes:

[0063] Input flow control module 1, used to receive input data stream and implement flow control;

[0064] A division module 2 is used to divide the input data stream into data blocks of fixed size;

[0065] LZ77 compressor 3, used to implement the LZ77 compression algorithm in the Deflate algorithm to compress the data block;

[0066] The conversion module 4 is used to convert the output of the LZ77 compression algorithm into Huffman coding symbols;

[0067] The check module 5 is used to receive the data stream output by the LZ77 compressor 3 and calculate the length len and cyclic redundancy check code of the entire data stream;

[0068] Huffman encoder 6, used to implement the Huffman encoding algorithm in the Deflate algorithm, and encode and output the data compressed by the LZ77 compression algorithm;

[0069] Output flow control module 7, used to organize the encoded output according to the specified compression format specification and output it;

[0070] The input flow control module 1, the partitioning module 2, and the LZ77 compressor 3 are connected in sequence. The LZ77 compressor 3 is respectively connected to the input ends of the conversion module 4 and the verification module 5. The output ends of the conversion module 4 and the verification module 5 are respectively connected to the input end of the Huffman encoder 6. The output end of the Huffman encoder 6 is connected to the input end of the output flow control module 7. In this embodiment, the input data stream is a data stream in the AXI-Stream format. The input flow control module 1 receives the data input in the AXI-Stream format and buffers it. The partitioning module 2 divides the data stream into blocks and controls the flow of the data stream. The LZ77 compressor 3 implements the LZ77 data compression algorithm. The conversion module 4 converts the LZ77 compressed data into characters. The verification module 5 counts the data and calculates the CRC32 check code. The Huffman encoder 6 encodes the data processed by the LZ77 compressor 3. Finally, the data is placed in the output flow control module 7 for output flow control and transmitted to the next module in the AXI-Stream format.

[0071] As an optional implementation, the input flow control module 1 in this embodiment includes two 8-bit buffers for receiving data input in AXI-Stream format and implementing flow control. The two 8-bit buffers are used to receive data input in AXI-Stream format in turn. The input flow control module 1 in this embodiment receives data input in AXI-Stream format in a double-buffered structure through the above structure, which can effectively optimize the data processing flow, improve the system's response speed and data processing capabilities, and enhance the system's stability and reliability.

[0072] like Figure 1As shown, the partitioning module 2 of this embodiment includes a counter 21 and a comparator 22. Counter 21 is used to count data received in AXI-Stream format. The output of counter 21 and a preset threshold value BLK_MIN serve as inputs to comparator 22. When the count value of counter 21 equals the preset threshold value BLK_MIN, comparator 22 is used to extract data of the preset threshold value BLK_MIN from input flow control module 1 and output it as a data block. In this embodiment, data smaller than the preset threshold value BLK_MIN bytes is treated as a data block (DBLK) for the Deflate algorithm. Data larger than the preset threshold value BLK_MIN bytes is divided into multiple data blocks DBLK, each of which does not exceed the preset threshold value BLK_MIN. The output signals of partitioning module 2 include a data signal byte, indicating the end of a data block (eob), and an end of a data stream (eos). The above design of partitioning module 2 ensures that data is processed in appropriate block sizes, enabling efficient compression regardless of the size of the original data stream. It's important to note that while algorithms that dynamically adjust the data block size (DBLK) can improve compression, hardware implementation requires a balance of benefits and costs. Dynamically adjusting the block size will further increase hardware complexity, and the resulting compression rate increase is unstable. In EEG signal compression tasks, hardware resources are limited, and power consumption is constrained. Dynamically adjusting the data block size (DBLK) to achieve compression is unnecessary.

[0073] LZ77 compressor 3 is used to implement the LZ77 compression algorithm in the Deflate algorithm to compress data blocks. The LZ77 compression algorithm is a classic compression algorithm that uses a dictionary to compress data. It was proposed by two Israeli engineers, Jacob Ziv and Abraham Lempel in 1977. Its core idea is that if the information in the string has appeared before, it only needs to point out the location where it appeared before, and then these words can be represented by relative indexes. Figure 2As shown in the figure, the steps of the LZ77 compression algorithm include: (1) Calculating hash values: Using a hash function to calculate the hash values ​​of the current byte and the next two adjacent bytes of data byte by byte; (2) Constructing and maintaining a hash table; (3) Matching: Using the hash value to search the hash table, determine whether there are repeated strings in the sliding window, and perform matching; If there are multiple identical strings, perform index calculation: Select the string with the longest matching length (denoted as L) and the closest distance (proximity principle), calculate the distance between the starting positions of the two (denoted as D), and finally use the index composed of (original character, matching length L, distance D) to represent the content of the repeated string. If the repeated string is not found in the dictionary (no match), directly output the original character of the current character; (4) Output the compression result of the LZ77 compression algorithm. If the compression is completed, it ends; otherwise, continue to perform compression until all characters are processed. Figure 3 This is an example of a hash table for the LZ77 compression algorithm in this embodiment. Figure 3 Taking the sentence shown as an example, for the first appearing character, the original character will be encoded because it cannot be matched. Subsequently, "a" can be represented by (2,1), "aba" can be represented by (4,3), and "bac" can be indexed by (6,3). "ba" appears twice in the sliding window and is indexed by (3,2) based on the proximity principle.

[0074] Figure 4 The micro-architecture of the LZ77 compressor 3 in this embodiment is shown. Its input includes: a byte of data [7:0]byte, a data valid signal en, a stream end signal eos (end of stream) and a data block end signal eob (end of block). The output includes: the original character [7:0]byte or the index (D, L). The index (D, L) is represented by [7:0]len to indicate the matching length L, [3:0]dist to indicate the distance D, and the original character [7:0]byte or the index (D, L) is distinguished using the type signal nlz (notlz77).

[0075] The pipeline implementation diagram of the LZ77 compressor 3 in this embodiment is shown. The use of pipeline design in hardware implementation not only improves the processing speed, but also facilitates design and debugging. Figure 5 As shown, the stages of pipeline design include:

[0076] The data receiving phase A is used to receive the input signal and determine whether it is in the data block and whether the pipeline should be started;

[0077] Delay processing stage B is used to introduce delays to balance the speed differences of different operations and ensure data synchronization in the pipeline;

[0078] Hash calculation stage C, for calculating the hash value of the current data block for fast lookup of matches in the subsequent stages;

[0079] Hash table read-write stage D, for writing the information of the current position into the hash table and reading possible matching positions from the hash table based on the hash value;

[0080] Matching stage E, for preparing the data required for matching lookup;

[0081] Lookup stage F, for performing the actual matching check, including lookup in the hash table by sliding window based on the hash value, judging whether there is a repeated string in the sliding window and performing matching; if there are multiple same strings, selecting the string with the longest matching length L and the closest distance, calculating the distance D between the starting positions of the two, and finally using the index formed by (byte, L, D) to represent the content of the repeated string, where byte is the original character of the current data block;

[0082] Matching decision stage G, for making a decision according to the result of matching lookup to determine whether to output the original character in the non-matching case or to output the index information in the matching case;

[0083] Original character encoding stages H and J, for processing the non-matching case to prepare to output the original character;

[0084] Final output stage K, for integrating the non-matching case and the matching case, using the type signal nlz to distinguish between the original character and the index information and generating the final output signal.

[0085] According to the principle of LZ77 compression algorithm, LZ77 compression algorithm has two key components: hash table and sliding window fast matching, which are implemented using two separate RAMs in hardware. The search distance is set to 16383, covering the entire DBLK, and the hash table matching search is used, with the hash table size being 4096; in order to be able to map to the entire data block DBLK, the hash value width should be set to 14 bits. LZ77 compression algorithm looks for repeated patterns in data, in order to effectively find matches, it needs to be able to access previous data bytes. The sliding window module supports this kind of lookup by storing the most recent bytes. At the same time, when looking for matches, the problem of byte boundary alignment usually needs to be considered. Figure 3In the compression process example, the sliding window length is 6. Obviously, the setting of the window length will have a crucial impact on the compression efficiency. From the perspective of space compression efficiency, the larger the window, the more possible matches there are for subsequent unprocessed data, and the higher the space compression efficiency. However, as the window becomes larger, the time efficiency will decrease rapidly. In this embodiment, after comprehensively considering the time efficiency and space compression rate, the window size of the LZ77 compression algorithm is set to 16384 (2 14 ). Specifically, in this embodiment, when searching in a hash table through a sliding window based on a hash value, the sliding window size used is 16384, the size of the hash value is 4096, the width of the hash value is 14 bits, the search distance is 16383 to cover the entire data block, and four buffers are used to store the lower 2 bits of the storage address of the data for searching. Figure 6 Schematic diagram of the sliding window of the LZ77 compressor in this embodiment. Figure 6 As shown in the figure, using four buffers ensures that the algorithm can access the correct byte sequence under any given byte alignment. To improve access speed, data is stored sequentially in four buffers (BUFFER0 to BUFFER3) based on the lower two bits of the storage address. During search, matching searches can be performed in parallel in different buffers, and different reading methods can be implemented in the buffers based on the lower two bits of the read address, thereby improving search speed.

[0086] In this embodiment, the conversion module 4 converts the output of the LZ77 compression algorithm into Huffman-coded symbols by combining the original character and the matching length len into the symbol [8:0]symbol and determining the number of additional bits required to encode these symbols based on a preset matching length partitioning table; or by combining the distance D in the index with the matching length len from the matching check into a distance dist and determining the number of additional bits required to encode these symbols based on a preset matching length partitioning table, thereby forming two data streams: the distance [8:0]dist and the symbol [8:0]symbol. The code value of the original character [7:0]byte ranges from 0 to 255. The code value represented by the index is extended by a number of bytes to indicate the matching length, with 256 being used to indicate the end. Short characters do not need to be compressed, so the minimum compression length is agreed to be 3, with 257 indicating a matching length of 3. Similarly, the maximum compression length is 258, and the maximum value is 511. Considering the distribution of matching lengths, the smaller the value, the higher the probability of occurrence and the higher the secondary compression rate, the matching lengths L are grouped. The matching length division comparison table used in this embodiment is shown in Table 1.

[0087] Table 1: Match length classification comparison table

[0088]

[0089] According to the principles of the LZ77 compression algorithm, the LZ77 compression algorithm has two outputs: the original character or the index (D, L). The Huffman encoder needs to encode the actual character. Therefore, the conversion module 4 converts the output of the LZ77 compression algorithm into Huffman-encoded symbols. The conversion process includes combining the original character and the matching length len into a symbol [8:0] symbol, and calculating the additional bits required to encode these symbols (i.e., Bits in Table 1). The distance D is also encoded in the above manner. This information is then used by the Huffman encoder 6 to generate the final compressed data stream.

[0090] In this embodiment, after receiving the input data stream, the verification module 5 calculates the length of the entire data stream and the cyclic redundancy check (CRC32) code, and provides this information as an output. CRC32 is a commonly used error detection method that can detect whether data has been altered during transmission or storage. Of course, other verification algorithms can also be used as needed to detect whether data has been altered during transmission or storage.

[0091] The Huffman encoder 6 is used to implement the Huffman coding algorithm in the Deflate algorithm, encoding and outputting data compressed by the LZ77 compression algorithm. The Huffman coding algorithm is a variable-length lossless compression coding method proposed by Dr. David A. Huffman in 1952 based on some coding ideas expounded by Shannon and Fano. It is an entropy coding algorithm constructed with minimum redundancy. The core of Huffman coding is the construction of the Huffman tree. The specific process is as follows: Step (1): According to n weight values ​​{W1, W2, ..., W n}composes a forest of n binary trees F={T1,T2,…,T n}, where each binary tree T i Only the weight is W i , and its left and right subtrees are empty. Step (2): Select two binary trees T with the smallest root node weight from the forest F. i and T j (i, j are positive integers not greater than n), construct a new binary tree T as the left and right subtrees o , T o The weight is W i +W j Step (3): Delete the left and right subtrees T of the new binary tree from the forest F. i and T j , and the new binary tree T oJoin the forest F. Step (4): Repeat steps (2) and (3) until there is only one tree in the forest F. This tree is the Huffman tree.

[0092] Assume that the given character set is {1,2,4,6} and its weight set is also {1,2,4,6}. The process of constructing the Huffman tree is as follows: Figure 7 and Figure 8 First, a forest of four binary tree nodes is formed based on these four weight values, as shown in Figure 7 As shown in (a); then each time, two binary trees 1 and 2 with the smallest node weights are selected from the forest, and a new binary tree is constructed with them as the left and right subtrees. The weight of the new binary tree is the sum of the left and right subtrees, which is 3, as shown in Figure 7 As shown in (b) in the figure. Add the new binary tree to the forest F and delete its left and right subtrees from F, as shown in (b) in the figure. Figure 7 Repeat the above process until there is only one binary tree in F, which is the Huffman tree, as shown in (c). Figure 7 After completing the construction of the leaf node Huffman tree, assign values ​​to the left and right branches of each binary tree in the tree with 0 and 1 respectively, and obtain the Deflate tree based on the above Huffman tree construction example as shown in (d). Figure 8 As shown, the Huffman tree is then traversed from the root to each leaf node, resulting in the character encoding for the corresponding leaf node being the Huffman code for that character. However, swapping the left and right leaf nodes in the constructed Huffman tree does not affect the optimality of the encoding. In other words, rotating the left and right branches of any node in the code tree (switching 0 and 1), also known as swapping the left and right branches of the tree, does not affect the code length. This also means that the constructed Huffman tree is not unique. To correctly decode, the structural information of the Huffman tree must be stored, which increases the storage difficulty.

[0093] The core idea of ​​the paradigm Huffman coding is to use certain mandatory conventions to reconstruct the structure of the Huffman coding tree with only a small amount of data. Convention 1: Numerical sequence property, which requires that codewords of the same length are binary descriptions of consecutive integers. Convention 2: In order to make the most of the coding space, the length of the first codeword is i Can be obtained from the last codeword of length i-1 It is concluded that: . Convention 3: The first code with the smallest codeword length starts at 0. Through the above convention, it is possible to restore the structure of the entire Huffman coding tree based on the length of each codeword. Drawing on the idea of ​​paradigm Huffman coding, in order to further reduce the amount of information that needs to be saved, the Deflate algorithm stipulates the use of a special Huffman tree, called the Deflate tree. According to RFC1951, the Deflate tree has the following new features compared to the Huffman tree: (a) The two leaf nodes with the same root node in the last layer have a smaller character on the left node than the right node; (b) Except for the last layer, the right subtree cannot be a leaf node, but must be a branch node of the subtree; therefore, a Huffman tree can be uniquely constructed, and further observation shows that there is only one leaf node in each layer, and the codeword of the character can be obtained by recording the depth (codeword length) of the character.

[0094] Huffman coding involves two methods: dynamic Huffman coding and static Huffman coding. Dynamic Huffman coding continuously updates the Huffman tree during the data encoding process. This allows the encoder and decoder to gradually build and adjust the Huffman tree as they process data, adapting to changes in the data's statistical characteristics. Static Huffman coding pre-builds a Huffman tree based on the data's statistical characteristics before encoding begins, and this tree remains unchanged throughout the encoding process. Dynamic Huffman coding offers high compression but consumes a lot of resources. Static Huffman coding uses a predefined Huffman code table to quickly look up character codes. While its compression rate is lower than dynamic Huffman coding, its implementation is simpler.

[0095] The original data stream is compressed by the LZ77 compressor 3 and then processed by the conversion module 4 to form two data streams: distance [8:0]dist and symbol [8:0]symbol. The check module 5 statistically outputs the amount of compressed data and the CRC32 check code of the final data block. The above data are all used as input to the Huffman encoder 6 block. Figure 9 is a schematic diagram of the architecture of the Huffman encoder 6 in this embodiment, as shown in FIG. Figure 9As shown, the Huffman encoder 6 is used to perform Huffman encoding based on the two data streams (distance [8:0]dist and symbol [8:0]symbol) output by the conversion module 4, as well as the length len and cyclic redundancy check code of the data stream output by the check module 5. The output is a compressed data stream (4 bytes) with a data width of 4 bytes, totaling 32 bits, in accordance with the GZIP format requirements. In the implementation of the Huffman encoder 6 in this embodiment, the use of a static Huffman method or a dynamic Huffman method can be determined based on the data stream length. When the number of data in the data stream exceeds the MIN_LEN of the dynamic Huffman tree, a dynamic Huffman tree is established, including a character coding tree and a distance coding tree. When DBLK is small, the static Huffman tree is used for encoding. The dynamic Huffman method requires frequency statistics to construct a deflate tree. To facilitate implementation, an array is used to simulate the deflate tree construction process. The input stream's character and distance information, the cyclic check code and length of each block, and the Huffman tree data are stored in three buffers.

[0096] like Figure 10 As shown, the Huffman encoder 6 in this embodiment uses a finite state machine FSM to manage the data compression process. The finite state machine FSM includes:

[0097] Idle state R_IDLE: used to receive data and write it into the data buffer buffer_data. If the length of the data stream len exceeds the preset threshold MIN_LEN, the dynamic Huffman flag is set to use, waiting for the end of the block input EOB, and starting to construct the dynamic Huffman tree r_dynamic until the construction is completed huffman_ed. At this time, the read and write addresses are different, and the ready state R_PREPARE is entered;

[0098] Preparation state R_PREPARE: used to prepare the GIZP header. If the data stream is a new data stream r_l_sos, it is first initialized to the GIZP header, initializes the first stage of the output stream pipeline, and then jumps to the GZIP header output state R_GZIP_HEADER_2~3; if it is not the latest data stream, first use the output stream pipeline to output a 3-bit data block start identifier, and if the dynamic Huffman method r_dynamic is used, jump to the dynamic Huffman tree header output state R_DYN_HEADER_1~3; if the static Huffman method is used, jump to the dynamic Huffman tree output state R_DYN_OUTTREE; the output stream pipeline is used to output the encoding result in a pipeline manner; in this embodiment, if it is the latest data stream (r_l_sos), it is first initialized to the GIZP header ('h00088B1F, fixed value, where ID1 = 31 (0x1F), ID2 = 139 (0x8B), indicating the GZIP format, CM = 08, indicating the DEFLATE method), and then jumps to different states depending on whether the dynamic Huffman tree (s_dynamic) is used;

[0099] GZIP header output state R_GZIP_HEADER_2~3: used to output the header information required by the GZIP file format. If the dynamic Huffman method is used, it jumps to the dynamic Huffman tree header output state R_DYN_HEADER_1~3, otherwise it jumps to the dynamic Huffman tree output state R_DYN_OUTTREE;

[0100] Dynamic Huffman tree head output state R_DYN_HEADER_1~3: used to output the description information of the Huffman tree, and after output, jump to the dynamic Huffman tree output state R_DYN_OUTTREE;

[0101] Dynamic Huffman tree output state R_DYN_OUTTREE: used to output the constructed Huffman tree, and after output, jump to the Huffman coding output state R_HUFFMAN_OUT;

[0102] Huffman coding output state R_HUFFMAN_OUT: used to read the data buffer buffer_data, take out the LZ77 encoded data, convert it into Huffman coding, and output it to the buffer. After output, it jumps to the end block symbol output state R_EOB_SYMBOL;

[0103] End block symbol output state R_EOB_SYMBOL: used to output the block end symbol EOB indicating the end of the data block in LZ77 compression, and jump to the post-processing state R_POST_PARE after output;

[0104] Post-processing state R_POST_PARE: used to adjust the read and write pointers to prepare for the next compression. If the output block ends, it jumps to the GZIP tail output state R_GZIP_FOOTER_1~3, otherwise it jumps to the idle state R_IDLE;

[0105] GZIP footer output state R_GZIP_FOOTER_1~3: used to output the footer information required by the GZIP file format, including the CRC checksum and the original data length. After output, it jumps to the idle state R_IDLE.

[0106] In order to improve the data processing speed, for design and debugging considerations, the data output stream of the Huffman encoder 6 in this embodiment adopts a pipeline design. Figure 11 Schematic diagram of the data output flow pipeline of the Huffman encoder 6 in this embodiment, as shown in FIG. Figure 11 As shown, the output stream pipeline in this embodiment includes the following stages:

[0107] Initial processing stage A, reads the raw data from the buffer (buffer_data) and performs preliminary processing based on the data type: sets the output enable signal, determines whether it is the start, end or end of the stream, and extracts the symbol data and the number of additional bits (Bits in Table 1);

[0108] Lookup stage B, query the Huffman table. If a static Huffman tree is used, this stage will query the static Huffman table to obtain the Huffman code and length of each symbol, and process the dynamic flag related to the dynamic Huffman tree;

[0109] Coding stage C, obtain Huffman code, according to the results of dynamic Huffman tree or static Huffman table, obtain the Huffman code and code length of each symbol and distance. If it is a dynamic Huffman tree, reverse bit operation will be used to obtain the correct code;

[0110] High and low bit merging stage D, bit stream merging, merges the high and low bit Huffman codes in the same cycle, merges the code and length information from the encoding stage C into a unified bit stream, and calculates the number of merged bits;

[0111] In the bitstream merging stage E, the bitstreams are merged across clock cycles, outputting 32-bit data. The bitstreams are temporarily encoded using the shift register t_bits and bit-aligned to ensure byte-aligned output data. If the number of valid bits in the shift register t_bitc is greater than 32, the lower 32 bits of the merged bitstream are output to the register e_data in a low-byte to high-byte order. The excess bits are right-shifted to the lower bits of the shift register t_bits. The byte valid signal byte_cnt is used to indicate the validity of the 32-bit byte. The stream end signal last is generated to indicate the end of the current block. The final GZIP-compressed AXI-Stream output stream is generated, consisting of the output signal e_en, the lower 32 bits of the bitstream in the register e_data, the byte valid signal byte_cnt, and the stream end signal last. At this point, the output signals e_en, e_data, byte_cnt, and last from Stage E constitute the AXI-Stream output stream. The output flow control module controls the transmission of the compressed data to the signal output module.

[0112] In this embodiment, the output flow control module 7 includes an internal buffer for caching output data, and dynamically controls the input data flow based on the filling status of the internal buffer based on the output flow control signal i_stall_n. When the internal buffer is nearly full, the output flow control signal i_stall_n is set to 0, thereby notifying the sender to pause sending data to achieve elastic flow control. The output flow control module 7 can dynamically control the input data flow based on the filling status of the internal buffer by outputting the flow control signal i_stall_n. When the buffer is nearly full, the output flow control signal i_stall_n is set to 0, thereby notifying the sender to pause sending data, achieving elastic flow control, ensuring that data can be smoothly transmitted between components with different rates, and preventing data loss or buffer overflow due to rate mismatch.

[0113] Figure 12 This is a schematic diagram of the working flow of the lossless compression circuit for pulse waveform data in this embodiment, see Figure 12It can be seen that the lossless compression circuit in this embodiment adopts a pipeline design, wherein the input flow control module 1 constitutes the first stage of the pipeline, the division module 2 constitutes the second stage of the pipeline, the LZ77 compressor 3 constitutes the third stage of the pipeline, the conversion module 4 and the verification module 5 both constitute the fourth stage of the pipeline, the Huffman encoder 6 constitutes the fifth stage of the pipeline, and the output flow control module 7 constitutes the sixth stage of the pipeline. The work of the lossless compression circuit for pulse waveform data in this embodiment includes: (1) the input flow control module 1 receives data in a double buffer structure to ensure smooth data input; (2) the division module 2 uses a counter to count the data, then divides it into blocks, and adds a block end signal eob; (3) the LZ77 compressor 3 compresses the data in the form of a pipeline, the first stage receives the data, and after 10 The compressed data after the pipeline stage has two forms, the original code or the index pair (D, L); (4) the check module 5 continuously calculates the CRC32 check code and counts the length of the data flow; (5) the conversion module 4 maps the original character + matching length to 0~285 for the LZ77 compressed data according to the rules shown in Table 1, and uses similar rules for the matching distance. After mapping, it is transmitted to the Huffman encoder; (6) the Huffman encoder 6 continues to receive the converted data in the idle state. When the block ends (eob), if the Huffman tree needs to be constructed, the dist and symbol trees are constructed respectively. Only after the construction is completed can it enter the next state. The subsequent states are further processed and finally the information of the coding tree and the encoded data output stream are output; (7) the output flow control module 7 performs elastic flow control on the output stream.

[0114] In summary, the lossless compression circuit for pulse waveform data in this embodiment implements a hardware implementation of the Deflate algorithm. This allows for hardware-based lossless compression of EEG signals by combining the Deflate algorithm with the LZ77 compression algorithm and Huffman coding. The Deflate algorithm is complex, requiring numerous bit operations and precise control and optimization for data flow management, which increases the difficulty of development and verification. Furthermore, the dependency of LZ77 compression and Huffman coding complicates parallelization. To maximize hardware resource utilization, the lossless compression circuit for pulse waveform data in this embodiment utilizes a finite state machine (FSM) combined with a pipeline. Furthermore, LZ77 compression requires a sliding window to search for repeated character string sequences, necessitating the design of an efficient access management strategy to support fast data access. The lossless compression circuit for pulse waveform data in this embodiment utilizes a multi-buffer approach for fast matching. When implementing the dynamic Huffman coding algorithm, the lossless compression circuit for pulse waveform data in this embodiment uses an array to construct a deflate tree, reducing the complexity of address calculation, and can access multiple elements in the array in parallel, performing comparison and exchange operations at the same time, thereby accelerating the deflate tree construction process.

[0115] In addition, this embodiment also provides a chip, including a data input circuit, a data compression circuit and a data processing circuit connected in sequence, and the data compression circuit is the lossless compression circuit for pulse waveform data.

[0116] In addition, this embodiment further provides an electronic device, including a microprocessor and a memory connected to each other, wherein the microprocessor includes the lossless compression circuit for pulse waveform data.

[0117] Those skilled in the art should understand that the technical solutions provided by the embodiments of the present application may be in the form of methods, systems, or computer program products. Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application may take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of processes and / or boxes in the flowchart and / or block diagram, may be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including the instruction device, which implements the function specified in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0118] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiment. All technical solutions based on the concept of the present invention are within the scope of protection of the present invention. It should be noted that for those skilled in the art, various improvements and modifications that do not depart from the principles of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. A lossless compression circuit for pulse waveform data, characterized in that: include: Input flow control module (1), used to receive input data stream and implement flow control; A partitioning module (2), configured to partition an input data stream into data blocks of fixed size; LZ77 compressor (3), used to implement the LZ77 compression algorithm in the Deflate algorithm to compress data blocks; A conversion module (4) for converting the output of the LZ77 compression algorithm into Huffman coded symbols; A check module (5) is used to receive the data stream output by the LZ77 compressor (3) and calculate the length len and cyclic redundancy check code of the entire data stream; Huffman encoder (6), used to implement the Huffman encoding algorithm in the Deflate algorithm, and to encode and output the data compressed by the LZ77 compression algorithm; Output flow control module (7), used for arranging the encoded output according to the specified compression format specification and outputting it; The input flow control module (1), the division module (2), and the LZ77 compressor (3) are connected in sequence. The LZ77 compressor (3) is respectively connected to the input ends of the conversion module (4) and the verification module (5). The output ends of the conversion module (4) and the verification module (5) are respectively connected to the input end of the Huffman encoder (6). The output end of the Huffman encoder (6) is connected to the input end of the output flow control module (7). The lossless compression circuit adopts a pipeline design, wherein the input flow control module (1) constitutes the first stage of the pipeline, the division module (2) constitutes the second stage of the pipeline, the LZ77 compressor (3) constitutes the third stage of the pipeline, the conversion module (4) and the verification module (5) both constitute the fourth stage of the pipeline, the Huffman encoder (6) constitutes the fifth stage of the pipeline, and the output flow control module (7) constitutes the sixth stage of the pipeline.

2. The lossless compression circuit for pulse waveform data according to claim 1, wherein: The input flow control module (1) includes two 8-bit buffers for receiving data input in the AXI-Stream format and implementing flow control, and the two 8-bit buffers are used to receive data input in the AXI-Stream format in turn.

3. The lossless compression circuit for pulse waveform data according to claim 1, wherein: The partitioning module (2) includes a counter (21) and a comparator (22), wherein the counter (21) is used to count data received in the AXI-Stream format, an output end of the counter (21) and a preset threshold value BLK_MIN are used as inputs of the comparator (22), and the comparator (22) is used to take out data of a size of the preset threshold value BLK_MIN from the input flow control module (1) as a data block when the count value of the counter (21) is equal to the preset threshold value BLK_MIN and output it.

4. The lossless compression circuit for pulse waveform data according to claim 1, wherein: The LZ77 compressor (3) adopts a pipeline design, and the stages of the pipeline design include: The data receiving phase A is used to receive the input signal and determine whether it is in the data block and whether the pipeline should be started; Delay processing stage B is used to introduce delays to balance the speed differences of different operations and ensure data synchronization in the pipeline; Hash calculation phase C, used to calculate the hash value of the current data block for fast matching in subsequent phases; Hash table read and write phase D is used to write the current position information into the hash table and read possible matching positions from the hash table based on the hash value; Matching phase E is used to prepare the data required for matching search; The search phase F performs the actual match check, which involves searching the hash table using a sliding window based on the hash value to determine if there are duplicate strings within the sliding window and matching them. If there are multiple identical strings, the string with the longest matching length L and the closest distance is selected, and the distance D between the two starting positions is calculated. Finally, the content of the duplicate string can be represented by an index consisting of (byte, L, D), where byte is the original character of the current data block. The matching decision stage G is used to make a decision based on the matching search result to determine whether to output the original character in the case of non-matching or output the index information in the case of matching; The original character encoding stages H and J are used to prepare the output of the original characters in the case of non-matching; The final output stage K is used to integrate non-matching situations and matching situations, use the type signal nlz to distinguish between original characters and index information, and generate the final output signal.

5. The lossless compression circuit for pulse waveform data according to claim 4, wherein: When searching in the hash table through a sliding window based on the hash value, the sliding window size used is 16384, the hash value size is 4096, the hash value width is 14 bits, the search distance is 16383 to cover the entire data block, and four buffers are used to store the lower 2 bits of the storage address of the data for searching.

6. The lossless compression circuit for pulse waveform data according to claim 4, characterized in that: The conversion module (4) converts the output of the LZ77 compression algorithm into Huffman coded symbols, including combining the original characters and the matching length len into the symbol [8:0]symbol, and determining the number of additional bits required to encode these symbols according to a preset matching length partition comparison table; Alternatively, the distance D in the index is combined with the match length len of the match check to form a distance dist, and the number of additional bits required to encode these symbols is determined based on the preset match length division comparison table, forming two data streams: distance [8:0]dist and symbol [8:0]symbol.

7. The lossless compression circuit for pulse waveform data according to claim 6, characterized in that: The Huffman encoder (6) is used to perform Huffman encoding on the two data streams of distance [8:0]dist and symbol [8:0]symbol output by the conversion module (4), and the length len and cyclic redundancy check code of the data stream output by the check module (5), and output a compressed data stream with a data width of 4 bytes and a total of 32 bits according to the GZIP format requirements. The Huffman encoder (6) uses a finite state machine FSM to manage the data compression process. The finite state machine FSM includes: Idle state R_IDLE: used to receive data and write it into the data buffer buffer_data. If the length of the data stream len exceeds the preset threshold MIN_LEN, the dynamic Huffman flag is set to use, waiting for the end of the block input EOB, and starting to construct the dynamic Huffman tree r_dynamic until the construction is completed huffman_ed. At this time, the read and write addresses are different, and the ready state R_PREPARE is entered; Preparation state R_PREPARE: used to prepare the GIZP header. If the data stream is a new data stream r_l_sos, it is first initialized to the GIZP header, initializes the first stage of the output stream pipeline, and then jumps to the GZIP header output state R_GZIP_HEADER_2~3; if it is not the latest data stream, first use the output stream pipeline to output a 3-bit data block start identifier, and if the dynamic Huffman method r_dynamic is used, jump to the dynamic Huffman tree header output state R_DYN_HEADER_1~3; if the static Huffman method is used, jump to the dynamic Huffman tree output state R_DYN_OUTTREE; the output stream pipeline is used to output the encoding result in a pipeline manner; GZIP header output state R_GZIP_HEADER_2~3: used to output the header information required by the GZIP file format. If the dynamic Huffman method is used, it jumps to the dynamic Huffman tree header output state R_DYN_HEADER_1~3, otherwise it jumps to the dynamic Huffman tree output state R_DYN_OUTTREE; Dynamic Huffman tree head output state R_DYN_HEADER_1~3: used to output the description information of the Huffman tree, and after output, jump to the dynamic Huffman tree output state R_DYN_OUTTREE; Dynamic Huffman tree output state R_DYN_OUTTREE: used to output the constructed Huffman tree, and after output, jump to the Huffman coding output state R_HUFFMAN_OUT; Huffman coding output state R_HUFFMAN_OUT: used to read the data buffer buffer_data, take out the LZ77 encoded data, convert it into Huffman coding, and output it to the buffer. After output, jump to the end block symbol output state R_EOB_SYMBOL; End block symbol output state R_EOB_SYMBOL: used to output the block end symbol EOB indicating the end of the data block in LZ77 compression, and jump to the post-processing state R_POST_PARE after output; Post-processing state R_POST_PARE: used to adjust the read and write pointers to prepare for the next compression. If the output block ends, it jumps to the GZIP tail output state R_GZIP_FOOTER_1~3, otherwise it jumps to the idle state R_IDLE; GZIP footer output state R_GZIP_FOOTER_1~3: used to output the footer information required by the GZIP file format, including the CRC checksum and the original data length. After output, it jumps to the idle state R_IDLE; The output stream pipeline includes the following stages: Initial processing stage A, reads the raw data from the buffer and performs preliminary processing based on the data type: sets the output enable signal, determines whether it is the start, end or end of the stream, and extracts the symbol data and the number of additional bits; Lookup stage B, query the Huffman table. If a static Huffman tree is used, this stage will query the static Huffman table to obtain the Huffman code and length of each symbol, and process the dynamic flag related to the dynamic Huffman tree; Coding stage C, obtain Huffman code, according to the results of dynamic Huffman tree or static Huffman table, obtain the Huffman code and code length of each symbol and distance. If it is a dynamic Huffman tree, reverse bit operation will be used to obtain the correct code; High and low bit merging stage D, bit stream merging, merges the high and low bit Huffman codes in the same cycle, merges the code and length information from the encoding stage C into a unified bit stream, and calculates the number of merged bits; In the bitstream merging stage E, the bitstream is merged across clock cycles, 32-bit data is output, and the shift register t_bits is used to temporarily store the encoding. The bits are aligned to ensure that the output data is aligned in bytes. If the number of valid bits in the shift register t_bitc is greater than 32, the lower 32 bits of the merged bitstream are output to the register e_data in a low-byte to high-byte manner. The part exceeding 32 bits is right-shifted to the low bit of the shift register t_bits. At the same time, the byte valid signal byte_cnt is used to indicate that the bytes in the 32 bits are valid. The stream end signal last is generated to indicate the end of the current block, and the final GZIP compressed AXI-Stream format output stream consisting of the output signal e_en, the lower 32 bits of the bitstream in the register e_data, the byte valid signal byte_cnt, and the stream end signal last is generated.

8. The lossless compression circuit for pulse waveform data according to claim 1, wherein: The output flow control module (7) includes an internal buffer for caching output data, and dynamically controls the input data flow according to the filling status of the internal buffer based on the output flow control signal i_stall_n. When the internal buffer is close to full, the output flow control signal i_stall_n is set to notify the sender to pause sending data to achieve elastic flow control.

9. A chip comprising a data input circuit, a data compression circuit and a data processing circuit connected in sequence, characterized in that: The data compression circuit is a lossless compression circuit for pulse waveform data as claimed in any one of claims 1 to 8.

10. An electronic device comprising a microprocessor and a memory connected to each other, characterized in that: The microprocessor includes the lossless compression circuit for pulse waveform data according to any one of claims 1 to 8.

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