Control circuits, chips and devices

Abstract

This application provides a control circuit, chip, and device belonging to the field of interface circuits. It includes a first inverter, a second inverter, and a second logic unit. When a first-level signal is output from the signal control terminal of the electronic device's controller, the first logic unit is turned on and the second logic unit is turned off, thereby enabling the device to receive communication signals. When a second-level signal is output from the signal control terminal of the electronic device's controller, the second logic unit is turned on and the first logic unit is turned off, thereby enabling the device to transmit communication signals. This achieves the conversion of two-wire transmission to single-wire transmission, simplifies the spatial structure of the device, reduces space occupation, and makes the device lighter and smaller.

Description

Technical Field

[0001] This application relates to the field of interface circuit technology, and more particularly to a control circuit, chip, and device. Background Technology

[0002] With the continuous development of technology, augmented reality (AR) glasses are becoming increasingly popular, which also puts forward more and more requirements for the battery life and communication functions of AR glasses. To this end, existing AR glasses are generally equipped with charging and communication interfaces, such as using two Type-C interfaces for charging and two Pogo Pins for data transmission. However, AR glasses themselves are similar in shape and structure to traditional glasses. This design not only increases the weight of AR glasses, but also hinders the product's lightweighting and miniaturization.

[0003] Therefore, how to configure the communication method of AR glasses to reduce their space occupation is an urgent problem to be solved. Summary of the Invention

[0004] The main objective of this application is to provide a control circuit, chip, and device that simplifies the spatial structure of the device to reduce its footprint and make it lighter.

[0005] In a first aspect, this application provides a control circuit applied to an electronic device, the circuit comprising:

[0006] The first inverter, the input terminal of which is connected to the signal control terminal of the controller of the electronic device;

[0007] The second inverter has its input terminal connected to the output terminal of the first inverter;

[0008] A first logic unit, wherein a first control terminal of the first logic unit is connected to the output terminal of the first inverter, a second control terminal of the first logic unit is connected to the output terminal of the second inverter, a first terminal of the first logic unit is connected to the signal receiving terminal of the controller of the electronic device, and a second terminal of the first logic unit is connected to the I / O terminal.

[0009] The second logic unit has a first control terminal connected to the output terminal of the second inverter, a second control terminal connected to the output terminal of the first inverter, a first terminal connected to the signal transmission terminal of the controller of the electronic device, and a second terminal connected to the I / O terminal.

[0010] When the signal control terminal of the controller of the electronic device outputs a first level signal, the first logic unit is turned on and the second logic unit is turned off; when the signal control terminal of the controller of the electronic device outputs a second level signal, the second logic unit is turned on and the first logic unit is turned off, so as to realize the conversion of two-line transmission to single-line transmission.

[0011] Secondly, this application also provides a control chip, which includes the control circuit of any embodiment of the present invention.

[0012] Thirdly, this application also provides an electronic device, the electronic device comprising:

[0013] Controller;

[0014] Storage;

[0015] The control chip, the controller, the storage, and the system bus are connected.

[0016] This application provides a control circuit, chip, and device. The control circuit includes a first inverter, the input of which is connected to the signal control terminal of the controller of an electronic device; a second inverter, the input of which is connected to the output of the first inverter; a first logic unit, the first control terminal of which is connected to the output of the first inverter, the second control terminal of which is connected to the output of the second inverter, the first terminal of which is connected to the signal receiving terminal of the controller of the electronic device, and the second terminal of which is connected to an I / O terminal; and a second logic unit... The first control terminal of the second logic unit is connected to the output terminal of the second inverter, and the second control terminal of the second logic unit is connected to the output terminal of the first inverter. The first terminal of the second logic unit is connected to the signal transmission terminal of the controller of the electronic device, and the second terminal of the second logic unit is connected to the I / O terminal. When the signal control terminal of the controller of the electronic device outputs a first-level signal, the first logic unit is turned on and the second logic unit is turned off; when the signal control terminal of the controller of the electronic device outputs a second-level signal, the second logic unit is turned on and the first logic unit is turned off, thereby converting two-wire transmission into single-wire transmission. In this application, when the signal control terminal of the controller of the electronic device outputs a first-level signal, the first logic unit is turned on and the second logic unit is turned off, thereby enabling the device to receive communication signals; when the signal control terminal of the controller of the electronic device outputs a second-level signal, the second logic unit is turned on and the first logic unit is turned off, thereby enabling the device to transmit communication signals, thereby converting two-wire transmission into single-wire transmission, simplifying the spatial structure of the device, reducing the space occupied, and making the device lighter and smaller. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A circuit diagram of the control circuit provided for an embodiment of this application;

[0019] Figure 2 Another circuit diagram of the control circuit provided for an embodiment of this application;

[0020] Figure 3 Another circuit diagram of the control circuit provided for an embodiment of this application;

[0021] Figure 4 Another circuit diagram of the control circuit provided for an embodiment of this application;

[0022] Figure 5 Another circuit diagram of the control circuit provided for an embodiment of this application;

[0023] Figure 6 Another circuit diagram of the control circuit provided for an embodiment of this application;

[0024] Figure 7 A schematic block diagram of a control chip provided in an embodiment of this application;

[0025] Figure 8 This is a schematic block diagram of the structure of an electronic device provided in an embodiment of this application.

[0026] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content and operations / steps, nor does it necessarily have to be performed in the order described. For example, some operations / steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.

[0029] This application provides a control circuit, chip, and device. The control circuit includes a first inverter, the input of which is connected to the signal control terminal of a controller of an electronic device; a second inverter, the input of which is connected to the output of the first inverter; a first logic unit, the first control terminal of which is connected to the output of the first inverter, the second control terminal of which is connected to the output of the second inverter, the first terminal of which is connected to the signal receiving terminal of the controller of the electronic device, and the second terminal of which is connected to an I / O terminal; and a second logic unit, the first control terminal of which is connected to the output of the second inverter, the second control terminal of which is connected to the output of the first inverter, the first terminal of which is connected to the signal transmitting terminal of the controller of the electronic device, and the second terminal of which is connected to an I / O terminal. When the signal control terminal of the controller of the electronic device outputs a first-level signal, the first logic unit is turned on and the second logic unit is turned off; when the signal control terminal of the controller of the electronic device outputs a second-level signal, the second logic unit is turned on and the first logic unit is turned off, thereby converting two-wire transmission into single-wire transmission.

[0030] This control circuit can be applied to electronic devices, such as AR glasses, VR glasses, smartwatches, and smart bracelets.

[0031] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0032] Please refer to Figure 1 , Figure 1 A circuit diagram of a control circuit provided for an embodiment of this application.

[0033] like Figure 1 As shown, this control circuit is applied to an electronic device. The control circuit 100 includes a first inverter 110, a second inverter 120, a first logic unit 130, and a second logic unit 140. The input terminal of the first inverter 110 is connected to the signal control terminal of the controller of the electronic device 200, and the input terminal of the second inverter 120 is connected to the output terminal of the first inverter 110.

[0034] In some embodiments, the first control terminal of the first logic unit 130 is connected to the output terminal of the first inverter 110, the second control terminal of the first logic unit 130 is connected to the output terminal of the second inverter 120, the first terminal of the first logic unit 130 is connected to the signal receiving terminal of the controller of the electronic device 200, and the second terminal of the first logic unit 130 is connected to the IO terminal 150.

[0035] In some embodiments, the first control terminal of the second logic unit 140 is connected to the output terminal of the second inverter 120, the second control terminal of the second logic unit 140 is connected to the output terminal of the first inverter 110, the first terminal of the second logic unit 140 is connected to the signal transmission terminal of the controller of the electronic device 200, and the second terminal of the second logic unit 140 is connected to the IO terminal 150.

[0036] It should be noted that the electronic device includes, but is not limited to, AR glasses, VR glasses, smartwatches, and smart bracelets, and the external device includes, but is not limited to, mobile phones, tablets, laptops, desktop computers, and chargers.

[0037] In some embodiments, when the signal control terminal of the controller of the electronic device 200 outputs a first level signal, the first logic unit 130 is turned on and the second logic unit 140 is turned off; when the signal control terminal of the controller of the electronic device 200 outputs a second level signal, the second logic unit 140 is turned on and the first logic unit 130 is turned off, so as to realize the conversion of two-wire transmission to single-wire transmission.

[0038] When the signal control terminal of the electronic device's controller outputs a first-level signal, the first logic unit is turned on and the second logic unit is turned off, thereby enabling the device to receive communication signals. When the signal control terminal of the electronic device's controller outputs a second-level signal, the second logic unit is turned on and the first logic unit is turned off, thereby enabling the device to send communication signals. This allows for the sending and receiving of communication signals using a single IO terminal, converting two-wire signal transmission into single-wire signal transmission. In other words, a single communication line is sufficient to complete both the sending and receiving of communication signals, effectively reducing the required device space and facilitating the overall lightweighting and miniaturization of the device.

[0039] It should be noted that the first level signal is an electrical signal with a voltage value greater than a preset voltage value, and the second level signal is an electrical signal with a voltage value less than the preset voltage value. It can be understood that when the controller's signal control terminal outputs an electrical signal greater than the preset voltage value, it outputs the first level signal; when the controller's signal control terminal outputs an electrical signal less than the preset voltage value, it outputs the second level signal. In this embodiment, all electrical signals with voltage values ​​greater than the preset voltage value are first level signals, and all electrical signals with voltage values ​​less than the preset voltage value are first level signals. The preset voltage value can be set according to actual conditions, and this embodiment does not impose a specific limitation on it. For example, the preset voltage value can be set to 1.5V.

[0040] For example, such as Figure 1 As shown, when the signal control terminal of the controller of the electronic device 200 outputs a first-level signal, the first inverter 110 outputs a second-level signal, the second inverter 120 outputs a first-level signal, the first control terminal of the first logic unit 130 inputs the second-level signal, the second control terminal of the first logic unit 130 inputs the first-level signal, the first logic unit 130 converts the second-level signal input from the first control terminal into a first-level signal, and performs AND processing on the first-level signal and the first-level signal input from the second control terminal to obtain a first-level signal. When the electrical signal output by the first logic unit 130 is a first-level signal, the first logic unit 130 is turned on; and the controller of the electronic device 200... When the signal control terminal outputs a first-level signal, the first control terminal of the second logic unit 140 inputs a first-level signal, and the second control terminal of the second logic unit 140 inputs a second-level signal. The second logic unit 140 converts the first-level signal input from the first control terminal into a second-level signal, and performs AND processing on the second-level signal input from the second control terminal to obtain a second-level signal. When the electrical signal output by the second logic unit 140 is a second-level signal, the second logic unit 140 is disconnected, that is, the first logic unit 130 is turned on and the second logic unit 140 is disconnected, so that the IO terminal 150 is connected to the signal receiving terminal of the electronic device 200, so that the electronic device can receive signals.

[0041] It should be noted that when the first logic unit and / or the second logic unit outputs a first level signal, the first logic unit and / or the second logic unit are turned on; when the first logic unit and / or the second logic unit outputs a second level signal, the first logic unit and / or the second logic unit are turned off.

[0042] For example, such as Figure 1As shown, when the signal control terminal of the controller of the electronic device 200 outputs a second-level signal, the first inverter 110 outputs a first-level signal, the second inverter 120 outputs a second-level signal, the first control terminal of the first logic unit 130 inputs the first-level signal, the second control terminal of the first logic unit 130 inputs the second-level signal, the first logic unit 130 converts the first-level signal input from the first control terminal into a second-level signal, and performs AND processing on the second-level signal input from the second control terminal to obtain a second-level signal. When the electrical signal output by the first logic unit 130 is a second-level signal, the first logic unit 130 is disconnected; and the controller of the electronic device 200... When the signal control terminal outputs a second-level signal, the first control terminal of the second logic unit 140 inputs a second-level signal, and the second control terminal of the second logic unit 140 inputs a first-level signal. The second logic unit 140 converts the second-level signal input from the first control terminal into a first-level signal, and performs AND processing on the first-level signal input from the second control terminal to obtain a first-level signal. When the electrical signal output by the second logic unit 140 is a first-level signal, the second logic unit 140 is turned on, that is, the first logic unit 130 is turned off, and the second logic unit 140 is turned on, so that the IO terminal 150 is connected to the signal transmission terminal of the electronic device 200, so that the electronic device can transmit signals.

[0043] It is understandable that by outputting a first-level signal or a second-level signal through the signal control terminal of the controller of the electronic device 200, the IO terminal is connected or disconnected from the transmitting terminal of the controller of the electronic device 200, and the IO terminal is connected or disconnected from the receiving terminal of the controller of the electronic device 200. This enables the same IO terminal to transmit and receive communication signals, thereby realizing the transformation of two-wire transmission into single-wire transmission.

[0044] In some embodiments, such as Figure 2 As shown, the first logic unit 130 includes a first NOT gate 131 and a first AND gate 132. The input terminal of the first NOT gate 131 is connected to the output terminal of the first inverter 110, the output terminal of the first NOT gate 131 is connected to the first input terminal of the first AND gate 132, and the second input terminal of the first AND gate 132 is connected to the output terminal of the second inverter 120.

[0045] In some embodiments, such as Figure 2 As shown, the second logic unit 140 includes a second NOT gate 141 and a second AND gate 142. The input terminal of the second NOT gate 141 is connected to the output terminal of the second inverter 120, the output terminal of the second NOT gate 141 is connected to the first input terminal of the second AND gate 142, and the second input terminal of the second AND gate 142 is connected to the output terminal of the first inverter 110.

[0046] For example, such as Figure 2 As shown, when the signal control terminal of the controller of the electronic device 200 outputs a first-level signal, the first inverter 110 outputs a second-level signal, the second inverter 120 outputs a first-level signal, the input terminal of the first NOT gate 131 receives the second-level signal output from the output terminal of the first inverter 110, and the output terminal of the first NOT gate 131 outputs a first-level signal; the first input terminal of the first AND gate 132 receives the first-level signal output from the output terminal of the second inverter 120, and the second input terminal of the first AND gate 132 receives the first-level signal. The first AND gate 132 performs AND processing on the first-level signal input from the first input terminal and the first-level signal input from the second input terminal, so that the first AND gate 132 outputs a first-level signal. When the first AND gate 132 outputs a first-level signal, the first logic unit 130 is turned on, so that the IO terminal is connected to the receiving terminal of the controller of the electronic device 200.

[0047] The second NOT gate 141 receives a first-level signal and outputs a second-level signal. The second AND gate 142 receives the second-level signal at both its first and second inputs. The second AND gate 142 performs an AND operation on the second-level signals at both inputs, causing it to output the second-level signal. When the second AND gate 142 outputs the second-level signal, the second logic unit 140 is disconnected, thus disconnecting the I / O terminal from the transmit terminal of the controller of the electronic device 200. The electronic device then receives data through the I / O terminal.

[0048] For example, such as Figure 2 As shown, when the signal control terminal of the controller of the electronic device 200 outputs a second-level signal, the first inverter 110 outputs a first-level signal, the second inverter 120 outputs a second-level signal, the first NOT gate 131 inputs the first-level signal and outputs the second-level signal; the first input terminal of the first AND gate 132 inputs the second-level signal, and the second input terminal of the first AND gate 132 inputs the second-level signal. The first AND gate 132 performs AND processing on the second-level signal input at the first input terminal and the second-level signal input at the second input terminal, so that the first AND gate 132 outputs the second-level signal. When the first AND gate 132 outputs the second-level signal, the first logic unit 130 is disconnected, so that the IO terminal is disconnected from the receiving terminal of the controller of the electronic device 200.

[0049] The second NOT gate 141 receives a second-level signal and outputs a first-level signal. The first input terminal of the second AND gate 142 receives the first-level signal, and the second input terminal of the second AND gate 142 receives the first-level signal. The second AND gate 142 performs an AND operation on the first-level signal received at both input terminals, causing it to output the first-level signal. When the second AND gate 142 outputs the first-level signal, the second logic unit 140 is turned on, connecting the I / O terminal to the transmit terminal of the controller of the electronic device 200. The electronic device then transmits data through the I / O terminal.

[0050] In some embodiments, such as Figure 3 As shown, the control circuit 100 also includes a level control unit 160. The first end of the level control unit 160 is connected to the IO terminal 150, and the second end of the level control unit 160 is connected to a common terminal, which is the connection point of the second terminal of the first logic unit 130 and the second terminal of the second logic unit 140.

[0051] In some embodiments, such as Figure 3 As shown, the level control unit 160 includes a first NMOS transistor 161 and a second NMOS transistor 162. The gates of the first NMOS transistor 161 and the second NMOS transistor 162 are both connected to a preset power supply 170. The drain of the first NMOS transistor 161 is connected to the IO terminal 150. The source of the first NMOS transistor 161 and the source of the second NMOS transistor 162 are connected. The drain of the second NMOS transistor 162 is connected to a common terminal, which is the connection point of the second terminal of the first logic gate 130 and the second terminal of the second logic gate 140.

[0052] In some embodiments, when the signal control terminal of the controller of the electronic device 200 outputs a first-level signal, the electronic device enters the communication signal receiving mode. When a high-level signal is input to the IO terminal, the voltage difference between the gate and source of the first NMOS transistor 161 and the second NMOS transistor 162 does not meet the conduction condition, so that the first NMOS transistor 161 and the second NMOS transistor 162 are in the off state. Since the signal receiving terminal of the controller of the electronic device 200 is connected to the pull-up voltage by default, the controller of the electronic device 200 receives the high-level signal.

[0053] In some embodiments, when the signal control terminal of the controller of the electronic device 200 outputs a first-level signal, the electronic device enters a communication signal receiving mode. The first NMOS transistor 161 has a built-in first diode, with its anode connected to the source and its cathode connected to the drain. The second NMOS transistor 162 has a built-in second diode, with its anode connected to the source and its cathode connected to the drain. When a low-level signal is input to the I / O terminal, the first diode conducts unidirectionally, ensuring that the voltage difference between the gate and source of the first NMOS transistor 161 and the second NMOS transistor 162 meets the conduction condition, thus turning on the first and second NMOS transistors. The low-level signal input to the I / O terminal is then transmitted to the signal receiving terminal of the controller, allowing the controller of the electronic device 200 to receive the low-level signal.

[0054] By controlling the on and off states of the first NMOS transistor 161 and the second NMOS transistor 162 of the level control unit 160, the controller of the electronic device 200 can receive a low-level signal or a high-level signal.

[0055] In some embodiments, such as Figure 3 As shown, when the signal control terminal of the controller of the electronic device 200 outputs a second-level signal, the electronic device enters the communication signal transmission mode. When the signal transmission terminal of the controller of the electronic device 200 outputs a high-level signal, the voltage difference between the gate and source of the first NMOS transistor 161 and the second NMOS transistor 162 does not meet the conduction condition, so that the first NMOS transistor 161 and the second NMOS transistor 162 are in the off state. Since the IO terminal is connected to the pull-up voltage by default, the IO terminal outputs a high-level signal, thereby enabling the electronic device to accurately send a high-level signal.

[0056] In some embodiments, such as Figure 3As shown, when the signal control terminal of the controller of the electronic device 200 outputs a second-level signal, the electronic device enters the communication signal transmission mode. The first NMOS transistor 161 has a built-in first diode, with its anode connected to the source and its cathode connected to the drain. The second NMOS transistor 162 has a built-in second diode, with its anode connected to the source and its cathode connected to the drain. When the signal transmission terminal of the controller of the electronic device 200 outputs a low-level signal, the first diode conducts unidirectionally, ensuring that the voltage difference between the gate and source of the first NMOS transistor 161 and the second NMOS transistor 162 meets the conduction condition, thus turning on the first and second NMOS transistors 161 and 162. The low-level signal output from the signal transmission terminal is transmitted to the IO terminal via the first and second NMOS transistors 161 and 162, and then transmitted through the IO terminal, enabling the electronic device to accurately transmit low-level signals.

[0057] In some embodiments, such as Figure 4 As shown, the control circuit also includes a charging interface 180 and a charging communication switching module 190. The charging interface 180 includes a first pin 181 and a second pin 182. The charging interface 180 is used to connect to an external device, which is capable of communication and / or power supply. The charging communication switching module 190 includes a charging communication terminal, a charging terminal, and a communication terminal. The charging communication terminal is connected to the first pin 181, and the charging terminal is used to supply power or charge the electronic device. The communication terminal is connected to the level control unit 160.

[0058] In some embodiments, when the voltage at the charging communication terminal is greater than or equal to a first preset voltage, the charging communication terminal and the communication terminal are controlled to conduct, so that the electronic device can communicate with an external device through the first pin. When the voltage at the charging communication terminal is greater than or equal to a second preset voltage, the charging communication terminal and the charging terminal are controlled to conduct, so that the external device can supply power to the electronic device through the first pin, wherein the second preset voltage is greater than the first preset voltage. The first and second preset voltages can be set according to actual conditions, and this embodiment of the invention does not specifically limit them. For example, the first preset voltage can be set to 1.5V, and the second preset voltage can be set to 5V.

[0059] In some embodiments, such as Figure 5As shown, the charging communication switching module 190 includes a charging unit 191, which includes a first PMOS transistor 1911. The gate of the first PMOS transistor 1911 is connected to a preset power supply, the source of the first PMOS transistor 1911 is connected to a first pin 181, and the source and drain of the first PMOS transistor 1911 are connected to a charging terminal. The voltage of the preset power supply is greater than a first preset voltage and less than a second preset voltage.

[0060] For example, such as Figure 2 As shown, when the first pin 181 is connected to the first preset voltage, the first PMOS transistor 1911 is turned off, and when the first pin 181 is connected to the second preset voltage, the first PMOS transistor 1911 is turned on, so that the external device can supply power to the electronic device 200 through the first pin 181.

[0061] In some embodiments, such as Figure 5 As shown, the charging communication switching module 190 includes a communication unit 192, which includes a third NMOS transistor 1921 and a second PMOS transistor 1922. The gate of the third NMOS transistor 1921 is connected to a preset power supply 170, the source of the third NMOS transistor 1921 is connected to the charging communication terminal, the drain of the third NMOS transistor 1921 is connected to the gate of the second PMOS transistor 1922 and connected to the preset power supply, the source of the second PMOS transistor is connected to the preset power supply, and the drain of the second PMOS transistor 1922 is connected to the level control unit 160.

[0062] In some embodiments, the control circuit further includes resistors R1 and R2. One end of resistor R1 is connected to the source of the third NMOS transistor 1921, and the other end is grounded. One end of resistor R2 is connected to the gate of the second PMOS transistor 1922, and the other end is connected to a preset power supply.

[0063] For example, if the voltage connected to the first pin 181 is less than a preset second voltage, the first PMOS transistor 1911 is turned off, i.e., the charging link is disconnected. The voltage connected to the first pin 181 is divided by resistor R1 to turn on the third NMOS transistor 1921. Resistor R2 divides the voltage input to the gate of the second PMOS transistor 1922 to turn on the second PMOS transistor, so that the gates of the first and second NMOS transistors in the level control unit 160 are connected to a preset power supply. This facilitates the transmission of high and low level signals during communication transmission.

[0064] In some embodiments, such as Figure 6 As shown, the control circuit also includes a protection circuit 210, which includes a first diode; the positive terminal of the first diode is connected to the first pin 181, and the negative terminal is connected to the charging communication terminal. This first diode effectively prevents backflow of current.

[0065] It should be noted that a second diode can also be placed between the source of the third NMOS transistor 1921 and the charging communication terminal. The positive terminal of the second diode is connected to the charging communication terminal, and the negative terminal is connected to the third NMOS transistor 1921, which can effectively prevent current backflow.

[0066] The control circuit provided in the above embodiment includes a first inverter, the input of which is connected to the signal control terminal of the controller of the electronic device; a second inverter, the input of which is connected to the output of the first inverter; a first logic unit, the first control terminal of which is connected to the output of the first inverter, the second control terminal of which is connected to the output of the second inverter, the first terminal of which is connected to the signal receiving terminal of the controller of the electronic device, and the second terminal of which is connected to the I / O terminal; and a second logic unit, the first control terminal of which is connected to the output of the second inverter, the second control terminal of which is connected to the output of the first inverter, the first terminal of which is connected to the signal transmitting terminal of the controller of the electronic device, and the second terminal of which is connected to the I / O terminal; wherein, when the signal control terminal of the controller of the electronic device outputs a first level signal, the first logic unit is turned on and the second logic unit is turned off; when the signal control terminal of the controller of the electronic device outputs a second level signal, the second logic unit is turned on and the first logic unit is turned off, so as to realize the conversion of two-wire transmission to single-wire transmission. In this application, when the signal control terminal of the controller of the electronic device outputs a first-level signal, the first logic unit is turned on and the second logic unit is turned off, thereby enabling the device to receive communication signals; when the signal control terminal of the controller of the electronic device outputs a second-level signal, the second logic unit is turned on and the first logic unit is turned off, thereby enabling the device to send communication signals, so as to realize the conversion of two-line transmission into single-line transmission, simplify the spatial structure of the device, reduce the space occupied, and make the device lighter and smaller.

[0067] Please see Figure 7 , Figure 7 This is a schematic block diagram of a control chip provided in an embodiment of this application.

[0068] As shown in the figure, the control chip 300 includes the control circuit 310 of any embodiment of this application. The control chip is used to power or communicate with electronic devices.

[0069] It should be noted that those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the control chip described above can be referred to the corresponding process in the aforementioned control circuit embodiments, and will not be repeated here.

[0070] Please see Figure 8 , Figure 8 This is a schematic block diagram of the structure of an electronic device provided in an embodiment of this application.

[0071] like Figure 8 As shown, the electronic device 400 includes:

[0072] Controller 410;

[0073] Storage 420;

[0074] In any embodiment of this application, the control chip 430 is connected to the controller 410, the memory 420, and the control chip 430 via a system bus 440.

[0075] It should be noted that the electronic device includes, but is not limited to, AR glasses, VR glasses, smartwatches, and smart bracelets.

[0076] The controller provides computing and control capabilities to support the operation of the entire electronic device.

[0077] Those skilled in the art will understand that Figure 8 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the electronic device to which the present application is applied. The specific electronic device may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0078] It should be noted that those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the above-mentioned electronic device can be referred to the corresponding process in the aforementioned control circuit embodiment, and will not be repeated here.

[0079] It should be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of the application. As used in this specification, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms.

[0080] It should also be understood that the term "and / or" as used in this specification refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations. It should be noted that, herein, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0081] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments. The above descriptions are merely specific implementations of this application, but the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A control circuit, characterized in that, The circuit, applied to an electronic device, includes: The first inverter, the input terminal of which is connected to the signal control terminal of the controller of the electronic device; The second inverter has its input terminal connected to the output terminal of the first inverter; A first logic unit, wherein a first control terminal of the first logic unit is connected to the output terminal of the first inverter, a second control terminal of the first logic unit is connected to the output terminal of the second inverter, a first terminal of the first logic unit is connected to the signal receiving terminal of the controller of the electronic device, and a second terminal of the first logic unit is connected to the I / O terminal. The second logic unit has a first control terminal connected to the output terminal of the second inverter, a second control terminal connected to the output terminal of the first inverter, a first terminal connected to the signal transmission terminal of the controller of the electronic device, and a second terminal connected to the I / O terminal. When the signal control terminal of the controller of the electronic device outputs a first level signal, the first logic unit is turned on and the second logic unit is turned off; when the signal control terminal of the controller of the electronic device outputs a second level signal, the second logic unit is turned on and the first logic unit is turned off, so as to realize the conversion of two-line transmission to single-line transmission. The first logic unit includes a first NOT gate and a first AND gate. The input of the first NOT gate is connected to the output of the first inverter. The output of the first NOT gate is connected to the first input of the first AND gate. The second input of the first AND gate is connected to the output of the second inverter. The second logic unit includes a second NOT gate and a second AND gate. The input of the second NOT gate is connected to the output of the second inverter. The output of the second NOT gate is connected to the first input of the second AND gate. The second input of the second AND gate is connected to the output of the first inverter.

2. The control circuit as described in claim 1, characterized in that, The control circuit further includes a level control unit, the first end of which is connected to the IO terminal, and the second end of which is connected to a common terminal, which is the connection point between the second terminal of the first logic unit and the second terminal of the second logic unit.

3. The control circuit as described in claim 2, characterized in that, The level control unit includes a first NMOS transistor and a second NMOS transistor. The gates of the first NMOS transistor and the second NMOS transistor are both connected to a preset power supply. The drain of the first NMOS transistor is connected to an I / O terminal. The sources of the first NMOS transistor and the second NMOS transistor are connected. The drain of the second NMOS transistor is connected to a common terminal.

4. The control circuit as described in claim 2, characterized in that, The control circuit also includes a charging interface and a charging communication switching module. The charging interface includes a first pin and a second pin. The charging interface is used to connect to an external device, which is capable of communication and / or power supply. The charging communication switching module includes a charging communication terminal, a charging terminal, and a communication terminal. The charging communication terminal is connected to the first pin, the charging terminal is used to supply power or charge the electronic device, and the communication terminal is connected to the level control unit. When the voltage at the charging communication terminal is greater than or equal to a first preset voltage, the charging communication terminal and the communication terminal are controlled to be connected so that the electronic device can communicate with an external device through the first pin. When the voltage at the charging communication terminal is greater than or equal to a second preset voltage, the charging communication terminal and the charging terminal are controlled to be connected so that the external device can supply power to the electronic device through the first pin. The second preset voltage is greater than the first preset voltage.

5. The control circuit as described in claim 4, characterized in that, The charging communication switching module includes a charging unit, which includes a first PMOS transistor. The gate of the first PMOS transistor is connected to a preset power supply, the source of the first PMOS transistor is connected to the first pin, and the source and drain of the first PMOS transistor are connected to the charging terminal. The voltage of the preset power supply is greater than the first preset voltage and less than the second preset voltage.

6. The control circuit as described in claim 4, characterized in that, The charging communication switching module includes a communication unit, which includes a third NMOS transistor and a second PMOS transistor. The gate of the third NMOS transistor is connected to a preset power supply, the source of the third NMOS transistor is connected to the charging communication terminal, the drain of the third NMOS transistor is connected to the gate of the second PMOS transistor and connected to the preset power supply, the source of the second PMOS transistor is connected to the preset power supply, and the drain of the second PMOS transistor is connected to a level control unit.

7. The control circuit as described in claim 4, characterized in that, The control circuit also includes a protection circuit, which includes a first diode; The positive terminal of the first diode is connected to the first pin, and the negative terminal is connected to the charging communication terminal.

8. A control chip, characterized in that, include: The control circuit as described in any one of claims 1-7.

9. An electronic device, characterized in that, include: Controller; Storage; The control chip as described in claim 8, wherein the controller, the memory, and the control chip are connected via a system bus.

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