Display panel and display device
By designing the electrical signal connection method of touch area and binding area in the display panel, the complex structure and inflexible problems in the existing technology are solved, and a simpler and more flexible circuit connection is achieved, meeting the needs of emerging products.
Patent Information
- Application Number
- CN202510104205.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-22
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2045-01-22
AI Technical Summary
The existing touch screens have complexity and inflexibility in structure and circuit connections, making it difficult to meet emerging product needs such as flexible folding and narrow bezels.
A display panel is designed, including a touch area and a binding area. The touch area is composed of a driving circuit layer, a light emitting structure layer and a touch structure layer. The binding area connects the driving chip area and the touch area through a series of electrical signal line groups and connecting line groups to realize the effective transmission and binding of electrical signals.
It realizes structural simplification of the display panel and flexibility in circuit connection, meets product requirements such as flexible folding and narrow frames, and reduces production complexity and cost.
Smart Images

Figure CN119937830A_ABST
Abstract
Description
Technical Field
[0001] This article relates to the field of display technology, and in particular to a display panel and a display device. Background Art
[0002] With the rapid development of display technology, touch screens have gradually become common in people's lives. According to the composition structure, touch screens can be divided into add-on mode, on-cell, and in-cell types. According to the working principle, touch screens can be divided into capacitive, resistive, infrared, and surface acoustic wave types. The capacitive on-cell type forms a touch structure on the light-emitting side of the display screen. Due to its simple structure, thin thickness, and high transmittance, it has gradually become the mainstream technology. Summary of the invention
[0003] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.
[0004] On the one hand, the present disclosure provides a display panel, comprising a touch area and a binding area arranged on one side of the touch area: the touch area comprises a driving circuit layer arranged on a substrate, a light emitting structure layer arranged on a side of the driving circuit layer away from the substrate, and a touch structure layer arranged on a side of the light emitting structure layer away from the substrate; the binding area comprises a first flat area, a bending area, and a second flat area arranged in sequence along a direction away from the touch area, the second flat area comprises a driving chip area and a binding pin area, and the driving chip area is configured to be provided with a touch and display driving circuit; The binding area is provided with at least one second power signal line, at least one touch signal line group and at least one touch connection line group, one end of the at least one second power signal line is connected to the driving circuit layer of the touch area, the other end of the at least one second power signal line is connected to the binding pin area, one end of the at least one touch signal line group is connected to the touch structure layer of the touch area, the other end of the at least one touch signal line group is connected to the binding pin area, one end of the at least one touch connection line group is connected to the touch signal line group, and the other end of the at least one touch connection line group is connected to the driving chip area.
[0005] In an exemplary embodiment, the at least one touch connection line group is located in the second flat area.
[0006] In an exemplary embodiment, the binding area also includes an anti-static area located in the second flat area, the anti-static area is located between the driving chip area and the bending area, the anti-static area is configured to set up an anti-static protection unit, the anti-static area is connected to the driving chip area through a touch transmission line group, one end of the at least one touch connection line group is connected to the at least one touch signal line group, and the other end of the at least one touch connection line group is connected to the anti-static area.
[0007] In an exemplary embodiment, the binding area is provided with at least one constant voltage signal line group, one end of the at least one constant voltage signal line group is connected to the driving circuit layer, the other end of the at least one constant voltage signal line group is connected to the binding pin area, and the constant voltage signal line group is connected to the anti-static area through a voltage connection line group; the constant voltage signal line group includes at least one of a gate high voltage line, a gate low voltage line and an initial voltage line.
[0008] In an exemplary embodiment, the binding area is provided with at least one data signal line group, one end of the at least one data signal line group is connected to the driving circuit layer of the touch area, the other end of the at least one data signal line group is connected to the anti-static area, the anti-static area is connected to the driving chip area through a data transmission line group, and the at least one data transmission line group and the at least one touch connection line group are located in the same film layer.
[0009] In an exemplary embodiment, the driving circuit layer includes a first active layer arranged on the substrate, a first gate layer arranged on a side of the first active layer away from the substrate, a second gate layer arranged on a side of the first gate layer away from the substrate, a first source and drain layer arranged on a side of the second gate layer away from the substrate, and a second source and drain layer arranged on a side of the first source and drain layer away from the substrate, and the at least one data transmission line group and the at least one touch connection line group are both located in the same film layer as the first gate layer or the second gate layer.
[0010] In an exemplary embodiment, the orthographic projection of the at least one touch connection line group on the substrate overlaps at least partially with the orthographic projection of the at least one second power signal line on the substrate; or, the orthographic projection of the at least one touch connection line group on the substrate overlaps with the orthographic projection of the at least one second power signal line on the substrate.
[0011] In an exemplary embodiment, the at least one second power signal line includes a second power lead-out line located in the first flat area and the bending area, and a second power access line located in the second flat area, one end of the second power lead-out line is connected to the driving circuit layer, the other end of the second power lead-out line is connected to the second power access line, one end of the second power access line is connected to the second power lead-out line, and the other end of the second power access line is connected to the binding pin area, and the at least one touch connection line group is located on the side of the second power access line close to the substrate, or the at least one touch connection line group is located on the side of the second power access line away from the substrate.
[0012] In an exemplary embodiment, the driving circuit layer includes a first active layer disposed on the substrate, a first gate layer disposed on a side of the first active layer away from the substrate, a second gate layer disposed on a side of the first gate layer away from the substrate, a second active layer disposed on a side of the second gate layer away from the substrate, a third gate layer disposed on a side of the second active layer away from the substrate, a first source-drain electrode layer disposed on a side of the third gate layer away from the substrate, and a second source-drain electrode layer disposed on a side of the first source-drain electrode layer away from the substrate; the touch structure layer includes a first touch conductive layer disposed on a side of the light emitting structure layer away from the substrate, and a second touch conductive layer disposed on a side of the first touch conductive layer away from the substrate; the second power access line and at least one of the first source-drain electrode layer and the second source-drain electrode layer are located in the same film layer, and the at least one touch connection line group and the first gate layer are located in the same film layer; or, the second power access line and at least one of the first source-drain electrode layer and the second source-drain electrode layer are located in the same film layer, and the at least one touch connection line group and at least one of the first touch conductive layer and the second touch conductive layer are located in the same film layer.
[0013] In an exemplary embodiment, the at least one touch signal line group includes a touch lead line group located in the first flat area and the bending area, and a touch access line group located in the second flat area, one end of the touch lead line group is connected to the touch circuit layer, and the other end of the touch lead line group is connected to the touch access line group, one end of the touch access line group is connected to the touch lead line group, and the other end of the touch access line group is connected to the binding pin area, and the orthographic projection of the touch access line group on the substrate overlaps at least partially with the orthographic projection of the at least one second power signal line on the substrate.
[0014] In an exemplary embodiment, the second power lead-out line includes two sub-line groups arranged at an interval, one end of the two sub-line groups are connected to the driving circuit layer, the other ends of the two sub-line groups are connected to the same second power access line, and the touch lead-out line group is located between the two sub-line groups.
[0015] In an exemplary embodiment, the touch lead-out group is located on a side of the second power lead close to a center line of the binding area.
[0016] In an exemplary embodiment, the binding area is provided with at least one gate drive signal line group, one end of the at least one gate drive signal line group is connected to the driving circuit layer, and the other end of the at least one gate drive signal line group is connected to the driving chip area, the gate drive signal line group includes a gate drive lead line group located in the first flat area and the bending area, and a gate drive access line group and a gate drive connection line group located in the second flat area, one end of the gate drive lead line group is connected to the driving circuit layer, the other end of the gate drive lead line group is connected to the gate drive access line group, the gate drive access line group is connected to the gate drive connection line group, the gate drive connection line group is connected to the driving chip area, the gate drive lead line group and the gate drive access line group are both located on the side of the second power signal line away from the center line of the binding area, and the orthographic projection of the gate drive connection line group on the substrate overlaps at least partially with the orthographic projection of the second power signal line on the substrate.
[0017] In an exemplary embodiment, the binding area also includes an anti-static area located in the second flat area, the anti-static area is located between the driving chip area and the bending area, the binding area is provided with at least one data signal line group, the data signal line group is located on the side of the second power signal line close to the center line of the binding area, and the data signal line group is respectively connected to the driving circuit layer and the anti-static area.
[0018] In an exemplary embodiment, the binding area is provided with at least one first power signal line, the first power signal line is located on the side of the second power signal line close to the center line of the binding area, and the first power signal line is respectively connected to the driving circuit layer and the binding pin area.
[0019] On the other hand, the present disclosure further provides a display device, comprising the aforementioned display panel.
[0020] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by implementing the present application. Other advantages of the present application can be realized and obtained by the schemes described in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The accompanying drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.
[0022] Figure 1 A schematic plan view of a display panel according to an exemplary embodiment of the present disclosure; Figure 2 A schematic plan view of a binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 3 A schematic cross-sectional view of a touch control area of a display panel according to an exemplary embodiment of the present disclosure; Figure 4 A schematic plan view of a binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 5 A schematic plan view of a first power signal line, a second power signal line, and a constant voltage signal line group in a binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 6 A schematic plan view of a touch signal line group in a binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 7 A schematic plan view of a data signal line group and a gate drive signal line group in a binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 8a It is a schematic plan view of another binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 8b It is a plan view of another touch signal line group in the binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 9a It is a schematic plan view of another binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 9b It is a plan view of another touch signal line group in the binding area of a display panel according to an exemplary embodiment of the present disclosure; Fig.9c It is a plan view of another exemplary embodiment of the present disclosure showing a touch access line group in a touch signal line group of a binding area of a display panel without displaying a touch access line group; Fig.10 The present invention is a circuit diagram of an anti-static protection unit of a display panel according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION
[0023] The present application describes multiple embodiments, but the description is exemplary rather than restrictive, and it is obvious to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present application. Although many possible feature combinations are shown in the drawings and discussed in the specific embodiments, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.
[0024] The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in the present application may also be combined with any conventional features or elements to form a unique invention scheme. Any features or elements of any embodiment may also be combined with features or elements from other invention schemes to form another unique invention scheme. Therefore, it should be understood that any feature shown and / or discussed in the present application may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the attached claims and their equivalents, the embodiments are not subject to other restrictions. In addition, various modifications and changes may be made within the scope of protection of the attached claims.
[0025] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps of the specific order described. As will be understood by those of ordinary skill in the art, other sequences of steps are also possible. Therefore, the specific sequence of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and / or process should not be limited to the steps of performing them in the order written, and those skilled in the art can easily understand that these sequences can be changed and still remain within the spirit and scope of the embodiments of the present application.
[0026] The present disclosure provides a display panel, comprising a touch area and a binding area arranged on one side of the touch area: the touch area comprises a driving circuit layer arranged on a substrate, a light emitting structure layer arranged on a side of the driving circuit layer away from the substrate, and a touch structure layer arranged on a side of the light emitting structure layer away from the substrate; the binding area comprises a first flat area, a bending area, and a second flat area arranged in sequence along a direction away from the touch area, the second flat area comprises a driving chip area and a binding pin area, and the driving chip area is configured to be provided with a touch and display driving circuit; The binding area is provided with at least one second power signal line, at least one touch signal line group and at least one touch connection line group, one end of the at least one second power signal line is connected to the driving circuit layer of the touch area, the other end of the at least one second power signal line is connected to the binding pin area, one end of the at least one touch signal line group is connected to the touch structure layer of the touch area, the other end of the at least one touch signal line group is connected to the binding pin area, one end of the at least one touch connection line group is connected to the touch signal line group, and the other end of the at least one touch connection line group is connected to the driving chip area.
[0027] The display panel of the exemplary embodiment of the present disclosure includes a touch area and a binding area arranged on one side of the touch area, the touch area includes a driving circuit layer arranged on a substrate, a light emitting structure layer arranged on a side of the driving circuit layer away from the substrate, a packaging structure layer arranged on a side of the light emitting structure layer away from the substrate, and a touch structure layer arranged on a side of the packaging structure layer away from the substrate. The light emitting structure layer may include a light emitting device, and the light emitting device may be a liquid crystal display (LCD) device, or an organic light emitting diode (OLED) device, or a plasma (PDP) display device, or an electrophoretic display (EPD) display device. In an exemplary embodiment, the light emitting device may be an OLED light emitting device. An OLED light emitting device is an active light emitting display device, which has the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, and extremely high response speed. With the continuous development of display technology, a flexible display device (Flexible Display) using OLED as a light emitting device and controlled by a thin film transistor (TFT) for signal control has become a mainstream product in the current display field. According to product requirements such as flexible folding and narrow frame.
[0028] The OLED-based touch structure adopts a flexible multi-layer on-cell (FMLOC) structure. The light-emitting structure layer and the touch structure layer are all integrated on the substrate. The touch structure layer is arranged on the packaging structure layer to form an on-cell structure. It has the advantages of being light, thin, and foldable, and can meet the product requirements of flexible folding, narrow bezels, etc.
[0029] Figure 1 FIG. 1 is a schematic plan view of a display panel according to an exemplary embodiment of the present disclosure. Figure 1As shown, the touch structure layer of the touch area of the display panel is arranged on the encapsulation structure layer to form an FMLOC structure. In a plane parallel to the display panel, the display panel includes an effective area (AA), a binding area located on one side of the effective area, and an edge area located on the other side of the effective area. The effective area can be the touch area of the display panel, or it can be the display area of the display panel. The touch area and the display area in the following description both refer to the effective area. In an exemplary embodiment, the touch area 100 includes at least a plurality of regularly arranged touch electrodes, the edge area 300 includes at least a plurality of touch leads, and the binding area 200 includes at least a binding pin area for connecting the touch leads to the binding area.
[0030] In an exemplary embodiment, the touch structure layer of the display panel may be a mutual capacitance structure. The touch area 100 may include a plurality of first touch units 110 and a plurality of second touch units 120, wherein the first touch units 110 have a line shape extending along a first direction D1, and the plurality of first touch units 110 are sequentially arranged along a second direction D2, and the second touch units 120 have a line shape extending along a second direction D2, and the plurality of second touch units 120 are sequentially arranged along the first direction D1. The first direction D1 intersects with the second direction D2, and for example, the first direction D1 and the second direction D2 are perpendicular to each other.
[0031] In an exemplary embodiment, each first touch unit 110 includes a plurality of first touch electrodes 111 and a first connection portion 112 arranged in sequence along a first direction D1, and the first touch electrodes 111 and the first connection portion 112 are alternately arranged and connected in sequence. Each second touch unit 120 includes a plurality of second touch electrodes 121 arranged in sequence along a second direction D2, and the plurality of second touch electrodes 121 are arranged at intervals, and adjacent second touch electrodes 121 are connected to each other through second connection portions 122. In an exemplary embodiment, the film layer where the second connection portion 122 is located is different from the film layer where the first touch electrodes 111 and the second touch electrodes 121 are located. The first touch electrodes 111 and the second touch electrodes 121 are alternately arranged in a third direction D3, and the third direction D3 intersects the first direction D1 and the second direction D2.
[0032] In an exemplary embodiment, a plurality of first touch electrodes 111, a plurality of second touch electrodes 121, and a plurality of first connecting portions 112 may be disposed in the same layer on the touch layer, and may be formed by the same patterning process, and the first touch electrodes 111 and the first connecting portions 112 may be interconnected integral structures. The second connecting portions 122 may be disposed in the bridge layer, and adjacent second touch electrodes 121 may be interconnected through vias, and an insulating layer may be disposed between the touch layer and the bridge layer. In some possible implementations, a plurality of first touch electrodes 111, a plurality of second touch electrodes 121, and a plurality of second connecting portions 122 may be disposed in the same layer on the touch layer, and the second touch electrodes 121 and the second connecting portions 122 may be interconnected integral structures, and the first connecting portions 112 may be disposed in the bridge layer, and adjacent first touch electrodes 111 may be interconnected through vias. In an exemplary embodiment, the first touch electrodes may be driving (Tx) electrodes, and the second touch electrodes may be sensing (Rx) electrodes. Alternatively, the first touch electrode may be a sensing (Rx) electrode, and the second touch electrode may be a driving (Tx) electrode.
[0033] In an exemplary embodiment, the first touch electrode 111 and the second touch electrode 121 may have a rhombus shape, for example, a regular rhombus, a horizontally long rhombus, or a vertically long rhombus. In some possible implementations, the first touch electrode 111 and the second touch electrode 121 may have any one or more of a triangle, a square, a trapezoid, a parallelogram, a pentagon, a hexagon, and other polygons, which is not limited in the present disclosure.
[0034] In an exemplary embodiment, the first touch electrode 111 and the second touch electrode 121 may be in the form of transparent conductive electrodes. In another exemplary embodiment, the first touch electrode 111 and the second touch electrode 121 may be in the form of a metal grid, the metal grid is formed by interweaving a plurality of metal wires, the metal grid includes a plurality of grid patterns, and the grid pattern is a polygon formed by a plurality of metal wires. The first touch electrode 111 and the second touch electrode 121 in the form of a metal grid have the advantages of low resistance, small thickness, and fast response speed.
[0035] Figure 2 The figure is a schematic plan view of a binding area of a display panel according to an exemplary embodiment of the present disclosure; wherein: Figure 2 The binding area shown can be Figure 1 In an exemplary embodiment, as shown in FIG. Figure 2As shown, the binding area 200 is located on one side of the touch area 100 in the second direction D2. Along the direction (the second direction D2) away from the touch area 100, the binding area 200 may include a first flat area 201, a bending area 202, and a second flat area arranged in sequence. The first flat area 201 is connected to the display area at one end of the second direction D2, and the first flat area 201 is connected to the bending area 202 at the other end of the second direction D2. The first flat area 201 may be provided with a touch signal line group and a data signal line group, the touch signal line group includes a plurality of touch signal lines, the data signal line group includes a plurality of data signal lines, and the first flat area 201 may be referred to as a first fan-out area. The bending area 202 is connected to the first flat area 201 at one end of the second direction D2, and the bending area 202 is connected to the second flat area at the other end of the second direction D2. The bending area 202 is configured to bend the second flat area to the back of the touch area 100. The second flat area may include a second fan-out area 2031, an antistatic area 2032, a driver chip area 2033 and a binding pin area 2034 arranged in sequence along the direction (second direction D2) away from the touch area 100. The second fan-out area 2031 may be provided with a touch signal line group and a data signal line group. The antistatic area 2032 may be provided with an antistatic protection unit, and the antistatic protection unit is configured to eliminate static electricity. The driver chip area 2033 may be provided with a touch and display driving circuit, and the touch and display driving circuit is configured to be connected to the data signal line group and the touch signal line group. The binding pin area 2034 may be provided with a plurality of pins (PINs), and the binding pin area 2034 is configured to be bound and connected to a flexible printed circuit board (Flexible Printed Circuit board, referred to as FPC).
[0036] Figure 3 1 is a cross-sectional schematic diagram of a touch control area of a display panel according to an exemplary embodiment of the present disclosure; wherein: Figure 3 The touch area shown can be Figure 1 In an exemplary embodiment, as shown in FIG. Figure 3 As shown, on a plane perpendicular to the display panel, the touch control area of the display panel may include a driving circuit layer 102 disposed on a substrate 101, a light emitting structure layer 103 disposed on a side of the driving circuit layer 102 away from the substrate 101, a packaging structure layer 104 disposed on a side of the light emitting structure layer 103 away from the substrate 101, and a touch control structure layer 105 disposed on a side of the packaging structure layer 104 away from the substrate 101. In some possible implementations, the display panel may include other film layers, such as spacers, etc., which are not limited in the present disclosure.
[0037] In an exemplary embodiment, the substrate 101 may be a flexible substrate or a rigid substrate. The flexible substrate may include a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer stacked together. The materials of the first flexible material layer and the second flexible material layer may be polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer soft film, etc. The materials of the first inorganic material layer and the second inorganic material layer may be silicon nitride (SiNx) or silicon oxide (SiOx), etc., to improve the water and oxygen resistance of the substrate. The material of the semiconductor layer may be amorphous silicon (a-Si).
[0038] In an exemplary embodiment, the driving circuit layer 102 may include a plurality of transistors and storage capacitors constituting a pixel driving circuit. In some possible implementations, the driving circuit layer 102 of each sub-pixel may include: a light shielding layer disposed on the substrate 101, a first insulating layer disposed on a side of the light shielding layer away from the substrate; a first active layer disposed on a side of the first insulating layer away from the substrate; a second insulating layer covering the first active layer; a first gate layer disposed on a side of the second insulating layer away from the substrate, the first gate layer at least including a first gate, and a positive projection of the first gate on the base overlaps with a portion of a positive projection of the first active layer on the base; a third insulating layer disposed on a side of the first gate layer away from the substrate; a second gate layer disposed on a side of the third insulating layer away from the substrate, the second gate layer at least including a second gate, and a positive projection of the second gate on the base overlaps with a portion of a positive projection of a second active layer formed subsequently on the base; a fourth insulating layer and a fifth insulating layer disposed on a side of the second gate layer away from the substrate; a second active layer disposed on a side of the fifth insulating layer away from the substrate; a sixth insulating layer disposed on a side of the second active layer away from the substrate; a third gate layer disposed on a side of the sixth insulating layer away from the substrate, the third gate layer at least including a third gate, and a positive projection of the third gate on the base overlaps with a positive projection of the second active layer on the base. a seventh insulating layer disposed on a side of the third gate layer away from the substrate; a first source-drain electrode layer disposed on a side of the seventh insulating layer away from the substrate, the first source-drain electrode layer at least comprising a first connecting electrode, a second connecting electrode, a third connecting electrode, a fourth connecting electrode and a fifth connecting electrode, the first connecting electrode being connected to a first end of the first active layer through a first via hole, the second connecting electrode being connected to a second end of the first active layer through a second via hole, the third connecting electrode being connected to the light shielding layer through a third via hole, the fourth connecting electrode being connected to a first end of the second active layer through a fourth via hole, and the fifth connecting electrode being connected to a second end of the second active layer through a fifth via hole; a first organic dielectric layer disposed on a side of the first source-drain electrode layer away from the substrate; a second source-drain electrode layer disposed on a side of the first organic dielectric layer away from the substrate, the second source-drain electrode layer at least comprising a sixth connecting electrode, a seventh connecting electrode and an eighth connecting electrode, the sixth connecting electrode being connected to the first connecting electrode through a sixth via hole, the seventh connecting electrode being connected to the second connecting electrode through a seventh via hole, and the eighth connecting electrode being connected to the fourth connecting electrode through an eighth via hole; a second organic dielectric layer disposed on a side of the second source-drain electrode layer away from the substrate. The first active layer and the first gate form a first transistor of the driving circuit layer 102 , and the second gate, the second active layer and the third gate form a second transistor of the driving circuit layer 102 . The second transistor has a dual-gate structure.
[0039] In an exemplary embodiment, the light emitting structure layer 103 may include: a first electrode, a pixel definition layer, an organic light emitting layer, and a second electrode. The first electrode is disposed on the side of the second organic medium layer away from the substrate, and is connected to the seventh connection electrode of the driving circuit layer 102 through a via hole provided in the second organic medium layer; the pixel definition layer is disposed on the first electrode and the second organic medium layer, and a pixel opening is disposed on the pixel definition layer, and the pixel opening exposes the first electrode; the organic light emitting layer is at least partially disposed in the pixel opening, and the organic light emitting layer is connected to the first electrode; the second electrode is disposed on the organic light emitting layer, and the second electrode is connected to the organic light emitting layer; the organic light emitting layer emits light of corresponding colors under the drive of the first electrode and the second electrode.
[0040] In an exemplary embodiment, the encapsulation structure layer 104 may include a first encapsulation structure layer, a second encapsulation structure layer and a third encapsulation structure layer stacked together. The first encapsulation structure layer and the third encapsulation structure layer may be made of inorganic materials, the second encapsulation structure layer may be made of organic materials, and the second encapsulation structure layer is arranged between the first encapsulation structure layer and the third encapsulation structure layer, which can ensure that external water vapor cannot enter the light-emitting structure layer 103.
[0041] In an exemplary embodiment, the touch structure layer 105 may include a first metal mesh (TMA) layer 106 disposed on a side of the encapsulation structure layer 104 away from the substrate, a touch insulation layer disposed on a side of the first metal mesh layer 106 away from the substrate 101, a second metal mesh (TMB) layer 107 disposed on a side of the touch insulation layer away from the substrate 101, and a protective layer disposed on a side of the second metal mesh layer 107 away from the substrate 101.
[0042] In an exemplary embodiment, the first metal grid layer 106 and the second metal grid layer 107 may be made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo), or alloy materials of the above metals, and the protective layer may be made of organic materials.
[0043] In an exemplary embodiment, the first metal mesh layer 106 can be called a bridging layer, the second metal mesh layer 107 can be called a touch layer, a plurality of first touch electrodes, second touch electrodes and a first connecting portion can be arranged in the same layer on the touch layer, the second connecting portion can be arranged in the bridging layer, and adjacent second touch electrodes are connected to each other through vias.
[0044] Figure 4 The figure is a schematic plan view of a binding area of a display panel according to an exemplary embodiment of the present disclosure; wherein: Figure 4 The binding area shown can be Figure 1 In an exemplary embodiment, as shown in FIG. Figure 4 As shown, on a plane parallel to the display panel, the binding area 200 includes a first flat area 201, a bending area 202, and a second flat area 203 sequentially arranged along a direction away from the touch area 100 (the second direction D2). The first flat area 201 can be provided with at least one touch signal line group and at least one data signal line group, and the first flat area 201 can be referred to as a first fan-out area. The bending area 202 is configured to bend the second flat area to the back of the touch area 100. The second flat area 203 includes an anti-static area 2032, a detection unit area 2035, a driver chip area 2033, and a binding pin area 2034 sequentially arranged along a direction away from the touch area 100 (the second direction D2). At least one touch signal line group of the first flat area 201 is connected to the driving chip area 2033, at least one data signal line group of the first flat area 201 is connected to the anti-static area 2032, the anti-static area 2032 is connected to the detection unit area 2035, the detection unit area 2035 is connected to the driving chip area 2033 through the data transmission line group 9, and the driving chip area 2033 is connected to the binding pin area 2034 through the driving chip lead line group 8.
[0045] In an exemplary embodiment, the anti-static area 2032, the detection unit area 2035, the driver chip area 2033 and the binding pin area 2034 can be mirrored relative to the center line O, and the anti-static area 2032, the detection unit area 2035, the driver chip area 2033 and the binding pin area 2034 are all adjacent to the center line O, and the center line O can be a center line extending along the first direction D1 and equally dividing the binding area 100.
[0046] In an exemplary embodiment, the antistatic area 2032 is configured to set an antistatic protection unit, which is used to eliminate static electricity. The detection unit area 2035 is configured to set a detection unit, which can be at least one of a current transformer (CT) detection unit and a multiplexing (Mux) detection unit, and the detection unit is used to perform electrical testing on the data line of the touch area. The driver chip area 2033 is configured to set a touch and display drive circuit, which is used to connect to the data line and the first touch electrode and the second touch electrode in the touch area. The binding pin area 2034 is configured to be bound and connected to a flexible printed circuit board (Flexible Printed Circuit board, referred to as FPC).
[0047] In an exemplary embodiment, the binding area 200 is provided with at least one first power signal line 1, at least one second power signal line 2, at least one data signal line group 3, at least one touch signal line group 4, at least one touch connection line group 5, at least one constant voltage signal line group 6, at least one constant voltage connection line group, and at least one gate drive signal line group 7. The first power signal line 1 is configured to connect the first power line (VDD) in the touch area with the pin of the binding pin area 2034. The second power signal line 2 is configured to connect the second power line (VSS) in the touch area with the pin of the binding pin area 2034. The data signal line group 3 includes a plurality of data signal lines, and the data signal lines are configured to connect the data lines in the touch area with the antistatic protection unit of the antistatic area 2032. The touch signal line group 4 includes a plurality of touch signal lines, and the touch signal lines are configured to connect the first touch electrode and the second touch electrode in the touch area with the pin of the binding pin area 2034. The touch connection line group 5 includes a plurality of touch connection lines, and the touch connection lines are configured to connect the touch signal lines in the touch signal line group 4 with the touch and display driving circuit of the driving chip area 2033. The constant voltage signal line group 6 includes a plurality of constant voltage signal lines, and the constant voltage signal lines are configured to connect the constant voltage lines in the touch area with the pins of the binding pin area 2034. The constant voltage connection line group includes a plurality of constant voltage connection lines, and the constant voltage connection lines are configured to connect the constant voltage signal lines in the constant voltage signal line group 6 with the antistatic protection unit of the antistatic area 2032. The gate drive signal line group 7 includes a plurality of gate drive signal lines, and the gate drive signal lines are configured to connect the gate drive circuit in the touch area with the pins of the binding pin area 2034.
[0048] In an exemplary embodiment, the first power signal line 1, the second power signal line 2, the data signal line group 3, the touch signal line group 4, the touch connection line group 5, the constant voltage signal line group 6, the constant voltage connection line group and the gate drive signal line group 7 in the binding area 100 can all be mirrored relative to the center line O.
[0049] In an exemplary embodiment, the plurality of constant voltage signal lines in the constant voltage signal line group 6 may include at least one of a gate high voltage line (VGH), a gate low voltage line (VGL), and an initial voltage line.
[0050] Fig.10 FIG. 1 is a circuit diagram of an anti-static protection unit of a display panel according to an exemplary embodiment of the present disclosure. Fig.10As shown, the anti-static protection unit includes a first transistor T1, a second transistor T2, a third transistor T3 and a fourth transistor T4, the first end of the second transistor T2 is connected to the data signal line Date, the second end of the second transistor T2 is connected to the first end of the first transistor T1, and the second end of the first transistor T1 is connected to the gate low voltage line VGL; the first end of the third transistor T3 is connected to the data signal line Date, the second end of the third transistor T3 is connected to the first end of the fourth transistor T4, and the second end of the fourth transistor T4 is connected to the gate high voltage line VGH.
[0051] The working principle of the anti-static protection unit of the display panel disclosed in the present invention is as follows: when the data signal line Date is subjected to a lighting test, the anti-static protection unit does not work; when the data signal line Date has an instantaneous high potential (for example, 100V), the gate-source voltage Vgs of the third transistor T3 is less than the threshold voltage Vth, the third transistor T3 is turned on, the gate-source voltage Vgs of the fourth transistor T4 is less than the threshold voltage Vth, the fourth transistor T4 is turned on, the high potential of the data signal line Date is output through the gate high voltage line VGH, and the potential of the data signal line Date is reduced; when the data signal line Date has an instantaneous low potential (for example, -100V), the gate-source voltage Vgs of the second transistor T2 is less than the threshold voltage Vth, the second transistor T2 is turned on, the gate-source voltage Vgs of the first transistor T1 is less than the threshold voltage Vth, the first transistor T1 is turned on, the high potential of the gate low voltage line VGL is input to the data signal line Date, and the potential of the data signal line Date is increased.
[0052] Figure 5 The present invention is a schematic plan view of a first power signal line, a second power signal line and a constant voltage signal line group in a binding area of a display panel according to an exemplary embodiment of the present invention; wherein: Figure 5 The first power signal line, the second power signal line and the constant voltage signal line group in the binding area shown can be Figure 4 The first power signal line, the second power signal line and the constant voltage signal line group of the binding area shown in FIG. Figure 4 and Figure 5As shown, on a plane parallel to the display panel, the first power signal line 1 includes a first power lead-out line located in the first flat area 201 and the bending area 202 and a first power access line 13 located in the second flat area 203. The first power lead-out line includes a first sub-line group 1-1 and a second sub-line group 1-2 arranged at intervals along the first direction D1, and the first sub-line group 1-1 and the second sub-line group 1-2 are both in a straight line or a broken line shape extending along the second direction D2. The first sub-line group 1-1 is located in the middle of the binding area 200 in the first direction D1, and the second sub-line group 1-2 is located on the side of the first sub-line group 1-1 away from the center line O. The first sub-line group 1-1 and the second sub-line group 1-2 both include a first power fan-out line 11 located in the first flat area 201 and a first power fan-out line 13 located in the bending area 202. 2, the first power bend line 11 and the first power bend line 12 are both in a straight line or a fold line shape extending along the second direction D2, the first power fan-out line 11 is connected to the driving circuit layer of the touch area at one end in the second direction D2, the first power fan-out line 11 is connected to the first power bend line 12 at the other end in the second direction D2, the first power bend line 12 is connected to the first power fan-out line 11 at one end in the second direction D2, and the first power bend line 12 is connected to the first power access line 13 at the other end in the second direction D2. The first power access line 13 is in an L-shaped fold line shape, the first power access line 13 is connected to the first sub-line group 1-1 and the second sub-line group 1-2 at one end in the second direction D2, and the first power access line 13 is connected to the pins of the binding pin area 2034 at the other end in the second direction D2.
[0053] In an exemplary embodiment, on a plane perpendicular to the display panel, the first power fan-out line 11 can be located in the same film layer as the first source-drain electrode layer of the touch area, and can be prepared by the same conductive material through the same preparation process. The first power bending line 12 can be located in the same film layer as the second source-drain electrode layer of the touch area, and can be prepared by the same conductive material through the same preparation process. The first power access line 13 can be located in the same film layer as at least one of the first source-drain electrode layer and the second source-drain electrode layer of the touch area, and can be prepared by the same conductive material through the same preparation process. For example, the first power access line 13 can be located in the same film layer as the first source-drain electrode layer and the second source-drain electrode layer of the touch area, and can be prepared by the same conductive material through the same preparation process, thereby reducing the impedance of the first power access line 13.
[0054] In an exemplary embodiment, the second power signal line 2 includes a second power lead-out line located in the first flat area 201 and the bending area 202 and a second power access line 23 located in the second flat area 203. The second power lead-out line includes a third sub-line group 2-1 and a fourth sub-line group 2-2 arranged at intervals along the first direction D1, the third sub-line group 2-1 and the fourth sub-line group 2-2 are both in a straight line shape or a folded line shape extending along the second direction D2, the third sub-line group 2-1 and the fourth sub-line group 2-2 are both located on the side of the second sub-line group 1-2 of the first power lead-out line away from the center line O, the fourth sub-line group 2-2 is located on the side of the third sub-line group 2-1 away from the center line O, and the third sub-line group 2-1 and the fourth sub-line group 2-2 both include a second power fan-out line 2 located in the first flat area 201. 1 and the second power bend line 22 located in the bend area 202, the second power fan-out line 21 and the second power bend line 22 are both in the shape of a straight line or a folded line extending along the second direction D2, the second power fan-out line 21 is connected to the driving circuit layer of the touch area at one end in the second direction D2, the second power fan-out line 21 is connected to the second power bend line 22 at the other end in the second direction D2, the second power bend line 22 is connected to the second power fan-out line 21 at one end in the second direction D2, and the second power bend line 22 is connected to the second power access line 23 at the other end in the second direction D2. The second power access line 23 is in the shape of a folded line extending along the second direction D2, one end of the second power access line 23 is connected to the third sub-line group 2-1 and the fourth sub-line group 2-2, and the other end of the second power access line 23 is connected to the pins of the binding pin area 2034.
[0055] In an exemplary embodiment, on a plane perpendicular to the display panel, the second power fan-out line 21 can be located in the same film layer as the first source-drain electrode layer of the touch area, and can be prepared by the same conductive material through the same preparation process. The second power bending line 22 can be located in the same film layer as the second source-drain electrode layer of the touch area, and can be prepared by the same conductive material through the same preparation process. The second power access line 23 can be located in the same film layer as at least one of the first source-drain electrode layer and the second source-drain electrode layer of the touch area, and can be prepared by the same conductive material through the same preparation process. For example, the second power access line 23 can be located in the same film layer as the first source-drain electrode layer and the second source-drain electrode layer of the touch area, and can be prepared by the same conductive material through the same preparation process, thereby reducing the impedance of the second power access line 23.
[0056] In an exemplary embodiment, the constant voltage signal line group 6 includes a constant voltage lead-out line group located in the first flat area 201 and the bending area 202 and a constant voltage access line group 63 located in the second flat area 203 . The constant voltage lead-out line group is in the shape of a straight line or a broken line extending along the second direction D2. The constant voltage lead-out line group is located on the side of the fourth sub-line group 2-2 of the second power lead-out line away from the center line O. The constant voltage lead-out line group includes a constant voltage fan-out line group 61 located in the first flat area 201 and a constant voltage bending line group 62 located in the bending area 202. The constant voltage fan-out line group 61 and the constant voltage bending line group 62 are both in the shape of a straight line or a broken line extending along the second direction D2. The constant voltage fan-out line group 61 is connected to the driving circuit layer of the touch area at one end in the second direction D2, and the constant voltage fan-out line group 61 is connected to the constant voltage bending line group 62 at the other end in the second direction D2. The constant voltage bending line group 62 is connected to the constant voltage fan-out line group 61 at one end in the second direction D2, and the constant voltage bending line group 62 is connected to the constant voltage access line group 63 at the other end in the second direction D2. The constant voltage access line group 63 is in a folded line shape extending along the second direction D2 . One end of the constant voltage access line group 63 is connected to the constant voltage bending line group 62 , and the other end of the constant voltage access line group 63 is connected to the pins of the binding pin area 2034 .
[0057] In an exemplary embodiment, on a plane perpendicular to the display panel, the constant voltage fan-out line group 61 can be located in the same film layer as at least one of the first gate layer and the second gate layer of the touch area, and can be prepared by the same manufacturing process using the same conductive material. The constant voltage bending line group 62 can be located in the same film layer as the second source-drain electrode layer of the touch area, and can be prepared by the same manufacturing process using the same conductive material. The constant voltage access line group 63 can be located in the same film layer as at least one of the first gate layer, the second gate layer, and the first source-drain electrode layer of the touch area, and can be prepared by the same conductive material using the same manufacturing process. For example, the constant voltage access line group 63 can be located in the same film layer as the first gate layer, the second gate layer, and the first source-drain electrode layer of the touch area, and can be prepared by the same conductive material using the same manufacturing process, thereby reducing the impedance of the constant voltage access line group 63.
[0058] In an exemplary embodiment, the constant voltage connection line group 64 is in a zigzag shape extending along the first direction D1, and the constant voltage connection line group 64 is connected to the constant voltage access line group 63 at one end in the first direction D1, and the constant voltage connection line group 64 is connected to the anti-static area 2032 at the other end in the first direction D1.
[0059] In an exemplary embodiment, the orthographic projection of the constant voltage connection line group 64 on the substrate overlaps with the orthographic projection of the first power access line 13 and the second power access line 23 on the substrate. The constant voltage connection line group 64 and at least one of the first gate layer and the second gate layer of the touch control area are located in the same film layer, and can be prepared by the same manufacturing process using the same conductive material. For example, the constant voltage connection line group 64 and the first gate layer and the second gate layer of the touch control area are located in the same film layer, and can be prepared by the same conductive material using the same manufacturing process, thereby reducing the impedance of the constant voltage connection line group 64.
[0060] Figure 6 This is a plan view of a touch signal line group in a binding area of a display panel according to an exemplary embodiment of the present disclosure; wherein: Figure 6 The touch signal line group of the binding area shown can be Figure 4 In an exemplary embodiment, the touch signal line group of the binding area is shown. Figure 4 and Figure 6 As shown, on a plane parallel to the display panel, the touch signal line group 4 includes a touch lead-out line group located in the first flat area 201 and the bending area 202 and a touch access line group 43 located in the second flat area 203. The touch lead-out line group is in a straight line or a broken line shape extending along the second direction D2. The touch lead-out line group is located between the third sub-line group 2-1 and the fourth sub-line group 2-2. The orthographic projections of the touch lead-out line group on the substrate do not overlap with the orthographic projections of the third sub-line group 2-1 and the fourth sub-line group 2-2 on the substrate. The touch lead-out line group includes a touch fan-out line group 41 located in the first flat area 201 and a touch bending line group 42 located in the bending area 202. The touch fan-out line group 41 The touch bending line group 42 and the touch fan-out line group 41 are both in the shape of a straight line or a folded line extending along the second direction D2. The touch fan-out line group 41 is connected to the touch structure layer of the touch area at one end in the second direction D2. The touch fan-out line group 41 is connected to the touch bending line group 42 at the other end in the second direction D2. The touch bending line group 42 is connected to the touch fan-out line group 41 at one end in the second direction D2. The touch bending line group 42 is connected to the touch access line group 43 at the other end in the second direction D2. The touch access line group 43 is in the shape of a folded line extending along the second direction D2. One end of the touch access line group 43 is connected to the touch bending line group 42. The other end of the touch access line group 43 is connected to the pins of the binding pin area 2034. Thus, an electrical test signal can be input to the touch signal line 4 through the binding pin area 2034 to perform electrical testing on the first touch electrode and the second touch electrode of the touch area 100.
[0061] In an exemplary embodiment, the orthographic projection of the touch access line group 43 on the substrate partially overlaps with the orthographic projection of the second power access line 23 on the substrate.
[0062] In an exemplary embodiment, on a plane perpendicular to the display panel, the touch fan-out line group 41 can be located in the same film layer as at least one of the first metal grid layer and the second metal grid layer of the touch area, and can be prepared by the same manufacturing process using the same conductive material. The touch bending line group 42 can be located in the same film layer as the second source-drain electrode layer of the touch area, and can be prepared by the same manufacturing process using the same conductive material. The touch access line group 43 can be located in the same film layer as at least one of the first metal grid layer and the second metal grid layer of the touch area, and can be prepared by the same manufacturing process using the same conductive material. For example, the touch access line group 43 can be located in the same film layer as the first metal grid layer and the second metal grid layer of the touch area, and can be prepared by the same manufacturing process using the same conductive material, thereby reducing the impedance of the touch access line group 43.
[0063] In an exemplary embodiment, the touch connection line group 5 is located in the second flat area 203, and the touch connection line group 5 is in an L-shaped broken line shape extending along the first direction D1. The touch connection line group 5 is connected to the touch access line group 43 at one end in the first direction D1, and the touch connection line group 5 is connected to the driving chip area 2033 at the other end in the first direction D1.
[0064] In an exemplary embodiment, the orthographic projection of the touch connection line group 5 on the substrate overlaps with a portion of the orthographic projections of the first power supply connection line 13 and the second power supply connection line 23 on the substrate.
[0065] In an exemplary embodiment, the touch connection line group 5 and the second power access line 23 are located in different film layers, and the touch connection line group 5 can be located on the side of the second power access line 23 close to the substrate. For example, the second power access line 23 and at least one of the first source-drain electrode layer and the second source-drain electrode layer of the touch region are located in the same film layer, and can be prepared by the same conductive material and the same preparation process; the touch connection line group 5 and the first gate layer or the second gate layer of the touch region are located in the same film layer, and can be prepared by the same conductive material and the same preparation process.
[0066] In the embodiment of the present disclosure, the display panel is located in the same film layer as the first gate layer or the second gate layer of the touch area through the touch connection line group 5, and the second power access line 23 is located in the same film layer as the first source-drain electrode layer and the second source-drain electrode layer of the touch area, thereby increasing the distance between the overlapping area of the touch connection line group 5 and the second power access line 23 in a direction perpendicular to the display panel, thereby reducing the parasitic capacitance between the touch connection line group 5 and the second signal line group 2, and reducing the occurrence of undesirable phenomena such as water ripples on the touch display and abnormal touch reporting.
[0067] Figure 7The present invention is a schematic plan view of a data signal line group and a gate drive signal line group in a binding area of a display panel according to an exemplary embodiment of the present invention; wherein: Figure 7 The data signal line group and the gate drive signal line group in the bonding area shown can be Figure 4 The data signal line group and the gate drive signal line group of the bonding area shown in FIG. Figure 4 and Figure 7 As shown, on a plane parallel to the display panel, the data signal line group 3 includes a data lead-out line group located in the first flat area 201 and the bending area 202 and a data access line group 33 located in the second flat area 203. The data lead-out line group includes a fifth line group 3-1 and a sixth line group 3-2 arranged at intervals along the first direction D1, the fifth line group 3-1 and the sixth line group 3-2 are both in a straight line shape or a broken line shape extending along the second direction D2, the fifth line group 3-1 is located between the first sub-line group 1-1 and the second sub-line group 1-2 of the first power signal line 1, the sixth line group 3-2 is located on the side of the fifth line group 3-1 away from the center line O, and the sixth line group 3-2 is located between the second sub-line group 1-2 and the third sub-line group 2-1. The fifth line group 3-1 and the sixth line group 3-2 both include a data fan-out line group 31 located in the first flat area 201 and a data bending line group 32 located in the bending area 202. The data fan-out line group 31 and the data bending line group 32 are both in a straight line or a folded line shape extending along the second direction D2. The data fan-out line group 31 is connected to the driving circuit layer of the touch area at one end in the second direction D2, and the data fan-out line group 31 is connected to the data bending line group 32 at the other end in the second direction D2. The data bending line group 32 is connected to the data fan-out line group 31 at one end in the second direction D2, and the data bending line group 32 is connected to the data access line group 33 at the other end in the second direction D2. The data access line group 33 is in a folded line shape, and the data access line group 33 is connected to the data bending line group 32 at one end in the second direction D2, and the data access line group 33 is connected to the antistatic area 2032 at the other end in the second direction D2.
[0068] In an exemplary embodiment, the data fan-out line group 31 may include a first fan-out line group and a second fan-out line group, the first fan-out line group and the second fan-out line group are alternately arranged along the first direction D1, and the first fan-out line group and the second fan-out line group are located in different film layers. The first fan-out line group and the first gate layer of the touch control area are located in the same film layer, and can be prepared by the same conductive material and the same preparation process, and the second fan-out line group and the second gate layer of the touch control area are located in the same film layer, and can be prepared by the same conductive material and the same preparation process. The data bending line group 32 and the second source and drain electrode layer of the touch control area are located in the same film layer, and can be prepared by the same conductive material and the same preparation process. The data access line group 33 may include a first access line group and a second access line group, the first access line group and the second access line group are alternately arranged along the first direction D1, and the first access line group and the second access line group are located in different film layers. The first access line group and the first gate layer of the touch area are located in the same film layer and can be prepared using the same conductive material through the same preparation process. The second access line group and the second gate layer of the touch area are located in the same film layer and can be prepared using the same conductive material through the same preparation process.
[0069] In an exemplary embodiment, the binding area 200 is further provided with a data transmission line group 9 located between the detection unit area 2035 and the driving chip area 2033. The data transmission line group 9 is in a straight line or a folded line extending along the second direction D2. The data transmission line group 9 is connected to the detection unit area 2035 at one end in the second direction D2, and the data transmission line group 9 is connected to the driving chip area 2033 at the other end in the second direction D2. The signals of the touch and display driving circuits on the driving chip area 2033 are transmitted to the detection unit area 2035 through the data transmission line group 9, and then transmitted to the anti-static area 2032 through the detection unit area 2035. The anti-static area 2032 is then transmitted to the data lines in the touch area 100 through the data signal line group 3.
[0070] In an exemplary embodiment, the data transmission line group 9 and the touch connection line group 5 are located in the same film layer and can be prepared by the same conductive material through the same preparation process. For example, the data transmission line group 9 and the touch connection line group 5 are both located in the same film layer as the first gate layer of the touch area, or the data transmission line group 9 and the touch connection line group 5 are both located in the same film layer as the second gate layer of the touch area, thereby ensuring the flatness of the binding area 200 and reducing the risk of breakage of the driving chip area 2033 during the binding process.
[0071] In an exemplary embodiment, the binding area 200 is provided with a driver chip lead wire group 8 located between the driver chip area 2033 and the binding pin area 2034. The driver chip lead wire group 8 is in a straight line or a broken line shape extending along the second direction D2. The driver chip lead wire group 8 is connected to the driver chip area 2033 at one end in the second direction D2, and the data transmission line group 9 is connected to the binding pin area 2034 at the other end in the second direction D2.
[0072] In an exemplary embodiment, the gate drive signal line group 7 includes a gate drive lead line group located in the first flat area 201 and the bending area 202, and a gate drive access line group 73 and a gate drive connection line group 74 located in the second flat area 203. The gate drive lead line group is in a straight line shape or a folded line shape extending along the second direction D2, and the gate drive lead line group is located between the constant voltage lead line group of the constant voltage signal line group 6 and the fourth sub-line group 2-2 of the second power signal line 2. The gate drive lead-out line group includes a gate drive fan-out line group 71 located in the first flat area 201 and a gate drive bending line group 72 located in the bending area 202. The gate drive fan-out line group 71 and the gate drive bending line group 72 are both in a straight line or a folded line shape extending along the second direction D2. The gate drive fan-out line group 71 is connected to the driving circuit layer of the touch control area at one end in the second direction D2, and the gate drive fan-out line group 71 is connected to the gate drive bending line group 72 at the other end in the second direction D2. The gate drive bending line group 72 is connected to the gate drive fan-out line group 71 at one end in the second direction D2, and the gate drive bending line group 72 is connected to the gate drive access line group 73 at the other end in the second direction D2. The gate drive access line group 73 is in a folded line shape extending along the second direction D2. One end of the gate drive access line group 73 is connected to the gate drive bending line group 72, and the other end of the gate drive access line group 73 is connected to the gate drive connection line group 74. The gate driving connection line group 74 is in a folded line shape extending along the first direction D1 . One end of the gate driving connection line group 74 is connected to the gate driving access line group 73 , and the other end of the gate driving connection line group 74 is connected to the driving chip area 2033 .
[0073] In an exemplary embodiment, the orthographic projections of the gate driving connection line group 74 on the substrate overlap with portions of the orthographic projections of the first power supply connection line 13 and the second power supply connection line 23 on the substrate.
[0074] In an exemplary embodiment, on a plane perpendicular to the display panel, the gate drive fan-out line group 71 can be located in the same film layer as at least one of the first gate layer and the second gate layer of the touch control area, and can be prepared by the same conductive material through the same preparation process. The gate drive bending line group 72 can be located in the same film layer as the second source and drain electrode layer of the touch control area, and can be prepared by the same conductive material through the same preparation process. The gate drive access line group 73 can be located in the same film layer as at least one of the first gate layer, the second gate layer and the first source and drain electrode layer of the touch control area, and can be prepared by the same conductive material through the same preparation process. The gate drive connection line group 74 can be located in the same film layer as at least one of the first gate layer and the second gate layer of the touch control area, and can be prepared by the same conductive material through the same preparation process.
[0075] The display panel of the disclosed embodiment is located in the same film layer as at least one of the first gate layer and the second gate layer of the touch area through the gate drive connection line group 74, so that the drive connection line group 74 and the first power access line 13 and the second power access line 23 are located in different film layers, thereby avoiding the gate drive connection line group 74 from intersecting the first power access line 13 and the second power access line 23.
[0076] Figure 8a It is a schematic plan view of another binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 8b This is a plan view of another touch signal line group in the binding area of a display panel according to an exemplary embodiment of the present disclosure. Figure 8b The touch signal line group shown can be Figure 8a In an exemplary embodiment, as shown in FIG. Figure 8a and Figure 8b As shown, the structure of the binding area of the display panel of the embodiment of the present disclosure is Figure 4 The structures of the binding areas of the display panels shown are substantially the same, except that the structure of the touch connection line group 5 of the binding area of the display panel in the embodiment of the present disclosure is different.
[0077] In an exemplary embodiment, on a plane perpendicular to the display panel, the orthographic projection of the touch connection line group 5 on the substrate partially overlaps with the orthographic projections of the first power connection line 13 and the second power connection line 23 on the substrate.
[0078] In an exemplary embodiment, the touch connection line group 5 and the second power access line 23 are located in different film layers, and the touch connection line group 5 can be located on the side of the second power access line 23 away from the substrate. For example, the second power access line 23 and at least one of the first source-drain electrode layer and the second source-drain electrode layer of the touch region are located in the same film layer, and can be prepared by the same conductive material and the same preparation process; the touch connection line group 5 and at least one of the first metal grid layer and the second metal grid layer of the touch region are located in the same film layer, and can be prepared by the same conductive material and the same preparation process.
[0079] In an exemplary embodiment, the touch connection line group 5 and the first metal grid layer and the second metal grid layer of the touch area are located in the same film layer and can be made of the same conductive material through the same preparation process, thereby reducing the impedance of the touch connection line group 5 .
[0080] In the embodiment of the present disclosure, the display panel is located in the same film layer as the first metal grid layer and the second metal grid layer of the touch area through the touch connection line group 5, and the second power access line 23 is located in the same film layer as the first source-drain electrode layer and the second source-drain electrode layer of the touch area. The distance between the overlapping area of the touch connection line group 5 and the second power access line 23 in the direction perpendicular to the display panel is increased, thereby reducing the parasitic capacitance between the touch connection line group 5 and the second signal line group 2, and reducing the occurrence of undesirable phenomena such as water ripples in the touch display and abnormal touch reporting.
[0081] Figure 9a It is a schematic plan view of another binding area of a display panel according to an exemplary embodiment of the present disclosure; Figure 9b It is a plan view of another touch signal line group in the binding area of a display panel according to an exemplary embodiment of the present disclosure; Fig.9c This is a schematic plan view of another exemplary embodiment of the present disclosure in which the touch signal line group in the binding area of the display panel does not display the touch access line group. Figure 9b The touch signal line group shown can be Figure 9a The touch signal line group shown; Fig.9c The touch signal line group shown does not show the touch access line group. Figure 9a , Figure 9b and Fig.9c As shown, the structure of the binding area of the display panel of the embodiment of the present disclosure is Figure 4 The structures of the binding areas of the display panels shown are substantially the same, except that the structures of the touch signal line group 4 , the touch connection line group 5 and the second power signal line 2 in the binding area of the display panel in the embodiment of the disclosure are different.
[0082] In an exemplary embodiment, the second power lead line of the second power signal line 2 and the touch lead line group of the touch signal line group 4 are both straight lines or broken lines extending along the second direction D2, and the second power lead line of the second power signal line 2 is located on the side of the touch lead line group of the touch signal line group 4 away from the center line O, that is, the second power fan-out line 21 and the second power bending line 22 of the second power signal line 2 are both located on the side of the touch fan-out line group 41 and the touch bending line group 42 of the touch signal line group 4 away from the center line O.
[0083] The second power lead line of the second power signal line 2 of the display panel of the disclosed embodiment is located on the side of the touch lead line group of the touch signal line group 4 away from the center line O, so that the second power lead line of the second power signal line 2 is a signal line, thereby reducing the impedance of the second power signal line 2 and improving the signal strength of the second power signal line 2.
[0084] In an exemplary embodiment, an orthographic projection of the touch access line group 43 of the touch signal line group 4 on the substrate partially overlaps with an orthographic projection of the second power access line 23 of the second power signal line 2 on the substrate.
[0085] In an exemplary embodiment, the touch connection line group 5 is in a straight line or a folded line shape, one end of the touch connection line group 5 is connected to the touch bending line group 42 of the touch signal line group 4, and the other end of the touch connection line group 5 is connected to the antistatic area 2032. A touch transmission line group 51 is disposed on the binding area 200, and the touch transmission line group 51 is in a straight line or a folded line shape extending along the second direction D2, one end of the touch transmission line group 51 is connected to the antistatic area 2032, and the other end of the touch transmission line group 51 is connected to the driving chip area 2033.
[0086] The touch signal line group 4 of the display panel of the embodiment of the present disclosure is connected to the anti-static area 2032 through the touch connection line group 5 , thereby improving the anti-static performance of the touch signal line group 4 .
[0087] In an exemplary embodiment, the orthographic projection of the touch connection line group 5 on the substrate does not overlap with the orthographic projection of the second power signal line 2 on the substrate.
[0088] In the display panel of the disclosed embodiment, the orthographic projection of the touch connection line group 5 on the substrate does not overlap with the orthographic projection of the second power signal line 2 on the substrate, thereby eliminating the parasitic capacitance between the touch connection line group 5 and the second signal line group 2, reducing the mutual interference between the second power signal line 2 and the touch connection line group 5, and reducing the occurrence of undesirable phenomena such as water ripples on the touch display and abnormal touch reporting.
[0089] In an exemplary embodiment, the touch connection line group 5 and at least one of the first gate layer and the second gate layer of the touch region are located in the same film layer and can be made of the same conductive material through the same preparation process.
[0090] The present disclosure also provides a display device, including the display panel described above. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc.
[0091] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or transient medium). As is known to those skilled in the art, the term "computer storage medium" includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.
[0092] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.
[0093] In addition, the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first", "second", etc. may explicitly or implicitly include at least one of the features.
[0094] In the description of the present application, “plurality” means at least two, for example, two, three, etc., unless otherwise clearly and specifically defined.
[0095] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0096] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.
[0097] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.
[0098] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.
Claims
1. A display panel, characterized in that: The invention comprises a touch area and a binding area arranged on one side of the touch area: the touch area comprises a driving circuit layer arranged on a substrate, a light emitting structure layer arranged on a side of the driving circuit layer away from the substrate, and a touch structure layer arranged on a side of the light emitting structure layer away from the substrate; the binding area comprises a first flat area, a bending area, and a second flat area arranged in sequence along a direction away from the touch area, the second flat area comprises a driving chip area and a binding pin area, and the driving chip area is configured to be provided with a touch and display driving circuit; The binding area is provided with at least one second power signal line, at least one touch signal line group and at least one touch connection line group, one end of the at least one second power signal line is connected to the driving circuit layer of the touch area, the other end of the at least one second power signal line is connected to the binding pin area, one end of the at least one touch signal line group is connected to the touch structure layer of the touch area, the other end of the at least one touch signal line group is connected to the binding pin area, one end of the at least one touch connection line group is connected to the touch signal line group, and the other end of the at least one touch connection line group is connected to the driving chip area.
2. The display panel according to claim 1, characterized in that: The at least one touch connection line group is located in the second flat area.
3. The display panel according to claim 1, characterized in that: The binding area also includes an anti-static area located in the second flat area, the anti-static area is located between the driving chip area and the bending area, the anti-static area is configured to set up an anti-static protection unit, the anti-static area is connected to the driving chip area through a touch transmission line group, one end of the at least one touch connection line group is connected to the at least one touch signal line group, and the other end of the at least one touch connection line group is connected to the anti-static area.
4. The display panel according to claim 3, characterized in that: The binding area is provided with at least one constant voltage signal line group, one end of the at least one constant voltage signal line group is connected to the driving circuit layer, the other end of the at least one constant voltage signal line group is connected to the binding pin area, and the constant voltage signal line group is connected to the anti-static area through a voltage connection line group; the constant voltage signal line group includes at least one of a gate high voltage line, a gate low voltage line and an initial voltage line.
5. The display panel according to claim 3, characterized in that: The binding area is provided with at least one data signal line group, one end of the at least one data signal line group is connected to the driving circuit layer of the touch area, the other end of the at least one data signal line group is connected to the anti-static area, the anti-static area is connected to the driving chip area through a data transmission line group, and the at least one data transmission line group and the at least one touch connection line group are located in the same film layer.
6. The display panel according to claim 5, characterized in that: The driving circuit layer includes a first active layer arranged on the substrate, a first gate layer arranged on a side of the first active layer away from the substrate, a second gate layer arranged on a side of the first gate layer away from the substrate, a first source-drain layer arranged on a side of the second gate layer away from the substrate, and a second source-drain layer arranged on a side of the first source-drain layer away from the substrate, and the at least one data transmission line group and the at least one touch connection line group are both located in the same film layer as the first gate layer or the second gate layer.
7. The display panel according to any one of claims 1 to 6, characterized in that: The orthographic projection of the at least one touch connection line group on the substrate overlaps at least part of the orthographic projection of the at least one second power signal line on the substrate; Alternatively, an orthographic projection of the at least one touch connection line group on the substrate does not overlap with an orthographic projection of the at least one second power signal line on the substrate.
8. The display panel according to any one of claims 1 to 6, characterized in that: The at least one second power signal line includes a second power lead-out line located in the first flat area and the bending area, and a second power access line located in the second flat area, one end of the second power lead-out line is connected to the driving circuit layer, and the other end of the second power lead-out line is connected to the second power access line, one end of the second power access line is connected to the second power lead-out line, and the other end of the second power access line is connected to the binding pin area, and the at least one touch connection line group is located on the side of the second power access line close to the substrate, or the at least one touch connection line group is located on the side of the second power access line away from the substrate.
9. The display panel according to claim 8, characterized in that: The driving circuit layer includes a first active layer arranged on the substrate, a first gate layer arranged on a side of the first active layer away from the substrate, a second gate layer arranged on a side of the first gate layer away from the substrate, a first source-drain layer arranged on a side of the second gate layer away from the substrate, and a second source-drain layer arranged on a side of the first source-drain layer away from the substrate; the touch structure layer includes a first touch conductive layer arranged on a side of the light-emitting structure layer away from the substrate, and a second touch conductive layer arranged on a side of the first touch conductive layer away from the substrate; the second power access line and at least one of the first source-drain layer and the second source-drain layer are located in the same film layer, and the at least one touch connection line group and the first gate layer are located in the same film layer; or, the second power access line and at least one of the first source-drain layer and the second source-drain layer are located in the same film layer, and the at least one touch connection line group and at least one of the first touch conductive layer and the second touch conductive layer are located in the same film layer.
10. The display panel according to claim 8, characterized in that: The at least one touch signal line group includes a touch lead line group located in the first flat area and the bending area, and a touch access line group located in the second flat area, one end of the touch lead line group is connected to the touch circuit layer, and the other end of the touch lead line group is connected to the touch access line group, one end of the touch access line group is connected to the touch lead line group, and the other end of the touch access line group is connected to the binding pin area, and the orthographic projection of the touch access line group on the substrate overlaps at least partially with the orthographic projection of the at least one second power signal line on the substrate.
11. The display panel according to claim 10, characterized in that: The second power lead wire includes two sub-wire groups arranged at an interval, one end of the two sub-wire groups are connected to the driving circuit layer, the other ends of the two sub-wire groups are connected to the second power access line, and the touch lead wire group is located between the two sub-wire groups.
12. The display panel according to claim 10, characterized in that: The touch lead wire group is located on a side of the second power lead wire close to the center line of the binding area.
13. The display panel according to any one of claims 1 to 6, characterized in that: The binding area is provided with at least one gate drive signal line group, one end of the at least one gate drive signal line group is connected to the driving circuit layer, and the other end of the at least one gate drive signal line group is connected to the driving chip area, the gate drive signal line group includes a gate drive lead line group located in the first flat area and the bending area, and a gate drive access line group and a gate drive connection line group located in the second flat area, one end of the gate drive lead line group is connected to the driving circuit layer, the other end of the gate drive lead line group is connected to the gate drive access line group, the gate drive access line group is connected to the gate drive connection line group, the gate drive connection line group is connected to the driving chip area, the gate drive lead line group and the gate drive access line group are both located on the side of the second power signal line away from the center line of the binding area, and the orthographic projection of the gate drive connection line group on the substrate overlaps at least partially with the orthographic projection of the second power signal line on the substrate.
14. The display panel according to any one of claims 1 to 6, characterized in that: The binding area also includes an anti-static area located in the second flat area, the anti-static area is located between the driving chip area and the bending area, the binding area is provided with at least one data signal line group, the data signal line group is located on the side of the second power signal line close to the center line of the binding area, and the data signal line group is respectively connected to the driving circuit layer and the anti-static area.
15. The display panel according to any one of claims 1 to 6, characterized in that: The binding area is provided with at least one first power signal line, the first power signal line is located on the side of the second power signal line close to the center line of the binding area, and the first power signal line is respectively connected to the driving circuit layer and the binding pin area.
16. A display device, characterized in that: A display panel comprising any one of claims 1 to 15.
Citation Information
Patent Citations
Array substrate, display panel and display device
CN107479283A
Touch panel and preparation method thereof and display device
CN112035013A
Display module, display device and electrostatic isolation method
CN114093334A
Display panel, display module and display device
CN114428570A
Touch display panel and mobile terminal
CN114594876A
Cited By
Display panel and display apparatus
WO2026158034A1