RISC-V chip dynamic library mechanism implementation system, chip and related method

Abstract

The invention provides an RISC-V chip dynamic library mechanism implementation system, a chip and a related method, in the system, an address setting module is used for setting an entry function address of a dynamic module as a preset memory address; and the mapping construction module is used for constructing an independent mapping relationship between the entry function input parameter and the dynamic library function based on the preset memory address. And the position-independent loading processing module is used for carrying out position-independent loading processing on the function variable, the global variable and the dynamic library function, so that the data in the dynamic module has the capability of loading to any storage address in the volatile storage module. Therefore, a dynamic library function mechanism based on the RISC-V chip is realized, and the updating efficiency of the function module is no longer limited by the influence of a static library.

Description

Technical Field

[0001] The present application relates to the field of embedded system technology, and in particular to a RISC-V chip dynamic library mechanism implementation system, chip and related methods. Background Art

[0002] The Nuclei N300 chip is a processor core based on the RISC-V instruction set architecture. When updating the internal functional modules of the current N300 chip, the N300 chip is not compatible with the Linux dynamic library running on the Linux operating system, so it can only update the functional modules through static libraries. The problem is that every time a new functional module is updated, the system code needs to be compiled and updated uniformly, resulting in low efficiency in updating the functional modules and the inability to achieve dynamic updates. Summary of the invention

[0003] Based on the above problems, in order to improve the update efficiency of the functional modules in the N300 chip and realize the dynamic update of the functional modules, the embodiment of the present application provides a RISC-V chip dynamic library mechanism implementation system, chip and related methods.

[0004] The embodiments of the present application disclose the following technical solutions: In a first aspect, an embodiment of the present application provides a RISC-V chip dynamic library mechanism implementation system, characterized in that it includes a non-volatile storage module, a volatile storage module, an address setting module, a mapping construction module and a position-independent loading processing module; the non-volatile storage module includes: a dynamic module, and the dynamic module includes: a dynamic library function, a function variable and a global variable; The address setting module is used to set the entry function address of the dynamic module to a preset memory address; The mapping construction module is used to construct a separate mapping relationship between the entry function input parameter and the dynamic library function based on the preset memory address; The position-independent loading processing module is used to perform position-independent loading processing on the function variables, the global variables and the dynamic library functions, so that the data in the dynamic module has the ability to be loaded into any storage address in the volatile storage module.

[0005] In a possible implementation, the address setting module is specifically used to: Constructing a link script for the non-volatile storage module; Through the link script, the entry function address is set to the preset memory address, and the addresses of all the dynamic library functions and variables in the dynamic module are set to offsets relative to the entry function address to generate an executable file.

[0006] In a possible implementation, the position-independent loading processing module includes: a global variable processing unit; the global variable processing unit is specifically used to: Determine the absolute address of the entry function when the entry function is running in the memory through relative addressing of the program counter; Obtaining, through the executable file, a global variable relative address of the global variable in the dynamic module; the global variable relative address is used to represent the address offset of the entry function address; The sum of the relative address of the global variable and the absolute address of the entry function is determined as the absolute memory address of the global variable in the dynamic module, so that the global variable has the ability to be loaded to any storage address in the volatile storage module.

[0007] In a possible implementation, the position-independent loading processing module includes: a function variable processing unit; the function variable processing unit is specifically used to: Compiling the function variables based on the -fPIE compilation option to generate position-independent code for the function variables; the position-independent code is used to enable calling the function; The position-independent code is used to enable the call to the function to be completed in a program counter relative addressing manner, so that the function has the ability to be loaded to any storage address in the volatile storage module.

[0008] In one possible implementation, the program counter relative addressing method is implemented by combining the auipc instruction and the address offset addition instruction in the RISC-V instruction set.

[0009] In a possible implementation, the system further includes: an external function calling module; The external function calling module is used to implement the calling of the external function by the dynamic module through an indirect address transfer mechanism.

[0010] In a possible implementation, the preset memory address is a memory start address; the non-volatile storage module is a flash module, and the volatile storage module is an SRAM module or a DDR module.

[0011] In a second aspect, an embodiment of the present application provides a method for updating a functional module of a RISC-V chip, which is applied to a central processing unit of a RISC-V chip, wherein the RISC-V chip includes: a non-volatile storage module and a volatile storage module, wherein the non-volatile storage module includes a dynamic module; the dynamic module includes: a dynamic library function; the method includes: In response to a function module update instruction, the module file data of the dynamic module is written into the volatile storage module; the function module update instruction includes: a target calling function and a target function module; The entry function address of the dynamic module is set as a preset memory address, and based on the preset memory address, a function call mapping relationship corresponding to each other between the entry function input parameter and the dynamic library function is constructed; Based on the target calling function, determining a target input parameter from a plurality of the function calling mapping relationships; A dynamic library function call is performed according to the plurality of function call mapping relationships and the target input parameters to dynamically update the target functional module.

[0012] In a possible implementation, the preset memory address is a memory start address; the non-volatile storage module is a flash module, and the volatile storage module is an SRAM module or a DDR module.

[0013] In a third aspect, an embodiment of the present application provides a RISC-V chip, including any possible RISC-V chip dynamic library mechanism implementation system in the first aspect.

[0014] Compared with the prior art, the present application has the following beneficial effects: the embodiment of the present application provides a RISC-V chip dynamic library mechanism implementation system, chip and related methods, in which the function in the dynamic library is stored in the dynamic module, and stored in the non-volatile storage module of the system as the basic call of the dynamic library function. First, the address setting module sets the entry function of the dynamic module to a preset memory address, so that no matter where the dynamic module is loaded to the memory, the dynamic module can be accessed through the logical address represented by the preset memory address to call the function therein. Subsequently, the mapping construction module constructs a separate mapping relationship between the input parameters of the entry function and the dynamic library function based on the preset memory address, so as to ensure the accurate call of the dynamic library function in the dynamic module. Finally, the position-independent loading processing module performs a unified position-independent loading process on the function variables, global variables and dynamic library functions in the dynamic module, so that the dynamic library functions and data in the dynamic module can be loaded to any storage address in the volatile storage module, thereby realizing the dynamic library function mechanism based on the RISC-V chip, and the update efficiency of the function module is no longer subject to the influence of the static library. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0016] Figure 1 A schematic diagram of the structure of a RISC-V chip dynamic library mechanism implementation system provided in an embodiment of the present application; Figure 2 A schematic diagram of the structure of a RISC-V N300 chip dynamic library implementation system provided in an embodiment of the present application; Figure 3 A schematic diagram of a flow chart of position-independent loading processing performed by a global variable processing unit provided in an embodiment of the present application; Figure 4 A flowchart of a method for updating a functional module of a RISC V chip provided in an embodiment of the present application; Figure 5 A schematic diagram of a flow chart of an N300 chip calling a dynamic module function in an actual application scenario provided in an embodiment of the present application. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solutions and advantages of this application more clear, the following is a further detailed description of this application in combination with specific embodiments and with reference to the accompanying drawings. It should be noted that the embodiments described in the embodiments of this application are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0018] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "include" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", etc. are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0019] As described above, the Nuclei N300 chip is a processor core based on the RISC-V instruction set architecture. When updating the internal functional modules of the current N300 chip, the N300 chip is not compatible with the Linux dynamic library running on the Linux operating system, so it can only update the functional modules through static libraries. The problem is that every time a new functional module is updated, the system code needs to be compiled and updated uniformly, resulting in low efficiency in updating the functional modules and the inability to achieve dynamic updates.

[0020] In order to solve the above problems, the embodiment of the present application provides a RISC-V chip dynamic library mechanism implementation system, chip and related methods. In its system, the function in the dynamic library is stored in the dynamic module, and it is stored in the non-volatile storage module of the system as the basic call of the dynamic library function. First, the address setting module sets the entry function of the dynamic module to a preset memory address, so that no matter where the dynamic module is loaded to the memory, the dynamic module can be accessed through the logical address represented by the preset memory address to call the function therein. Subsequently, the mapping construction module constructs a separate mapping relationship between the input parameters of the entry function and the dynamic library function based on the preset memory address, so as to ensure the accurate call of the dynamic library function in the dynamic module. Finally, the position-independent loading processing module performs a unified position-independent loading process on the function variables, global variables and dynamic library functions in the dynamic module, so that the dynamic library functions and data in the dynamic module can be loaded to any storage address in the volatile storage module, thereby realizing the dynamic library function mechanism based on the RISC-V chip, and the update efficiency of the function module is no longer subject to the influence of the static library.

[0021] It should be noted in advance that the system and method provided in the embodiments of the present application can be applied to any type of RISC-V chip. Similarly, they can also be applied to the RISC V Nuclei N300 chip involved in the background technology. In the following description, the N300 chip will be introduced as an example of a RISC-V chip to deepen understanding.

[0022] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0023] See also Figure 1 and Figure 2 , Figure 1 A schematic diagram of the structure of a RISC-V chip dynamic library mechanism implementation system provided in an embodiment of the present application, Figure 2 A schematic diagram of the structure of a RISC-V N300 chip dynamic library implementation system provided in an embodiment of the present application, Figure 1 In the invention, an address setting module 100, a mapping construction module 200, a position-independent loading processing module 300, a non-volatile storage module 400, a dynamic module 500 and a volatile storage module 600 are included. Figure 2 In the embodiment of the present application, Flash represents a non-volatile storage module, which stores multiple dynamic module files, each of which contains dynamic library functions, function variables and global variables. SRAM / DDR represents a volatile storage module, and N300 is the central processing unit (CPU) in the chip, which is used to exchange data with Flash and SRAM / DDR.

[0024] During the research process, it was found that if one wants to implement the dynamic library mechanism on a RISC-V chip that is not compatible with dynamic libraries, the following four problems need to be solved: (1) Regarding the position-independent loading and addressing of function symbols and global data symbols, position-independent loading is required to ensure that the dynamic module can run at any address in the memory. Addressing is to ensure that when the dynamic module is loaded to any address in the memory, the function call to it can correctly find the corresponding memory address.

[0025] (2) Regarding the problem of obtaining the internal function symbols of the dynamic module, this problem is to ensure that the main program can accurately access and call the dynamic library functions within the module.

[0026] (3) Regarding the question of how to pass external symbols into dynamic modules, this question is to ensure that dynamic modules can access and call functions inside the main program or other modules.

[0027] (4) The problem of how to call dynamic modules in resource-constrained embedded systems is to ensure effective calls to functions within dynamic modules when memory is limited.

[0028] In response to the above four problems, the present application embodiment provides a corresponding system and method. Figure 1 The RISC-V chip dynamic library mechanism implementation system provided in the embodiments of the present application is introduced.

[0029] The address setting module 100 is used to set the entry function address of the dynamic module to a preset memory address.

[0030] The address setting module is used to fix the entry function address of the dynamic module to a specific preset memory address. By fixing the entry function at a specific memory address, it can ensure that no matter where the module is loaded, the main program can access the entry function through the memory address, and then call the function in the dynamic module, thereby solving the addressing problems in the above four problems.

[0031] Specifically, in the present embodiment, the preset memory address is the starting address 0x0 of the memory, which is the starting address of the memory and is also the only entry of the module. In the process of fixing the entry function address, it is necessary to construct a link script for the non-volatile storage module, and forcibly link the entry function to the preset memory address 0x0 through the link script. Taking the non-volatile storage module as Flash as an example, based on the Flash component, the corresponding link script flash.ld is constructed, and the compiler uses the link script flash.ld to allocate the address space and sets the address of rom to the memory starting address 0x00000000. Among them, it is necessary to add the entry function .text.startup and .text.startup.* to the first line in the .text segment, indicating that the function address modified by .text.startup is 0x00000000, so as to realize the fixed operation of the entry function address.

[0032] After setting the entry function address to the preset memory address, in order to ensure that the function in the dynamic module can be loaded to any address in the memory, it is necessary to further set the addresses of all dynamic library functions and function variables in the dynamic module to the offset of the entry function address, and generate the executable file of the dynamic module based on the address offset. In this way, when accessing any dynamic library function in the dynamic module, the required dynamic library function can be normally accessed and called through the entry function address and the address offset of each function recorded in the executable file.

[0033] For example, assuming that the entry function address is 0x80000000 and the address offset of the init function is 0x100, then the actual memory address of the init function can be determined to be 0x80000000 + 0x100 = 0x80000100. Through the offset mechanism, the function code in the dynamic module can be loaded to any memory location for execution. When the dynamic module is loaded to a different base address, all functions in the dynamic module can be correctly accessed by simply adding the runtime base address (i.e., the actual address of the entry function) to the compile-time offset.

[0034] The mapping construction module 200 is used to construct a separate mapping relationship between the entry function input parameter and the dynamic library function based on the preset memory address.

[0035] The mapping construction module is mainly used to deal with the problem of obtaining the internal function symbols of the dynamic module mentioned in the above question. Its purpose is to enable external programs to accurately call the dynamic library functions in the dynamic module through pre-set input parameters.

[0036] The entry function input parameter is used to identify the specific type of the dynamic library function, such as the init function, run function, uninit function, etc. In a possible implementation, the entry function input parameter can be set to an integer type symbolic identifier, for example, identifier 1 corresponds to the init function, identifier 2 corresponds to the run function, and identifier 3 corresponds to the uninit function. By entering a specific entry function input parameter, the address offset of the function relative to the entry function can be queried, and then the absolute address of each function in the memory can be determined.

[0037] The position-independent loading processing module 300 is used to perform position-independent loading processing on the function variables, the global variables and the dynamic library functions, so that the data in the dynamic module has the ability to be loaded to any storage address in the volatile storage module.

[0038] The position-independent loading processing module is used to ensure that the dynamic module can run at any address in the memory. As mentioned above, the dynamic module includes dynamic library functions, function variables and global variables. Accordingly, if it is necessary to ensure that the dynamic module can run at any address in the memory, the function variables and global variables need to be loaded separately without position-independent loading.

[0039] Among them, global variables are variables defined inside a dynamic module. Their scope is the entire module and can be accessed by all functions in the module. They are usually used to store status or data inside a module that needs to be shared between multiple functions. Global variables always exist during program execution, even if they are not used by any function. However, function variables are different. Function variables are only created when a function is called. They exist during the execution of the function and are automatically destroyed after the function exits.

[0040] Therefore, based on the differences between global variables and function variables, the position-independent loading processing module in the embodiment of the present application is divided into a global variable processing unit and a function variable processing unit, which are used to perform position-independent loading processing on global variables and function variables, respectively. Next, the two will be introduced in conjunction with the specific embodiment drawings.

[0041] First, the global variable processing unit is introduced. Figure 3 , which is a schematic diagram of a flow chart of a global variable processing unit performing position-independent loading processing provided by an embodiment of the present application, which specifically includes the following steps: S101: Determine the absolute address of the entry function when the entry function is running in the memory through relative addressing of the program counter.

[0042] First, although the address setting module specifies the entry function entry address, since the dynamic module can be loaded to any location in the memory, the loading base address of the dynamic module is unknown during the compilation phase, so the absolute address of the entry function needs to be calculated when the dynamic module is running.

[0043] Program Counter (PC) relative addressing is also called PC-relative addressing. It is a common addressing method in computer architecture. It calculates the target address based on the current value of the program counter. The program counter is usually used to store the address of the next instruction to be executed. The core idea of ​​PC-relative addressing is that the offset between the target address and the current instruction address is fixed, so the target address can be obtained by adding an offset to the current PC value.

[0044] In this way, through the pre-fixed address of the entry function and the relative PC addressing method, the absolute address of the entry function when it is running in the memory can be calculated.

[0045] S102: Obtaining the global variable relative address of the global variable in the dynamic module through the executable file; the global variable relative address is used to represent the address offset of the entry function address.

[0046] S103: Determine the sum of the relative address of the global variable and the absolute address of the entry function as the absolute memory address of the global variable in the dynamic module, so that the global variable has the ability to be loaded to any storage address in the volatile storage module.

[0047] As can be seen from the previous text, the executable file stores the address offsets of all dynamic library functions and variables (including function variables and global variables) relative to the entry function. In this step, the address offset of the global variable relative to the entry function address can be obtained from the executable file. Subsequently, the address offset of the global variable relative to the entry function address is added to the absolute address of the entry function, and the sum of the two is used to determine the absolute memory address of the global variable, so that the global variable has the ability to be loaded to any storage address in the memory.

[0048] The assembly code for calculating the address of global variables is as follows: auipc a4,0x0 addi a4,a4,-46 #0 (start) li a5,144 add a5, a5, a4 In this assembly code, the first line indicates obtaining the current PC pointer, the second line indicates obtaining the absolute address of the entry function star in memory through pc + offset relative addressing. The third line indicates obtaining the relative address of the global variable in the dynamic module, and the fourth line indicates calculating the absolute address of the global variable in the dynamic module.

[0049] Next, the function variable processing unit in the position-independent load processing module is introduced. The function variable processing unit mainly performs the following steps: Step 1, compiling the function variables based on the -fPIE compilation option to generate position-independent code for the function variables; the position-independent code is used to call the function; The position-independent code is used to enable the call to the function to be completed in a program counter relative addressing manner, so that the function has the ability to be loaded to any storage address in the volatile storage module.

[0050] Position-independent loading of function variables needs to be implemented through a specific -fPIE compilation option. fPIE (Position Independent Executable) is a compilation option provided by compilers such as GCC, which is used to generate position-independent executable files. Its core purpose is to allow programs to be loaded into memory and run at any address without relying on a fixed base address. The working principle of -fPIE is to modify the function call from an absolute address jump to an offset jump relative to the PC. When linking, the addresses of code and data are recorded in the form of relative offsets. At runtime, the loader or dynamic linker completes the address calculation in combination with the loading base address.

[0051] The relative addressing of the program counter is realized by combining the auipc instruction and the address offset addition instruction in the RISC-V instruction set. For details about the process of assembling function variables, please refer to the following assembly code using the run function as an example: auipc a0, 0x0 addi a0, a0, 134 #8c (run) In this assembly code, the first line indicates obtaining the current PC pointer. The second line indicates that the absolute address of the run function in memory is used to implement the function call through pc + offset relative addressing, where 134 is the relative address offset of the run function in the memory module.

[0052] In a possible implementation, an external function calling module is also provided in the system of the embodiment of the present application. The external function calling module is used to implement the calling of the external function by the dynamic module through an indirect address transfer mechanism.

[0053] The key to dynamic module calling external functions is to decouple compile-time address binding and runtime address resolution. The absolute address of the external function is not used directly inside the module, but the indirect address is accessed through the middle layer (such as the global offset table GOT). All calls to external functions in the dynamic module execute the entries in the middle layer (global offset table GOT) instead of fixed addresses. This solves the problem of how to pass external symbols to the dynamic module in the above problem.

[0054] The embodiment of the present application provides a RISC-V chip dynamic library mechanism implementation system, chip and related methods. In its system, the function in the dynamic library is stored in the dynamic module, and it is stored in the non-volatile storage module of the system as the basic call of the dynamic library function. First, the address setting module sets the entry function of the dynamic module to a preset memory address, so that no matter where the dynamic module is loaded to the memory, the dynamic module can be accessed through the logical address represented by the preset memory address to call the function therein. Subsequently, the mapping construction module constructs a separate mapping relationship between the input parameters of the entry function and the dynamic library function based on the preset memory address, so as to ensure the accurate call of the dynamic library function in the dynamic module. Finally, the position-independent loading processing module performs a unified position-independent loading process on the function variables, global variables and dynamic library functions in the dynamic module, so that the dynamic library functions and data in the dynamic module can be loaded to any storage address in the volatile storage module, thereby realizing the dynamic library function mechanism based on the RISC-V chip, and the update efficiency of the function module is no longer subject to the influence of the static library.

[0055] The following is an introduction to a functional module update method for a RISC-V chip provided in an embodiment of the present application. The functional module update method for a RISC-V chip described below and the RISC-V chip dynamic library mechanism implementation system described above can be referenced to each other.

[0056] See also Figure 4 and Figure 5 , Figure 4 A flowchart of a method for updating a functional module of a RISC-V chip provided in an embodiment of the present application is provided. Figure 5 A schematic diagram of a flow chart of a N300 chip calling a dynamic module function in an actual application scenario provided in an embodiment of the present application. Figure 4 The specific steps include: S301: In response to a function module update instruction, write the module file data of the dynamic module into the volatile storage module; the function module update instruction includes: a target calling function and a target function module.

[0057] When receiving the function module update instruction, it is necessary to determine the physical memory to be applied according to the module file data of the dynamic module, and apply for the corresponding physical memory from the volatile storage module, so as to write the file data of the dynamic module into the volatile storage module. Figure 5 It can be seen that the N300 processing unit needs to apply for a specified size of memory in SRAM / DDR according to the actual size of the dynamic module to verify whether the memory space of the volatile storage module is sufficient. At the same time, by combining the non-volatile storage module with the volatile storage module, the memory usage can be reduced, thereby solving the problem of how to call the dynamic module in the resource-constrained embedded system mentioned in the above question.

[0058] S302: setting the entry function address of the dynamic module as a preset memory address, and constructing a function call mapping relationship that corresponds separately between the entry function input parameters and the dynamic library function based on the preset memory address; S303: Determine target input parameters from a plurality of function call mapping relationships based on the target calling function; S304: Calling a dynamic library function according to the plurality of function call mapping relationships and the target input parameters to dynamically update the target functional module.

[0059] In a possible implementation, the preset memory address is a memory start address; the non-volatile storage module is a flash module, and the volatile storage module is an SRAM module or a DDR module.

[0060] Based on the same inventive concept, corresponding to any of the above-mentioned embodiments, an embodiment of the present application further provides a RISC-V chip, which includes the dynamic library mechanism implementation system based on the RISC-V chip described in any of the above-mentioned embodiments, and can implement the corresponding RISC-V chip functional module update method.

[0061] The computer-readable media of the embodiments of the present application include permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device.

[0062] The computer instructions stored in the storage medium of the above embodiment are used to enable the computer to execute the gain flatness compensation method for millimeter wave signals as described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0063] It should be noted that each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system, method and chip, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. The system, method and chip described above are merely schematic, in which the units described as separate components may or may not be physically separated, and the components indicated as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0064] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A RISC-V chip dynamic library mechanism implementation system, characterized in that: It includes a non-volatile storage module, a volatile storage module, an address setting module, a mapping construction module and a position-independent loading processing module; The non-volatile storage module includes: a dynamic module, and the dynamic module includes: a dynamic library function, a function variable and a global variable; The address setting module is used to set the entry function address of the dynamic module to a preset memory address; The mapping construction module is used to construct a separate mapping relationship between the entry function input parameter and the dynamic library function based on the preset memory address; The position-independent loading processing module is used to perform position-independent loading processing on the function variables, the global variables and the dynamic library functions, so that the data in the dynamic module has the ability to be loaded into any storage address in the volatile storage module.

2. The system according to claim 1, characterized in that The address setting module is specifically used for: Constructing a link script for the non-volatile storage module; Through the link script, the entry function address is set to the preset memory address, and the addresses of all the dynamic library functions and variables in the dynamic module are set to offsets relative to the entry function address to generate an executable file.

3. The system according to claim 2, characterized in that The position-independent loading processing module includes: a global variable processing unit; the global variable processing unit is specifically used to: Determine the absolute address of the entry function when the entry function is running in the memory through relative addressing of the program counter; Obtaining, through the executable file, a global variable relative address of the global variable in the dynamic module; the global variable relative address is used to represent the address offset of the entry function address; The sum of the relative address of the global variable and the absolute address of the entry function is determined as the absolute memory address of the global variable in the dynamic module, so that the global variable has the ability to be loaded to any storage address in the volatile storage module.

4. The system according to claim 1, characterized in that The position-independent loading processing module includes: a function variable processing unit; the function variable processing unit is specifically used to: Compiling the function variables based on the -fPIE compilation option to generate position-independent code for the function variables; the position-independent code is used to enable calling the function; The position-independent code is used to enable the call to the function to be completed in a program counter relative addressing manner, so that the function has the ability to be loaded to any storage address in the volatile storage module.

5. The system according to claim 4 or 3, characterized in that: The program counter relative addressing method is implemented by combining the auipc instruction and the address offset addition instruction in the RISC-V instruction set.

6. The system according to claim 1, characterized in that The system also includes: an external function calling module; The external function calling module is used to implement the calling of the external function by the dynamic module through an indirect address transfer mechanism.

7. The system according to claim 1, characterized in that The preset memory address is a memory start address; the non-volatile storage module is a flash module, and the volatile storage module is an SRAM module or a DDR module.

8. A method for updating a functional module of a RISC-V chip, applied to a central processing unit of a RISC-V chip, wherein the RISC-V chip comprises: A non-volatile storage module and a volatile storage module, wherein the non-volatile storage module includes a dynamic module; The dynamic module includes: a dynamic library function; the method includes: In response to a function module update instruction, the module file data of the dynamic module is written into the volatile storage module; the function module update instruction includes: a target calling function and a target function module; The entry function address of the dynamic module is set as a preset memory address, and based on the preset memory address, a function call mapping relationship corresponding to each other between the entry function input parameter and the dynamic library function is constructed; Based on the target calling function, determining a target input parameter from a plurality of the function calling mapping relationships; A dynamic library function call is performed according to the plurality of function call mapping relationships and the target input parameters to dynamically update the target functional module.

9. The method according to claim 8, characterized in that The preset memory address is a memory start address; the non-volatile storage module is a flash module, and the volatile storage module is an SRAM module or a DDR module.

10. A RISC-V chip, characterized in that: A RISC-V chip dynamic library mechanism implementation system comprising any one of claims 1-7.

Images