Display driving circuit, display method and electronic equipment

Abstract

The invention discloses a display driving circuit, a display method and electronic equipment, and relates to the technical field of terminals. Each row of GOA module of the display driving circuit comprises an input control circuit, a GOA circuit and an output control circuit; the input control circuit is located between the input end of the GOA module and the GOA circuit; the output control circuit is located between the first output end and the second output end of the GOA module, the first output end outputs a first signal, the first signal is an input signal of the GOA module in the next row, the second output end outputs a second signal, and the second signal drives the display unit to display; the input control circuit controls connection or disconnection between the input end and the GOA circuit; when the GOA circuit obtains an input signal through the input end, the GOA circuit outputs a first signal at the first output end; the output control circuit controls connection or disconnection between the first output end and the second output end. By utilizing the scheme, the power consumption when the screen display content is refreshed can be reduced, and the endurance time of the electronic equipment is prolonged.

Description

Technical Field

[0001] The present application relates to the field of terminal technology, and in particular to a display driving circuit, a display method and an electronic device. Background Art

[0002] At present, for electronic devices such as mobile phones and tablet computers, when displaying, only a part of the display content on the display interface may change when the screen is refreshed, and the other part of the display content remains unchanged when the screen is refreshed. However, the display method used by current electronic devices will refresh the entire display interface as a whole, that is, synchronize the display content that has not been updated with the other part of the display content that has been updated.

[0003] The above refresh method, under the premise that the battery capacity of current electronic devices is limited, increases the power consumption when refreshing the screen display content and shortens the battery life of the electronic device. Summary of the invention

[0004] In order to solve the above problems, the present application provides a display driving circuit, a display method and an electronic device, which can reduce the power consumption when refreshing the screen display content and extend the battery life of the electronic device.

[0005] In the first aspect, the present application provides a display driving circuit, which includes: a multi-row array substrate gate driving GOA module; each row of GOA modules includes an input control circuit, a GOA circuit and an output control circuit. The input control circuit is located between the input end of the GOA module and the GOA circuit; the output control circuit is located between the first output end of the GOA module and the second output end of the GOA module, the first output end is used to output a first signal, the first signal is the input signal of the GOA module of the next row, and the second output end is used to output a second signal, and the second signal is used to drive the display unit to display. The input control circuit is used to control the conduction or disconnection between the input end and the GOA circuit; the GOA circuit is used to connect the clock signal, and when the input signal is obtained through the input end, the first signal is output at the first output end; the output control circuit is used to control the conduction or disconnection between the first output end and the second output end.

[0006] This solution adds an input control circuit and an output control circuit on the basis of the GOA circuit. The input control circuit can control whether the input signal can be transmitted to the GOA circuit, and then control whether the GOA circuit can generate a first signal and output it to the GOA circuit of the next row; and the output control circuit realizes the separation between the first signal and the second signal, so that the GOA unit can not output the second signal when generating the first signal, so that the input signal can continue to be normally provided to the GOA unit of the next row while not outputting the scanning signal.

[0007] By using this solution, it is possible to refresh each row of pixels in a specific area, that is, to achieve the purpose of scanning and refreshing from the beginning to the end of any row, which is described in detail below.

[0008] The input control circuit of the GOA module of the starting row controls the conduction between the input terminal and the GOA circuit, so that the GOA circuit generates an output signal after acquiring the input signal and transmits the output signal to the GOA module of the next row. And the output control circuit controls the disconnection between the first output terminal and the second output terminal, so that the GOA module of the starting row cannot output the second signal to the display unit, so the pixels of the starting row cannot be refreshed and can only be maintained in the state of the previous frame. And so on, until the GOA module of the Nth row acquires the first signal from the GOA module of the N-1th row, at which time the pixels of the 1st row to the N-1th row are not refreshed.

[0009] When the GOA module in the Nth row obtains the first signal from the GOA module in the N-1th row, the input control circuit of the GOA module controls the conduction between the input terminal and the GOA circuit, at which time the GOA circuit in the Nth row generates a first signal and transmits the first signal to the GOA module in the N+1th row. And the output control circuit controls the conduction between the first output terminal and the second output terminal, so that the GOA module in the Nth row outputs the second signal to the display unit, and the pixels in the Nth row can be refreshed. And so on, until the GOA module in the Mth row obtains the first signal from the GOA module in the M-1th row, at which time the pixels in the Nth to Mth rows are all refreshed.

[0010] When the GOA module in the Mth row obtains the first signal from the GOA module in the M-1th row and generates the first signal and the second signal, the input control circuit of the GOA module controls the disconnection between the input terminal and the GOA circuit. At this time, the first signal output by the GOA circuit in the Mth row cannot pass through the input control circuit of the GOA module in the M+1th row. At this time, the pixels in the remaining rows starting from the M+1th row cannot be reset or refreshed, but maintain the state of the previous frame.

[0011] In summary, the display driving circuit can reduce power consumption when refreshing the screen display content, thereby extending the battery life of the electronic device.

[0012] In a possible implementation, the input control circuit is specifically used to connect the first control signal, and when the first control signal is at a first level, the input end and the GOA circuit are turned on, and when the first control signal is at a second level, the input end and the GOA circuit are turned off.

[0013] In a possible implementation, the output control circuit is used to connect the second control signal, disconnect the first output terminal and the second output terminal when the second control signal is at a first level, and connect the first output terminal and the second output terminal when the second control signal is at a second level.

[0014] In a possible implementation, the output control circuit includes a first thin film transistor TFT, wherein a drain of the first TFT is connected to the first output terminal, a source of the first TFT is connected to the second output terminal, and a gate of the first TFT is connected to the second control signal.

[0015] In a possible implementation, the input control circuit includes a second thin film transistor TFT, a third TFT, a fourth TFT and a fifth TFT. The drain of the second TFT is connected to a high level, the gate of the second TFT is connected to a first control signal, the source of the second TFT is connected to the gate of the third TFT and the source of the fourth TFT; the drain of the third TFT is connected to the source of the fifth TFT, and the source of the third TFT is connected to the GOA circuit; the drain of the fourth TFT is connected to a low level and the gate of the fourth TFT; the drain of the fifth TFT is connected to the input terminal and the gate of the fifth TFT.

[0016] In a second aspect, the present application further provides a display method for controlling the display driving circuit provided in the first aspect above, the method comprising:

[0017] Determine the starting line and the ending line of the dynamic display area, the dynamic display area is the display area where the display content of the current frame changes;

[0018] Control the input control circuit to conduct the input terminal and the GOA circuit, and control the output control circuit to disconnect the first output terminal and the second output terminal;

[0019] When the GOA module in the starting row receives the first signal, the output control circuit is controlled to conduct the first output terminal and the second output terminal;

[0020] When the GOA module of the termination row outputs the second signal, the input control circuit is controlled to disconnect the input terminal and the GOA circuit.

[0021] Using this method, it is possible to refresh each row of pixels in a specific area, that is, to achieve the purpose of scanning and refreshing from the beginning to the end of any row. Therefore, it is possible to reduce power consumption when refreshing the screen display content and extend the battery life of the electronic device.

[0022] In a third aspect, the present application further provides an electronic device, which includes the display driving circuit provided in the first aspect above, and also includes a display unit and a display driving chip DDIC. The DDIC is used to send a clock signal, a control signal of an input control circuit, and a control signal of an output control circuit to each display driving circuit, so that all or part of the GOA modules in the multiple rows of GOA modules output a second signal.

[0023] In a possible implementation, the DDIC is specifically used to send a first control signal to an input control circuit. The input control circuit is specifically used to connect the first control signal, and when the first control signal is at a first level, the input end and the GOA circuit are turned on, and when the first control signal is at a second level, the input end and the GOA circuit are turned off.

[0024] In a possible implementation, the DDIC is specifically used to send a second control signal to the output control circuit. The output control circuit is specifically used to connect the second control signal, disconnect the first output terminal and the second output terminal when the second control signal is at a first level, and connect the first output terminal and the second output terminal when the second control signal is at a second level.

[0025] In a possible implementation, the output control circuit includes a first thin film transistor TFT, wherein a drain of the first TFT is connected to the first output terminal, a source of the first TFT is connected to the second output terminal, and a gate of the first TFT is connected to the second control signal.

[0026] In a possible implementation, the input control circuit includes a second TFT, a third TFT, a fourth TFT, and a fifth TFT. The drain of the second TFT is connected to a high level, the gate of the second TFT is connected to a first control signal, the source of the second TFT is connected to the gate of the third TFT and the source of the fourth TFT; the drain of the third TFT is connected to the source of the fifth TFT, and the source of the third TFT is connected to a GOA circuit; the drain of the fourth TFT is connected to a low level and the gate of the fourth TFT; the drain of the fifth TFT is connected to the input terminal and the gate of the fifth TFT.

[0027] In a possible implementation, the first display area corresponds to the GOA modules from the Nth row to the Mth row, N is a positive integer, M is an integer greater than N, and when the current frame refreshes the display screen in the first display area, DDIC is specifically used to: control the first control signal and the second control signal to be the first level until the GOA module in the Nth row receives the first signal sent by the GOA module in the N-1th row, and then controls the second control signal to be converted to the second level; when the GOA module in the Mth row outputs the second signal, controls the first control signal to be converted to the second level.

[0028] In a possible implementation, the electronic device further includes a processor. The processor is used to send display data of a dynamic display area of ​​the current frame to the DDIC, where the dynamic display area is a display area where display content of the current frame changes. The DDIC is used to determine an output start line and an output end line of the second signal of the current frame according to the display data, where the output start line is the Nth line and the output end line is the Mth line.

[0029] In a possible implementation, the electronic device further includes a processor. The processor is used to send global display data of the current frame to the DDIC. The DDIC is used to determine the output start line of the second signal corresponding to the dynamic display area and the output end line of the second signal corresponding to the dynamic display area according to the global display data of the current frame and the global display data of the previous frame, the output start line is the Nth line, and the output end line is the Mth line. The dynamic display area is the display area where the display content of the current frame changes.

[0030] In a possible implementation, the electronic device includes the following two display driving circuits: a first display driving circuit and a second display driving circuit, and the display unit includes a first display unit and a second display unit. The first display driving circuit is used to output a second signal to the first display unit; and the second display driving circuit is used to output a second signal to the second display unit.

[0031] In a possible implementation, the electronic device may be an electronic device including a folding screen, in which case the display unit is a folding screen, and the first display unit and the second display unit correspond to two parts of the folding screen. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of the architecture of a display driving circuit provided for a related solution;

[0033] Figure 2 A schematic diagram of a GOA unit provided for related schemes;

[0034] Figure 3 Scenario diagram provided for the embodiment of this application Figure 1 ;

[0035] Figure 4 A schematic diagram of a display driving circuit provided in an embodiment of the present application;

[0036] Figure 5 A schematic diagram of a GOA module provided in an embodiment of the present application;

[0037] Figure 6 Schematic diagram of the principle provided by the embodiment of this application Figure 1 ;

[0038] Fig. 7A A schematic diagram of another GOA module provided in an embodiment of the present application;

[0039] Figure 7B A schematic diagram of another GOA module provided in an embodiment of the present application;

[0040] Figure 8 A signal timing diagram provided for an embodiment of the present application;

[0041] Fig. 9 Schematic diagram of the principle provided by the embodiment of this application Figure 2 ;

[0042] Fig.10 Schematic diagram of the principle provided by the embodiment of this application Figure 3 ;

[0043] Fig.11 Scenario diagram provided for the embodiment of this application Figure 2 ;

[0044] Fig.12 A schematic diagram of an electronic device provided in an embodiment of the present application;

[0045] Fig.13 A schematic diagram of another electronic device provided in an embodiment of the present application;

[0046] Fig.14 A schematic diagram of a foldable screen mobile phone provided in an embodiment of the present application;

[0047] Fig.15 A flowchart of a display method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] The terms "first", "second", etc. in this application description are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0049] In the present application, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0050] In order to enable persons skilled in the art to more clearly understand the solution of the present application, the application scenario of the technical solution of the present application is first described below.

[0051] The row scanning mode of the display screen usually adopts a gate driver on array (GOA) design, which is described in detail below.

[0052] See also Figure 1, which is a schematic diagram of the architecture of a display driving circuit provided by a related solution.

[0053] The electronic device 10 includes a processor 11 , a DDIC 12 , and a display panel 13 .

[0054] The processor 11 can specifically be an application processor (AP). When the electronic device 10 runs an application (APP), the processor 11 sends control instructions and display data to the display driver chip (DDIC) 12, so that the DDIC 12 outputs one or more sets of clock signals to the GOA unit 131 of the display panel 13.

[0055] The GOA unit 131 generates a row scanning signal according to the clock signal, and outputs the row scanning signal to the display unit 132 of the display panel 13 , thereby controlling the display unit 132 to display.

[0056] See also Figure 2 , which is a schematic diagram of a GOA unit provided by a related scheme.

[0057] The GOA unit includes n GOA modules, where n is an integer greater than 3. Each GOA module includes a plurality of thin film transistors (TFTs), and each GOA module corresponds to a row of gate lines of the display unit. Specifically, the output end of each GOA module is connected to a row of gate lines of the display unit, and the scanning signal output by the output end of the GOA module acts on the row of gate lines.

[0058] Specifically, GOA module 1 is used as an example for explanation. GOA module 1 generates an output signal and a scan signal under the action of an input signal (Scan input) and a clock signal CLK2. GOA module 1 outputs the scan signal to the corresponding gate line to control the gate line to start. In addition, GOA module 1 uses the output signal as the input signal of the next GOA module, that is, GOA module 2. The scan signal and output signal output by GOA module 1 can be understood as the same signal divided into two outputs, that is, the scan signal and the output signal are generally the same.

[0059] GOA module 2 uses the output signal of GOA module 1 as an input signal, and under the action of clock signal CLK1, generates a scan signal and provides it to the corresponding gate line, and uses the output signal as an input signal of GOA module 3. And so on, until GOA module n generates a scan signal and provides it to the gate line.

[0060] In the above related solutions, when refreshing the displayed content, generally only overall refreshing can be achieved, which is described in detail below with reference to the accompanying drawings.

[0061] See also Figure 3 , which is a schematic diagram of a scenario provided by an embodiment of the present application Figure 1 .

[0062] Take the video playback app running on an electronic device as an example. Figure 3 In the interface shown, only the display content of the video playback area needs to be updated in real time. For the status bar, its display content will only be updated when there is a change in the various states indicated by the status bar. As for the static content area, its displayed content basically remains unchanged in the current interface.

[0063] But based on Figure 1 and Figure 2 According to the principle described above, when the display driving circuit of the electronic device is working, during the refresh process of a frame of content, each GOA module sequentially outputs a scanning signal to the corresponding gate line, thereby realizing the refresh of the global display content. That is, this refresh method will also refresh the status bar and static content area whose content has not been updated.

[0064] This refresh method means that even if only partial content is refreshed, the power consumption of the system and the display screen is as high as if the entire frame is refreshed. Under the current condition of limited battery capacity of electronic devices, the power consumption when refreshing the screen display content is increased, shortening the battery life of the electronic device.

[0065] In order to solve the above technical problems, the present application provides a display driving circuit, a display method and an electronic device. By using this solution, the display driving circuit can add an input control circuit and an output control circuit on the basis of the existing GOA circuit. Through the input control circuit, it is controlled whether the input signal can be transmitted to the GOA circuit, and then whether the GOA circuit can generate an output signal; and through the output control circuit, the GOA unit can not output a scan signal when generating an output signal, so it can not affect the GOA unit corresponding to the next row of pixels. Provide input signals. By using this solution, it is possible to refresh each row of pixels in a specific area, that is, to achieve the purpose of scanning and refreshing from any row to the end of scanning and refreshing at any row, so that the power consumption when refreshing the screen display content can be reduced, and the battery life of the electronic device can be extended.

[0066] An embodiment of the present application provides a display driving circuit, which is described in detail below with reference to the accompanying drawings.

[0067] See also Figure 4 and Figure 5 .in, Figure 4 A schematic diagram of a display driving circuit provided in an embodiment of the present application; Figure 5 A schematic diagram of a GOA circuit provided in an embodiment of the present application.

[0068] The input end of the display driving circuit is used to connect to the DDIC, and the output end of the display driving circuit is used to connect to the display unit.

[0069] The display driving circuit includes n GOA modules, which are GOA module 1 to GOA module n in sequence. Wherein n is an integer greater than or equal to 3. The circuit structures of GOA module 1 to GOA module n are the same, and the details can be seen in Figure 4 shown.

[0070] The GOA module in the embodiment of the present application specifically includes: an input control circuit 41 , a GOA circuit 42 and an output control circuit 43 .

[0071] The input end of the input control circuit 41 is connected to the input signal SIN and the first control signal END.

[0072] The output end of the input control circuit 41 is connected to the GOA circuit 42. The first output end of the GOA circuit 42 is used to output SOUT. The first signal SOUT is the output signal of the GOA circuit 42 and is also the input signal of the GOA circuit of the next row.

[0073] The second output terminal of the GOA circuit 42 is used to output a second signal GOUT, and the first output terminal is connected to the second output terminal through the output control circuit 43. The scanning signal GOUT outputted from the second output terminal is used to drive the display unit to display.

[0074] The output control circuit 43 is used to connect the second control signal START.

[0075] The first control signal END in the embodiment of the present application is used to control whether the input signal SIN can be input to the GOA circuit 42 through the input control circuit 41, and further control whether the GOA circuit 42 can generate the output signal SOUT.

[0076] Specifically, when the first control signal END is at a first level, the input signal SIN can be input to the GOA circuit 42 through the input control circuit 41, so that the GOA circuit 42 generates an output signal SOUT and outputs it to the next connected GOA unit, and when the first control signal END is at a second level, the input control circuit 41 can block the transmission of the input signal SIN, so that the GOA circuit 42 cannot generate the output signal SOUT. The first level and the second level are related to the specific type of TFT used in the circuit, and the embodiment of the present application is not specifically limited here.

[0077] The second control signal START in the embodiment of the present application is used to control the on-off between the output signal SOUT port and the scan signal GOUT port, thereby controlling whether the GOA module can output the scan signal GOUT to the corresponding gate line.

[0078] Specifically, when the GOA circuit 42 generates an output signal SOUT, when the second control signal START is at the first level, the SOUT port and the GOUT port are disconnected. At this time, the GOA module cannot output the scan signal GOUT to the corresponding gate line, so that the row of pixels cannot be reset and the display content cannot be refreshed, and can only maintain the state of the previous frame; and when the second control signal START is at the second level, the SOUT port and the GOUT port are connected. At this time, the GOA module outputs the scan signal GOUT to the corresponding gate line, so that the corresponding row of pixels can refresh the display content.

[0079] Continue to see Figure 4 , the input ports of the first control signal END of all GOA modules are connected together, and the first control signal END is uniformly provided by DDIC. The input ports of the second control signal START of all GOA modules are connected together, and the second control signal START is uniformly provided by DDIC. The scan signal Gout of each GOA module is output to the display unit of the display panel as a start signal for the display drive charging of the row. Except for the GOA modules in the first row, the SIN port of the GOA modules in the Nth row is connected to the SOUT port of the GOA modules in the previous row. The input signal SIN of the GOA modules in the first row is the starting input signal, which can also be represented by Scan input. The input signal of the GOA modules in the first row can be directly provided by DDIC.

[0080] In addition, DDIC also provides clock signals CLK1 and CLK2 to each GOA module. CLK1 is connected to the SCK1 port of each GOA module, and CLK2 is connected to the SCK2 port of each GOA module.

[0081] The idea of ​​the solution provided in the embodiment of the present application is: through the first control signal and the input control circuit, control whether the GOA circuit can generate an output signal; and through the second control signal and the output control circuit, separate the output signal and the scanning signal that are always generated synchronously and changed synchronously in the prior art solution, so that the GOA unit can generate an output signal without outputting a scanning signal, thereby not affecting the provision of an input signal to the GOA unit corresponding to the next row of pixels.

[0082] Through the solution provided in the embodiment of the present application, it is possible to refresh each row of pixels in a specific area, that is, to achieve the purpose of starting scanning and refreshing from any row and ending scanning and refreshing at any row, which is explained in detail below.

[0083] by Figure 3The pixels corresponding to the video playback area in the scene shown are from the Nth row to the Mth row, where N is an integer greater than 1 and M is an integer greater than N. It can be understood that in actual applications, N can also be 1, indicating that the refresh starts from the first row of pixels, and M can also be N, in which case only one row of pixels is refreshed.

[0084] In the following description, the TFT used in the GOA module is specifically a P-type metal oxide semiconductor field effect (positive channel metal oxide semiconductor, PMOS) transistor. At this time, when the control end of the TFT is connected to a high level, the TFT is turned off; when the control end of the TFT is connected to a low level, the TFT is turned on. At this time, the first level described in the above description is a high level, and the second level is a low level.

[0085] DDIC first outputs SIN to the start line GOA module, that is, outputs Scan input signal to the start line GOA module. And the END signal and START signal output by DDIC are both kept at high level.

[0086] At this time, the input control circuit 41 of the GOA module of the starting row controls the input signal SIN to be input to the GOA circuit 42, so that the GOA circuit 42 generates an output signal SOUT and transmits the output signal SOUT to the GOA module of the next row. However, since the START signal is at a high level, the GOUT port and the SOUT port are disconnected, so that the GOA module of the starting row cannot output GOUT to the display unit, so the pixels of the starting row cannot be refreshed and can only be maintained at the state of the previous frame.

[0087] And so on, until the GOA module in the Nth row obtains the input signal SIN from the GOA module in the N-1th row, at which time the pixels in the 1st row to the N-1th row are not refreshed.

[0088] When the GOA module in the Nth row obtains the input signal SIN from the GOA module in the N-1th row, the END signal output by the DDIC remains at a high level, and the START signal is switched from a high level to a low level. At this time, the GOA circuit in the Nth row generates an output signal SOUT and transmits the output signal SOUT to the GOA module in the N+1th row. And because the START signal is at a low level, the SOUT port and the GOUT port are connected, so that the GOA module in the Nth row outputs GOUT to the display unit, that is, at this time, the pixels in the Nth row can be refreshed.

[0089] This process is repeated in this way until the GOA module in the Mth row obtains the input signal SIN from the GOA module in the M-1th row, at which time the pixels in the Nth row to the Mth row are all refreshed.

[0090] When the GOA module in the Mth row obtains the input signal SIN from the GOA module in the M-1th row and generates an output signal and a scan signal, the END signal output by the DDIC switches to a low level, and the START signal can switch from a low level to a high level, or maintain a low level. At this time, the input signal SIN cannot be input to the GOA circuit, and the SOUT output by the GOA circuit in the Mth row cannot pass through the input control circuit of the GOA module in the M+1th row. At this time, the remaining rows of pixels starting from the M+1th row cannot be reset or refreshed, but maintain the state of the previous frame.

[0091] Through the above process, the purpose of scanning and refreshing from the Nth row to the Mth row in the current frame is achieved. Figure 3 The video playback area in the current frame realizes the refresh of the display content, while the status bar and the static content area do not refresh the content in the current frame. Further, by changing the values ​​of N and M, the electronic device can distinguish the display area in the vertical direction and reduce the refresh rate of some areas to reduce power consumption, which is described in detail below.

[0092] See also Figure 6 , which is a schematic diagram of the principle provided by the embodiment of the present application Figure 1 .

[0093] Figure 6 A, B and C in the table correspond to Figure 3 The status bar, video playing area and static content area in the video player. Set three different refresh rates for each of the three areas. For example, set the refresh rate of area A to 1Hz, the refresh rate of area B to 60Hz, and the refresh rate of area C to 30Hz.

[0094] The electronic device includes L rows of pixels, wherein region A includes the 1st row of pixels to the P-1th row of pixels, region B includes the Pth row of pixels to the Qth row of pixels, and region C includes the Q+1th row of pixels to the Lth row of pixels.

[0095] At this time, the principle of AP side and panel sending image refresh is as follows Figure 6The first frame transmits all the images of areas A, B and C to the panel for refresh display; the second frame transmits only the content of area B to the panel for refresh display, at this time N is P and M is Q; the third frame transmits the images of areas B and C to the panel for refresh display, at this time N is P and M is L; the fourth frame transmits the content of area B to the panel for refresh display, at this time N is P and M is Q; the second and third frames are cycled in sequence until the 60th frame completes a cycle; the 61st frame transmits all the images of areas A, B and C to the panel for refresh display again, and a new cycle begins.

[0096] DDIC sends a synchronization signal (Tearing effect, TE) to AP. The TE signal is the feedback signal from DDIC to AP and is used to synchronize data. It is used to inform AP to start reading data and displaying it, so as to avoid conflicts caused by AP writing data to the same storage location while reading data, which often causes display distortion.

[0097] The Mobile Industry Processor Interface (MIPI) is used to connect the AP and the panel. The MIPI interface includes the display serial interface (DSI), which is used for the AP to transmit image data to the panel.

[0098] In one possible implementation, the display data sent by the AP to the DDIC only includes the display data of the updated area. At this time, when the DDIC determines that there is a display area where the display content is not updated based on the data sent by the AP, the method in the above embodiment of the present application is used to control the display driving circuit.

[0099] In another possible implementation, the display data sent by the AP to the DDIC includes the display data of the entire display area of ​​the current frame. At this time, the DDIC compares the data sent by the AP in the current frame with the data sent by the AP in the previous frame, determines the area that needs to be refreshed and / or the area that has not been refreshed, and then uses the method in the above embodiments of the present application to control the display driving circuit.

[0100] In summary, the display driving circuit provided in the embodiment of the present application can realize the refresh of each row of pixels in a specific area, that is, the purpose of scanning and refreshing from the beginning of any row to the end of any row is realized, so that the electronic device no longer always performs a unified refresh on the global screen. Therefore, the power consumption when refreshing the screen display content can be reduced, and the battery life of the electronic device can be extended.

[0101] The following is an explanation in conjunction with a specific implementation method.

[0102] See also Fig. 7A , which is a schematic diagram of another GOA module provided in an embodiment of the present application.

[0103] The GOA module includes 13 TFTs and 2 capacitors.

[0104] The input control circuit 41 includes TFTs M10 to M13.

[0105] The GOA circuit 42 includes TFTs M1 to M8 and capacitors C1 and C2.

[0106] The TFT included in the output control circuit 43 is M9.

[0107] In the embodiment of the present application, it is described by taking the example that M1 to M13 are all PMOS tubes.

[0108] The drain of M1 is connected to the source of M10 , the gate of M1 is connected to SCK1 , and the source of M1 is connected to the gate of M4 , the drain of M8 , and the source of M2 .

[0109] The drain of M2 is connected to the source of M3, and the gate of M2 is connected to SCK2.

[0110] The drain of M3 is connected to the high level VGH, and the gate of M3 is connected to the source of M5, the source of M4, the first end of C1 and the gate of M7.

[0111] The drain of M4 is connected to SCK1.

[0112] The drain of M5 is connected to the low level VGL, the drain of M12 and the gate of M12, and the gate of M5 is connected to SCK1. In the embodiment of the present application, the drain of M5 is connected to the low level VGL through the drain of M12 as an example. In another possible implementation, the drain of M5 can be directly connected to the low level VGL, see Figure 7B The GOA module shown.

[0113] The drain of M6 is connected to SCK2, the gate of M6 is connected to the first end of C2 and the source of M8, and the source of M6 is connected to the second end of C2 and the SOUT port.

[0114] The drain of M7 is connected to the high level VGH and the second end of the capacitor C1 , and the source of M7 is connected to the second end of C2 and the SOUT port.

[0115] The gate of M8 is connected to the low level VGL.

[0116] The drain of M9 is connected to the SOUT port, the gate of M9 is connected to the START signal, and the source of M9 is connected to the GOUT port.

[0117] The drain of M10 is connected to the source of M13 , and the gate of M10 is connected to the source of M12 and the source of M11 .

[0118] The drain of M11 is connected to the high level VGH, the drain of M11 is connected to the END signal, and the source of M11 is connected to the source of M12.

[0119] The drain of M12 is connected to the low level VGL and its own gate.

[0120] The drain of M13 is connected to the input signal SIN, and the drain of M13 is connected to the gate of M13. At this time, M13 is used as a diode, so that the input signal can pass through M13 in one direction, and the reverse current cannot flow through M13 to the SIN port.

[0121] The GOA circuit 42 formed by M1-M8, C1 and C2 in the embodiment of the present application is a shift register GOA unit, which can be used as Figure 2 In the GOA module, the drain of M1 is connected to the input signal SIN, and the output signal SOUT is also the scanning signal GOUT. That is, the present application can be reused Figure 2 It is understandable that the GOA circuit 42 can be replaced by a shift register unit with the same function formed by other TFTs and capacitors. The GOA circuit 42 in the embodiment of the present application is only for illustration and does not constitute a limitation on the technical solution of the present application.

[0122] It can be seen that the present application realizes on-off control of the input signal SIN by adding an input control circuit 41 , and realizes separation of the output signal SOUT and the scanning signal GOUT by adding an output control circuit 42 .

[0123] The working principle of the display driving circuit using the GOA module is described in detail below.

[0124] The following description continues with the example of refreshing the pixels from the Nth row to the Mth row.

[0125] When the display driving circuit starts working, DDIC first outputs SIN to the start row GOA module, that is, outputs Scan input signal to the start row GOA module, and both END signal and START signal output by DDIC are kept at high level.

[0126] At this time, M11 is closed, M12 is open, and the gate of M10 is connected to VGL, so M10 is open, and the input signal provided by DDIC is connected to M11 through M10. Under the action of SIN, SCK1 and SCK2, the SOUT port is pulled low, and then the output signal SOUT is generated and output to the GOA module of the next row. However, the START signal is high at this time, M9 is closed, and the GOUT port and the SOUT port are disconnected, so that the GOA module of the starting row cannot output GOUT to the display unit, so the pixels of the starting row cannot be refreshed and can only be maintained in the state of the previous frame.

[0127] The GOUT ports of the GOA modules in the 1st row to the N-1th row are pulled low in sequence, and at this time, the pixels in the 1st row to the N-1th row are not refreshed.

[0128] When the GOA module in the Nth row obtains the input signal SIN from the GOA module in the N-1th row, the END signal output by the DDIC remains at a high level, and the START signal is switched from a high level to a low level. At this time, the GOA circuit in the Nth row generates an output signal SOUT and transmits the output signal SOUT to the GOA module in the N+1th row. And because the START signal is at a low level, M9 is turned on, so that the SOUT port and the GOUT port are connected, and the GOA module in the Nth row outputs GOUT to the display unit. At this time, the signal of GOUT follows SOUT and is pulled down and then pulled up row by row, that is, the pixels in the Nth row can be refreshed at this time.

[0129] This process is repeated in this way until the GOA module in the Mth row obtains the input signal SIN from the GOA module in the M-1th row, at which time the pixels in the Nth row to the Mth row are all refreshed.

[0130] When SOUT is pulled down row by row to the Mth row, the END signal output by DDIC switches to a low level. At this time, the gates of M11 of all rows are connected to a low level, and M11 of all rows of GOA modules are turned on, so that the gates of M10 of all rows of GOA modules are connected to a high level VGH. At this time, M10 of all rows of GOA modules is turned off, and the SOUT signal of the Mth row cannot pass through M10 of the M+1th row, so that the pull-down of the SOUT port of the M+1th row is cut off. At this time, the pixels of the remaining rows starting from the M+1th row cannot be reset or refreshed, but remain in the state of the previous frame.

[0131] The specific signal timing of the above control process can be found in Figure 8 The signal schematic diagram is shown.

[0132] Figure 8SCK1 and SCK2 correspond to the clock signals CLK1 and CLK2 provided by DDIC respectively. Scan input is the input signal provided by DDIC to the GOA module in the first row, SOUT(1)-SOUT(M+1) are the output signals generated by the GOA modules in the first row to the M+1th row, and GOUT(1)-SOUT(M+1) are the scan signals corresponding to the GOA modules in the first row to the M+1th row.

[0133] It can be seen that under the control of the first control signal END and the second control signal START, only the pixels corresponding to the GOA modules in the Nth to Mth rows can be refreshed, corresponding to area A in the figure.

[0134] See also Fig. 9 , which is a schematic diagram of the principle provided by the embodiment of the present application Figure 2 .

[0135] At this time, the content of each frame image refresh is Fig. 9 The gray area in the figure and the white area correspond to the area that does not need to be refreshed in this frame.

[0136] The AP of the electronic device can determine the pixel start row and pixel end row corresponding to each display area according to the running state of the application at this time. For example, it is determined that the status bar A includes the 1st row of pixels to the P-1th row of pixels, the content update area B includes the Pth row of pixels to the Qth row of pixels, and the static content area C includes the Q+1th row of pixels to the Lth row of pixels.

[0137] In the first frame, the start scanning behavior is the first row, and the end scanning behavior is the Lth row, that is, N is 1 and M is L. At this time, the first frame transmits all the images of areas A, B and C to the panel for refresh display.

[0138] In the second frame, the start scanning behavior is the Pth row, and the end scanning behavior is the Lth row, that is, N is P and M is L. At this time, the second frame transmits the images of the B and C areas to the panel for refresh display.

[0139] In the third frame, the start scanning behavior is the Pth row, and the end scanning behavior is the Qth row, that is, N is P and M is Q. At this time, the third frame transmits the image of area B to the panel for refresh display.

[0140] In the fourth frame, the start scanning behavior is the Pth row, and the end scanning behavior is the Lth row, that is, N is P and M is L. At this time, the second frame transmits the images of the B and C areas to the panel for refresh display.

[0141] The display mode of the second frame and the third frame is cycled in sequence until the 60th frame completes a cycle; the 61st frame again transmits all the images of the A, B and C areas to the panel for refresh display, and a new cycle begins.

[0142] For the unscanned area, the source signal (source) is set to a high impedance state (Hiz) to save power consumption.

[0143] Through the above refresh method, area A can be refreshed at a refresh rate of 1 Hz, area B can be refreshed at a refresh rate of 60 Hz, and area C can be refreshed at a refresh rate of 30 Hz, that is, each display area has its own corresponding refresh rate.

[0144] See also Fig.10 , which is a schematic diagram of the principle provided by the embodiment of the present application Figure 3 .

[0145] At present, in order to improve the user experience, the screen refresh rate of electronic devices is increasing day by day, and many electronic devices can achieve a refresh rate of 120Hz. At this time, the solution provided by the embodiment of the present application can be applied to refresh area A at a refresh rate of 1Hz, refresh area B at a refresh rate of 120Hz, and refresh area C at a refresh rate of 60Hz.

[0146] It is understandable that, in addition to Fig.10 In addition to the implementation shown, other implementations may be used. For example, area A is refreshed at a refresh rate of 1 Hz, area B is refreshed at a refresh rate of 120 Hz, and area C is refreshed at a refresh rate of 30 Hz.

[0147] In actual applications, users can make relevant settings for the refresh rate in the system interface of the electronic device.

[0148] See also Fig.11 , which is a schematic diagram of a scenario provided by an embodiment of the present application Figure 2 .

[0149] Current electronic devices can support refresh rates of 60Hz, 120Hz, and adaptively adjustable refresh rates. Adaptively adjustable refresh rates refer to electronic devices dynamically adjusting the refresh rate of the global content on the screen according to the current display content. For example, when playing a video, the refresh rate of the global content on the screen is adjusted to 120Hz, and when browsing documents, the refresh rate of the global content on the screen is reduced to a minimum of 1Hz.

[0150] In the embodiment of the present application, the electronic device also supports a local adaptive refresh function. When the user turns on the local adaptive refresh, the refresh rate of the area where the static display content (including the status bar) is located can be reduced.

[0151] In a possible implementation, the user can set the refresh rate of static display content on the electronic device. For example, when the user chooses to use a refresh rate of 120 Hz, the user can set the refresh rate of static display content to 30 Hz or 60 Hz. When the user chooses to use a refresh rate of 60 Hz, the user can set the refresh rate of static display content to 30 Hz.

[0152] In another possible implementation, the user does not need to set the static display content refresh rate, and the static display content refresh rate can be determined by the processor or DDIC of the electronic device.

[0153] The above description is only for example and does not constitute a limitation on the technical solution of the present application. In addition, the above setting interface is only for illustration, and other interface design solutions can be adopted in actual application.

[0154] In summary, the display driving circuit provided in the embodiment of the present application adds an input control circuit and an output control circuit. Using the first control signal and the input control circuit, it is controlled whether the input signal can be transmitted to the GOA circuit, and then the GOA circuit is controlled whether it can generate an output signal; and through the second control signal and the output control circuit, the GOA unit can not output the scanning signal when generating the output signal, so it can not affect the input signal provided to the GOA unit of the next row. Therefore, the display driving circuit can realize the refresh of each row of pixels in the entire area or a specific area, so that the electronic device is no longer always refreshed uniformly for the global picture. Therefore, the power consumption when the screen display content is refreshed can be reduced, and the battery life of the electronic device is extended.

[0155] Based on the display driving circuit provided in the above embodiments, an embodiment of the present application further provides an electronic device using the display driving circuit, which is described in detail below with reference to the accompanying drawings.

[0156] See also Fig.12 , which is a schematic diagram of an electronic device provided in an embodiment of the present application.

[0157] The electronic device 10 includes a processor 11 , a DDIC 12 and a display panel 13 .

[0158] The processor 11 may include one or more processing units. For example, the processor 110 may include an application processor (AP). The operating system, user interface and application programs on the electronic device are all executed on the AP.

[0159] The processor 11 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 11 is a cache memory. The memory may store instructions or data that the processor 11 has just used or cyclically used. If the processor 11 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0160] The electronic device 10 realizes the display function through a graphics processing unit (GPU), a display screen, a DDIC 12, and a processor 11. The GPU is a microprocessor for image processing, which connects the display screen and the application processor 11. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 11 is used to send control instructions and picture data to the DDIC 12, so that the DDIC 12 outputs a clock signal, a first control signal, and a second control signal to the display driving circuit 40 of the display panel 13.

[0161] The display panel 13 can adopt organic light-emitting diodes (OLED), active-matrix organic light-emitting diodes or active-matrix organic light-emitting diodes (AMOLED), flexible light-emitting diodes (FLED), Mini-LED, Micro-LED, Micro-OLED, quantum dot light emitting diodes (QLED), low temperature polycrystalline oxide (LTPO), low temperature polycrystalline silicon (LTPS), etc.

[0162] The display panel 13 in the embodiment of the present application specifically includes a display driving circuit 40 and a display unit 132. The specific description of the display driving circuit 40 can be found in the above embodiment, and will not be repeated here.

[0163] The output end of the display driving circuit 40 is connected to the display unit 132 for outputting a scanning signal to the display unit 132 , thereby enabling the corresponding row of pixels to refresh the display content.

[0164] In this implementation, the electronic device 10 includes a display driving circuit 40 , and through the DDIC and the display driving circuit 40 , it is possible to refresh each row of pixels in a specific area.

[0165] In one possible implementation, the display data sent by the AP to the DDIC only includes the display data of the area where the display content of the current frame is updated, that is, only includes the display data of the dynamic display area. The DDIC determines the pixel row range of the display area where the data is updated based on the data sent by the AP, and then controls the display driving circuit.

[0166] For example, the current display unit 132 includes display areas A, B, C and D, and only area B has data update in the current frame, then the processor 11 can send the display data corresponding to area B to the DDIC 12. After receiving the display data, the DDIC determines the pixel row range of the display area with data update according to the display data, for example, the pixel row range of area B is from the Nth row to the Mth row. At this time, the DDIC sends the first control signal and the second control signal to the display driving circuit 40, so that when the current frame is refreshed, the display driving circuit 40 starts to output the scan signal to the display unit 132 from the Nth row, and stops outputting the scan signal to the display unit 132 from the M+1th row after the output of the scan signal of the Mth row is completed, so that the display content from the Nth row to the Mth row corresponding to area B is refreshed, while the display content of the remaining parts is not refreshed.

[0167] When refreshing the next frame content, both area B and area C have data updates in the current frame, and the processor 11 can send the display data corresponding to area B and area C to DDIC12. After receiving the display data, DDIC determines the pixel row range of the data update display area according to the display data, for example, the pixel row range of area B and area C is from the Nth row to the Pth row. At this time, DDIC sends the first control signal and the second control signal to the display driving circuit 40, so that the display driving circuit 40 starts to output the scanning signal to the display unit 132 at the Nth row when the current frame is refreshed, and stops outputting the scanning signal to the display unit 132 at the P+1th row after the scanning signal of the Pth row is output, so that the display content of the display unit 132 from the Nth row to the Pth row is refreshed, while the display content of the remaining part is not refreshed.

[0168] When the above two-frame refresh mode appears in a cycle, the refresh rate of area B is twice that of area C.

[0169] In another possible implementation, the display data sent by the AP to the DDIC is global display data, including display data of all display areas of the current frame, that is, including display data of the dynamic display area and display data of the static display area. The static display area is the display area where the display content of the current frame is the same as that of the previous frame.

[0170] At this time, after DDIC obtains the display data of AP, it compares the display data of the previous frame with the display data of the current frame, determines the pixel row range of the display area with data update, and then controls the display driving circuit. The specific control method is the same as above and will not be repeated here.

[0171] See also Fig.13 , which is a schematic diagram of another electronic device provided in an embodiment of the present application.

[0172] Fig.13 The implementation shown is similar to Fig.12 The difference is: Fig.13 The middle display panel includes two display driving circuits, which are represented by 40a and 40b respectively. At this time, each row of pixels of the display unit is evenly divided into two parts on the left and right along the center line, and is refreshed by the corresponding display driving circuits on both sides. Specifically, each row of pixels of the S1 part of the display unit 132 is driven by the display driving circuit 40a for refreshing, and each row of pixels of the S2 part of the display unit 132 is driven by the display driving circuit 40b for refreshing.

[0173] In a possible implementation, the electronic device 10 includes only one non-folding display screen, and in this case, the S1 portion and the S2 portion are portions on two sides of the non-folding display screen.

[0174] In another possible implementation, the electronic device 10 includes a foldable display screen. Fig.12 In the folding screen mobile phone shown in the figure, the two sides of the folding screen correspond to the S1 part and the S2 part respectively, that is, the display driving circuit 40a is used to control the refresh of the screen on one side of the folding screen, and the display driving circuit 40b is used to control the refresh of the screen on the other side of the folding screen.

[0175] The following example illustrates a display content refresh method when the electronic device includes two display driving circuits.

[0176] For example, for a foldable screen device, when the foldable screen is unfolded for use, two display drive circuits are used to refresh the content displayed on the foldable screen. The user can control the foldable screen to display different apps on both sides. The dynamic content area of ​​the current frame on the app displayed in the S1 part is area B, and the other areas are static content areas. The dynamic content area of ​​the current frame on the app displayed in the S2 part is area G, and the other areas are static content areas.

[0177] The current DDIC 12 determines that the pixel row range of the display area with data update is N to M rows of the S1 part and P to Q rows of the S2 part according to the data of the current frame sent by the processor 11. Among them, the N to M rows of the S1 part correspond to Fig.13 The B area in the S2 section; the P to Q rows correspond to Fig.13 The G area in the

[0178] DDIC12 sends the corresponding first control signal and the second control signal to the display driving circuit 40a, so that the display driving circuit 40a starts to output the scanning signal to the display unit 132 from the Nth row until the output of the scanning signal of the Mth row is completed, and then stops outputting the scanning signal to the display unit 132 at the M+1th row, so that the display content within the Nth row to the Mth row corresponding to the B area is refreshed, while the display content in the remaining areas of the S1 part is not refreshed.

[0179] DDIC12 sends the corresponding first control signal and the second control signal to the display driving circuit 40b, so that the display driving circuit 40b starts to output the scanning signal to the display unit 132 from the Pth row until the scanning signal of the Qth row is output, and then stops outputting the scanning signal to the display unit 132 from the Q+1th row, so that the display content within the Pth row to the Qth row corresponding to the G area is refreshed, while the display content in the remaining areas of the S2 part is not refreshed.

[0180] In practical applications, the display panel 13 may further include a greater number of display driving circuits. The specific display content refresh principle is similar to that described in the above embodiment and will not be described in detail here.

[0181] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device 10. In other embodiments of the present application, the electronic device 10 may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0182] To sum up, the electronic device provided in the embodiment of the present application can refresh each row of pixels in a specific area. Therefore, the electronic device can adopt different refresh rates for different areas of the display screen, and reduce the refresh rate of the static content area, instead of always performing a unified refresh on the global screen. Therefore, the power consumption when refreshing the screen display content can be reduced, thereby extending the battery life of the electronic device.

[0183] The embodiment of the present application further provides a display method, which can be applied to control the display driving circuit provided in the above embodiment, and is described in detail below with reference to the accompanying drawings.

[0184] See also Fig.15, which is a flow chart of a display method provided in an embodiment of the present application.

[0185] The method comprises the following steps:

[0186] S11: AP sends display data to DDIC.

[0187] The display data is the display data corresponding to the current frame.

[0188] In a possible implementation, the display data sent by the AP to the DDIC is the display data of the dynamic display area of ​​the current frame. The dynamic display area is a display area where the display content of the current frame is different from that of the previous frame.

[0189] In another possible implementation, the display data sent by the AP to the DDIC is the global display data of the current frame, including the display data of the dynamic display area and the display data of the static display area. The static display area is the display area where the display content of the current frame is the same as that of the previous frame.

[0190] S12: DDIC determines the start row and the end row of the dynamic display area according to the display data.

[0191] When the display data is the display data of the dynamic display area of ​​the current frame, the DDIC determines the start row and the end row of the dynamic display area according to the display data.

[0192] When the display data is global display data of the current frame, the DDIC determines the start row and the end row corresponding to the dynamic display area according to the global display data of the current frame and the global display data of the previous frame.

[0193] The start row is the row where the GOA module that starts to output the second signal to the display unit is located.

[0194] The end row is the row where the GOA module that outputs the second signal to the display unit last is located. The pixels in each row between the start row and the end row are refreshed in the current frame.

[0195] For the GOA modules of the rows before the start row and after the end row, the second signal is not output to the display unit, so the pixels of the rows before the start row and after the end row are not refreshed in the current frame.

[0196] S13: DDIC controls the input control circuit to turn on the input terminal and the GOA circuit, and controls the output control circuit to turn off the first output terminal and the second output terminal.

[0197] S14: The first signal is input to the GOA circuit through the input control circuit.

[0198] In a possible implementation, the first signal is a first signal output by a GOA circuit of a row above the current row. In another possible implementation, the current row is the first row, and the first signal comes from a DDIC.

[0199] S15: The current GOA circuit outputs a first signal to the GOA module in the next row.

[0200] At this time, since the first output terminal and the second output terminal are disconnected, the GOA circuit cannot output the second signal to the display unit.

[0201] S16: When the GOA module of the starting row receives the first signal, the DDIC controls the output control circuit to turn on the first output terminal and the second output terminal.

[0202] S17: The first signal is input to the GOA circuit through the input control circuit.

[0203] S18: The GOA circuit of the current row outputs a first signal to the GOA module of the next row, and outputs a second signal to the display unit.

[0204] S19: DDIC controls the input control circuit to disconnect the input terminal and the GOA circuit after the GOA module of the termination row outputs the second signal.

[0205] S20: In each row of GOA modules after the row is terminated, no first signal is input to the GOA circuit through the input control circuit.

[0206] S21: The GOA module after the termination line stops outputting the first signal and the second signal.

[0207] The above method steps in this embodiment are only for the convenience of explanation and do not constitute a limitation on the technical solution of this application.

[0208] To sum up, by using the method provided in the embodiment of the present application, it is possible to refresh each row of pixels in a specific area, that is, to achieve the purpose of scanning and refreshing from the beginning of any row to the end of any row, thereby reducing the power consumption when refreshing the screen display content and extending the battery life of the electronic device.

[0209] References to "one embodiment" or "some embodiments" etc. described in this specification mean that a particular feature, structure or characteristic described in conjunction with the embodiment is included in one or more embodiments of the present application. Thus, the phrases "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear at different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0210] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0211] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A display driving circuit, characterized in that: The display driving circuit comprises: a plurality of rows of array substrate gate driving GOA modules; each row of the GOA modules comprises an input control circuit, a GOA circuit and an output control circuit; The input control circuit is located between the input end of the GOA module and the GOA circuit; The output control circuit is located between a first output end of the GOA module and a second output end of the GOA module, the first output end is used to output a first signal, the first signal is an input signal of the GOA module of the next row, and the second output end is used to output a second signal, and the second signal is used to drive the display unit to display; The input control circuit is used to control the conduction or disconnection between the input terminal and the GOA circuit; The GOA circuit is used to connect a clock signal and output the first signal at the first output terminal when an input signal is obtained through the input terminal; The output control circuit is used to control the conduction or disconnection between the first output end and the second output end.

2. The display driving circuit according to claim 1, characterized in that: The input control circuit is specifically used to connect a first control signal. When the first control signal is at a first level, the input end and the GOA circuit are turned on. When the first control signal is at a second level, the input end and the GOA circuit are turned off.

3. The display driving circuit according to claim 1, characterized in that: The output control circuit is specifically used to connect a second control signal. When the second control signal is at a first level, the first output end and the second output end are disconnected. When the second control signal is at a second level, the first output end and the second output end are connected.

4. The display driving circuit according to claim 3, characterized in that: The output control circuit comprises a first thin film transistor TFT; The drain of the first TFT is used to connect to the first output terminal, the source of the first TFT is used to connect to the second output terminal, and the gate of the first TFT is used to connect to the second control signal.

5. The display driving circuit according to claim 2, characterized in that: The input control circuit includes a second thin film transistor TFT, a third TFT, a fourth TFT and a fifth TFT; The drain of the second TFT is connected to a high level, the gate of the second TFT is connected to the first control signal, the source of the second TFT is connected to the gate of the third TFT and the source of the fourth TFT; the drain of the third TFT is connected to the source of the fifth TFT, and the source of the third TFT is connected to the GOA circuit; the drain of the fourth TFT is connected to a low level and the gate of the fourth TFT; the drain of the fifth TFT is connected to the input terminal and the gate of the fifth TFT.

6. An electronic device, characterized in that: include: A display unit, a display driver chip DDIC and at least one display driver circuit; Each of the display driving circuits includes a plurality of rows of array substrate gate driving GOA modules; The GOA module of each row includes an input control circuit, a GOA circuit and an output control circuit; The input control circuit is located between the input end of the GOA module and the GOA circuit; The output control circuit is located between a first output end of the GOA module and a second output end of the GOA module, the first output end is used to output a first signal, the first signal is an input signal of the GOA module of the next row, and the second output end is used to output a second signal, and the second signal is used to drive the display unit to display; The input control circuit is used to control the conduction or disconnection between the input terminal and the GOA circuit; The GOA circuit is used to connect a clock signal and output the first signal at the first output terminal when an input signal is obtained through the input terminal; The output control circuit is used to control the connection or disconnection between the first output terminal and the second output terminal. The DDIC is used to send the clock signal, the control signal of the input control circuit and the control signal of the output control circuit to each display driving circuit, so that all or part of the GOA modules in the multiple rows of GOA modules output the second signal.

7. The electronic device according to claim 6, characterized in that: The DDIC is specifically used to send a first control signal to the input control circuit; The input control circuit is specifically used to connect the first control signal, and when the first control signal is at a first level, the input end and the GOA circuit are turned on, and when the first control signal is at a second level, the input end and the GOA circuit are turned off.

8. The electronic device according to claim 7, characterized in that: The DDIC is specifically used to send a second control signal to the output control circuit; The output control circuit is specifically used to connect a second control signal. When the second control signal is at a first level, the first output end and the second output end are disconnected. When the second control signal is at a second level, the first output end and the second output end are connected.

9. The electronic device according to claim 8, characterized in that: The output control circuit comprises a first thin film transistor TFT; The drain of the first TFT is used to connect to the first output terminal, the source of the first TFT is used to connect to the second output terminal, and the gate of the first TFT is used to connect to the second control signal.

10. The electronic device according to claim 8, characterized in that: The input control circuit includes a second thin film transistor TFT, a third TFT, a fourth TFT and a fifth TFT; The drain of the second TFT is connected to a high level, the gate of the second TFT is connected to the first control signal, the source of the second TFT is connected to the gate of the third TFT and the source of the fourth TFT; the drain of the third TFT is connected to the source of the fifth TFT, and the source of the third TFT is connected to the GOA circuit; the drain of the fourth TFT is connected to a low level and the gate of the fourth TFT; the drain of the fifth TFT is connected to the input terminal and the gate of the fifth TFT.

11. The electronic device according to claim 8, characterized in that: The first display area corresponds to the GOA modules from the Nth row to the Mth row, where N is a positive integer and M is an integer greater than N. When the current frame refreshes the display screen in the first display area, the DDIC is specifically used to: Controlling the first control signal and the second control signal to be the first level until the GOA module in the Nth row receives the first signal sent by the GOA module in the N-1th row, and then controlling the second control signal to be converted to the second level; After the GOA modules in the Mth row output the second signal, the first control signal is controlled to be converted into the second level.

12. The electronic device according to claim 11, characterized in that: The electronic device also includes a processor; The processor is used to send display data of a dynamic display area of ​​a current frame to the DDIC, where the dynamic display area is a display area where display content of the current frame changes; The DDIC is used to determine an output start line of the second signal and an output end line of the second signal of the current frame according to the display data, wherein the output start line is the Nth line and the output end line is the Mth line.

13. The electronic device according to claim 11, characterized in that: The electronic device also includes a processor; The processor is used to send global display data of the current frame to the DDIC; The DDIC is used to determine the output start line of the second signal corresponding to the dynamic display area and the output end line of the second signal corresponding to the dynamic display area according to the global display data of the current frame and the global display data of the previous frame, the output start line is the Nth line, and the output end line is the Mth line. The dynamic display area is the display area where the display content of the current frame changes.

14. The electronic device according to any one of claims 6 to 13, characterized in that: The electronic device comprises the following two display driving circuits: a first display driving circuit and a second display driving circuit, and the display unit comprises a first partial display unit and a second partial display unit; The first display driving circuit is used to output a second signal to the first partial display unit; The second display driving circuit is used to output a second signal to the second partial display unit.

15. A display method, characterized in that: Applied to controlling a display driving circuit according to any one of claims 1 to 5, the method comprising: Determine a start line and an end line of a dynamic display area, wherein the dynamic display area is a display area where display content of a current frame changes; Controlling the input control circuit to turn on the input terminal and the GOA circuit, and controlling the output control circuit to turn off the first output terminal and the second output terminal; When the GOA module of the starting row receives the first signal, the output control circuit is controlled to conduct the first output end and the second output end; When the GOA module of the termination row outputs the second signal, the input control circuit is controlled to disconnect the input terminal and the GOA circuit.

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