Double-sided heat-dissipating low-resistance CSMD ceramic tube shell

Abstract

The application is realized by the technical scheme as follows: a double-sided heat dissipation low-resistance CSMD ceramic tube shell, comprising a substrate, the upper surface of the substrate is metallized, a sealing ring is welded on the upper surface of the substrate, an MOS tube is arranged on the upper surface of the substrate and located in the sealing ring, the D pole of the MOS tube is welded with the metallized surface of the substrate, a flat sealing cover plate is welded on the upper surface of the sealing ring, and a ceramic plate is welded on the lower surface of the flat sealing cover plate and located above the MOS tube in the sealing ring, the G pole electrode and the S pole electrode on the MOS tube are both connected to the upper surface of the flat sealing cover plate. The chip D pole is attached to the substrate, the bottom surface of the substrate is metallized, and the sealing ring is connected, so that the conduction resistance is reduced while ensuring conduction, the current flows through the sealing ring, and then is output through the flat sealing cover plate which is flatly sealed with the sealing ring, that is, the flat sealing cover plate becomes the lead-out end of the ceramic tube shell, and most of the current is conducted through the metal part, and the conduction resistance reaches a very ideal value.

Description

Technical Field

[0001] This invention relates to the field of MOSFET technology, specifically to a double-sided heat dissipation, low-resistance CSMD ceramic housing. Background Technology

[0002] A MOSFET is a common electronic component, primarily used in electronic circuits as a switch or amplifier. MOSFETs have high input impedance and a simple manufacturing process, making them highly useful in highly integrated circuit designs.

[0003] Existing MOSFET packaging methods include through-hole and surface mount types. Common through-hole packages include dual in-line packages (DIP), transistor outline packages (TO), and pin grid array packages (PGA). Surface mount packages have the MOSFET leads and heat sink soldered to pads on the PCB surface. Typical surface mount packages include transistor outlines (D-PAK), small outline transistors (SOT), small outline packages (SOP), quad flat packages (QFP), and plastic-encapsulated chip carriers (PLCC). For surface mount MOSFETs in ceramic packages, whether DIP, CSOP, or CSMD series ceramic shells, the MOSFET chip's circuitry is conducted to the outside of the shell via internal wiring. The wiring uses tungsten paste, which is printed and stacked to fill vias to form the circuitry.

[0004] However, when conducting circuits using tungsten paste, the resistance value tends to be high. The resistance value is limited by various factors such as the conduction band width, the diameter and number of vias, the thickness of the tungsten paste, and the resistivity of the tungsten paste itself. This makes it difficult to reduce the on-resistance after reaching a certain level. At the same time, the ceramic casing has limited heat dissipation capacity for the chip. The thermal conductivity of ceramic is a fixed coefficient, which cannot provide a good heat dissipation environment for chips with excessively high power. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the present invention aims to provide a double-sided heat dissipation, low-resistance CSMD ceramic housing.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A double-sided heat dissipation low-resistance CSMD ceramic tube shell includes a substrate, the upper surface of which is metallized, a sealing ring welded to the upper surface of which a MOS transistor is disposed within the sealing ring on the upper surface of which the drain (D) electrode of the MOS transistor is welded to the metallized surface of the substrate, a flat sealing cover plate is welded to the upper surface of the sealing ring, and a ceramic plate located above the MOS transistor within the sealing ring is welded to the lower surface of the flat sealing cover plate, wherein the gate (G) electrode and the source (S) electrode of the MOS transistor are both connected to the upper surface of the flat sealing cover plate.

[0008] Preferably, the ceramic plate has two cavities, and the S electrode and G electrode respectively penetrate the two cavities of the ceramic plate and are sealed to the surface of the ceramic plate.

[0009] Preferably, both the G electrode and the S electrode are made of tungsten copper material, specifically W85Cu15.

[0010] Preferably, both the G electrode and the S electrode are configured with a T-shaped structure.

[0011] Preferably, the cross-sectional area of ​​the substrate is larger than the cross-sectional area of ​​the MOS transistor, and the area difference is no more than one-twentieth of the cross-sectional area of ​​the MOS transistor.

[0012] Preferably, a heat sink is welded to the bottom of the substrate.

[0013] Preferably, the substrate is a plate made of AlN material, and the ceramic plate is a plate made of Al2O3 material.

[0014] Preferably, both the sealing ring and the flat sealing plate are framed using Kovar material, with the sealing ring specifically made of 4J29 material and the flat sealing plate specifically made of 4J42 material.

[0015] A process flow for the above-mentioned double-sided heat dissipation low-resistance CSMD ceramic tube shell is also provided, which specifically includes the following steps:

[0016] S1. The sealing ring is welded to the upper surface of the substrate by sealing ring solder to form a bottom plate assembly, and the flat sealing cover plate is welded to the upper surface of the ceramic plate by cover plate solder to form a cover plate assembly.

[0017] S2. The MOS transistors are soldered to the upper surface of the substrate using MOS transistor solder to form a chip mounting assembly;

[0018] S3. The S-electrode and the G-electrode are respectively soldered to the upper surface of the MOS transistor using S-electrode pre-placed solder and G-electrode pre-placed solder;

[0019] S4. The flat sealing cover plate is welded in parallel to the upper surface of the sealing ring to form a chip packaging assembly;

[0020] S5. The S electrode and the G electrode are respectively welded to the surface of the ceramic plate using S electrode solder and G electrode solder, thus completing the welding work.

[0021] Preferably, the sealing ring solder and the cover plate solder are both silver-copper solder, specifically Ag72Cu28, the MOS transistor solder is gold-germanium solder, specifically Au88Ge12, and the S-electrode solder, S-preset solder, G-electrode solder and G-preset solder are all gold-tin solder, specifically Au80Sn20.

[0022] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0023] 1. In this invention, the chip's drain electrode is bonded to the substrate. After the bottom surface of the substrate is metallized, it is connected to the sealing ring. While ensuring the continuity, the sealing ring made of Kovar material further reduces the on-resistance. At the same time, the bottom aluminum nitride substrate has excellent heat dissipation capacity, providing a good heat dissipation environment for the tube shell. The current flows through the sealing ring and then through the flat sealing cover plate that is flat with the sealing ring for output. That is, the flat sealing cover plate becomes the lead-out terminal of the ceramic tube shell. In this way, most of the current is conducted through the metal parts, and its on-resistance will reach a very ideal value.

[0024] 2. This invention uses tungsten copper electrodes to conduct electricity to the outside of the casing. This direct metal conduction method greatly reduces the conduction resistance. Compared with conventional ceramic encapsulation casings, it eliminates the need for gold wire bonding. The large-area conductive electrodes are helpful for both current and heat dissipation.

[0025] 3. In the welding process of this invention, silver-copper soldering is performed first, followed by gold-germanium soldering, and finally gold-tin soldering, achieving a three-level temperature gradient from high to low temperature. This ensures that the solder from the first two stages will not melt again during subsequent welding, thereby guaranteeing the stability of the production process. Attached Figure Description

[0026] The disclosure of this invention is illustrated with reference to the accompanying drawings. It should be understood that the drawings are for illustrative purposes only and are not intended to limit the scope of protection of this invention. In the drawings, the same reference numerals are used to refer to the same parts. Wherein:

[0027] Figure 1 This is a schematic diagram of the overall structure of the present invention;

[0028] Figure 2 This is a schematic diagram of the exploded structure of the present invention;

[0029] Figure 3 This is a process flow diagram of the present invention.

[0030] The following are the labels in the diagram: 1. Substrate; 2. Sealing ring; 3. MOSFET; 4. Ceramic plate; 5. Flat cover plate; 6. S electrode; 7. G electrode; 8. S electrode solder; 9. S electrode pre-placed solder; 10. G electrode solder; 11. G electrode pre-placed solder; 12. Cover plate solder; 13. MOSFET solder; 14. Sealing ring solder. Detailed Implementation

[0031] It is readily understood that, based on the technical solution of this invention, those skilled in the art can propose various interchangeable structural methods and implementations without altering the essential spirit of the invention. Therefore, the following detailed embodiments and accompanying drawings are merely illustrative examples of the technical solution of this invention and should not be considered as the entirety of the invention or as limitations or restrictions on the technical solution of this invention.

[0032] like Figure 1 , 2 As shown, a double-sided heat dissipation low-resistance CSMD ceramic package of the present invention includes a substrate 1. The substrate 1 is a plate made of AlN material. Aluminum nitride itself has a high thermal conductivity of >170W / m·K, providing a large heat dissipation area. Metallization covers both sides to support the conduction of the chip. A sealing ring 2 is welded to the upper surface of the substrate 1 through sealing ring solder 14. A MOS transistor 3 is disposed on the upper surface of the substrate 1 inside the sealing ring 2, and the drain of the MOS transistor 3 is welded to the metallized surface of the substrate 1 through MOS transistor solder 13. The MOS transistor solder 13 is set as gold-germanium solder, specifically Au88Ge12. The substrate 1 and the sealing ring 2 are welded to form a dam structure to support the chip packaging.

[0033] A flat sealing cover plate 5 is welded to the upper surface of the sealing ring 2. Both the sealing ring 2 and the flat sealing cover plate 5 are framed using Kovar material. Specifically, the sealing ring 2 is made of 4J29 material, which has a similar coefficient of thermal expansion to ceramics, exhibiting excellent electrical conductivity and low cost. The flat sealing cover plate 5 is made of 4J42 material. A ceramic plate 4 is welded to the lower surface of the flat sealing cover plate 5 via cover plate solder 12. Both the sealing ring solder 14 and the cover plate solder 12 are made of silver-copper solder, specifically Ag72Cu28. The ceramic plate 4 is made of Al2O3 material, with alumina ceramic used as a secondary heat dissipation surface. The ceramic plate 4 is located on the sealing ring. Above the MOSFET 3, on both sides of the upper surface of the MOSFET 3, the S electrode 6 and the G electrode 7 are respectively soldered by the S electrode pre-placed solder 9 and the G electrode pre-placed solder 11. The ceramic plate 4 has two cavities. The S electrode 6 and the G electrode 7 pass through the two cavities of the ceramic plate 4 and are respectively soldered to the surface of the ceramic plate 4 by the S electrode solder 8 and the G electrode solder 10. The S electrode solder 8, the S electrode pre-placed solder 9, the G electrode solder 10 and the G electrode pre-placed solder 11 are all set as gold-tin solder, specifically Au80Sn20, to ensure the airtightness of the tube shell while allowing the S electrode 6 and the G electrode 7 to be connected to the upper surface of the flat sealing plate 5.

[0034] The drain (D) of the MOSFET 3 is bonded to the substrate 1. The metallized surface of the substrate 1 is connected to the sealing ring 2, ensuring conduction. At the same time, the Kovar sealing ring 2 further reduces its on-resistance. Meanwhile, the bottom aluminum nitride substrate 1 has excellent heat dissipation capabilities, providing a good heat dissipation environment for the tube shell. The current flows through the sealing ring 2 and then through the flat sealing cover 5, which is flatly sealed with the sealing ring 2, for output. That is, the flat sealing cover 5 becomes the lead-out terminal of the ceramic tube shell. In this way, most of the current is conducted through the metal parts, and its on-resistance will reach a very ideal value.

[0035] Both the G electrode 7 and the S electrode 6 are made of tungsten copper, specifically W85Cu15. The tungsten copper material offers superior conductivity and heat dissipation, allowing for soldering with the MOSFET 3 and ceramic plate 4 to ensure continuity and hermeticity. The tungsten copper electrodes also provide direct conductivity to the outside of the casing. This direct metal-based conductivity significantly reduces on-resistance. Compared to conventional ceramic packages, it eliminates the need for gold wire bonding. The large conductive area of ​​the electrodes greatly aids in current flow and heat dissipation. Both the G electrode 7 and the S electrode 6 are T-shaped to ensure the hermeticity of the gold-tin solder joint.

[0036] The cross-sectional area of ​​substrate 1 is larger than that of MOSFET 3, and the area difference is no more than one-twentieth of the cross-sectional area of ​​MOSFET 3. This solves the problem that the existing ceramic packaging shells for surface-mount MOSFET 3 are too large due to factors such as the internal wiring of the ceramic. The shells required for packaging a single chip have a lot of wasted space inside. A heat sink is soldered to the bottom of substrate 1 to increase heat dissipation and improve heat dissipation performance.

[0037] like Figure 3 As shown, the present invention also provides a process flow for the above-mentioned double-sided heat dissipation low-resistance CSMD ceramic tube shell, specifically including the following steps:

[0038] S1. The sealing ring 2 is welded to the upper surface of the substrate 1 through the sealing ring solder 14 to form a bottom plate assembly, and the flat sealing cover plate 5 is welded to the upper surface of the ceramic plate 4 through the cover plate solder 12 to form a cover plate assembly.

[0039] S2 and MOS transistor 3 are soldered to the upper surface of substrate 1 using MOS transistor solder 13 to form a chip mounting assembly;

[0040] S3, S electrode 6 and G electrode 7 are respectively soldered to the upper surface of MOS transistor 3 through S electrode pre-placed solder 9 and G electrode pre-placed solder 11;

[0041] S4. The flat sealing cover plate 5 is parallelly sealed and welded to the upper surface of the sealing ring 2 to form a chip packaging assembly;

[0042] S5, S electrode 6 and G electrode 7 are respectively welded to the surface of ceramic plate 4 by S electrode solder 8 and G electrode solder 10, thus completing the welding work.

[0043] During welding, silver-copper brazing is performed first at a temperature of 820℃. Next, gold-germanium brazing is performed at a temperature of 361℃ for 90 seconds. Finally, gold-tin brazing is performed at a temperature of 280℃, achieving a three-stage temperature gradient from high to low. This ensures that the solder from the first two stages will not melt again during subsequent welding, thus guaranteeing the stability of the production process. The base plate assembly and the cover plate assembly are parallel sealed. This process does not require a high-temperature environment; instead, it uses a large current to melt the metal.

[0044] The technical scope of this invention is not limited to the content described above. Those skilled in the art can make various modifications and variations to the above embodiments without departing from the technical concept of this invention, and all such modifications and variations should fall within the protection scope of this invention.

Claims

1. A double-sided heat dissipation, low-resistance CSMD ceramic housing, characterized in that: The system includes a substrate (1), the upper surface of which is metallized, a sealing ring (2) welded to the upper surface of which is a MOS transistor (3) located inside the sealing ring (2) on the upper surface of which is welded to the metallized surface of which is the substrate (1). A flat sealing plate (5) is welded to the upper surface of the sealing ring (2), and a ceramic plate (4) located above the MOS transistor (3) inside the sealing ring (2) is welded to the lower surface of the flat sealing plate (5). The gate electrode (7) and the source electrode (6) on the MOS transistor (3) are both connected to the upper surface of the flat sealing plate (5). The ceramic plate (4) has openings. Two cavities, the S electrode (6) and the G electrode (7) respectively penetrate the two cavities of the ceramic plate (4) and are sealed to the surface of the ceramic plate (4). The G electrode (7) and the S electrode (6) are both made of tungsten copper material, specifically W85Cu15. The substrate (1) is made of AlN material, the ceramic plate (4) is made of Al2O3 material, the sealing ring (2) and the flat cover plate (5) are both made of Kovar material. The sealing ring (2) is specifically made of 4J29 material, and the flat cover plate (5) is specifically made of 4J42 material.

2. The CSMD ceramic housing with double-sided heat dissipation and low resistance according to claim 1, characterized in that: Both the G electrode (7) and the S electrode (6) are configured as T-shaped structures.

3. The CSMD ceramic housing with double-sided heat dissipation and low resistance according to claim 1, characterized in that: The cross-sectional area of ​​the substrate (1) is greater than that of the MOS transistor (3), and the area difference is not greater than one-twentieth of the cross-sectional area of ​​the MOS transistor (3).

4. The CSMD ceramic housing with double-sided heat dissipation and low resistance according to claim 3, characterized in that: A heat sink is welded to the bottom of the substrate (1).

5. A process flow for a double-sided heat dissipation low-resistance CSMD ceramic tube shell, applied to the double-sided heat dissipation low-resistance CSMD ceramic tube shell according to any one of claims 1-4, characterized in that: Includes the following steps: S1. The sealing ring (2) is welded to the upper surface of the substrate (1) by sealing ring solder (14) to form a bottom plate assembly, and the flat sealing cover plate (5) is welded to the upper surface of the ceramic plate (4) by cover plate solder (12) to form a cover plate assembly. S2, The MOS transistor (3) is soldered to the upper surface of the substrate (1) by MOS transistor solder (13) to form a chip mounting assembly; S3. The S electrode (6) and the G electrode (7) are respectively soldered to the upper surface of the MOS transistor (3) by the S electrode pre-placed solder (9) and the G electrode pre-placed solder (11); S4. The flat sealing cover plate (5) is welded in parallel to the upper surface of the sealing ring (2) to form a chip packaging assembly; S5. The S electrode (6) and the G electrode (7) are respectively welded to the surface of the ceramic plate (4) by the S electrode solder (8) and the G electrode solder (10) to complete the welding work.

6. The process flow for a double-sided heat dissipation low-resistance CSMD ceramic tube shell according to claim 5, characterized in that: The sealing ring solder (14) and the cover plate solder (12) are both silver-copper solder, specifically Ag72Cu28. The MOS tube solder (13) is gold-germanium solder, specifically Au88Ge12. The S electrode solder (8), S electrode pre-placed solder (9), G electrode solder (10) and G electrode pre-placed solder (11) are all gold-tin solder, specifically Au80Sn20.

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