High-integration ultra-wideband miniaturized low-cost active antenna

Abstract

The invention discloses a high-integration ultra-wideband miniaturized low-cost active antenna, which is in radio frequency and antenna integrated design, and comprises a planar spiral antenna plate, a wideband coaxial balun, wave-absorbing foam, a back cavity, a radio frequency main carrier plate and a back plate, the radio frequency main carrier plate comprises a radio frequency power supply, a radio frequency circuit and a radio frequency, the radio frequency circuit comprises a radio frequency transceiving front end FE SIP, a first frequency conversion circuit MIX1 SIP, an intermediate frequency filter circuit IF1 SIP, a second frequency conversion circuit MIX2 SIP, an intermediate frequency circuit IF SIP, an anti-aliasing filter AAF and a frequency synthesizer PLL + VCO internally integrated with a VCO. The microwave front end verification system has the advantages of being high in integration, small in size and low in cost, verification platforms of different arrangement schemes can be rapidly built, and the microwave front end does not need to be redeveloped.

Description

Technical Field

[0001] The present invention relates to the field of millimeter wave communications, and in particular to a highly integrated ultra-wideband miniaturized low-cost active antenna. Background Art

[0002] There are many existing antenna array solutions, but the versatility of microwave modules is low. There are no microwave modules that can be applied to multiple array solutions. The separate design of the antenna and the microwave front end is difficult to miniaturize. Compared with the traditional MCM (Multi-Chip Module) technology, the SIP (System in Package) process that has emerged in recent years is used to package multiple single-function RF bare chips into multi-function SIPs, reduce metal cavities and RF connectors, and achieve low-cost miniaturization. A single-channel independent local oscillator solution is adopted, and the local oscillator source and the single-channel frequency conversion module are designed as an integrated unit. It is difficult to achieve local oscillator phase synchronization between channels in multi-channel applications. Summary of the invention

[0003] The purpose of the present invention is to provide a highly integrated ultra-wideband miniaturized low-cost active antenna to solve the shortcomings of narrow working bandwidth and complex structure mentioned in the above background technology. There is still a lot of room for improvement in polarization reconfigurable antennas.

[0004] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: a highly integrated ultra-wideband miniaturized low-cost active antenna, which is an integrated design of radio frequency and antenna, including: a planar spiral antenna plate, a broadband coaxial balun, an absorbing foam, a back cavity, a radio frequency main carrier plate and a back plate. The planar spiral antenna adopts a composite planar spiral antenna loaded with a sine function. The high-frequency region of the planar spiral antenna adopts a tightly wound equiangular spiral line, which smoothly transitions to an Archimedean spiral line loaded with sine modulation at the tail end of the line. The final antenna plate has a diameter of 63mm and a thickness of 0.8mm. The size of the final antenna is 60mm, and the standing wave in the 0.8-18GHz band is less than 2.5. The RF main carrier board has a diameter of 63mm and a board thickness of 2mm. The maximum height including the device and the board thickness is less than 10mm. It mainly includes an RF power supply, an RF circuit, and a RF. The RF circuit includes a single-channel RF transceiver front end and a single-channel RF frequency conversion channel. The RF circuit is implemented using a SIP process. The RF circuit includes an RF transceiver front end FE SIP, a first frequency conversion circuit MIX1 SIP, an intermediate frequency filter circuit IF1 SIP, a second frequency conversion circuit MIX2 SIP, an intermediate frequency circuit IF SIP, an anti-aliasing filter AAF and a frequency synthesizer PLL+VCO with an internal integrated VCO, a passive transition simulation structure between the SIP and the main carrier board, a SIP toplayer microstrip transitions to the SIP bot layer pad through a simulated pseudo-coaxial structure, and a main carrier board top layer pad transitions to the Layer 2 stripline through a simulated pseudo-coaxial structure, and the SIP and the main carrier board are welded via BGA solder balls.

[0005] Preferably, the center of the RF main carrier board TOP LAYER is the RF in and RF out interface, the upper right corner is the RF transceiver front end FE SIP, the lower right is the first frequency conversion circuit MIX1 SIP, the middle of the lower half is an intermediate frequency filter circuit IF1 SIP, the lower left is the secondary frequency conversion circuit MIX2 SIP, and the upper left is the intermediate frequency circuit IF SIP. FE SIP is the RF transceiver front end and the front end of the RF link. It uses an RF switch to select the transceiver path. The receiving path includes a 2-stage low-noise amplifier, an equalizer, and a digitally controlled attenuator. The transmitting path includes a 2-stage PA, which serves as a driver amplifier and a transmitting power amplifier. MIX1 SIP is the first frequency conversion circuit, which integrates a switch filter group, a local oscillator drive circuit, a local oscillator filter circuit, and a local oscillator quadrupling circuit. IF1 SIP is an intermediate frequency filter circuit, which is used to suppress the out-of-band mixer intermodulation products and local oscillator, intermediate frequency and radio frequency leakage. MIX2 SIP is a secondary frequency conversion circuit, which integrates the local oscillator drive circuit, local oscillator filter circuit, and local oscillator quadrupling circuit. IF SIP is an intermediate frequency circuit, which includes intermediate frequency receiving and transmitting amplification, receiving gain adjustment, receiving and transmitting frequency band gain balance, and temperature balance functions. AAF is an anti-aliasing filter, which is used to filter and limit the signal bandwidth before digital signal processing, so that the signal bandwidth is the digital signal processing sampling bandwidth. PLL+VCO is a frequency synthesizer with an internal integrated VCO. The selected chip has a phase synchronization function. When multiple chips refer to the same parameter signal, the phase synchronization function can achieve coherent output of multiple chips. When a multi-channel array is formed, the local oscillators between channels are coherent. The center of BOT LAYER is the 100MHz PLL reference source input, and the left and right sides of the middle are the local oscillator sources of LO2 and LO1 respectively. The lower left and upper left are the power circuits POWER1 and POWER2 of the RF main carrier board. The lower right is the control circuit of the main carrier board, FPGA and peripheral circuits. The upper right is the anti-aliasing filter AAF and the intermediate frequency output port. FPGA is the main control chip, and FPGA plus peripheral circuits are the control circuit.

[0006] Preferably, POWER1 and POWER2 are power circuits of the main carrier board, the external input voltage is 12V, and the board has three voltage conversions: 12V to 5V, 5V to 3.3V, and 5V to -5V.

[0007] Preferably, the backplane includes three interfaces: IF in, IF out, REF 100MHz IN, and Power&Ctrl. The backplane is slotted at the IFin, IF out, and REF 100MHz IN interface positions. The optical hole interface can be plugged into SMP-K. M2 threaded holes are drilled on both sides of the interface for fixing the external connector. Power&Ctrl is a J30J-21ZK interface for transmitting control and power.

[0008] Preferably, RF in and RF out are internal interfaces, which are connected to the antenna coaxial balun using RF insulators; IFin, IF out and REF 100MHz IN are external interfaces, which are connected to the antenna coaxial balun using RF insulators; external power supply and control are connected to the connector in the form of pads and welded to the connector leads locked on the back panel.

[0009] Compared with the prior art, the present invention has the following beneficial effects: 1. The advantage of the patent of this invention lies in the ultra-wideband miniaturized circularly polarized antenna, the integrated design with the ultra-wideband RF transceiver front end and the ultra-wideband transceiver frequency conversion channel, and the use of the SIP process to miniaturize the RF circuit. In the application example of phase interferometer direction finding, the existing phase interferometer direction finding technology has a variety of array schemes, such as linear array, orthogonal array, uniform circular array, etc. At the same time, according to the requirements of direction finding accuracy, the requirements for the spacing and number of array elements are also different, that is, the array schemes are diverse. The traditional phase interferometer scheme adopts a design in which the microwave module and the antenna are separated. If you want to verify a variety of array schemes, you need to redevelop the microwave module, which has high development costs and long development cycles. If the antenna and the single-channel microwave module are designed as one, you only need to redesign the antenna unit layout structure, and you can quickly build a verification platform for various array schemes.

[0010] 2. In a system composed of the active antenna, since the local oscillator source is integrated into the active antenna, the operating frequencies of multiple channels are independent, and ultra-wideband spectrum monitoring can be performed simultaneously. When direction finding is required for a certain frequency band, multiple channels can operate in the same frequency band, and the phase synchronization function can be used to maintain the phase synchronization of the multi-channel local oscillators. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a schematic diagram of the antenna of the present invention; Figure 2 This is the TOP LAYER layout diagram of the radio frequency main carrier board of the present invention; Figure 3 This is the BOT LAYER layout diagram of the radio frequency main carrier board of the present invention; Figure 4 This is a schematic diagram of the backplane interface of the present invention; Figure 5 is a connection block diagram of the array element system of the present invention; Figure 6 It is a schematic diagram of the structure of the present invention.

[0012] Figure 7 It is a schematic diagram of the radio frequency circuit principle diagram of the present invention.

[0013] 1- Planar spiral antenna board, 2- Broadband coaxial balun, 3- Absorbing foam, 4- Back cavity, 5- RF main carrier board, 6- Back plate. DETAILED DESCRIPTION

[0014] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0015] The present invention provides a highly integrated ultra-wideband miniaturized low-cost active antenna, which is an integrated design of radio frequency and antenna, including: from top to bottom, a planar spiral antenna plate 1, a broadband coaxial balun 2, an absorbing foam 3, a back cavity 4, a radio frequency main carrier plate 5 and a back plate 6. The planar spiral antenna adopts a composite planar spiral antenna loaded with a sine function, and the high-frequency region of the planar spiral antenna adopts a tightly wound equiangular spiral line, which smoothly transitions to an Archimedean spiral loaded with sine modulation at the tail end of the line. The composite planar spiral antenna loaded with a sine function can obtain better circular polarization performance and a wider frequency band with the same size. The final antenna plate has a diameter of 63mm and a thickness of 0.8mm. The size of the final antenna is 60mm, and the standing wave in the 0.8-18GHz band is less than 2.5.

[0016] The RF main carrier board 5 has a diameter of 63mm and a thickness of 2mm. The maximum height including the components and the thickness is less than 10mm. It mainly includes an RF power supply, an RF circuit, and a RF. The RF circuit includes a single-channel RF transceiver front end and a single-channel RF frequency conversion channel. The RF circuit schematic diagram is shown in the figure below. Figure 7 As shown in the figure, in order to realize the miniaturization of the module, the RF circuit is realized by SIP process, the RF transceiver front end FE SIP, the first frequency conversion circuit MIX1 SIP, the first intermediate frequency filter circuit IF1 SIP, the second frequency conversion circuit MIX2 SIP, the intermediate frequency circuit IF SIP, the anti-aliasing filter AAF and the frequency synthesizer PLL+VCO with internal integrated VCO, the passive transition simulation structure between SIP and the main carrier board, the SIP top layer microstrip transitions to the SIP botlayer pad through the simulated pseudo-coaxial structure, the main carrier board top layer pad transitions to the Layer 2 stripline through the simulated pseudo-coaxial structure, and the SIP and the main carrier board are welded by BGA solder balls. The center of the RF main carrier board 5TOP LAYER is the RF in and RF out interface, the upper right corner is the RF transceiver front end FESIP, the lower right is the first frequency conversion circuit MIX1 SIP, the middle of the lower half is an intermediate frequency filter circuit IF1 SIP, the lower left is the secondary frequency conversion circuit MIX2 SIP, and the upper left is the intermediate frequency circuit IF SIP.

[0017] FE SIP is the RF transceiver front end, the front end of the RF link, and uses an RF switch to select the transceiver path. The receiving path includes a 2-stage low-noise amplifier, an equalizer, and a digitally controlled attenuator; the transmitting path includes a 2-stage PA, which serves as a driver amplifier and a transmitting power amplifier. It mainly affects the system's maximum transmit power, receiving noise coefficient, receiving gain and other indicators.

[0018] MIX1 SIP is the first frequency conversion circuit, which integrates a switch filter group, a local oscillator drive circuit, a local oscillator filter circuit, and a local oscillator quadrupling circuit. The switch filter group suppresses interference signals of image frequency and undesired frequency and suppresses out-of-band spurious signals. The main function of the local oscillator filter circuit is to suppress the harmonics of the local oscillator. The functions of the local oscillator drive circuit and the local oscillator frequency doubling circuit are to reduce the local oscillator requirements of the module.

[0019] IF1 SIP is an intermediate frequency filter circuit whose function is to suppress out-of-band mixer intermodulation products and local oscillator, intermediate frequency, and radio frequency leakage.

[0020] MIX2 SIP is a secondary frequency conversion circuit, which integrates the local oscillator drive circuit, local oscillator filter circuit, and local oscillator quadrupling circuit. The main function of the local oscillator filter circuit is to suppress the harmonics of the local oscillator, and the functions of the local oscillator drive circuit and the local oscillator frequency multiplication circuit are to reduce the local oscillator requirements of the module.

[0021] IF SIP is an intermediate frequency circuit, which includes intermediate frequency receiving and transmitting amplification, receiving gain adjustment, receiving and transmitting frequency band gain equalization, and temperature equalization functions.

[0022] AAF is an anti-aliasing filter, which is used to filter and limit the signal bandwidth before digital signal processing so that the signal bandwidth is the digital signal processing sampling bandwidth.

[0023] PLL+VCO is a frequency synthesizer with an internal integrated VCO. The selected chip has a phase synchronization function. When multiple chips refer to the same parameter signal, the phase synchronization function can be used to achieve coherent output of multiple chips. When a multi-channel array is formed, the local oscillators between channels are coherent.

[0024] The center of BOT LAYER is the 100MHz PLL reference source input, and the left and right sides of the middle are the local oscillator sources of LO2 and LO1 respectively. The lower left and upper left are the power circuits POWER1 and POWER2 of the RF main carrier board 5. The lower right is the control circuit of the main carrier board, FPGA and peripheral circuits, and the upper right is the anti-aliasing filter AAF and the intermediate frequency output port.

[0025] POWER1 and POWER2 are the power supply circuits of the main board. The external input voltage is 12V. The board has three voltage conversions: 12V to 5V, 5V to 3.3V, and 5V to -5V.

[0026] FPGA is the main control chip, and FPGA plus peripheral circuits are the control circuit, which has the functions of parsing external control information and controlling module status switching.

[0027] RF in and RF out are internal interfaces, which are connected to the antenna coaxial balun using RF insulators; IF in, IF out and REF 100MHz IN are external interfaces, which are connected to the antenna coaxial balun using RF insulators; external power supply and control are connected to the connector in the form of pads and welded to the connector leads locked on the back panel 6.

[0028] Backplane 6 includes three interfaces: IF in, IF out, REF 100MHz IN, and Power&Ctrl. Backplane 6 is slotted at the IF in, IF out, and REF 100MHz IN interface positions. The optical hole interface can be plugged into SMP-K. M2 threaded holes are drilled on both sides of the interface for fixing external connectors. Power&Ctrl is a J30J-21ZK interface for transmitting control and power.

[0029] Operation process: In the receiving link, the RF signal enters the RF transceiver front end FE SIP from the antenna for limiting, amplification, and gain adjustment, and then enters the first frequency conversion circuit MIX1 SIP, and then enters the intermediate frequency filter circuit IF1 SIP for an intermediate frequency filter, and then enters the secondary frequency conversion circuit MIX2 SIP for the second mixing and conversion to IF, and then enters the intermediate frequency circuit IF SIP for amplification, gain control and temperature compensation, and then enters the anti-aliasing filter AAF for anti-aliasing filtering and is output from the IF out port.

[0030] In the transmitting chain, the IF signal enters from the IF in and IF out ports, is filtered by the anti-aliasing filter AAF, then enters the intermediate frequency circuit IF SIP for amplification, then enters the secondary frequency conversion circuit MIX2 SIP for frequency conversion to an intermediate frequency, then enters the intermediate frequency filter circuit IF1 SIP for intermediate frequency filtering, then enters the first frequency conversion circuit MIX1 for frequency conversion to RF, then enters the RF transceiver front end FESIP for amplification and then is sent to the antenna output.

[0031] The technical means disclosed in the solution of the present invention are not limited to the technical means disclosed in the above technical means, but also include technical solutions composed of equivalent replacement of the above technical features. Matters not covered in the present invention belong to the common knowledge of those skilled in the art.

Claims

1. A highly integrated ultra-wideband miniaturized low-cost active antenna, which is an integrated design of radio frequency and antenna, characterized in that: include: A planar spiral antenna plate, a broadband coaxial balun, an absorbing foam, a back cavity, a RF main carrier plate and a back plate. The planar spiral antenna on the surface of the planar spiral antenna plate adopts a composite planar spiral antenna loaded with a sine function. The high-frequency region of the planar spiral antenna adopts a tightly wound equiangular spiral line, and the tail end of the line smoothly transitions to an Archimedean spiral line loaded with a sine modulation. The RF main carrier board includes an RF power supply, an RF circuit, and a RF. The RF circuit includes a single-channel RF transceiver front end and a single-channel RF frequency conversion channel. The RF circuit is implemented using a SIP process. The RF circuit includes an RF transceiver front end FE SIP, a first frequency conversion circuit MIX1 SIP, an intermediate frequency filter circuit IF1 SIP, a second frequency conversion circuit MIX2 SIP, an intermediate frequency circuit IFSIP, an anti-aliasing filter AAF, and a frequency synthesizer PLL+VCO with an internal integrated VCO. The passive transition simulation structure between the SIP and the main carrier board, the SIP top layer microstrip transitions to the SIP bot layer pad through a simulated pseudo-coaxial structure, the main carrier board toplayer pad transitions to the Layer 2 stripline through a simulated pseudo-coaxial structure, and the SIP and the main carrier board are welded via BGA solder balls.

2. The highly integrated ultra-wideband miniaturized low-cost active antenna according to claim 1, characterized in that: The center of the RF main carrier board TOP LAYER is the RF in and RF out interface, the upper right corner is the RF transceiver front end FE SIP, the lower right is the first frequency conversion circuit MIX1 SIP, the middle of the lower half is an intermediate frequency filter circuit IF1 SIP, the lower left is the secondary frequency conversion circuit MIX2 SIP, and the upper left is the intermediate frequency circuit IF SIP. FE SIP is the RF transceiver front end and the front end of the RF link. It uses an RF switch to select the transceiver path. The receiving path includes a 2-stage low-noise amplifier, an equalizer, and a digitally controlled attenuator. The transmitting path includes a 2-stage PA, which serves as a driver amplifier and a transmitting power amplifier. MIX1 SIP is the first frequency conversion circuit, which integrates a switch filter group, a local oscillator drive circuit, a local oscillator filter circuit, and a local oscillator quadrupling circuit. IF1 SIP is an intermediate frequency filter circuit. MIX2 SIP is a secondary frequency conversion circuit, which integrates the local oscillator drive circuit, local oscillator filter circuit, and local oscillator quadrupling circuit. IF SIP is an intermediate frequency circuit, which includes intermediate frequency receiving and transmitting amplification, receiving gain adjustment, receiving and transmitting frequency band gain balance, and temperature balance functions. AAF is an anti-aliasing filter, which is used to filter and limit the signal bandwidth before digital signal processing, so that the signal bandwidth is the digital signal processing sampling bandwidth. PLL+VCO is a frequency synthesizer with an internal integrated VCO. The selected chip has a phase synchronization function. When multiple chips refer to the same parameter signal, the phase synchronization function can achieve coherent output of multiple chips. When a multi-channel array is formed, the local oscillators between channels are coherent. The center of BOT LAYER is the 100MHz PLL reference source input, and the left and right sides of the middle are the local oscillator sources of LO2 and LO1 respectively. The lower left and upper left are the power circuits POWER1 and POWER2 of the RF main carrier board. The lower right is the control circuit of the main carrier board, FPGA and peripheral circuits. The upper right is the anti-aliasing filter AAF and the intermediate frequency output port. FPGA is the main control chip, and FPGA plus peripheral circuits are the control circuit.

3. The highly integrated ultra-wideband miniaturized low-cost active antenna according to claim 2, characterized in that: POWER1 and POWER2 are the power supply circuits of the main board. The external input voltage is 12V. The board has three voltage conversions: 12V to 5V, 5V to 3.3V, and 5V to -5V.

4. The highly integrated ultra-wideband miniaturized low-cost active antenna according to claim 1, characterized in that: The backplane includes three interfaces: IF in, IF out, REF 100MHz IN, and Power&Ctrl. The backplane is slotted at the IF in, IF out, and REF100MHz IN interface positions. The optical hole interface can be plugged into SMP-K. M2 threaded holes are drilled on both sides of the interface for fixing external connectors. Power&Ctrl is a J30J-21ZK interface for transmitting control and power.

5. The highly integrated ultra-wideband miniaturized low-cost active antenna according to claim 2, characterized in that: RFin and RF out are internal interfaces, which are led out with RF insulators to interconnect with the antenna coaxial balun; IF in, IF out and REF100MHz IN are external interfaces, which are led out with RF insulators; external power supply and control are led out in the form of pads and welded to the connector leads locked on the backplane.

6. According to the highly integrated ultra-wideband miniaturized low-cost active antenna described in claim 1, the planar spiral antenna plate has a diameter of 63 mm and a thickness of 0.8 mm. The final antenna size is 60 mm, and the standing wave in the 0.8-18 GHz frequency band is less than 2.5.

Images