Scalable architecture for control of quantum devices within cold environments

Abstract

The invention relates to a quantum processor system. The system comprises a qubit structure, a control line and a cavity filter. The control line is configured to transmit a control signal to and from the qubit structure. The cavity filter is configured to filter the control signal transmitted by the control line. The cavity filter includes a waveguide including a cavity and a material disposed within the cavity. The material has a refractive index greater than 1.0. The material may be a dielectric material (e.g., a dielectric), a metal material (e.g., a conductive or magnetic material), or a combination thereof. The cavity filter includes a resonator structure encapsulated in a material and having a floating ground connection. The cavity filter includes a center conductor that transmits a low frequency signal, and the waveguide transmits a high frequency signal.

Description

[0001] Priority declaration

[0002] This application claims the benefit of priority to U.S. application serial number 17 / 950,807, filed on September 22, 2022, entitled “SCALABLE ARCH ITECTURES FOR CONTROL OF QUANTUM DEVICES WITH INCOLD ENVIRONMENTS,” which is incorporated herein by reference. Technical Field

[0003] The present disclosure relates generally to quantum computing and information processing systems, and more particularly, to a scalable architecture for quantum devices within cold environments. Background Art

[0004] Quantum computing is a computing method that uses quantum effects (such as superposition of ground states and entanglement) to perform certain calculations more efficiently than classical digital computers. Compared to digital computers that store and manipulate information in the form of bits (e.g., "1" or "0"), quantum computing systems can use quantum bits ("qubits") to manipulate information. A qubit can refer to a quantum device that can superimpose multiple states (e.g., data in both "0" and "1" states), and / or to the superposition of the data itself in multiple states. According to conventional terminology, the superposition of "0" and "1" states in a quantum system can be represented as, for example, |0>+b|1>. The "0" and "1" states of a digital computer are similar to the |0> and |1> ground states of a qubit, respectively. Summary of the invention

[0005] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the following description, or may be learned from the description, or may be learned through practice of the embodiments.

[0006] An example aspect of the present disclosure relates to a quantum computing system (QCS). The QCS may include a first cryogenic chamber, a first quantum device, a second quantum device, and a first control logic device. Each of the first quantum device, the second quantum device, and the first control logic device may be positioned with the first cryogenic chamber. In response to receiving one or more programming signals, the first control logic device may be configured to provide a first control signal to the first quantum device and a second control signal to the second quantum device. In some embodiments, the QCS may also include a first control line. The first control line may originate from outside the first cryogenic chamber and terminate at the first control logic device. The first control line is configured to transmit one or more programming signals from outside the first cryogenic chamber.

[0007] In various embodiments, the QCS may further include a third quantum device, a fourth quantum device, and a second control logic device. Each of the second quantum device, the third quantum device, and the second control logic device may be positioned with the first cryogenic chamber. In response to receiving one or more additional programming signals, the second control logic device may be configured to provide a third control signal to the third quantum device and a fourth control signal to the fourth quantum device. In some embodiments, the QCS may also include a second control line. The second control line may originate from outside the first cryogenic chamber and terminate at the second control logic device. The second control line is configured to transmit one or more additional programming signals from outside the first cryogenic chamber.

[0008] Other aspects of the present disclosure relate to various systems, methods, apparatus, non-transitory computer-readable media, computer-readable instructions, and computing devices.

[0009] These and other features, aspects and advantages of various embodiments of the present disclosure will be better understood with reference to the following description and appended claims.The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate example embodiments of the present disclosure and, together with the description, explain the relevant principles. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] A detailed discussion of the embodiments for those skilled in the art is set forth in this specification with reference to the accompanying drawings, in which:

[0011] Figure 1 An example quantum computing system is depicted according to an example embodiment of the present disclosure.

[0012] Figure 2 An example environment is depicted in which various embodiments may be practiced.

[0013] Figure 3A An example DC control logic device consistent with various embodiments is depicted.

[0014] Figure 3B Depicted are example digital-to-analog device arrays consistent with various embodiments. DETAILED DESCRIPTION

[0015] Embodiments relate to an extensible architecture for controlling a device located in an isolated environment (e.g., a first environment isolated from a second environment by a chamber or another closed container located in a second environment) via a control signal. Although the device may be located in an isolated environment, the generation of such control signals may be controlled and / or operated from outside the isolated environment. Such devices include, but are not limited to, quantum devices (e.g., qubits, qubit couplers, quantum logic gates, etc.). The isolated environment may be, but is not limited to, an adiabatic environment. For example, the isolated environment may be a cryogenic environment. The chamber and / or container isolating (and isolating) the cryogenic environment may be a cryogenic chamber and / or a cryogenic container. Therefore, the device may be a quantum device located in a cryogenic system. The generation of control signals may be controlled from outside the cryogenic system (e.g., a room temperature (RT) environment). The cryogenic environment may be an ultracold (e.g., in the order of millikelvin (mK)) environment. Therefore, embodiments may be used for quantum computing and information processing systems, wherein the quantum device is located in a cryogenic environment (e.g., an ultracold environment). In an embodiment, a significant reduction in the number of signal transmission lines (e.g., control lines) required to travel from an RT environment and enter a cryogenic ultracold environment is achieved.

[0016] Such a reduction in the number of required control lines is achieved by locating one or more multiplexing logic devices within the ultracold environment. Such multiplexing logic devices can receive input signals originating from an RT environment. Based on the input signals, a single multiplexing logic device can provide control signals to multiple quantum devices within the ultracold environment via the output lines of the logic device. The multiplexing logic device can receive its input signals via K input lines, where K is a positive integer. Based on the K input signals encoded by the signal, the multiplexing logic device can provide control signals to L quantum devices via its output lines, where L is a positive integer. In order to control the L quantum devices, K control lines travel from the room temperature environment to the ultracold environment. The K control lines transmit the input signals from the RT environment to the multiplexing logic device. When the ratio When the control lines are reduced from the RT environment and into the cryogenic ultra-cold environment, the number of control lines is reduced. This results in a significant reduction in the number of control lines required. In at least one embodiment, the multiplexing control logic device may be a digital-to-analog (DAC) device. The DAC device may be implemented via multiple loops that pair a large inductor with a Josephson junction.

[0017] In a conventional quantum computing system (QCS), one or more control lines may be dedicated to each quantum device within a cryogenic chamber. As used herein, a dedicated control line may be a path that enables transmission of a control signal from outside the cryogenic environment to a single (and corresponding) quantum device within the cryogenic environment. Each of the dedicated control lines conventionally travels from outside the cryogenic environment through one or more cryogenic chambers and terminates at a corresponding quantum device within the cryogenic environment. Conventionally, a control signal may be generated from outside the cryogenic chamber and transmitted through the chamber and to the quantum device via one or more control lines dedicated to the device. Therefore, in a conventional QCS, there may be a one-to-one correspondence between a signal transmission path outside the cryogenic environment and a signal transmission path inside the cryogenic environment.

[0018] As the number of quantum devices within a cryogenic chamber grows (e.g., increasing the number of qubits and quantum gates in a QCS), the difficulty of having dedicated control lines pass from outside the cryogenic environment to inside the environment for each quantum device increases significantly. This increased difficulty is at least a result of the physical space and heat transfer limitations required to transfer electrical power from outside the chamber to the inside of the chamber. The increased difficulty is presented even more dramatically because for ultracold temperatures (as a quantum device may require), a single conventional dedicated control line may be required to pass through a series of nested cryogenic chambers to terminate at an "innermost" ultracold chamber. Rather than having one or more dedicated control lines for each quantum device passing through one or more cryogenic chambers, as a conventional QCS may do, an embodiment employs one or more multiplexing logic devices positioned within the innermost ultracold chamber as discussed above. The multiplexing logic device may be constructed such that A significant reduction in the number of control lines required to travel from outside the cryogenic environment and into the ultra-cold chamber is thereby achieved.

[0019] More specifically, the quantum processor device within the ultracold environment may include a quantum device set. The quantum device set may include a qubit set, a qubit coupler set, and / or a quantum logic gate set (e.g., a Z-gate set). Each qubit in the qubit set may be controlled via one or more control signals (e.g., microwave control signals) within a microwave frequency band and one or more DC control signals. That is, the control and / or operation of the qubit requires at least one DC control signal and at least one microwave control signal. In contrast, the control and / or operation of the quantum coupler may require one or more DC control signals, but may not require a microwave control signal.

[0020] A conventional QCS may include both microwave control logic (e.g., generation and shaping of microwave control signals for qubits) and DC control logic (e.g., generation and shaping of DC control signals for qubit couplers and qubits). Such conventional approaches require at least one dedicated DC control line to be run from the RT environment to the ultracold environment for each qubit coupler and for each qubit. In contrast, various embodiments position at least a portion of the DC control logic (e.g., for control of qubits and quantum couplers) within the ultracold environment via positioning a multiplexing control logic device within the ultracold environment. That is, at least a portion of the DC control logic for qubit couplers and qubits is co-located with the quantum processor device within the ultracold environment. Co-locating a portion of the DC control logic with the quantum processor device (e.g., within the ultracold environment) provides a significant reduction in the number of DC control lines required to travel from the RT environment to the ultracold environment.

[0021] Part of the DC control logic for the quantum coupler can be implemented by a multiplexing control logic device positioned in an ultra-cold environment, as discussed above. Therefore, the multiplexing control logic device can be a DC control logic device, or simply a DC logic device. The DC logic device can include one or more multiplexing logic devices and / or one or more demultiplexing logic devices. As used herein, the term "multiplexing" logic device (e.g., mux) can refer to a logic device that is a "many-to-one" device and / or a "fan-in" device. The multiplexer logic device enables several input signals to be input to a single other device and / or signal line. For example, the multiplexing logic device can be a "data selector" device that can transmit a single output signal based on the selection of at least one input signal or line in a plurality of input signals or lines. The term "demultiplexing" logic device can be a "one-to-many" device and / or a "fan-out" logic device that inverts the multiplexing logic of the multiplexer logic device. A demultiplexing logic device (e.g., demux) is a device that obtains a single input signal and provides an output signal to at least one output line in a plurality of output lines based on the input signal and the selection of at least one output line in a plurality of output lines. The "many-to-one" selection of the multiplexer logic device and / or the "one-to-many" selection of the demultiplexer logic device can be based on a separate input signal (e.g., a select signal) received via a separate input line (e.g., a select line). The "many" in each of the "many-to-one" and "one-to-many" terms can refer to a positive integer greater than 1: K=2n>1, where n is a positive integer. Thus, the select input line can be enabled to transmit a selection of an input signal encoding n classical information bits.

[0022] In an embodiment, a control line may originate from outside the cryogenic environment and terminate at a demultiplexer device within the cryogenic environment. The demultiplexer device may have N output lines. The control line may pass through one or more chamber walls that separate the outside of the cryogenic environment from the inside of the cryogenic environment. The control line may provide separate control signals for up to K quantum devices via the demultiplexer device, as discussed below. Thus, a single control line passing through one or more chamber walls may provide control signals for at least K separate quantum devices. The demultiplexer device may receive a control signal as an input. Each output line of the demultiplexer device may be used as an input line for a separate quantum device within the cryogenic environment. Thus, a reduction in the number of control lines that must pass through one or more nested cryogenic chambers is achieved via an embodiment. reduction.

[0023] In at least one embodiment, bidirectional communication between quantum devices outside and inside the cryogenic environment can be achieved via a combination of a demultiplexing device and a multiplexing device. For example, multiple qubit devices can each provide one or more input signals to a multiplexing device in the cryogenic environment. One or more input signals can be transmitted to the outside of the cryogenic environment via a single output of the multiplexing device that passes through the cryogenic chamber.

[0024] The DC logic device may be enabled to receive a signal (e.g., a digital signal) originating from outside the cryogenic environment and delivered via a control line. In response to receiving the input signal, the control logic device may generate and / or route one or more DC control signals. The DC control signal may be provided to one or more quantum devices within the cryogenic environment directly from the DC logic device or via one or more multiplexing or demultiplexing devices included in the DC logic device.

[0025] In some embodiments, the DC logic device positioned within the cryogenic chamber may be a programmable DC logic device. The programmable DC logic device may receive one or more "programming" signals through a transmission line (e.g., the control line discussed above) passing through one or more chamber walls. The programmable DC logic device may be programmed (e.g., configured via a programming signal provided by a single control line) to generate and provide various DC control signals to be provided to the quantum device. The output of the programmable DC logic device that generates and outputs various "programmed" DC control signals may be used as an input to a demultiplexing device embedded in the DC logic device. In at least one embodiment, the programmable DC logic device may be programmed to generate corresponding selection input signals for the demultiplexing device. The separated output of the programmable DC logic device may provide the generated selection input signal to the demultiplexing device. In at least one embodiment, the programmable DC logic device and the demultiplexing device may be integrated into a single programmable multiplexing control logic device. In at least one embodiment, the programmable control logic device may be programmed to read out multiple quantum devices and transmit one or more quantum device signals to the outside of the cryogenic environment via the multiplexing device. The multiplexing device, the demultiplexing device, and the programmable DC control logic device may be integrated into a single programmable multiplexing control logic device. In at least one embodiment, the control logic device may be a digital-to-analog converter (DAC) device implemented as multiple loops pairing a large inductor with a Josephson junction.

[0026] Various aspects of the present disclosure provide many technical effects and benefits. For example, the architecture significantly reduces the number of control lines that need to travel from the RT environment to the ultracold environment. It enables a DC control logic device located in the ultracold environment to deliver DC pulses with sufficient fidelity to control qubits and quantum logic gates. In addition, it enables the ultracold DC control logic device to power and control qubits and quantum logic gates with sufficiently low power dissipation. It further enables the DC control logic device to individually address each of its corresponding qubits and quantum gates.

[0027] Figure 1 An example quantum computing system 100 is depicted. Quantum computing system 100 is an example of a system of one or more classical computers and / or quantum computing devices located at one or more locations in which the systems, components, and techniques described below may be implemented. One of ordinary skill in the art, using the disclosure provided herein, will appreciate that other quantum computing devices or systems may be used without departing from the scope of the present disclosure.

[0028] The quantum computing system 100 includes quantum hardware 102 in data communication with one or more classical processors 104. The classical processor 104 can be configured to execute computer-readable instructions stored in one or more memory devices to perform operations, such as any of the operations described herein. The quantum hardware 102 includes components for performing quantum computing. For example, the quantum hardware 102 includes a quantum system 110, a control device 112, and a readout device 114 (e.g., a readout resonator). The quantum system 110 can include one or more multi-level quantum subsystems, such as registers of qubits (e.g., qubit 120). In some implementations, the multi-level quantum subsystems can include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, spin-based qubits, and the like.

[0029] The type of multi-level quantum subsystem utilized by the quantum computing system 100 can vary. For example, in some cases, it may be convenient to include one or more readout devices 114 attached to one or more superconducting qubits (e.g., transmon qubits, flux qubits, gmon qubits, xmon qubits, or other qubits). In other cases, ion traps, photonic devices, or superconducting cavities may be used (e.g., utilizing them to prepare states without requiring qubits). Additional examples of implementations of multi-level quantum subsystems include fluxmon qubits, silicon quantum dots, or phosphorus impurity qubits.

[0030] A quantum circuit may be constructed and applied to a qubit register included in the quantum system 110 via a plurality of control lines coupled to one or more control devices 112. An example control device 112 operating the qubit register may be used to implement a quantum gate or a quantum circuit having a plurality of quantum gates, such as a Pauli gate, a Hadamard gate, a controlled NOT (CNOT) gate, a controlled phase gate, a T gate, a multi-qubit quantum gate, a coupler quantum gate, etc. The one or more control devices 112 may be configured to operate the quantum system 110 through one or more corresponding control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystem may be a superconducting qubit, and the control device 112 may be configured to provide a control pulse to the control line to generate a magnetic field to adjust the frequency of the qubit.

[0031] The quantum hardware 102 may also include a readout device 114 (e.g., a readout resonator). The measurement results 108 obtained via the measurement device may be provided to the classical processor 104 for processing and analysis. In some implementations, the quantum hardware 102 may include a quantum circuit, and the control device 112 and the readout device 114 may implement one or more quantum logic gates that operate the quantum computing system 100 through physical control parameters (e.g., microwave pulses) that are sent through wires included in the quantum hardware 102. Additional examples of control devices include arbitrary waveform generators, where a DAC (digital-to-analog converter) creates a signal.

[0032] The readout device 114 may be configured to perform quantum measurements on the quantum system 110 and send the measurement results 108 to the classical processor 104. In addition, the quantum hardware 102 may be configured to receive data specifying physical control qubit parameter values ​​106 from the classical processor 104. The quantum hardware 102 may use the received physical control qubit parameter values ​​106 to update the actions of the control device 112 and the readout device 114 on the quantum system 110. For example, the quantum hardware 102 may receive data specifying a new value representing the voltage strength of one or more DACs included in the control device 112, and may update the actions of the DACs on the quantum system 110 accordingly. The classical processor 104 may be configured to initialize the quantum system 110 with an initial quantum state, for example, by sending data specifying an initial set of physical control qubit parameters 106 to the quantum hardware 102.

[0033] In some implementations, the readout device 114 can measure the state of an element (e.g., a qubit) by utilizing the difference in impedance for the |0> state and the |1> state of an element such as a qubit of a quantum system. For example, due to the nonlinearity of the qubit, the resonant frequency of the readout resonator can take on different values ​​when the qubit is in state |0> or state |1>. Therefore, the microwave pulse reflected from the readout device 114 carries an amplitude and phase shift that depends on the state of the qubit. In some implementations, a Purcell filter can be used in conjunction with the readout device 114 to block the propagation of microwaves at the qubit frequency.

[0034] In some embodiments, quantum system 110 may include, for example, a plurality of qubits 120 arranged in a two-dimensional grid 122. For clarity, Figure 1The two-dimensional grid 122 depicted in A includes 4×4 qubits, however, in some implementations, the quantum system 110 may include a smaller or larger number of qubits. In some embodiments, the plurality of qubits 120 may interact with each other through a plurality of qubit couplers (e.g., qubit coupler 124). The qubit coupler may define the nearest neighbor interaction between the plurality of qubits 120. In some implementations, the strength of the plurality of qubit couplers is an adjustable parameter. In some cases, the plurality of qubit couplers included in the quantum computing system 100 may be couplers with a fixed coupling strength.

[0035] In some implementations, plurality of qubits 120 may include data qubits (such as qubit 126) and measurement qubits (such as qubit 128). Data qubits are qubits that participate in the computation being performed by quantum computing system 100. Measurement qubits are qubits that can be used to determine the outcome of the computation performed by the data qubits. That is, during the computation, the unknown state of the data qubit is transferred to the measurement qubit using appropriate physical operations and measured via appropriate measurement operations performed on the measurement qubit.

[0036] In some implementations, each qubit in plurality of qubits 120 may operate using a respective operating frequency, such as an idle frequency and / or an interaction frequency and / or a readout frequency and / or a reset frequency. The operating frequencies of different qubits may be different. For example, each qubit may idle at a different operating frequency. The operating frequency of qubit 120 may be selected before performing a computation.

[0037] Figure 1 An example quantum computing system that can be used to implement methods and operations according to example aspects of the present disclosure is depicted. Other quantum computing systems can be used without departing from the scope of the present disclosure.

[0038] Figure 2An example environment 200 is depicted in which various embodiments may be practiced. The environment 200 may be a room temperature (RT) environment 200. The RT environment 200 may house or include a quantum computing and / or quantum information processing system (e.g., a QCS). The QCS may include a cryogenic system. The cryogenic system may include a cold temperature chamber 210 that reaches a temperature of approximately 4 Kelvin (K). Nested within the cold temperature chamber may be an ultracold chamber 220. The ultracold chamber 220 may reach a temperature on the order of millikelvin (mK). The ultracold chamber 220 may house a quantum processor device 240. The quantum processor device 240 may include a quantum device set 250. The quantum device set 250 may include a quantum logic gate set 260 and a qubit set 290. The quantum logic gate set 260 may include a qubit coupler set 270 and a Z-gate set 280. In addition to the quantum processor device 240, the ultracold chamber 220 may house one or more DC control logic devices (e.g., a DC control logic device 230).

[0039] In a quantum computing and quantum information processing system (e.g., a QCS hosted by the RT environment 200), a qubit (e.g., a qubit included in the qubit set 290) is a basic information encoding mechanism. A quantum logic gate (e.g., a quantum logic gate included in the quantum logic gate set 260) is a basic logic mechanism used to manipulate and / or process information encoded by a qubit. A qubit encodes quantum information via the amplitude and relative phase that characterize the quantum state of the qubit (e.g., a superposition and / or entangled state). A quantum logic gate processes quantum information by performing unitary operations (e.g., transformations) on the quantum state of the qubit. Such unitary operations process quantum information by deterministically transforming the quantum state of the corresponding qubit (e.g., transforming the amplitude and relative phase). Therefore, the operations and / or changes deterministically manipulate the information encoded by the qubit. The quantum logic operations performed by at least some quantum logic gates may be somewhat similar to classical logic operations (e.g., XOR, AND, NOT, etc.). For example, an X gate is a single-qubit quantum logic gate that is somewhat similar to a classical non-operation. Other quantum logic gates do not simulate classical logic operations. For example, a Z-gate (e.g., a Z-gate included in Z-gate set 280) is a single-qubit quantum logic gate that rotates the quantum state of a qubit by π radians around the Z-axis of its Bloch sphere representation. Another quantum logic gate that has no classical logic analog is a Hadamard gate that transforms a "pure" quantum state into a "superposition" quantum state. Some quantum logic gates are physically implemented by one or more qubit couplers (e.g., a qubit coupler included in qubit coupler set 270). Such coupler-based quantum logic gates can be used to generate "entanglement" of two or more qubits.

[0040] Unitary constraints on the transformations performed by quantum logic gates ensure that the transformations are reversible and therefore preserve quantum information during computation, at least until the corresponding qubit is "read" or decohered. Even though quantum information is preserved via unitary transformations, the amplitude and relative phase may not be readily observable when the qubit is in a superposition of its eigenstates. However, application of specific configurations of quantum logic gates can enable extraction of information associated with the manipulated quantum state of the qubit. Both qubits and quantum logic gates (including couplers) can be considered variants of quantum devices, such as those included in quantum device set 250.

[0041] In order to successfully control and operate a quantum device, each quantum device requires at least one control line configured to transmit an electrical signal. Via the control line, the quantum device is communicatively coupled to other components of the quantum computing system. Depending on the nature of the quantum device, some quantum devices may require more than one control line. The quantum computing system may operate and / or control the quantum device by transmitting one or more control signals to the quantum device along one or more control lines of the device.

[0042] In the absence of precise control of their environment, qubits tend to be decohered. The decohered qubits may not be able to maintain superposition and / or entangled states. The decohered qubits cannot encode quantum information and "interfere" with other qubits in a quantum mechanical way. The decohered qubits can act as classical bits at most. Therefore, once decohered, the qubit has lost its "quantum advantage" over classical computing bits. Fluctuations caused by thermal energy are a mechanism that can cause qubit decoherence. Thus, many quantum computing systems isolate their qubit devices from the universe via one or more cryogenic systems. In order to achieve a coherence time comparable to a time span sufficient for non-trivial quantum computing, a temperature in the order of millikelvin (mK) may be required. Thus, the cryogenic system may be a multi-stage system, such as a system that implements multiple (thermally isolated) environments with reduced temperatures. A multi-stage cryogenic system may include at least two levels. The first stage may reach a temperature in the order of 4 Kelvin (K), while the second stage reaches a temperature in the mK range. In an embodiment, the first level (eg, 4K level) is comparable to a low temperature (LT) environment, and the second level (eg, mK level) is comparable to an ultra low temperature (uLT) environment. The cold temperature chamber 210 may achieve the 4K level, and the ultra cold chamber 220 may achieve the mK level.

[0043] In order to operate each quantum device in the quantum device set 250, at least one DC control signal may be required to be delivered to the quantum device. In addition to the DC control signal, the operation of each qubit in the qubit set 290 may require a microwave control signal. The microwave signal generator 204 located in the room temperature environment 200 may generate the microwave control signal. The microwave control line set 214 may proceed from the room temperature environment 200 and pass through the cold chamber 210 and the ultra-cold chamber 220, and reach the quantum device set 250. The microwave control line set 214 may be configured to transmit the microwave control signal from the microwave signal generator 204 to at least a portion of the quantum device set 250. In at least one embodiment, the microwave control line set 214 may be configured to transmit the microwave control signal from the microwave signal generator 204 to each qubit in the qubit set 290. In at least some embodiments, the microwave control line set 214 may be configured to transmit the microwave control signal from the microwave signal generator 204 to additional and / or alternative quantum devices in the quantum device set 250. For example, set of microwave control lines 214 may be configured to transmit microwave control signals from microwave signal generator 204 to at least a subset of set of qubit couplers 270 and / or to at least a subset of set of Z-gates 280 .

[0044] To provide this DC control signal in a conventional QCS, for each individual quantum device in the quantum device set 250, at least one control line may originate in the room temperature (RT) environment 200 and pass through the colder temperature chamber 210 and the ultracold chamber 229 to terminate at the corresponding quantum device in the ultracold chamber 220. Compared to conventional approaches, in various embodiments, a multiplexing control logic device (e.g., a DC control logic device 230) is positioned within the ultracold chamber 220. Figure 2 As shown, the output of the DC control logic device 230 is "fanned out" to multiple quantum devices. Therefore, the DC control logic device 230 can be a multiplexed DC control logic device. The fan-out (or multiplexing) of the DC control logic device 230 enables the DC control signal set 222 to be provided to at least a subset of the quantum device set 260.

[0045] One or more DC control lines (e.g., DC control line 212) may provide one or more “programming” signals to DC control logic device 230. Figure 2In the embodiment shown in FIG. 2 , a single DC control line (e.g., DC control line 212) provides a programming signal to a DC control logic device 230. The programming signal generator is located in the room temperature environment 200. The DC control line 212 originates from the room temperature environment 200, passes through the cold temperature chamber 210 and the ultra-cold chamber 220, and terminates at the DC control logic device 230. The programming signal generator 202 can generate a programming signal, and the DC controller 212 can provide the programming signal to the DC control logic device 230. In response to receiving the programming signal, the DC control logic device 230 can provide a set of DC control signals 222 to a subset of the set of quantum devices 250.

[0046] In other embodiments, multiple DC control lines can bring programming signals to the DC control logic device 230. In various embodiments, multiple DC control lines can bring programming signals to the DC control logic device 230. The DC control logic device 230 can receive its input signals via K input lines, where K is a positive integer. Based on the signal-encoded K input signals, the DC control logic device 230 can provide control signals to L quantum devices (in the quantum device set 250), where L is a positive integer. In order to control the L quantum devices, K DC control lines travel from the RT environment 200 and enter the ultracold chamber 220. The K control lines transmit the programming signals from the RT environment 200 to the DC control logic device 230. When the ratio When the control lines traveling from the RT environment 200 and entering the cryogenic ultracold chamber 220 are reduced, a reduction in the number of control lines is achieved. This results in a significant reduction in the number of control lines required.

[0047] Despite Figure 2 Although not explicitly shown in the figure, the ultracold chamber 220 may include multiple DC control logic devices. Multiple DC control lines may transmit multiple programming signals to the multiple DC control logic devices. Each of the multiple DC control logic devices may provide a DC control signal to a separate subset of the quantum device set 250. Each separate subset of the quantum device set 250 may be disjoint from all other subsets of the quantum device set 250.

[0048] Figure 3A An example DC control logic device 300 consistent with various embodiments is depicted. The DC control logic device 300 may be similar to Figure 2 Thus, the DC control logic device 300 can be used with a quantum processor (e.g., Figure 2 The quantum processor device 240 is co-located in a cryogenic chamber (e.g., Figure 2The DC control logic device 300 may be a digital-to-analog converter (DAC) device. The DC control logic device 300 may be implemented as a set of loops (e.g., a first loop 302 and a second loop 304) that pair a large inductor (e.g., an inductor 306) with one or more Josephson junctions (e.g., a first Josephson junction 320, a second Josephson junction 322, and a third Josephson junction 324). Note that the different physical sizes of the "X" used to indicate the separated Josephson junctions indicate that the IC of the junctions may vary between the first Josephson junction 320, the second Josephson junction 322, and the third Josephson junction 324. In other embodiments, the IC may be similar across all Josephson junctions.

[0049] In this non-limiting example, the DC control logic device 300 includes a set of stages (eg, a first stage 308). Figure 3A In the example embodiment shown in , only a single stage is included. However, the embodiment is not so limited, and additional stages can be added to the DC control logic device 300. For each stage, a flux quantum is added to a loop (e.g., the first loop 302 or the second loop 304), and the current flowing in the loop increases. Each loop is then inductively coupled to a separate quantum device through a transformer (e.g., a first transformer 330 for the first loop 302 and a second transformer 332 for the second loop 304), thereby effectively applying a bias field. Additional loops can be added to restore fine control over the output field. Each flux quantum can be added to the loop at a very fast speed. Superconductor circuits can operate at a rate of 100+GHz. In addition, the power dissipation of each flux quantum moved into or out of the loop is approximately 0.22aJ.

[0050] exist Figure 3A In the non-limiting embodiment shown in FIG. 1 , a “programming” input signal 310 may be provided to the DC control logic device 300. The input signal 310 may have the following form: Thus, the programming signal may be a sinusoidal signal. For each loop, a separate output signal may be provided to a separate quantum device via a corresponding transformer. For example, a first sinusoidal signal 340 may be provided to a first quantum device, and a second sinusoidal signal 342 may be provided to a second quantum device. Based on the programming signal (e.g., input signal 310), the first sinusoidal signal 340 may have the form And the second sinusoidal signal 342 may have the form Therefore, the first sinusoidal signal 340 and the second sinusoidal signal 342 may be offset relative phase. Because the frequency of the input signal 310, the first sinusoidal signal 340 and the second sinusoidal signal 342 is significantly lower than that of the microwave signal, such signals may be considered as "DC signals". For example, the first sinusoidal signal 340 and the second sinusoidal signal 342 may be DC control signals. Figure 3B As discussed, bias current can be shared across separate quantum devices.

[0051] Figure 3B An example digital-to-analog (DAC) device array 350 consistent with various embodiments is depicted. The DAC device array 350 can be a 2D array of DAC devices. In this non-limiting example, the DAC device array 350 includes 4 DAC devices: a first DAC device 352, a second DAC device 354, a third DAC device 356, and a fourth DAC device 358. The four DAC devices are arranged in a 2D 2x 2 planar array. Other embodiments are not so limited and can include additional DACs. For example, larger 2D arrays are possible. Additionally, in at least one embodiment, the DAC device array 350 can be a 3D array of DAC devices. Each DAC device in the DAC device array 350 (e.g., a first DAC device 352, a second DAC device 354, a third DAC device 356, and a fourth DAC device 358) can be a DC control logic device. That is, each of the DAC devices in the DAC device array 350 can be similar to Figure 3A The DC control logic device 300 of the DAC device. Therefore, each DAC device in the DAC device can provide a DC control signal to one or more quantum devices. In addition, the DAC device array 350 can be located in a low temperature environment (e.g., Figure 2 The ultra-cold chamber 220 is provided.

[0052] Via one or more bias current lines (e.g., first bias current line 362 and second bias current line 364), a common bias current can be shared across multiple DAC devices, and therefore across multiple quantum devices. For example, the first bias current line 362 can provide a common bias current to both the first DAC device 352 and the third DAC device 356. Similarly, the second bias current line 364 can provide another common bias current to the second DAC device 354 and the fourth DAC device 358. In this way, a single bias current line can provide a common bias current to multiple quantum devices. That is, the bias current can be shared across multiple quantum devices. Note that in some embodiments, the first bias current line 362 and the second bias current line 364 can be tied together so that the common bias current can be shared among each of the four DAC devices 352 / 354 / 356 / 358.

[0053] The DAC device array 350 may also include a plurality of address lines so that each DAC device (and therefore each quantum device) may be selectively addressed, accessed, controlled, operated, and / or read. As shown in a non-limiting embodiment, the DAC device array 350 includes four address lines (e.g., a first address line 372, a second address line 374, a third address line 376, and a fourth address line 378) arranged in a 2D array. The 2D array of address lines may be arranged in a "column and row" arrangement so that each pair of column and row address lines selects a unique DAC device (and / or a unique quantum device). In Figure 3B In a non-limiting example, the first address line 372 and the second address line 374 are column address lines. The third address line 376 and the fourth address line 378 are row address lines. The combination of the first address line 372 (e.g., a column address line) and the third address line (e.g., a row address line) selects the first DAC device 376. Note that for 3D embodiments, the array of address lines can be a 3D array.

[0054] Additional Embodiments

[0055] A non-limiting embodiment includes a quantum computing system (QCS). The QCS may include a first cryogenic chamber, a first quantum device, a second quantum device, and a first control logic device. Each of the first quantum device, the second quantum device, and the first control logic device may be positioned with the first cryogenic chamber. In response to receiving one or more programming signals, the first control logic device may be configured to provide a first control signal to the first quantum device and a second control signal to the second quantum device. In some embodiments, the QCS may also include a first control line. The first control line may originate from outside the first cryogenic chamber and terminate at the first control logic device. The first control line is configured to transmit one or more programming signals from outside the first cryogenic chamber.

[0056] In various embodiments, the QCS may further include a third quantum device, a fourth quantum device, and a second control logic device. Each of the second quantum device, the third quantum device, and the second control logic device may be positioned with the first cryogenic chamber. In response to receiving one or more additional programming signals, the second control logic device may be configured to provide a third control signal to the third quantum device and a fourth control signal to the fourth quantum device. In some embodiments, the QCS may also include a second control line. The second control line may originate from outside the first cryogenic chamber and terminate at the second control logic device. The second control line is configured to transmit one or more additional programming signals from outside the first cryogenic chamber.

[0057] In at least one embodiment, the first control signal is a first DC control signal, the second control signal is a second control DC signal, the third control signal is a third DC control signal, and the fourth control signal is a fourth control DC signal. Each of the first quantum device, the second quantum device, the third quantum device, and the fourth quantum device can be a qubit or a quantum logic gate. The quantum logic gate can be a Z gate. In some embodiments, the quantum logic gate can be implemented by a qubit coupler.

[0058] In at least one embodiment, the QCS may include a second cryogenic chamber. The first cryogenic chamber may be nested within the second cryogenic chamber. The first cryogenic chamber may be configured to maintain a first temperature in the milliKelvin (mK) range. The second cryogenic chamber may be configured to maintain a second temperature of approximately 4 Kelvin.

[0059] In some embodiments, the first control logic device is a DC control logic device. The DC control logic device may be a digital-to-analog (DAC) device. The DAC device may convert one or more programming signals into a first control signal and a second control signal. The first control signal may be a first analog signal, and the second control signal may be a second analog signal. The first analog signal and the second analog signal may be sinusoidal signals with a relative phase offset. Additionally, one or more programming signals may be sinusoidal signals.

[0060] The DAC device may include a first current loop and a second current loop. The first current loop may pair a first Josephson junction with a first inductor of the DAC device. The second current loop may pair a second Josephson junction with the first inductor of the DAC device. The first current loop may provide a first analog signal to the first quantum device. The second current loop may provide a second analog signal to the second quantum device. The DAC device may additionally include a first transformer and a second transformer. The first transformer may electrically couple the first loop to the first quantum device. The second transformer may electrically couple the second loop to the second quantum device. The DAC device may further include a set of levels. Each level in the set of levels adds an additional flux quantum to the first inductor.

[0061] Another embodiment includes a method for operating a quantum computing system. The method may include providing one or more programming signals to a control logic device. The control logic device may be co-located with a first quantum device and a second quantum device in a cryogenic chamber. The one or more programming signals may originate from outside the cryogenic chamber. In response to receiving the one or more programming signals, the control logic device may be configured to provide a first control signal to the first quantum device in the cryogenic chamber and to provide a second control signal to the second quantum device in the cryogenic chamber.

[0062] Another embodiment includes a cryogenic chamber comprising a first device, a second device, and a DC control logic device. Each of the first device, the second device, and the DC control logic device can be positioned within the interior of the cryogenic chamber. The first device can be operated via a first DC control signal. The second device can be operated via a second DC control signal. In response to receiving one or more programming signals originating from outside the cryogenic chamber, the DC control logic device can be configured to provide a first DC control signal to the first device and provide a second DC control signal to the second device.

[0063] The digital, classical and / or quantum subject matter and implementations of digital function operations and quantum operations described in this specification may be implemented in digital electronic circuit systems, suitable quantum circuit systems or more generally quantum computing systems, in tangibly implemented digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of them. The term "quantum computing system" may include, but is not limited to, a quantum computer / computing system, a quantum information processing system, a quantum cryptographic system, or a quantum simulator.

[0064] The implementation of the digital and / or quantum subject matter described in this specification may be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution by a data processing device or for controlling the operation of the data processing device. The digital and / or quantum computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits / qubit structures, or a combination of one or more of them. Alternatively or additionally, the program instructions may be encoded on an artificially generated propagation signal (e.g., a machine-generated electrical, optical, or electromagnetic signal) capable of encoding digital and / or quantum information, which is generated to encode digital and / or quantum information for transmission to an appropriate receiver device for execution by the data processing device.

[0065] The terms quantum information and quantum data refer to information or data carried, held or stored by a quantum system, wherein the smallest non-trivial system is a qubit, i.e., a system that defines a unit of quantum information. It should be understood that the term "qubit" encompasses all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems may include multi-level systems, e.g., having two or more levels. For example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational ground state is identified with the ground state and the first excited state, however, it is understood that other arrangements in which the computational state is identified with a higher-level excited state (e.g., a qubit) are also possible.

[0066] The term "data processing device" refers to digital and / or quantum data processing hardware, and includes all types of devices, apparatuses and machines for processing digital and / or quantum data, including, for example, a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer or a plurality of digital and quantum processors or computers, and combinations thereof. The device may also be or further include a dedicated logic circuit, such as an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit), or a quantum simulator, i.e., a quantum data processing device designed to simulate or generate information about a specific quantum system. Specifically, a quantum simulator is a dedicated quantum computer that does not have the ability to perform general quantum computations. In addition to the hardware, the device may optionally include code that creates an execution environment for a digital and / or quantum computer program, for example, code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[0067] A digital or classical computer program, which may also be referred to or described as a program, software, software application, module, software module, script or code, may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages; and it may be deployed in any form, including as a standalone program or as a module, component, subroutine or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to or described as a program, software, software application, module, software module, script or code, may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and translated into a suitable quantum programming language, or may be written in a quantum programming language such as QCL, Quipper, Cirq, etc.

[0068] A digital and / or quantum computer program may, but does not necessarily correspond to a file in a file system. A program may be stored in a portion of a file that stores other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordination files (e.g., files storing one or more modules, subroutines, or code portions). A digital and / or quantum computer program may be deployed to be executed on a digital computer or a quantum computer or on multiple digital and / or quantum computers, which are located at a site or distributed on multiple sites and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that can transmit quantum data using a quantum system (e.g., qubit). Generally, a digital data communication network cannot transmit quantum data, while a quantum data communication network can transmit quantum data and digital data simultaneously.

[0069] The processes and logic flows described in this specification may be performed by one or more programmable digital and / or quantum computers operating in conjunction with one or more digital and / or quantum processors, where appropriate, executing one or more digital and / or quantum computer programs to perform functions by operating on input digital and quantum data and generating output. The processes and logic flows may also be performed by a dedicated logic circuit (e.g., an FPGA or ASIC or a quantum simulator), and the device may also be implemented as the dedicated logic circuit, or performed by a combination of a dedicated logic circuit or a quantum simulator and one or more programmed digital and / or quantum computers.

[0070] For a system of one or more digital and / or quantum computers or processors to be "configured to" or "operable to" perform specific operations or actions, it is meant that the system has installed thereon software, firmware, hardware, or a combination thereof that, in operation, causes the system to perform those operations or actions. For one or more digital and / or quantum computer programs to be configured to perform specific operations or actions, it is meant that the one or more programs include instructions that, when executed by a digital and / or quantum data processing device, cause the device to perform those operations or actions. A quantum computer can receive instructions from a digital computer that, when executed by a quantum computing device, cause the device to perform an operation or action.

[0071] A digital and / or quantum computer suitable for executing a digital and / or quantum computer program may be based on a general or special purpose digital and / or quantum microprocessor or both, or any other kind of central digital and / or quantum processing unit. In general, the central digital and / or quantum processing unit will receive instructions and digital and / or quantum data from a read-only memory, or a random access memory, or a quantum system suitable for transmitting quantum data (e.g. photons), or a combination thereof.

[0072] Some example elements of a digital and / or quantum computer are a central processing unit for executing or implementing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and the memory may be supplemented by or incorporated into a dedicated logic circuit or quantum simulator. Generally, a digital and / or quantum computer will also include one or more mass storage devices for storing digital and / or quantum data, such as magnetic disks, magneto-optical disks or optical disks, or quantum systems suitable for storing quantum information, or operably coupled to receive digital and / or quantum data from or transmit digital and / or quantum data to the mass storage device or both. However, a digital and / or quantum computer need not have such devices.

[0073] Digital and / or quantum computer readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memory, media and memory devices, including, for example, semiconductor memory devices, such as EPROM, EEPROM and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks; and quantum systems, such as trapped atoms or electrons. It should be understood that quantum memory is a device capable of storing quantum data for a long time with high fidelity and efficiency, such as a light-matter interface that uses light for transmission, uses matter for storage, and preserves quantum characteristics such as superposition or quantum coherence of quantum data.

[0074] The control of the various systems or parts thereof described in this specification may be implemented in a digital and / or quantum computer program product, which includes instructions stored on one or more tangible, non-transitory machine-readable storage media and executable on one or more digital and / or quantum processing devices. The systems or parts thereof described in this specification may be implemented as an apparatus, method or electronic system, respectively, which may include one or more digital and / or quantum processing devices and a memory for storing executable instructions to perform the operations described in this specification.

[0075] Although this specification contains many specific implementation details, these details should not be interpreted as limitations on the scope of what may be claimed, but rather as descriptions of features that are specific to a particular implementation. Certain features described in this specification in the context of separate implementations may also be implemented in a single implementation in combination. Conversely, individual features described in the context of a single implementation may also be implemented in multiple implementations individually or in any suitable subcombination. In addition, although features are described above as acting in certain combinations and even initially claimed, one or more features from a claimed combination may be separated from the combination in some cases, and a claimed combination may be directed to a subcombination or a change in a subcombination.

[0076] Similarly, although operations are depicted in a particular order in the accompanying drawings, this should not be construed as requiring that such operations be performed in the particular order shown or in a sequential order, or that all of the operations shown be performed, in order to achieve the desired results. In some cases, multitasking and parallel processing may be advantageous. In addition, the separation of various system modules and components in the implementations described above should not be construed as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged in multiple software products.

[0077] Specific implementations of the subject matter have been described. Other implementations are within the scope of the appended claims. For example, the actions recited in the claims can be performed in a different order and still achieve the desired results. As an example, the processes depicted in the accompanying drawings do not necessarily require the specific order or sequential order shown to achieve the desired results. In some cases, multitasking and parallel processing may be advantageous.

Claims

1. A quantum computing system, comprising: a first cryogenic chamber; a first quantum device, the first quantum device being positioned within the first cryogenic chamber; a second quantum device, the second quantum device being positioned within the first cryogenic chamber; as well as A first control logic device is positioned within the first cryogenic chamber, wherein in response to receiving one or more programming signals, the first control logic device is configured to provide a first control signal to the first quantum device and a second control signal to the second quantum device.

2. The quantum computing system of claim 1, further comprising: A first control line originates from outside the first cryogenic chamber and terminates at the first control logic device, wherein the first control line is configured to transmit the one or more programming signals from outside the first cryogenic chamber.

3. The quantum computing system of claim 1, further comprising: a third quantum device, the third quantum device being positioned in the first cryogenic chamber; a fourth quantum device, the fourth quantum device being positioned in the first cryogenic chamber; as well as A second control logic device is positioned within the first cryogenic chamber, wherein in response to receiving one or more additional programming signals, the second control logic device is configured to provide a third control signal to the third quantum device and to provide a fourth control signal to the fourth quantum device.

4. The quantum computing system of claim 3, further comprising: a first control line originating outside the first cryogenic chamber and terminating at the first control logic device, wherein the first control line is configured to transmit the one or more programming signals from outside the first cryogenic chamber; as well as A second control line originates from outside the first cryogenic chamber and terminates at the second control logic device, wherein the second control line is configured to transmit the one or more additional programming signals from outside the first cryogenic chamber.

5. The quantum computing system of claim 1, wherein: The first control signal is a first DC control signal, and the second control signal is a second control DC signal.

6. The quantum computing system of claim 5, further comprising: a first control line originating from outside the first cryogenic chamber and terminating at the first control logic device, wherein the first control line is configured to transmit the one or more programming signals from outside the first cryogenic chamber; A second control line originates from outside the first cryogenic chamber and terminates at the first quantum device, wherein the second control line is configured to transmit a microwave control signal to the first quantum device.

7. The quantum computing system of claim 6, wherein: The first quantum device is a qubit and the second quantum device is a quantum logic gate.

8. The quantum computing system of claim 7, wherein: The quantum logic gate is a Z-gate.

9. The quantum computing system of claim 7, wherein: The quantum logic gate is implemented by a qubit coupler.

10. The quantum computing system of claim 1, further comprising: A second low temperature chamber, wherein the first low temperature chamber is nested in the second low temperature chamber.

11. The quantum computing system of claim 10, wherein: The first cryogenic chamber is configured to maintain a first temperature in the milliKelvin (mK) range, and the second cryogenic chamber is configured to maintain a second temperature of approximately 4 Kelvin.

12. The quantum computing system of claim 1, wherein: The first control logic device is a DC control logic device.

13. The quantum computing system of claim 1, wherein: The first control logic device is a digital-to-analog (DAC) device that converts the one or more programming signals into the first control signal and the second control signal, the first control signal being a first analog signal and the second control signal being a second analog signal.

14. The quantum computing system of claim 13, wherein: The first analog signal and the second analog signal are sinusoidal signals that are shifted in relative phase.

15. The quantum computing system of claim 13, wherein: The one or more programming signals are sinusoidal signals.

16. The quantum computing system of claim 13, wherein: The DAC device comprises: a first loop, the first loop pairing a first Josephson junction with a first inductor, wherein the first loop provides the first analog signal to the first quantum device; and A second loop is provided, wherein the second loop pairs a second Josephson junction with the first inductor, wherein the second loop provides the second analog signal to the second quantum device.

17. The quantum computing system of claim 16, wherein: The DAC device comprises: a first transformer electrically coupling the first loop to the first quantum device; and A second transformer electrically couples the second loop to the second quantum device.

18. The quantum computing system of claim 17, wherein: The DAC device comprises: A set of stages, wherein each stage in the set of stages adds an additional flux quantum to the first inductance.

19. A method for operating a quantum computing system, the method comprising: One or more programming signals are provided to a control logic device, the control logic device being co-located with a first quantum device and a second quantum device in a cryogenic chamber, wherein the one or more programming signals originate from outside the cryogenic chamber, and in response to receiving the one or more programming signals, the control logic device provides a first control signal to the first quantum device in the cryogenic chamber and provides a second control signal to the second quantum device in the cryogenic chamber.

20. A low temperature chamber, comprising: a first device included within an interior of the cryogenic chamber, wherein the first device is operable via a first DC control signal; a second device included within the interior of the cryogenic chamber, wherein the second device is operable via a second DC control signal; as well as A DC control logic device is included within the interior of the cryogenic chamber, wherein in response to receiving one or more programming signals originating from outside the cryogenic chamber, the DC control logic device is configured to provide the first DC control signal to the first device and provide the second DC control signal to the second device.

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