Data acquisition system

Abstract

The invention discloses a data acquisition system which comprises a sampling module, a radio frequency module and a control module. The sampling module is connected with the plurality of electrodes to sample signals on the electrodes to generate sampling signals, the radio frequency module is used for receiving synchronizing signals representing external stimulation signals and generating marking signals based on the synchronizing signals, and the control module is connected with the sampling module to receive the sampling signals. The control module is connected with the radio frequency module to receive the marking signal and mark the sampling signal based on the marking signal. According to the data acquisition system disclosed by the invention, the radio frequency module is introduced to wirelessly receive the synchronous signal without delay, and then the mark signal instruction is sent to the control module, so that the control module can mark the received sampling signal. Therefore, the sampling signal subsequently sent by the control module to the upper computer for analysis has the stimulation generation time, so that the upper computer can conveniently perform data analysis synchronization.

Description

Technical Field

[0001] The present invention belongs to the technical field of brain-computer interface, and in particular relates to a data acquisition system. Background Art

[0002] 64-lead brain-computer interface technology is an important branch of the brain-computer interface field, and has shown potential in scientific research and medical fields, especially in the treatment of diseases such as epilepsy, Parkinson's disease, and depression. This technology attempts to establish a new communication and control channel between the brain and the external environment, and realize direct interaction between the brain and external devices. The rapid development in computer science, microelectronics, materials science and other fields has provided a technical foundation and support for the research and development of 64-lead brain-computer interface technology. These advances make it possible to manufacture higher density and smaller size electrodes and processors, thereby improving the performance and practicality of brain-computer interfaces.

[0003] In the existing technical solutions, brain-computer interface devices with high precision are all large in size, and use wired transmission for synchronization accuracy. Wired transmission means that the brain-computer interface device uses an EEG cap to collect EEG signals, connects to the collection device through a bus, and then connects to the computer through a data cable. This solution can ensure the accuracy of collected data in a laboratory environment, and wired transmission can ensure the real-time nature of the data. However, it also limits the portability of the device, and it can only be used in fixed occasions, making it difficult to adapt to more usage scenarios.

[0004] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art. Summary of the invention

[0005] The object of the present invention is to provide a data acquisition system which can synchronize the data acquisition of an electroencephalogram sensor device.

[0006] In order to achieve the above object, a technical solution provided by a specific embodiment of the present invention is as follows:

[0007] A data acquisition system is used for an electroencephalogram (EEG) sensing device, wherein the EEG sensing device includes a plurality of electrodes. The data acquisition system includes a sampling module, a radio frequency module and a control module. The sampling module is connected to the plurality of electrodes to sample signals on the electrodes to generate sampling signals. The radio frequency module is used to receive a synchronization signal representing an external stimulation signal and to generate a marking signal based on the synchronization signal. The control module is connected to the sampling module to receive the sampling signal. The control module is connected to the radio frequency module to receive the marking signal and to mark the sampling signal based on the marking signal.

[0008] In one or more embodiments of the present invention, the data acquisition system also includes a current module, which is connected to the electrode to perform current excitation on the electrode to generate an impedance signal for characterizing the contact impedance; or the data acquisition system also includes a current module and a gating module, which is connected to the current module and multiple electrodes to select electrodes connected to the current module, and the current module is used to perform current excitation on the electrode to generate an impedance signal for characterizing the contact impedance.

[0009] In one or more embodiments of the present invention, the current module includes a current source and an amplifier circuit, the current source is used to generate a primary current, the amplifier circuit is connected to the current source and the electrode to amplify the primary current to generate an excitation current, and input the excitation current into the electrode.

[0010] In one or more embodiments of the present invention, the sampling module includes an ADC chip LHE7909 connected to the electrodes.

[0011] In one or more embodiments of the present invention, the data acquisition system also includes a switch module and a power supply module connected to the switch module, the input power supply and the control module, the switch module is used to generate a first switch signal and a second switch signal based on its own state, the power supply module generates a system power supply based on the first switch signal and the input power supply, the control module is also used to generate a locking signal based on power-on of the system power supply, the power supply module locks the system power supply based on the locking signal, and the control module is connected to the switch module to adjust the locking signal based on the second switch signal.

[0012] In one or more embodiments of the present invention, the switch module includes a switch, a first signal unit and a second signal unit, the first end of the switch is connected to a reference voltage, the first signal unit is connected to the second end of the switch to generate a first switch signal based on the state of the switch, and the second signal unit is connected to the second end of the switch to generate a second switch signal based on the state of the switch.

[0013] In one or more embodiments of the present invention, the power module includes a connected power-on unit and a locking unit, wherein the power-on unit is connected to the switch module and the input power supply to generate a system power supply based on a first switch signal, and the locking unit is connected to the control module to generate a holding signal based on the locking signal, and the power-on unit locks the system power supply based on the holding signal.

[0014] In one or more embodiments of the present invention, the power-on unit includes a first transistor, a first end of the first transistor is connected to an input power supply, a control end of the first transistor is connected to a switch module to receive a first switch signal and to a locking unit to receive a hold signal, and a second end of the first transistor is used to generate a system power supply; and / or the locking unit includes a fourth resistor, a fifth resistor, a sixth resistor, and a second transistor, a first end of the fourth resistor is connected to a power supply voltage, a second end of the fourth resistor and a first end of the fifth resistor are connected to a control module to receive a lock signal, a second end of the fifth resistor and a first end of the sixth resistor are connected to a control end of the second transistor, a second end of the sixth resistor and a first end of the second transistor are connected to a ground voltage, and a second end of the second transistor is used to generate a hold signal.

[0015] In one or more embodiments of the present invention, the data acquisition system further includes a power sampling unit, which is connected to the power module to sample the system power supply and generate a power sampling signal, and the control module is connected to the power sampling unit to generate a locking signal based on the power sampling signal; and / or the data acquisition system further includes a power filtering unit, which is connected to the power module to filter the system power supply.

[0016] In one or more embodiments of the present invention, the data acquisition system also includes a motion sensor connected to the control module, the motion sensor is used to sense its own motion state to generate a motion sensing signal, and transmit the motion sensing signal to the control module; and / or the data acquisition system also includes a storage module connected to the control module, the storage module is used to store data; and / or the data acquisition system also includes a communication module connected to the control module, the communication module is used for communication between the control module and an external device; and / or the data acquisition system also includes a filter module connected to the sampling module and the electrode, the filter module is used to filter the signal on the electrode; and / or the data acquisition system also includes a TVS diode, the first end of the TVS diode is connected to the electrode and the sampling module, and the second end of the TVS diode is connected to the ground voltage.

[0017] Compared with the prior art, the data acquisition system of the present invention introduces a radio frequency module, and sends a synchronization signal to the radio frequency module while inducing external stimulation. The radio frequency module can receive the synchronization signal wirelessly and without delay through radio frequency, and then send a marking signal instruction to the control module, so that the control module enters a mark in the received sampling signal. In this way, the sampling signal subsequently sent by the control module to the host computer for analysis also has the time when the stimulation occurred, which can facilitate the host computer to perform data analysis and synchronization. This system can achieve accurate data synchronization in the form of wireless communication, which makes it possible to make the device portable.

[0018] The data acquisition system of the present invention realizes signal sampling by adopting the domestic ADC chip LHE7909, has lower theoretical noise, reduces cost and has more stable supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0020] Figure 1 1 is a system structure diagram of a data acquisition system in one embodiment of the present invention.

[0021] Figure 2 The figure is a circuit diagram of a switch module and a power module in one embodiment of the present invention.

[0022] Figure 3 FIG. 4 is a circuit schematic diagram of a sampling module in an embodiment of the present invention.

[0023] Figure 4 FIG. 4 is a circuit diagram of a filter module in an embodiment of the present invention.

[0024] Figure 5 FIG. 4 is a circuit diagram of a current module in an embodiment of the present invention.

[0025] Figure 6 FIG. 4 is a circuit schematic diagram of a gating module in one embodiment of the present invention.

[0026] Figure 7 FIG. 4 is a circuit diagram of a radio frequency module in an embodiment of the present invention.

[0027] Figure 8 FIG. 4 is a circuit diagram of a motion module in one embodiment of the present invention.

[0028] Fig. 9 FIG. 4 is a circuit schematic diagram of a storage module in an embodiment of the present invention.

[0029] Fig.10 FIG. 4 is a circuit schematic diagram of a communication module in one embodiment of the present invention.

[0030] Fig.11 FIG. 4 is a circuit schematic diagram of a control module in one embodiment of the present invention.

[0031] Fig.12 FIG. 4 is a circuit diagram of a first conversion unit in an embodiment of the present invention.

[0032] Fig.13FIG. 4 is a circuit diagram of a second conversion unit in an embodiment of the present invention.

[0033] Fig.14 FIG. 4 is a circuit diagram of a third conversion unit in an embodiment of the present invention.

[0034] Fig.15 FIG. 4 is a circuit diagram of a fourth conversion unit in an embodiment of the present invention.

[0035] Fig.16 FIG. 4 is a circuit diagram of a fifth conversion unit in an embodiment of the present invention.

[0036] Fig.17 FIG. 4 is a circuit diagram of a sixth conversion unit in an embodiment of the present invention. DETAILED DESCRIPTION

[0037] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0038] "Coupled" or "connected" or "connected" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrically conductive medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include connection through other active or passive devices on the basis of achieving the same or similar functional purposes, such as connection through circuits or components such as switches and follower circuits. In addition, in the invention, words such as "first" and "second" are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply that there is a certain actual relationship, quantity or order between these technical features.

[0039] In the detailed description of the specification, reference is made to the accompanying drawings forming a part thereof, wherein like reference numerals refer to like parts throughout, and wherein are shown by way of exemplary embodiments that may be implemented. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present application. Therefore, the following detailed description should not be considered in a limiting sense.

[0040] The various operations in the specification may be described in turn as multiple discrete actions or operations in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be interpreted as implying that these operations must be order-dependent. Specifically, these operations may not be performed in the order presented. The described operations may be performed in an order different from the described embodiments. Various additional operations may be performed and / or the described operations may be omitted in additional embodiments.

[0041] For purposes of this application, the phrase "A and / or B" means (A), (B), or (A and B). For purposes of this application, the phrase "A, B and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0042] Various components and devices may be referred to or shown in the singular form in this document (for example, "MOS tube", "transistor", "switch", etc.), but this is only for convenience of discussion, and any element mentioned in the singular form may include multiple such elements according to the teachings of this document.

[0043] The specification describes the use of the phrases "in one embodiment" or "in other embodiments" or "in some embodiments", which may each refer to one or more of the same or different embodiments. In addition, the terms "including", "comprising", "having", etc. used in relation to the embodiments of the present application are synonymous.

[0044] The data acquisition system in one embodiment of the present invention is used for an electroencephalogram sensor device, which includes a plurality of electrodes. In one embodiment, when a tester wears the electroencephalogram sensor device, the electroencephalogram sensor device can sense the electroencephalogram signal of the tester and generate corresponding electrical signals on the electrodes.

[0045] like Figure 1 As shown, the data acquisition system includes a sampling module 10 , a radio frequency module 20 , a control module 30 , a current module 40 , a gating module 50 , a switch module 60 and a power supply module 70 .

[0046] Among them, the sampling module 10 is connected to multiple electrodes to sample the signals on the electrodes to generate sampling signals, the radio frequency module 20 is used to receive a synchronization signal representing an external stimulation signal and generate a marking signal based on the synchronization signal, the control module 30 is connected to the sampling module 10 to receive the sampling signal, and the control module 30 is connected to the radio frequency module 20 to receive the marking signal and mark the sampling signal based on the marking signal.

[0047] The gating module 50 is connected to the current module 40 and a plurality of electrodes to select the electrodes connected to the current module 40. The current module 40 is used to perform current excitation on the electrodes to generate impedance signals for characterizing contact impedance.

[0048] The switch module 60 is used to generate a first switch signal and a second switch signal PWR_DET based on its own state. The power module 70 is connected to the switch module 60, the input power VBAT and the control module 30. The power module 70 generates a system power VSYS based on the first switch signal and the input power VBAT. The control module 30 is also used to generate a lock signal PWR_EN based on the power-on of the system power VSYS. The power module 70 locks the system power VSYS based on the lock signal PWR_EN. The control module 30 is connected to the switch module 60 to adjust the lock signal PWR_EN based on the second switch signal PWR_DET.

[0049] In one embodiment, the input power VBAT is generated by a battery, and the input power VBAT is the external power supply of the entire data acquisition system. The system power VSYS provides an internal voltage source for the data acquisition system, and each module obtains the power supply voltage only after the system power VSYS is powered on.

[0050] In one embodiment, the control module 30 is further used to generate a gating control signal. The gating module 50 is connected to the control module 30 to receive the gating control signal and selects an electrode connected to the current module 40 based on the control of the gating control signal.

[0051] like Figure 2 As shown, the switch module 60 includes a switch K1, a first signal unit, and a second signal unit. The first end of the switch K1 is connected to the reference voltage, the first signal unit is connected to the second end of the switch K1 to generate a first switch signal based on the state of the switch K1, and the second signal unit is connected to the second end of the switch K1 to generate a second switch signal PWR_DET based on the state of the switch K1.

[0052] The first signal unit may include a first diode D5, a first resistor R28 and a second resistor R37.

[0053] The cathode of the first diode D5 is connected to the second end of the switch K1, the anode of the first diode D5 is connected to the first end of the first resistor R28 and the first end of the second resistor R37 to generate a first switching signal, the second end of the first resistor R28 is connected to the input power supply VBAT, and the second end of the second resistor R37 is connected to the ground voltage.

[0054] The second signal unit may include a third resistor R29 and a second diode D4.

[0055] The cathode of the second diode D4 is connected to the second end of the switch K1 , the anode of the second diode D4 is connected to the first end of the third resistor R29 , and the second end of the third resistor R29 is connected to the power supply voltage.

[0056] In one embodiment, the reference voltage is a ground voltage, and the second end of the third resistor R29 is connected to a 3.3V power supply voltage, which is generated based on the system power supply VSYS. When the system power supply VSYS is not powered on, the power supply voltage is not generated, and when the system power supply VSYS is powered on, the power supply voltage is 3.3V.

[0057] like Figure 2 As shown, the power module 70 includes a connected power-on unit and a locking unit. The power-on unit is connected to the switch module 60 and the input power supply VBAT to generate a system power supply VSYS based on a first switch signal, and the locking unit is connected to the control module 30 to generate a holding signal based on a locking signal PWR_EN, and the power-on unit locks the system power supply VSYS based on the holding signal.

[0058] Among them, the power-on unit includes a first transistor Q6, a first end of the first transistor Q6 is connected to the input power supply VBAT, a control end of the first transistor Q6 is connected to the anode of the first diode D5 in the switch module 60 to receive a first switching signal, the control end of the first transistor Q6 is connected to the locking unit to receive a holding signal, and a second end of the first transistor Q6 is used to generate a system power supply VSYS.

[0059] The locking unit includes a fourth resistor R36, a fifth resistor R39, a sixth resistor R40, and a second transistor Q7. A first end of the fourth resistor R36 is connected to a power supply voltage, a second end of the fourth resistor R36 and a first end of the fifth resistor R39 are connected to the control module 30 to receive a locking signal PWR_EN, a second end of the fifth resistor R39 and a first end of the sixth resistor R40 are connected to a control end of the second transistor Q7, a second end of the sixth resistor R40 and a first end of the second transistor Q7 are connected to a ground voltage, and a second end of the second transistor is connected to a control end of the first transistor Q6 to generate a holding signal.

[0060] In one embodiment, the first end of the fourth resistor R36 is connected to a 3.3V power supply voltage, which is generated based on the system power supply VSYS. When the system power supply VSYS is not powered on, the power supply voltage is not generated, and when the system power supply VSYS is powered on, the power supply voltage is 3.3V.

[0061] In one embodiment, the data acquisition system may further include a power sampling unit and a power filtering unit. The power sampling unit is connected to the power module 70 to sample the system power VSYS to generate a power sampling signal BAT_LEVEL, and the control module 30 is connected to the power sampling unit to generate a lock signal PWR_EN based on the power sampling signal BAT_LEVEL. The power filtering unit is connected to the power module 70 to filter the system power VSYS.

[0062] like Figure 2As shown, the power sampling unit may include a sampling resistor R30, a sampling resistor R34 and a capacitor C18. A first end of the sampling resistor R30 is connected to a second end of the first transistor Q6 to receive the system power VSYS, a second end of the sampling resistor R30, a first end of the sampling resistor R34, and a first end of the capacitor C18 are connected to a control module 30 to generate a power sampling signal BAT_LEVEL, and a second end of the sampling resistor R34 and a second end of the capacitor C18 are connected to a ground voltage.

[0063] The power filter unit may include a capacitor C17 , a first terminal of the capacitor C17 is connected to the second terminal of the first transistor Q6 to receive the system power VSYS, and a second terminal of the capacitor C17 is connected to the ground voltage.

[0064] In the initial state, when the switch K1 is turned off, the first switch signal is pulled up to a high level by the input power supply VBAT, the first transistor Q6 is turned off, and the system power supply VSYS is not generated.

[0065] When the switch K1 is closed, the first switch signal and the second switch signal PWR_DET are both pulled low, the first transistor Q6 is turned on, and the system power VSYS is powered on. The power sampling unit samples the system power VSYS to generate a power sampling signal BAT_LEVEL, and the control module 30 generates a high-level locking signal PWR_EN based on the power sampling signal BAT_LEVEL. The second transistor Q7 is turned on to generate a low-level holding signal, so that the first transistor Q6 remains in the on state and the system power VSYS is locked. At this time, the system operates normally even when the switch K1 is disconnected.

[0066] After the system power supply VSYS is powered on, when the switch K1 is closed, the second signal unit generates a low-level second switch signal PWR_DET, and when the switch K1 is opened, the second signal unit generates a high-level second switch signal PWR_DET. The control module 30 can adjust the lock signal PWR_EN based on the switch state. For example, when the switch is long pressed and closed for a period of time, the control module 30 continues to receive the low-level second switch signal PWR_DET, and then generates a low-level lock signal PWR_EN, so that the second transistor Q7 is turned off, the lock on the system power supply VSYS is released, and the system is shut down.

[0067] In other embodiments, the second end of the third resistor R29 and / or the first end of the fourth resistor R36 may also be connected to the input power supply VBAT or its voltage division. The power sampling unit and / or the power filter unit may not be provided, and the control module 30 directly generates a low-level locking signal PWR_EN after the system power supply VSYS is powered on.

[0068] like Figure 3 As shown, the sampling module 10 includes an ADC chip LHE7909 connected to the electrodes.

[0069] The ADC chip LHE7909 is a domestically produced analog front-end chip. Compared with the ADS1299 acquisition chip commonly used in brain-computer interfaces in existing technologies, it has the advantages of low cost and stable supply.

[0070] The sampling pins 2, 4, 6, 8, 10, 12, 14, and 16 of the ADC chip LHE7909 are respectively connected to an electrode on the EEG sensor device to collect the signals on the electrodes.

[0071] In one embodiment, a total of 8 ADC chips LHE7909 are provided, namely chip U1 to chip U8. Figure 3 Only chips U1 and U8 are shown in the figure, and the peripheral circuits of the eight chips are basically the same. The EEG sensing device is a 64-lead EEG cap, and the eight ADC chips LHE7909 can collect electrode signals of 64 channels in total.

[0072] The eight ADC chips LHE7909 are connected to the control module 30 in a daisy chain manner, and the ADC chip LHE7909 can send the sampling signal to the control module 30 in an SPI manner. Specifically, the pins 34 (MOSI pins) of the eight ADC chips LHE7909 are all connected to the control module 30. The pin 41 (Daisy_in pin) of the chip Ui is connected to the pin 43 of the chip Ui+1, where 1≤i≤7. The pin 43 of the chip U1 is connected to the control module 30, and the pin 41 of the chip U8 is connected to the signal ground.

[0073] In addition, pins 24 (VREEP) of the eight ADC chips LHE7909 are connected to each other, VREEP of chip U1 is configured as an internal reference, and VREEP of the other seven chips is configured as an external input, so that the reference voltages of the eight ADC chips LHE7909 are consistent.

[0074] In one embodiment, the data acquisition system further includes a filter module and a TVS diode.

[0075] like Figure 4 As shown, the filter module is connected to the sampling module 10 and the electrode, and the filter module is used to filter the signal on the electrode. The first end of the TVS diode is connected to the electrode and the sampling module 10, and the second end of the TVS diode is connected to the ground voltage.

[0076] In a specific embodiment, 64 filter modules and TVS diodes can be provided respectively, and the structures of the 64 filter modules and TVS diodes are identical to each other, and correspond one to one with an electrode and a sampling pin on the ADC chip LHE7909. An electrode is connected to a corresponding set of filter modules and TVS diodes and a sampling pin on the ADC chip LHE7909 to form an electrode channel, forming a total of 64 electrode channels. The following is an example of one set of filter modules and TVS diodes:

[0077] Specifically, the filtering module may include a resistor R9, a capacitor C8 and a capacitor C9. The first end of the resistor R9 is connected to a corresponding electrode E1 through a debugging resistor R8 (this debugging resistor may not be provided in other embodiments), the first end of the TVS diode D5 is connected to the electrode E1, the second end of the resistor R9, the first end of the capacitor C8 and the first end of the capacitor C9 are connected to a sampling pin of the corresponding ADC chip LHE7909 (pin 16 of the chip U1), the second end of the TVS diode D5 and the second end of the capacitor C8 are connected to the ground voltage, and the second end of the capacitor C9 is connected to the reference voltage INREF. The reference voltage INREF may be the reference voltage of the ADC chip LHE7909.

[0078] Because the EEG signal is very weak and very sensitive to noise, a low-pass filter is formed by resistors and capacitors with a cut-off frequency of 159kHZ. Adding a TVS diode can prevent the input voltage from overshooting and burning the ADC chip.

[0079] In other embodiments, the filter module and / or the TVS diode may not be provided.

[0080] like Figure 5 As shown, the current module 40 includes a current source 41 and an amplifier circuit 42. The current source 41 is used to generate a primary current, and the amplifier circuit 42 is connected to the current source 41 and the electrode to amplify the primary current to generate an excitation current, and input the excitation current into the electrode.

[0081] In a specific embodiment, the current source 41 may include a constant current chip U15, and its model is preferably REF200AU. The constant current chip U15 can provide a stable 100uA source / sink current.

[0082] The amplifier circuit 42 may include an amplifier chip U12 and its peripheral circuits. Among them, the pin 2 (negative input terminal) of the amplifier chip U12 is connected to the pin 8 of the constant current chip U15, the pin 3 of the amplifier chip U12 is connected to the first end of the resistor R37, and the second end of the resistor R37 is connected to the pin 6 (output terminal) of the amplifier chip U12. The resistor R36 and the capacitor C110 are connected in parallel between the pin 6 of the amplifier chip U12 and the pin 2 of the amplifier chip U12.

[0083] The amplifier chip U12 can amplify the 100uA current generated by the constant current chip U15 into an excitation current of 1uA, and output it externally through pin 3. Pin 3 of the amplifier chip U12 can be connected to the gating module 50 through a trimming resistor R5 to output the excitation current to the electrode through the gating module 50.

[0084] like Figure 6 As shown, the gating module 50 includes a first gating chip U17 and a plurality of second gating chips. The common end (pin 3) of the first gating chip is connected to the resistor R5 to receive the excitation current, the gating end (pins 1, 2, 3, 4, 5, 12, 13, 14, 15) of the first gating chip is respectively connected to the common end (pin 3) of a second gating chip to select the second selection chip to be connected to the resistor R5, and the gating end (pins 1, 2, 3, 4, 5, 12, 13, 14, 15) of the second selection chip is respectively connected to a sampling pin of a corresponding ADC chip LHE7909, that is, the first end of the capacitor C9 in a corresponding filter module, to select an electrode channel to be connected to its own common end.

[0085] In one embodiment, the first gating chip U17 and the second gating chip each have 8 gating terminals, and the second gating chips are provided with 8, namely, the second gating chip U9 to the second gating chip U16 (only the second gating chip U9 and the second gating chip U16 are shown in the figure, and the models and circuit structures of the other second gating chips are similar). The 8 second gating chips have a total of 64 gating terminals, and one of the 64 electrode channels can be selected to be connected to the resistor R5.

[0086] Pins 9 to 11 (control ends) of the first gating chip U17 and the second gating chip are connected to the control module 30 to receive the gating control signal sent by the control module 30, and perform gating based on the control of the gating control signal.

[0087] In a specific embodiment, the gating control signal simultaneously controls only the first gating chip U17 to gating one second gating chip, and controls the gating second gating chip to gating only one electrode channel.

[0088] In one embodiment, the ground voltage connected to the current module 40 is the reference potential on the EEG sensor device, and the current module 40 and the electrode can be regarded as being in common ground. When the current module performs current excitation on a selected electrode, the voltage signal on the electrode is the product of the excitation current and the contact impedance of the scalp where the electrode contacts.

[0089] After the selection is completed, the excitation current generated by the amplifier chip U12 is transmitted to the filter module in the selected electrode channel through the resistor R5, and then transmitted to the selected electrode through the filter module. The excitation current generates a voltage on the electrode and the scalp where the electrode contacts. The sampling module 10 can collect this voltage, and the contact impedance at the selected electrode can be obtained by calculating this voltage.

[0090] In other embodiments, the gating module 50 may not be provided, and the pin 3 of the amplifier chip U12 in the current module 40 may be directly connected to the electrode to generate an excitation current on the electrode. Only one current module 40 may be provided, and one current module 40 is connected to one or more electrodes to simultaneously perform current excitation on one or more electrodes. Multiple current modules 40 may also be provided, and each current module 40 may be respectively connected to one or more electrodes to simultaneously perform current excitation on one or more electrodes.

[0091] like Figure 7 As shown, the RF module 20 includes a RF chip U3 and its peripheral circuits. The RF chip U3 is preferably a VG6244S580X0M1 module from Vollgo, which is a 5.8GHz band bidirectional wireless transceiver module with a small size and high transmission rate based on the A5133 wireless transceiver chip design. The module integrates a PA+LAN amplifier with a maximum power of 23dBm, which greatly improves the transmission distance of the module. SPI communication is used with a maximum rate of 4Mbps.

[0092] Pins 2 to 6 and pins 11 to 15 of the radio frequency chip U3 are connected to the control module 30 .

[0093] The radio frequency chip U3 receives a synchronization signal sent by an external device simultaneously with the stimulation signal through radio frequency, and transmits the synchronization signal to the control module 30 .

[0094] In one embodiment, the synchronization signal can be generated by driving another VG6244S580X0M1 module through a stimulation signal generating device to cause it to emit a radio frequency signal.

[0095] In one embodiment, the data acquisition system further includes a motion sensor, a storage module and a communication module.

[0096] The motion sensor is connected to the control module 30 , and is used to sense the motion state to generate a motion sensing signal, and transmit the motion sensing signal to the control module 30 .

[0097] like Figure 8As shown, the motion module includes a nine-axis control chip U4, which is preferably an ICM-20948 chip from TDK InvenSense, and can detect the components of the XYZ axes in three states: magnetic field, attitude, and acceleration. The nine-axis control chip U4 communicates with the control module 30 via SPI.

[0098] The motion module may further include a level conversion circuit for converting the communication level between the nine-axis control chip U4 and the control module 30 .

[0099] like Figure 8 As shown, the level conversion circuit includes 5 level conversion units, and the structures and principles of the 5 level conversion units are basically the same. The following is an example of one of the level conversion units:

[0100] The level conversion unit includes a resistor R5, a resistor R6 and a transistor Q1. The first end of the resistor R5 is connected to the 3.3V power supply voltage, and the first end of the resistor R6 is connected to the 1.8V power supply voltage. The control end of the transistor Q1 is connected to the first end of the resistor R5, the first end of the transistor Q2 and the second end of the resistor R5 are connected to the control module 30, and the second end of the transistor Q2 and the second end of the resistor R6 are connected to the pin 22 of the nine-axis control chip U4. The level conversion unit can convert the 1.8V signal on the nine-axis control chip U4 into the 3.3V signal required by the control module 30.

[0101] The storage module is connected to the control module 30 , and is used to store data.

[0102] like Fig. 9 As shown, the storage module includes a TF card U5. The TF card U5 communicates with the main control chip via SPI, and the TF card U5 can be a common model on the market.

[0103] The communication module is connected to the control module 30 , and is used for communication between the control module 30 and external devices.

[0104] like Fig.10 As shown, the communication module includes a WIFI module U1. The WIFI module U1 is preferably E103-W06 of Ebyte, which supports 2.4G and 5G dual-band. The communication method between the WIFI module and the control module 30 is UART, and the baud rate can be configured to 460800bps. S_LINK and W_LINK are the WIFI module status signals, which are connected to the control module 30 to read the working status of the WIFI.

[0105] In other embodiments, the communication module may also include other types or models of communication chips, and may also use other data transmission methods such as Bluetooth, ZigBee or cellular networks.

[0106] like Fig.11 As shown, the control module 30 includes a main control chip U14 and its peripheral circuits. The main control chip U14 is preferably a GD32F470VIT6 chip from GigaDevice. The chip has a total RAM capacity of 768KB, a maximum CPU frequency of 240MHZ, 82 GPIO ports, 5 (Q)SPI interfaces, 8 USART interfaces, an ADC of 12bit, and a DAC of 12bit. The built-in multiple SPI interfaces realize communication with other peripherals. In addition, various IOs for reading the system status are added to realize a closed loop of control.

[0107] In one embodiment, the data acquisition system may further include a power conversion module, which is connected to the power module 70 and other modules to convert the system power VSYS into the power voltage required by each module.

[0108] In a specific embodiment, the power conversion module may include a first conversion unit. Fig.12 As shown, the first conversion unit includes a power chip U8 and its peripheral circuits, and the power chip U8 is used to convert the system power VSYS into the 3.3V power supply voltage required by the control module 30 and the RF module 20. The power chip U8 is preferably a ME6211C33M5G-N chip of the domestic manufacturer MICRONE, with a maximum input voltage of 6V, an output voltage of 3.3V, a voltage difference of 260mV, a maximum output current of 500mA, and a power supply ripple suppression ratio (PRSS) of 70dB.

[0109] In a specific embodiment, the power conversion module may include a second conversion unit. Fig.13 As shown, the second conversion unit includes a power chip U10 and its peripheral circuits. The power chip U10 is preferably a ME6211C33M5G-N chip. The power chip U10 is used to convert the system power VSYS into the power supply voltage ADC_AVDD required by the sampling module 10. Preferably, the main control chip U14 is also used to generate a sampling enable signal ADC_EN, and the sampling enable signal ADC_EN is used to control the opening and closing of the power chip U10. Pin 3 of the power chip U8 is connected to the main control chip U14 to receive the sampling enable signal ADC_EN.

[0110] In a specific embodiment, the power conversion module may further include a third conversion unit. Fig.14 As shown, the third conversion unit includes a power chip U13 and its peripheral circuits. The power chip U13 is connected to the first conversion unit to convert the 3.3V power supply voltage into the 1.8V power supply voltage required by the motion sensor. The power chip U13 is preferably a TPS79318DBVR chip of TI, and the maximum output current of the chip is 200mA.

[0111] In a specific embodiment, the power conversion module may further include a fourth conversion unit. Fig.15 As shown, the fourth conversion unit includes a boost chip U12, an LDO chip U11 and peripheral circuits thereof. The boost chip U12 is used to convert the system power supply VSYS into a 5.5V voltage, and the LDO chip U11 is connected to the boost chip U12 to stabilize the 5.5V voltage to the 5V voltage required by the RF module 20. The boost chip U12 is preferably the LP3102QVF chip of LOWPOWER, which has an input of 3.3V or above and can output a voltage of ±5.5V. In this embodiment, the RF module 20 does not require a voltage of -5.5V, so the VN pin is not connected. The LDO chip U11 is preferably the ME6203A50M3G chip of MICRONE, with a maximum output current of 180mA.

[0112] In a specific embodiment, the power conversion module may further include a fifth conversion unit. Fig.16 As shown, the fifth conversion unit includes a power chip U7 and its peripheral circuits. The power chip U7 is used to convert the system power VSYS into the 3.3V voltage required by the WiFi module U1. Preferably, the main control chip U14 is also used to generate a communication enable signal WIFI_EN, and the communication enable signal WIFI_EN is used to control the opening and closing of the power chip U7. Pin 3 of the power chip U7 is connected to the main control chip U14 to receive the communication enable signal WIFI_EN.

[0113] In a specific embodiment, the power conversion module may further include a sixth conversion unit. Fig.17 As shown, the sixth conversion unit includes a boost chip U17, an LDO chip U16 and its peripheral circuits, and a diode D3. The boost chip U17 is connected to the second conversion unit to convert the power supply voltage ADC_AVDD into a 5.5V voltage and a -5.5V voltage, and the LDO chip U16 is connected to the boost chip U17 to stabilize the 5.5V voltage to the 5V voltage required by the current module 40. The diode D3 is used to adjust the -5.5V voltage to the -5V voltage required by the current module 40.

[0114] In other embodiments, only one or more of the first to sixth conversion units in the power conversion module may be provided, the power conversion module may be provided in other ways, or no power conversion module may be provided.

[0115] The data acquisition system of the present invention and the battery that provides the input power VBAT can be integrated on a circuit board, and the circuit board can be installed on an EEG sensing device (EEG cap). Wireless communication is adopted between the RF module 20 and the stimulation generating device, and between the communication module and the host computer in the system, so that the circuit board does not require any wired connection, which facilitates the portability of the device and has more applicable scenarios.

[0116] In the actual working process, when the external device sends a stimulation signal (such as visual stimulation, etc.) to the tester, a synchronization signal is synchronously sent to the RF module 20 through radio frequency, and the RF module 20 sends a marking signal to the control module 30 based on this synchronization signal. At the same time, the EEG sensor device will respond to the brain wave signal of the tester and generate a corresponding signal on the electrode. The sampling module 10 samples the signal and sends it to the control module 30. The control module 30 then marks the sampled signal based on the marking signal. The subsequent control module 30 can output the marked sampling signal to the host computer, and the host computer also has the generation time of the EEG signal when parsing the data to achieve synchronization.

[0117] The data acquisition system of the present invention can also realize the impedance detection function. Since the impedance of the contact between the electrode and the scalp will affect the test accuracy, it is necessary to read the real-time impedance when wearing the EEG cap. It is generally believed that the contact impedance of the dry electrode within 20KΩ is a testable state, and the contact impedance within 10KΩ is a state with good test conditions. This solution generates an excitation current through the current module 40 to excite the electrode, generates a voltage signal related to the contact impedance on the electrode, and then collects and analyzes this signal to calculate the actual contact impedance.

[0118] The data acquisition system of the present invention can provide stable and appropriate voltage and current for each module by using different power modules 70 and chips, thereby ensuring the stable operation of the system. The system can also finely control the power supply through the control module 30, for example, by implementing the power self-locking operation of the system through the locking signal PWR_EN, controlling the power-on of the sampling module 10 and the communication module through the sampling enable signal and the communication enable signal, etc., to implement the functions of overshoot prevention at startup and energy saving.

[0119] The present invention realizes efficient EEG signal collection by using daisy-chain connected ADC chips, and can obtain lower theoretical noise while reducing costs by using the domestic ADC chip LHE7909 for EEG collection.

[0120] In addition, the present invention also uses a low-pass filter and a TVS diode to improve the signal quality. The nine-axis sensor can also synchronously collect the tester's motion state signal. Multiple functional modules are designed and multiple technical means are integrated to achieve efficient, stable and accurate EEG signal collection, processing and transmission, meeting the high standards for EEG signal analysis in the medical or scientific research fields.

[0121] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0122] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A data acquisition system for an electroencephalogram (EEG) sensing device, wherein the EEG sensing device comprises a plurality of electrodes, characterized in that: The data acquisition system includes a sampling module, a radio frequency module and a control module. The sampling module is connected to multiple electrodes to sample signals on the electrodes to generate sampling signals. The radio frequency module is used to receive a synchronization signal representing an external stimulation signal and generate a marking signal based on the synchronization signal. The control module is connected to the sampling module to receive the sampling signal. The control module is connected to the radio frequency module to receive the marking signal and mark the sampling signal based on the marking signal.

2. The data acquisition system according to claim 1, characterized in that: The data acquisition system further comprises a current module, wherein the current module is connected to the electrode to perform current excitation on the electrode to generate an impedance signal for characterizing the contact impedance; or The data acquisition system also includes a current module and a gating module. The gating module is connected to the current module and multiple electrodes to select electrodes connected to the current module. The current module is used to perform current excitation on the electrodes to generate impedance signals for characterizing contact impedance.

3. The data acquisition system according to claim 2, characterized in that: The current module includes a current source and an amplifier circuit. The current source is used to generate a primary current. The amplifier circuit is connected to the current source and the electrode to amplify the primary current to generate an excitation current, and input the excitation current into the electrode.

4. The data acquisition system according to claim 1, characterized in that: The sampling module includes an ADC chip LHE7909 connected to the electrodes.

5. The data acquisition system according to claim 1, characterized in that: The data acquisition system also includes a switch module and a power supply module connected to the switch module, the input power supply and the control module. The switch module is used to generate a first switch signal and a second switch signal based on its own state. The power supply module generates a system power supply based on the first switch signal and the input power supply. The control module is also used to generate a locking signal based on power-on of the system power supply. The power supply module locks the system power supply based on the locking signal. The control module is connected to the switch module to adjust the locking signal based on the second switch signal.

6. The data acquisition system according to claim 5, characterized in that: The switch module includes a switch, a first signal unit and a second signal unit. The first end of the switch is connected to a reference voltage, the first signal unit is connected to the second end of the switch to generate a first switch signal based on the state of the switch, and the second signal unit is connected to the second end of the switch to generate a second switch signal based on the state of the switch.

7. The data acquisition system according to claim 5, characterized in that: The power module includes a connected power-on unit and a locking unit, wherein the power-on unit is connected to the switch module and the input power supply to generate a system power supply based on a first switch signal, and the locking unit is connected to the control module to generate a holding signal based on the locking signal, and the power-on unit locks the system power supply based on the holding signal.

8. The data acquisition system according to claim 7, characterized in that: The power-on unit comprises a first transistor, a first end of the first transistor is connected to an input power supply, a control end of the first transistor is connected to a switch module to receive a first switch signal and to a locking unit to receive a holding signal, and a second end of the first transistor is used to generate a system power supply; and / or The locking unit includes a fourth resistor, a fifth resistor, a sixth resistor and a second transistor, the first end of the fourth resistor is connected to the power supply voltage, the second end of the fourth resistor and the first end of the fifth resistor are connected to the control module to receive a locking signal, the second end of the fifth resistor and the first end of the sixth resistor are connected to the control end of the second transistor, the second end of the sixth resistor and the first end of the second transistor are connected to the ground voltage, and the second end of the second transistor is used to generate a holding signal.

9. The data acquisition system according to claim 5, characterized in that: The data acquisition system further comprises a power sampling unit, wherein the power sampling unit is connected to the power module to sample the system power supply to generate a power sampling signal, and the control module is connected to the power sampling unit to generate a locking signal based on the power sampling signal; and / or The data acquisition system further comprises a power supply filter unit, which is connected to the power supply module to filter the system power supply.

10. The data acquisition system according to claim 1, characterized in that: The data acquisition system further comprises a motion sensor connected to the control module, wherein the motion sensor is used to sense its own motion state to generate a motion sensing signal and transmit the motion sensing signal to the control module; and / or The data acquisition system further comprises a storage module connected to the control module, wherein the storage module is used to store data; and / or The data acquisition system further comprises a communication module connected to the control module, wherein the communication module is used for communication between the control module and an external device; and / or The data acquisition system further comprises a filtering module connected to the sampling module and the electrode, wherein the filtering module is used to filter the signal on the electrode; and / or The data acquisition system further comprises a TVS diode, a first end of which is connected to the electrode and the sampling module, and a second end of which is connected to a ground voltage.

Images