Display device

Abstract

The display device comprises a backlight assembly, a plurality of gate lines, a plurality of data lines, a power line and a plurality of sub-pixel circuits are arranged on the backlight assembly, each sub-pixel circuit comprises a pixel driving circuit and a light-emitting element, and each pixel driving circuit comprises an initialization circuit, a light-emitting control circuit and a threshold compensation circuit. The initialization circuit is controlled by a first scanning signal, the threshold compensation circuit is controlled by a second scanning signal, the first scanning signal and the second scanning signal have the same waveform and different phases, and the light-emitting control circuit is controlled by only one light-emitting control signal. The number of gate lines which are electrically connected with the pixel driving circuit and transmit scanning signals and light-emitting control signals is small, and the gate driving circuit only needs to provide a circuit structure with two kinds of waveforms so that the process that the pixel driving circuit drives a light-emitting element to emit light can be guaranteed. The layout space required by the gate drive circuit in the frame area of the display device is reduced, and the circuit structure of the display device is simplified.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of display technology, and in particular, to a display device. Background Art

[0002] In recent years, due to the advantages of micro-LEDs over AMOLEDs (Active-matrix organic light emitting diodes), such as smaller device size, faster response speed, higher luminous efficiency, stronger stability and longer service life, the display application field based on micro-LEDs has developed rapidly and has become a research hotspot for display devices.

[0003] The pixel driving circuit of the micro LED can generate a driving signal under the drive of the multi-level scanning signal and different light-emitting driving signals provided in the gate driving circuit to drive the light-emitting element to emit light. However, the multi-level scanning signal and the different light-emitting driving signals result in too many gate lines electrically connected to the pixel driving circuit, which makes the layout of the gate lines on the backlight assembly difficult. At the same time, scanning signals and light-emitting driving signals of different waveforms require different circuit structures in the gate driving circuit, resulting in a large layout space required for the gate driving circuit arranged in the border area of ​​the display device, affecting the screen-to-body ratio of the display device. Summary of the invention

[0004] The present application provides a display device to solve the technical problem of complex circuit structure of the display device.

[0005] An embodiment of the present application provides a display device, including:

[0006] A backlight assembly, on which a plurality of gate lines, a plurality of data lines, a power supply line and a plurality of sub-pixel circuits are arranged;

[0007] Each of the sub-pixel circuits includes a pixel driving circuit and a light-emitting element;

[0008] The pixel driving circuit comprises: an initialization circuit, a light emitting control circuit and a threshold compensation circuit;

[0009] The initialization circuit is electrically connected to the gate line and the threshold compensation circuit, and is configured to obtain a first scanning signal, control its conduction state by the first scanning signal, and output an initialization signal to the threshold compensation circuit when it is turned on;

[0010] The threshold compensation circuit is electrically connected to the gate line, the data line, and the light-emitting control circuit. The threshold compensation circuit includes a driving transistor, and is configured to obtain a second scanning signal and light-emitting duration driving data, and to generate light-emitting duration driving data compensated by the threshold voltage of the driving transistor when the second scanning signal is at a first level; and to generate a driving signal according to the compensated light-emitting duration driving data when the second scanning signal is at a second level and a first power supply signal is obtained; the first scanning signal and the second scanning signal are signals with the same waveform and different phases;

[0011] The light emitting control circuit is electrically connected to the gate line, the power line, and the light emitting element, and is configured to obtain a light emitting control signal and the first power signal, and to control its conduction state by the light emitting control signal, to provide the first power signal to the threshold compensation circuit when it is turned on, and to transmit the driving signal obtained from the threshold compensation circuit to the light emitting element;

[0012] The light emitting element is configured to emit light according to the driving signal.

[0013] In the above technical solution, a pixel driving circuit is provided, which includes an initialization circuit, a light-emitting control circuit and a threshold compensation circuit. Since the initialization circuit is controlled in its on state by a first scanning signal, the threshold compensation circuit is controlled by a second scanning signal to obtain the light-emitting duration driving data and compensate for the threshold voltage of the driving transistor, and the first scanning signal and the second scanning signal are signals with the same waveform and different phases. In addition, the light-emitting control circuit controls the transmission of the first power supply signal and the driving signal by only one light-emitting control signal, thereby reducing the number of gate lines electrically connected to the pixel driving circuit for transmitting the scanning signal and the light-emitting control signal, and the gate driving circuit only needs to provide a circuit structure with two waveforms to ensure the process of the pixel driving circuit driving the light-emitting element to emit light, thereby reducing the layout space required for the gate driving circuit in the border area of ​​the display device, which not only simplifies the circuit structure of the display device, but also improves the screen-to-body ratio of the display device.

[0014] In a feasible implementation manner, the threshold compensation circuit further includes a third transistor and a fifth transistor;

[0015] The first end of the third transistor is electrically connected to the control end of the driving transistor, the second end of the third transistor is electrically connected to the second end of the driving transistor, the control end of the third transistor is electrically connected to the gate line, and the third transistor is configured to obtain the second scanning signal from the control end of the third transistor, and the conduction state of the third transistor is controlled by the second scanning signal;

[0016] The first end of the fifth transistor is electrically connected to the data line, the control end thereof is electrically connected to the gate line, and the second end thereof is electrically connected to the first end of the driving transistor, and is configured to obtain the second scanning signal from the control end thereof, obtain the light emission duration driving data from the first end thereof, and control its conduction state by the second scanning signal;

[0017] The driving transistor is configured to obtain the light emission duration driving data from its first terminal, and to obtain the light emission duration driving data compensated for its threshold voltage from its control terminal when its control terminal and its second terminal are short-circuited.

[0018] In a feasible implementation manner, the threshold compensation circuit further includes:

[0019] a first capacitor, a first end of which is electrically connected to the power line, a second end of which is electrically connected to the control end of the driving transistor, and is configured to obtain a power signal with a constant voltage value from the first end, and store the light emission duration driving data of the threshold voltage compensation of the driving transistor at the second end;

[0020] A second capacitor, whose first end is electrically connected to the power line and whose second end is electrically connected to the control end of the driving transistor, is configured to obtain a second power signal from its first end, and control the conduction state of the driving transistor according to the second power signal, its capacitance, the capacitance of the first capacitor and the light emission duration driving data compensated by the threshold voltage of the driving transistor.

[0021] In the above technical scheme, in the threshold compensation circuit, the third transistor and the fifth transistor can be turned on at the same time. When turned on, the driving transistor and the third transistor constitute a threshold compensation structure, and threshold compensation is performed on the luminous duration driving data transmitted by the fifth transistor, and the data is stored in the second capacitor. When the third transistor and the fifth transistor are turned off and enter the display stage of the display cycle, it is only necessary to adjust the second power supply signal obtained at the first end of the second capacitor to control the conduction state of the driving transistor, thereby controlling the luminous duration of the light-emitting element. The above circuit structure uses a small number of devices and requires only a small number of control signals, which simplifies the circuit structure of the display device, is beneficial to improving the pixel density of the display device, and improves the display effect.

[0022] The display device provided in the embodiment of the present application includes a backlight assembly, on which a plurality of gate lines, a plurality of data lines, a power line and a plurality of sub-pixel circuits are arranged, each sub-pixel circuit includes a pixel driving circuit and a light-emitting element, and in the pixel driving circuit, an initialization circuit, a light-emitting control circuit and a threshold compensation circuit are included, since the initialization circuit is controlled in its on-state by a first scanning signal, and the threshold compensation circuit is controlled by a second scanning signal to obtain the light-emitting duration driving data and compensate for the threshold voltage of the driving transistor, and the first scanning signal and the second scanning signal are signals with the same waveform and different phases, in addition, the light-emitting control circuit controls the transmission of the first power signal and the driving signal by only one light-emitting control signal, thereby reducing the number of gate lines electrically connected to the pixel driving circuit for transmitting the scanning signal and the light-emitting control signal, and the gate driving circuit only needs to provide a circuit structure with two waveforms to ensure the process of the pixel driving circuit driving the light-emitting element to emit light, thereby reducing the layout space required for the gate driving circuit in the border area of ​​the display device, which not only simplifies the circuit structure of the display device, but also improves the screen-to-body ratio of the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0024] Figure 1 This is an application scenario diagram of a display device provided by the present application according to an exemplary embodiment;

[0025] Figure 2 This is a schematic diagram of the structure of a display device provided according to an exemplary embodiment of the present application;

[0026] Figure 3 A schematic diagram of the structure of a display provided by the present application according to an exemplary embodiment;

[0027] Figure 4 A schematic diagram of the structure of a display provided according to another exemplary embodiment of the present application;

[0028] Figure 5 A circuit structure diagram of a conventional pixel driving circuit provided by the present application according to an exemplary embodiment;

[0029] Figure 6 A driving signal timing diagram of a conventional pixel driving circuit provided by the present application according to an exemplary embodiment;

[0030] Figure 7 A schematic diagram of the structure of a P-type pixel driving circuit provided by the present application according to an exemplary embodiment;

[0031] Figure 8A driving signal timing diagram of a P-type pixel driving circuit provided by the present application according to an exemplary embodiment;

[0032] Fig. 9 This is a schematic structural diagram of an N-type pixel driving circuit provided by the present application according to an exemplary embodiment;

[0033] Fig.10 This is a driving signal timing diagram of an N-type pixel driving circuit provided by the present application according to an exemplary embodiment.

[0034] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0035] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0036] It should be noted that, in this article, the term "include", "comprise" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more restrictions, the elements defined by the sentence "include one..." do not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, the parts, features, and elements with the same names in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context in the specific embodiment. It should be further understood that the terms "include", "comprise" indicate the existence of features, steps, operations, elements, components, projects, types, and / or groups, but do not exclude the existence, occurrence or addition of one or more other features, steps, operations, elements, components, projects, types, and / or groups.

[0037] In the description of the present disclosure, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The terms "or" and "and / or" are interpreted as inclusive, or mean any one or any combination. Therefore, "A, B or C" or "A, B and / or C" means "any of the following: A; B; C; A and B; A and C; B and C; A, B and C". Exceptions to this definition will only occur when the combination of elements, functions, steps or operations is inherently mutually exclusive in some way.

[0038] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0039] The display device provided in the embodiments of the present application may have various implementation forms, for example, it may be a smart TV, a laser projection device, a monitor, an electronic bulletin board, an electronic table, etc. Figure 1 This is a specific implementation of the display device of the present application.

[0040] Figure 1 is a schematic diagram of an operation scenario between a display device and a control device according to an embodiment, such as Figure 1 As shown, the user can operate the display device 200 through the smart device 1003 or the control device 1005.

[0041] In some embodiments, the control device 1005 may be a remote controller, and the communication between the remote controller and the display device 200 includes infrared protocol communication or Bluetooth protocol communication, and other short-range communication methods, and the display device 200 is controlled wirelessly or wired. The user can input user commands through buttons on the remote controller, voice input, control panel input, etc. to control the display device 200.

[0042] In some embodiments, a smart device 1003 (such as a mobile terminal, a tablet computer, a computer, a laptop computer, etc.) may also be used to control the display device 200. For example, the display device 200 is controlled using an application running on the smart device.

[0043] In some embodiments, the display device 200 may not use the above-mentioned smart device or control device to receive instructions, but may receive user control through gestures or the like.

[0044] In some embodiments, the display device 200 can also be controlled in a manner other than the control device 1005 and the smart device 1003. For example, the user's voice command control can be directly received through a module for obtaining voice commands configured inside the display device 200, or the user's voice command control can be received through a voice control device set outside the display device 200.

[0045] In some embodiments, the display device 200 also communicates data with the server 1004. The display device 200 may be allowed to communicate via a local area network (LAN), a wireless local area network (WLAN), and other networks. The server 1004 may provide various content and interactions to the display device 200. The server 1004 may be a cluster or multiple clusters, and may include one or more types of servers.

[0046] Figure 2 A schematic diagram showing the structure of a display device in an example is shown in FIG. Figure 2 The display device 200 includes at least one of a tuner and demodulator 210 , a communicator 220 , a detector 230 , an external device interface 240 , a controller 250 , a display 260 , an audio output interface 270 , a memory 290 , a power supply 280 , and a user interface 291 .

[0047] In some embodiments, the controller includes a processor, a video processor, an audio processor, a graphics processor, a RAM, a ROM, and a first interface to an nth interface for input / output.

[0048] The display 260 includes a display screen component for presenting images, and a driving component for driving image display, which is used to receive image signals output from the controller, and display video content, image content, and menu control interface components and user control UI interface.

[0049] The display 260 may be a liquid crystal display, an OLED display, or a projection display, and may also be a projection device and a projection screen.

[0050] The communicator 220 is a component for communicating with an external device or server according to various communication protocol types. For example, the communicator may include at least one of a Wifi module, a Bluetooth module, a wired Ethernet module, and other network communication protocol chips or near field communication protocol chips, and an infrared receiver. The display device 200 can establish transmission and reception of control signals and data signals with the external control device 100 or the server 400 through the communicator 220.

[0051] The power supply 290 may be used to provide the controller 250 and its related components with the required power supply electrical signals.

[0052] The user interface 291 may be used to receive a control signal from the control device 100 (eg, an infrared remote controller, etc.).

[0053] The detector 230 is used to collect signals from the external environment or the external interaction. For example, the detector 230 includes a light receiver, a sensor for collecting the intensity of ambient light; or, the detector 230 includes an image collector, such as a camera, which can be used to collect external environment scenes, user attributes or user interaction gestures; or, the detector 230 includes a sound collector, such as a microphone, etc., for receiving external sounds.

[0054] The external device interface 240 may include, but is not limited to, any one or more of the following: a high-definition multimedia interface (HDMI), an analog or digital high-definition component input interface (component), a composite video input interface (CVBS), a USB input interface (USB), an RGB port, etc. It may also be a composite input / output interface formed by the above multiple interfaces.

[0055] The tuner-demodulator 210 receives broadcast television signals via wired or wireless reception, and demodulates audio and video signals, such as EPG data signals, from a plurality of wireless or wired broadcast television signals.

[0056] In some embodiments, the controller 250 and the tuner-demodulator 210 may be located in different separate devices, that is, the tuner-demodulator 210 may also be located in an external device of the main device where the controller 250 is located, such as an external set-top box.

[0057] The controller 250 controls the operation of the display device and responds to user operations through various software control programs stored in the memory 290. The controller 250 controls the overall operation of the display device 200. For example, in response to receiving a user command for selecting a UI object to be displayed on the display 260, the controller 250 can perform operations related to the object selected by the user command.

[0058] In some embodiments, the controller includes a central processing unit (CPU), a video processor, an audio processor, a graphics processing unit (GPU), RAM Random Access Memory (RAM), ROM (Read-Only Memory, ROM), a first interface to an nth interface for input / output, a communication bus (Bus), etc.

[0059] The user may input a user command through a graphical user interface (GUI) displayed on the display 260, and the user input interface receives the user input command through the graphical user interface (GUI). Alternatively, the user may input a user command through a specific sound or gesture, and the user input interface recognizes the sound or gesture through a sensor to receive the user input command.

[0060] "User interface" is the medium interface for interaction and information exchange between applications or operating systems and users. It realizes the conversion between the internal form of information and the form acceptable to users. The commonly used form of user interface is the Graphical User Interface (GUI), which refers to the user interface related to computer operation displayed in a graphical way. It can be an interface element such as an icon, window, control, etc. displayed on the display screen of an electronic device, where the control can include icons, buttons, menus, tabs, text boxes, dialog boxes, status bars, navigation bars, widgets, etc.

[0061] The display 260 includes a display panel and a backlight assembly configured to provide backlight.

[0062] The display panel is placed in front of the backlight assembly and includes a plurality of liquid crystal display units. The display panel drives and adjusts the state of its internal imaging structure according to the display data obtained, and displays the picture when the backlight is obtained. The display data is the data obtained from the main control system of the display.

[0063] The backlight assembly includes a diaphragm, a diffusion plate, a reflection plate, a lamp board and a back board from top to bottom, and micro diodes distributed in an array are arranged in the lamp board.

[0064] The circuit structure diagram of the backlight assembly and its control device is shown in Figure 3 As shown, the backlight assembly 40 includes a control circuit 250, a data driving circuit 20, a gate driving circuit 30, a backlight assembly 40, and a power supply circuit 280. The control circuit 250 and the data driving circuit 20 are electrically connected, the control circuit 250 and the gate driving circuit 30 are electrically connected, and the backlight assembly 40 and the data driving circuit 20, the gate driving circuit 30, and the power supply circuit 280 are electrically connected.

[0065] The backlight assembly 40 includes a display area AA where a plurality of pixel units 80 are arranged and a non-display area NA outside the display area. In the display area AA, a power line 90, a plurality of gate lines 60 and a plurality of data lines 50 are arranged. The plurality of pixel units 80 are arranged in an array in the display area AA, and each pixel unit 80 is located in an area where the gate line 60 and the data line 50 intersect.

[0066] The gate drive circuit 30 is electrically connected to the gate line 60. The gate drive circuit 30 is configured to obtain a clock signal and a trigger signal from the control circuit 250, and generate a gate drive signal based on the clock signal and the trigger signal, and transmit the gate drive signal to the corresponding pixel unit 80 through the gate line 60 to control the transistor in the pixel unit 80 to be turned on or off.

[0067] More specifically, the gate driver circuit 30 can be made into a separate gate driver integrated circuit (GDIC), and the gate driver circuit 30 can also be integrated in the backlight assembly. The way of integrating the gate driver circuit 30 in the backlight assembly is called gate-in-panel (GIP). In some cases, the GDIC can be electrically connected to the backlight assembly 40 through the COG process (Chip on Glass), and the GDIC can be electrically connected to the backlight assembly 40 through the COF process (Chipon Film). In the COF process, the component is electrically connected to the backlight assembly 40 through a flexible printed circuit (FPC).

[0068] The data driving circuit 20 is a circuit for driving the data line 50, and is configured to obtain display data from the control circuit 250, convert it into an analog data voltage (Vdata), and transmit the data analog voltage to the corresponding pixel unit 80 through the data line 50, so that the light-emitting element 813 in the pixel unit 80 emits light according to the analog data voltage. The magnitude of the analog data voltage determines the light-emitting brightness of the light-emitting element 813.

[0069] The data driving circuit 20 may include one or more source driver integrated circuits (SDICs). Each source driver integrated circuit SDIC may include a shift register, a latch circuit, a digital-to-analog converter, an output buffer, and the like.

[0070] The power circuit 280 is a circuit for providing stable electrical signals, and is configured to provide corresponding required power signals to the backlight assembly 40 , the control circuit 250 , the data driving circuit 20 , and the gate driving circuit 30 .

[0071] In one case, each pixel unit 80 includes three sub-pixel circuits 810, which are respectively used to display red light, blue light, and green light. In another case, each pixel unit 80 includes four sub-pixel circuits 810, which are respectively used to display red light, blue light, green light, and white light. This is not specifically limited here.

[0072] The luminous color of each pixel unit 80 is determined by the properties of the luminous element 813. The luminous element 813 can be any luminous device, including but not limited to OLED and micro LED.

[0073] Micro LED refers to a micro light emitting body made of inorganic semiconductor layers. Micro LEDs can generally include a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. The structure of such micro LEDs can be diverse, such as vertical, horizontal, flip-chip, etc., and is not particularly limited to a specific structure.

[0074] More specifically, if Figure 4 As shown, a sub-pixel circuit 810 includes a pixel driving circuit 814 and a light-emitting element 813. The pixel driving circuit 814 is electrically connected to the light-emitting element 813, and the pixel driving circuit 814 is configured to drive the light-emitting element 813 to emit light. The signals required by the pixel driving circuit 814 include a driving signal, a scanning signal (Scan), and an emission control signal (Emission, referred to as: EM control signal).

[0075] The driving signal may be generated by the control circuit 250 or obtained from the outside. It includes but is not limited to a start pulse signal, a clock signal, and an enable signal. The light-emitting control signal may be a global signal provided by the control circuit 250 or a signal generated by the gate drive circuit 30, which is not specifically limited here. The scanning signal is a successive displacement signal generated by the gate drive circuit 30.

[0076] If the EM control signal is a global signal generated by the control circuit 250 , the gate driving circuit 30 obtains the EM control signal from the control circuit 250 , and transmits the EM control signal to the corresponding pixel driving circuit 814 through the gate line 60 .

[0077] If both the EM control signal and the scan signal are generated by the gate driving circuit 30, the gate driving circuit 30 includes a scan signal generating circuit 301 and an EM control signal generating circuit 302. The scan signal generating circuit 301 outputs the scan signal, and the EM control signal generating circuit 302 outputs the EM control signal.

[0078] Figure 5 : is a circuit structure diagram of a conventional pixel driving circuit provided by the present application according to an exemplary embodiment, Figure 6 is a driving signal timing diagram of a traditional pixel driving circuit. The circuit structure and operation process of the traditional pixel driving circuit are explained below based on the case where all transistors in the traditional pixel driving circuit are P-type transistors.

[0079] The first end of the first transistor T1 is electrically connected to the power line 90, the control end thereof is electrically connected to the gate line 60, the second end thereof is electrically connected to the second end of the first capacitor C1, the second end of the second capacitor C2, the second end of the third capacitor C3, and the control end of the driving transistor T2, and is configured to obtain the first scanning signal S1 from its control end and obtain the reference power signal REF from its first end. In the reset phase t1, the first scanning signal S1 is turned on when it is at a low level, and the reference power signal REF is transmitted to point D.

[0080] The first end of the fourth transistor T4 is electrically connected to the power line 90, the second end thereof is electrically connected to the first end of the driving transistor T2, and the control end thereof is electrically connected to the gate line 60. The fourth transistor T4 is configured to obtain the first power signal VDD from the first end thereof and the second light-emitting control signal EM1 from the control end thereof. The fourth transistor T4 is turned on when the second light-emitting control signal EM1 is at a low level during the compensation stage t2 and the display stage t4, and transmits the first power signal VDD obtained at the first end thereof to the first end of the driving transistor T2.

[0081] The first end of the third transistor T3 is electrically connected to the control end of the driving transistor T2, the control end thereof is electrically connected to the gate line 60, and the second end thereof is electrically connected to the second end of the driving transistor T2. The third transistor T3 is configured to obtain the second scanning signal S2 from the control end thereof, and is turned on during the compensation phase t2 when the second scanning signal S2 is at a low level, so as to short-circuit the second end and the control end of the driving transistor T2, thereby forming a threshold compensation structure with the driving transistor T2.

[0082] The first end of the fifth transistor T5 is electrically connected to the data line 50, the control end is electrically connected to the gate line 60, and the second end is electrically connected to the first end of the second capacitor C2. It is configured to obtain the original light-emitting duration driving data PWMD or the initialization driving data from its first end, obtain the third scanning signal S3 from its control end, and transmit the driving data PWMD obtained at its first end to the second end when the third scanning signal is turned on during the reset phase t1 and the data writing phase t3.

[0083] The second end of the second capacitor C2 is electrically connected to the control end of the driving transistor T2. According to the change in the original light-emitting duration driving data PWMD and the initialization driving data obtained at its first end, the first capacitor C1 and the third capacitor C3 electrically connected to its second end (point A) are coupled, and the change determined at point A is determined as the target light-emitting duration driving data.

[0084] The first end of the first capacitor C1 is electrically connected to the power line 90 and is configured to obtain a control power signal Sweep from the first end thereof. In the display stage t4, the potential value of point A is adjusted according to the change of the control power signal Sweep transmitted from the first end, thereby controlling the duration of generating the driving signal of the driving transistor T2.

[0085] The first end of the sixth transistor T6 is electrically connected to the second end of the driving transistor T2, the second end thereof is electrically connected to the light-emitting element LED, the control end thereof is electrically connected to the gate line 60, and is configured to obtain the third light-emitting control signal EM2 from its control end, and to be turned on when the third light-emitting control signal EM2 is at a low level during the display stage t4, and when the driving signal is obtained at the first end thereof, it is transmitted to the second end to drive the light-emitting element LED to emit light.

[0086] During the driving process of the above-mentioned pixel driving circuit, the first scanning signal and the second scanning signal are scanning signals with the same waveform and different phases, the third scanning signal is different from the first scanning signal in waveform, and the second light-emitting control signal EM1 and the third light-emitting control signal EM2 have waveforms different from the remaining gate signals, resulting in the above-mentioned gate driving circuit being provided with at least two scanning signal generating circuits and two light-emitting control signal generating circuits, and the scanning signal and the light-emitting control signal are transmitted to the above-mentioned pixel driving circuit through multiple gate lines, and among the above-mentioned gate lines, only the gate lines transmitting the first scanning signal and the second scanning signal are multiplexed between multiple pixel driving circuits, resulting in a large number of gate lines set on the backlight assembly and great difficulty in layout of the gate lines. In addition, the layout space required for the gate driving circuit is large, which not only affects the screen-to-body ratio of the display device, but also leads to a complex circuit structure of the display device.

[0087] In order to solve the above problems, the present application provides a display device to solve the technical problem of complex circuit structure of the display device. The technical concept of the present application is: to provide a pixel driving circuit, including an initialization circuit, a light-emitting control circuit and a threshold compensation circuit, the initialization circuit is controlled by a first scanning signal, the threshold compensation circuit is controlled by a second scanning signal, and the first scanning signal and the second scanning signal have the same waveform and different phases, and the light-emitting control circuit is controlled by only one light-emitting control signal, so that the number of gate lines electrically connected to the pixel driving circuit and transmitting the scanning signal and the light-emitting control signal is small, and the gate driving circuit only needs to provide a circuit structure with two waveforms to ensure the process of the pixel driving circuit driving the light-emitting element to emit light, which reduces the layout space required for the gate driving circuit in the border area of ​​the display device and simplifies the circuit structure of the display device.

[0088] The pixel driving circuit proposed in this application is explained in detail below. Figure 7 The schematic diagram of the structure of a pixel driving circuit provided by the present application according to an exemplary embodiment is shown in FIG.

[0089] like Figure 7 As shown, the pixel driving circuit provided in the present application includes an initialization circuit 901 , a light emitting control circuit and a threshold compensation circuit 902 .

[0090] The initialization circuit 901 includes a first transistor T1, the light emitting control circuit includes a fourth transistor T4 and a sixth transistor T6, and the threshold compensation circuit 902 includes a first capacitor C1, a second capacitor C2, a driving transistor T2, a third transistor T3, and a fifth transistor T5.

[0091] The initialization circuit 901 is electrically connected to the gate line 60 and the threshold compensation circuit 902 , and is configured to obtain the first scanning signal S1 , and its conduction state is controlled by the first scanning signal S1 , and outputs the initialization signal REF to the threshold compensation circuit 902 when it is turned on.

[0092] The threshold compensation circuit 902 is electrically connected to the gate line 60, the data line 50, and the light-emitting control circuit. The threshold compensation circuit 902 includes a driving transistor T2 and is configured to obtain a second scanning signal S2 and light-emitting duration driving data PWMD. When the second scanning signal S2 is at a low level, the light-emitting duration driving data PWMD that compensates for the threshold voltage of the driving transistor T2 is generated; when the second scanning signal S2 is at a high level and the first power supply signal VDD is obtained, a driving signal is generated according to the compensated light-emitting duration driving data.

[0093] The first scanning signal S1 and the second scanning signal S2 are signals with the same waveform but different phases.

[0094] The light-emitting control circuit is electrically connected to the gate line 60, the power line 90, and the light-emitting element LED, and is configured to obtain a light-emitting control signal EM and a first power signal VDD. Its conduction state is controlled by the light-emitting control signal EM. When it is conducted, it provides the first power signal VDD to the threshold compensation circuit 902, and transmits the driving signal obtained from the threshold compensation circuit to the light-emitting element LED.

[0095] The light emitting element LED is configured to emit light according to a driving signal.

[0096] In the above technical scheme, in the pixel driving circuit, since the initialization circuit is controlled by the first scanning signal to control its conduction state, the threshold compensation circuit is controlled by the second scanning signal to obtain the light-emitting duration driving data and compensate for the threshold voltage of the driving transistor, and the first scanning signal and the second scanning signal are signals with the same waveform and different phases. In addition, the light-emitting control circuit controls the transmission of the first power supply signal and the driving signal by only one light-emitting control signal, thereby reducing the number of gate lines electrically connected to the pixel driving circuit for transmitting the scanning signal and the light-emitting control signal, and the gate driving circuit only needs to provide a circuit structure with two waveforms to ensure the process of the pixel driving circuit driving the light-emitting element to emit light, reducing the layout space required for the gate driving circuit in the border area of ​​the display device, which not only simplifies the circuit structure of the display device, but also improves the screen-to-body ratio of the display device.

[0097] In the initialization circuit 901, the first end of the first transistor T1 is electrically connected to the power line 90, the control end is electrically connected to the gate line 60, and the second end is electrically connected to the second end of the first capacitor C1 and the second end of the second capacitor C2. It is configured to obtain the initialization signal REF from its first end and the first scanning signal S1 from its control end, and its conduction state is controlled by the first scanning signal S1.

[0098] The first transistor T1 is turned on when the first scanning signal S1 is at a low level, and outputs the initialization signal REF from its second end; and is turned off when the first scanning signal S1 is at a high level, and stops the transmission of the initialization signal REF.

[0099] In the threshold compensation circuit, the first end of the fifth transistor T5 is electrically connected to the data line 50, the second end is electrically connected to the first end of the driving transistor T2, and the control end is electrically connected to the gate line 60. It is configured to obtain the light-emitting duration driving data PWMD from its first end and obtain the second scanning signal S2 from its control end, and its conduction state is controlled by the second scanning signal S2.

[0100] The fifth transistor T5 is turned on when the second scanning signal S2 is at a low level, and outputs the light-emitting duration driving data PWMD from its second end; and is turned off when the second scanning signal S2 is at a high level, and stops transmitting the light-emitting duration driving data PWMD.

[0101] The third transistor T3 has a first end electrically connected to the control end of the driving transistor T2, a second end electrically connected to the second end of the driving transistor T2, and a control end electrically connected to the gate line 60. The third transistor T3 is configured to obtain a second scanning signal S2 from its control end, and its conduction state is controlled by the second scanning signal S2.

[0102] The third transistor T3 is turned on when the second scanning signal S2 is at a low level, and short-circuits the control terminal and the second terminal of the driving transistor T2; and is turned off when the second scanning signal S2 is at a high level, and disconnects the control terminal and the second terminal of the driving transistor T2.

[0103] The driving transistor T2 is configured to short-circuit its control terminal and its second terminal, and when its first terminal obtains the light-emitting duration driving data PWMD, the light-emitting duration driving data after threshold voltage compensation is determined from its control terminal, which is V PWMD +V th , where V PWMD Indicates the level value of the luminous duration driving data, V th represents the threshold voltage of the driving transistor T2.

[0104] The second end of the first capacitor C1 is electrically connected to the control end of the driving transistor T2, and the first end thereof is electrically connected to the power line 90. The first capacitor C1 is configured to obtain a stable electrical signal (for example, a first power signal VDD) from the first end thereof, and to store the threshold voltage-compensated luminous duration driving data generated by the driving transistor T2 from the second end thereof.

[0105] The first end of the second capacitor C2 is electrically connected to the power line 90, and the second end is electrically connected to the second end of the first capacitor C1 and the control end of the third transistor T3. The second capacitor C2 is configured to obtain the second power signal SWEEP from its first end, and determine the change in the potential value of its second end according to the change in the potential value of the second power signal SWEEP, the capacitance of the first capacitor C1, and the capacitance of the second capacitor C2.

[0106] More specifically, the change in the potential value of the second end is: Wherein, ΔA is the change in potential of the second end (point A) of the second capacitor C2, ΔSWEEP is the change in potential of the second power signal SWEEP, c1 is the capacitance of the first capacitor C1, and c2 is the capacitance of the second capacitor C2.

[0107] In the power signal transmission circuit, the first end of the fourth transistor T4 is electrically connected to the power line 90, the second end is electrically connected to the first end of the driving transistor T2, and the control end is electrically connected to the gate line 60. It is configured to obtain the first power signal VDD from its first end and the light emitting control signal EM from its control end, and its conduction state is controlled by the light emitting control signal EM.

[0108] The fourth transistor T4 is turned on when the light emitting control signal EM is at a low level, and transmits the first power signal VDD obtained at its first end to the first end of the driving transistor T2; and is turned off when the light emitting control signal EM is at a high level, and stops the transmission of the first power signal VDD.

[0109] The driving transistor T2 is further configured to control its conduction state according to the first power signal VDD, the potential value of its control terminal and its threshold voltage when the first terminal thereof obtains the first power signal VDD.

[0110] The potential value of the control terminal of the driving transistor T2 is determined according to the light emission duration driving data of the threshold voltage compensation stored in the first capacitor C1 and the second capacitor C2 and the change amount of the second power signal Sweep, which is Among them, V PWMD Indicates the potential value of the luminous duration driving data PWMD, V th Represents the threshold voltage of the driving transistor T2, ▲V Sweeprepresents the potential value change of the second power signal Sweep, c2 represents the capacitance of the second capacitor C2, and c1 represents the capacitance of the first capacitor C1.

[0111] When the voltage value of the electrical signal obtained at its control end is within the preset voltage range, the driving transistor T2 is turned on to generate a driving signal; when the voltage value of the electrical signal obtained at its control end is not within the preset voltage range, the driving transistor T2 is turned off to stop generating the driving signal.

[0112] When the driving transistor T2 generates a driving signal, the current value of the driving signal is: Right now Wherein, k is the current conversion coefficient associated with the driving transistor T2.

[0113] The first end of the sixth transistor T6 is electrically connected to the second end of the driving transistor T2, the control end is electrically connected to the gate line 60, and the second end is electrically connected to the positive electrode of the light-emitting element LED. It is configured to obtain a light-emitting control signal EM from its control end, and its conduction state is controlled by the light-emitting control signal EM.

[0114] The sixth transistor T6 is turned on when the light-emitting control signal EM is at a low level. When a driving signal is obtained at its first end, the driving signal obtained at its first end is transmitted to the light-emitting element LED to drive the light-emitting element LED to emit light. When the light-emitting control signal EM is at a high level, the sixth transistor T6 is turned off to stop the transmission of the electrical signal.

[0115] Figure 7 The circuit structure shown is composed of Figure 8 Drive according to the driving signal timing diagram shown.

[0116] Below Figure 7 The circuit structure shown is explained by the circuit operation in a display cycle. A display cycle T includes an initialization phase T1, a data writing phase T2 and a display phase T3 in sequence.

[0117] In the period corresponding to the initialization stage T1 in the driving signal timing diagram, the first scanning signal S1 is at a low level, the second scanning signal S2 and the light-emitting control signal EM are at a high level, the second power signal Sweep is adjusted from a high level to a low level, and the initialization signal REF is at a low level.

[0118] Since the first scanning signal S1 is at a low level, the first transistor T1 is turned on, and the initialization signal REF obtained at the first end thereof is transmitted to the A point.

[0119] Since the initialization signal REF is low level, the signal obtained by the control end of the driving transistor T2 is low level, the second end of the first capacitor C1 and the second end of the second capacitor C2 are reset according to the initialization signal REF and maintain the level value of the control end of the driving transistor T2.

[0120] The second power signal Sweep is adjusted from a high level to a low level to prepare for level change according to the ramp signal during the display stage T3, thereby avoiding affecting the accuracy of data stored in the second capacitor C2 when adjusting the level in the display stage T3 and the data writing stage T2.

[0121] In the period corresponding to the data writing phase T2 in the driving signal timing diagram, the second scanning signal S2 is at a low level, and the first scanning signal S1 and the light emitting control signal EM are at a high level.

[0122] Since the first scan signal S1 is at a high level, the first transistor T1 is turned off and stops transmitting the initialization signal REF to each capacitor.

[0123] Since the second scanning signal S2 is at a low level, the fifth transistor T5 is turned on, and transmits the light emitting duration driving data PWMD obtained at its first end to the first end of the driving transistor T2.

[0124] Since the second scanning signal S2 is at a low level, the third transistor T3 is turned on, and the control terminal and the second terminal of the driving transistor T2 are short-circuited.

[0125] Since the first end of the driving transistor T2 obtains the light-emitting duration driving data PWMD and its control end and the second end are short-circuited, a threshold compensation structure is formed with the third transistor T3, and the light-emitting duration driving data PWMD after threshold compensation is determined from its control end, which is V PWMD +V th .

[0126] The first capacitor C1 and the second capacitor C2 store the light emitting duration driving data PWMD after the threshold value compensation.

[0127] In the driving signal timing diagram, during the period corresponding to stage T3, the light control signal EM is at a low level, the first scanning signal S1 and the second scanning signal S2 are at a high level, and the second power signal SWEEP is a ramp signal adjusted from a high level to a low level.

[0128] Since the second scanning signal S2 is at a high level, the fifth transistor T5 is turned off, and stops transmitting the light emitting duration driving data PWMD to the first end of the driving transistor T2.

[0129] Since the second scanning signal S2 is at a high level, the third transistor T3 is turned off, and the control terminal and the second terminal of the driving transistor T2 are disconnected.

[0130] Since the light emitting control signal EM is at a low level, the fourth transistor T4 is turned on, and the first power signal VDD obtained at the first end thereof is transmitted to the first end of the driving transistor T2.

[0131] Since the second power signal SWEEP is a ramp signal adjusted from a high level to a low level, the potential value of the second end of the second capacitor C2 decreases as the potential value of the second power signal SWEEP obtained by the first end thereof decreases.

[0132] The potential value of the second end of the second capacitor C2 is determined according to the coupling effect of each capacitor and the potential change value of the first end thereof: Where, ΔV A represents the potential change at the second end of the second capacitor C2, ΔV SWEEP represents the potential change of the second power signal SWEEP obtained by the first end of the second capacitor C2, c1 represents the capacitance of the first capacitor C1, and c2 represents the capacitance of the first capacitor C2.

[0133] According to the change of the potential value of the second end of the second capacitor C2 and the conduction voltage range of the driving transistor T2, the display stage T3 is divided into a non-light-emitting stage and a light-emitting stage.

[0134] In the non-luminous stage, when the potential value of the second end of the second capacitor C2 continues to decrease but is still not within the preset voltage range corresponding to the on-state of the driving transistor T2, the driving transistor T2 remains in the off state. In this embodiment, the potential value of the second end of the second capacitor C2 is not within the preset voltage range corresponding to the on-state of the driving transistor T2, indicating that the potential value of the second end of the second capacitor C2 is greater than the first on-state preset voltage threshold.

[0135] In the light-emitting stage, when the potential value of the second end of the second capacitor C2 continues to decrease and is within the driving voltage range corresponding to the driving transistor T2 being turned on, the driving transistor T2 is turned on, and a driving signal is generated according to the first power signal VDD obtained at its first end, the potential value obtained at its control end and its threshold voltage, which is Right now Wherein, k is the current conversion coefficient associated with the driving transistor T2.

[0136] In this embodiment, the potential value of the second end of the second capacitor C2 being within the preset voltage range corresponding to the driving transistor T2 being turned on indicates that the potential value of the second end of the second capacitor C2 is less than or equal to the first turn-on preset voltage threshold.

[0137] Since the light-emitting control signal EM is at a low level, the sixth transistor T6 is turned on. In the non-light-emitting stage, its first end does not obtain the driving signal transmitted by the driving transistor T2, and the driving signal cannot be transmitted to the light-emitting element LED, and the light-emitting element LED does not emit light; in the light-emitting stage, the sixth transistor T6 transmits the driving signal obtained at its first end to the positive electrode of the light-emitting element LED, and the light-emitting element LED emits light.

[0138] Fig. 9 Schematic diagram of the structure of an N-type pixel driving circuit provided by the present application according to an exemplary embodiment, in which each transistor in the pixel driving circuit is an N-type transistor. Figure 7 The circuit structure shown is Fig. 9 The circuit structure shown is briefly explained.

[0139] Compared to Figure 7 The circuit structure shown is different in that:

[0140] Each transistor is turned on when a high level is obtained and turned off when a low level is obtained;

[0141] The initialization signal REF obtained by the first end of the first transistor T1 from the power line 90 is a high level signal, the first end of the fourth transistor T4 and the first end of the first capacitor C1 obtain the first power signal VSS from the power line 90 as a low level signal, the second end of the driving transistor T2 is electrically connected to the cathode of the light emitting element LED, and the anode of the light emitting element LED is electrically connected to the high level third power signal VSS.

[0142] Other circuit connections and Figure 7 The circuit structure shown is the same and will not be repeated here.

[0143] Fig. 9 The circuit structure shown is composed of Fig.10 Drive according to the driving signal timing diagram shown.

[0144] In the period corresponding to the reset phase T1 in the driving signal timing diagram, the first scanning signal S1 is high, the second scanning signal S2 and the light-emitting control signal EM are low, the second power signal Sweep is adjusted from low to high, and the initialization signal REF is high.

[0145] The first transistor T1 is turned on according to the first scan signal S1, and transmits the initialization signal REF obtained at its first end to the second end of the first capacitor C1, the second end of the second capacitor C2 and the control end of the driving transistor T3 to perform a reset operation.

[0146] In the period corresponding to the data writing phase T2 in the driving signal timing diagram, the second scanning signal S2 is at a high level, and the first scanning signal S1 and the light emitting control signal EM are at a low level.

[0147] The fifth transistor T5 is turned on according to the second scanning signal S2 , and transmits the light emitting duration driving data PWMD to the first end of the driving transistor T2 .

[0148] The third transistor T3 is turned on according to the second scanning signal S2 to short-circuit the control terminal and the second terminal of the driving transistor T2.

[0149] The driving transistor T2 obtains the luminous duration driving data PWMD according to its first terminal, and determines the luminous duration driving data after the threshold compensation from its control terminal, which is V PWMD +V th .

[0150] The first capacitor C1 and the second capacitor C2 store the light emitting duration driving data PWMD after the threshold value compensation.

[0151] In the period corresponding to the light emitting stage T3 in the driving signal timing diagram, the light emitting control signal EM is at a high level, the first scanning signal S1 and the second scanning signal S2 are at a low level, and the third power signal SWEEP is a ramp signal adjusted from a low level to a high level.

[0152] Since the light emitting control signal EM is at a high level, the fourth transistor T4 and the sixth transistor T6 are turned on, and transmit the electrical signals obtained at the first terminals thereof to the second terminals.

[0153] The potential value of the control terminal of the driving transistor T2 follows the change of the potential value obtained by the first terminal of the second capacitor C2, the capacitance of the first capacitor C1 and the capacitance of the second capacitor C2, and is: When the control terminal is less than the second conduction preset voltage threshold, it is turned off, and when it is greater than or equal to the second conduction preset voltage threshold, a driving signal is generated. Right now Wherein, k is the current conversion coefficient associated with the driving transistor T2.

[0154] When the sixth transistor T6 obtains the driving signal at its first end, the driving signal is transmitted to the light emitting element LED to drive the light emitting element LED to emit light.

[0155] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0156] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A display device, comprising: A backlight assembly, on which a plurality of gate lines, a plurality of data lines, a power supply line and a plurality of sub-pixel circuits are arranged; Each of the sub-pixel circuits includes a pixel driving circuit and a light-emitting element; It is characterized in that the pixel driving circuit comprises: an initialization circuit, a light emitting control circuit and a threshold compensation circuit; The initialization circuit is electrically connected to the gate line and the threshold compensation circuit, and is configured to obtain a first scanning signal, control its conduction state by the first scanning signal, and output an initialization signal to the threshold compensation circuit when it is turned on; The threshold compensation circuit is electrically connected to the gate line, the data line, and the light-emitting control circuit. The threshold compensation circuit includes a driving transistor, and is configured to obtain a second scanning signal and light-emitting duration driving data, and to generate light-emitting duration driving data compensated by the threshold voltage of the driving transistor when the second scanning signal is at a first level; and to generate a driving signal according to the compensated light-emitting duration driving data when the second scanning signal is at a second level and a first power supply signal is obtained; the first scanning signal and the second scanning signal are signals with the same waveform and different phases; The light emitting control circuit is electrically connected to the gate line, the power line, and the light emitting element, and is configured to obtain a light emitting control signal and the first power signal, and to control its conduction state by the light emitting control signal, to provide the first power signal to the threshold compensation circuit when it is turned on, and to transmit the driving signal obtained from the threshold compensation circuit to the light emitting element; The light emitting element is configured to emit light according to the driving signal.

2. The display device according to claim 1, characterized in that The threshold compensation circuit also includes a third transistor and a fifth transistor; The first end of the third transistor is electrically connected to the control end of the driving transistor, the second end of the third transistor is electrically connected to the second end of the driving transistor, the control end of the third transistor is electrically connected to the gate line, and the third transistor is configured to obtain the second scanning signal from the control end of the third transistor, and the conduction state of the third transistor is controlled by the second scanning signal; The first end of the fifth transistor is electrically connected to the data line, the control end thereof is electrically connected to the gate line, and the second end thereof is electrically connected to the first end of the driving transistor, and is configured to obtain the second scanning signal from the control end thereof, obtain the light emission duration driving data from the first end thereof, and control its conduction state by the second scanning signal; The driving transistor is configured to obtain the light emission duration driving data from its first terminal, and to obtain the light emission duration driving data compensated for its threshold voltage from its control terminal when its control terminal and its second terminal are short-circuited.

3. The display device according to claim 1 or 2, characterized in that: The threshold compensation circuit further includes: a first capacitor, a first end of which is electrically connected to the power line, a second end of which is electrically connected to the control end of the driving transistor, and is configured to obtain a power signal with a constant voltage value from the first end, and store the light emission duration driving data of the threshold voltage compensation of the driving transistor at the second end; A second capacitor, whose first end is electrically connected to the power line and whose second end is electrically connected to the control end of the driving transistor, is configured to obtain a second power signal from its first end, and control the conduction state of the driving transistor according to the second power signal, its capacitance, the capacitance of the first capacitor and the light emission duration driving data compensated by the threshold voltage of the driving transistor.

4. The display device according to claim 3, characterized in that: The second capacitor is configured to obtain a second power supply signal from its first end, and control the conduction state of the driving transistor according to the second power supply signal, its capacitance, the capacitance of the first capacitor, and the light emission duration driving data compensated by the threshold voltage of the driving transistor, including: The second capacitor is configured to adjust the level value of the control terminal of the driving transistor according to the change amount of the second power signal, its capacitance, the capacitance of the first capacitor and the light-emitting duration driving data compensated by the threshold voltage of the driving transistor; The driving transistor is configured to be turned on when the level value of the control terminal meets its turn-on condition and generate a driving signal; and to be turned off when the level value of the control terminal does not meet its turn-on condition and does not generate a driving signal.

5. The display device according to claim 1, characterized in that The light emitting control circuit comprises: a fourth transistor, a first end of which is electrically connected to the power line, a second end of which is electrically connected to the first end of the driving transistor, and a control end of which is electrically connected to the gate line, and is configured to obtain the first power signal from the first end thereof, obtain the light emission control signal from the control end thereof, control its conduction state by the light emission control signal, and output the first power signal from the second end thereof when the fourth transistor is turned on; A sixth transistor, whose first end is electrically connected to the second end of the driving transistor, whose second end is electrically connected to the light-emitting element, and whose control end is electrically connected to the gate line, is configured to obtain a driving signal from its first end, obtain the light-emitting control signal from its control end, control its conduction state by the light-emitting control signal, and output the driving signal from its second end when it is turned on.

6. The display device according to claim 1, characterized in that: The initialization circuit comprises: A first transistor, whose first end is electrically connected to the power line, whose second end is electrically connected to the control end of the driving transistor, and whose control end is electrically connected to the gate line, is configured to obtain the first scanning signal from its control end, obtain the initialization signal from its first end, control its conduction state by the first scanning signal, and output the initialization signal from its second end when it is turned on.

7. The display device according to claim 1, characterized in that: Each display cycle includes: an initialization phase, a data writing phase and a display phase; In the initialization stage, the first scanning signal is at a first level, the second scanning signal and the light emitting control signal are at a second level, and the second power signal is adjusted from the first level to the second level; The first transistor is turned on according to the first scanning signal, and transmits the initialization signal obtained at the first end thereof to the second end of the first capacitor; The second capacitor adjusts the potential of the second end thereof according to the initialization signal.

8. The display device according to claim 7, characterized in that: In the data writing stage, the second scanning signal is at the first level, and the first scanning signal and the light emitting control signal are at the second level; The fifth transistor is turned on according to the second scanning signal, and transmits the light emitting duration driving data obtained at the first end thereof to the first end of the driving transistor; The third transistor is turned on according to the second scanning signal to short-circuit the control terminal and the second terminal of the driving transistor; The driving transistor determines the light emission duration driving data compensated by the threshold voltage from its second end according to the light emission duration driving data and the threshold voltage obtained at its first end, and stores the data in the first capacitor.

9. The display device according to claim 7, characterized in that: In the display stage, the light emitting control signal is at the first level, the first scanning signal and the second scanning signal are at the second level, and the second power supply signal is a ramp signal adjusted from the second level to the first level; The third transistor is turned off according to the second scanning signal, and the control terminal and the second terminal of the driving transistor are disconnected; The fourth transistor is turned on according to the light emitting control signal, and transmits the first power signal obtained at the first end thereof to the first end of the driving transistor; The second capacitor adjusts the potential value of the control end of the driving transistor according to the variation of the second power signal at the first end thereof, the capacitance thereof, the capacitance of the first capacitor, and the light emission duration driving data of the threshold voltage compensation of the driving transistor stored in the first capacitor; The driving transistor determines its conduction state according to the first power signal obtained at its first terminal, the potential value of its control terminal and its threshold voltage, and generates a driving signal when it is turned on; and stops generating the driving signal when it is turned off; The sixth transistor is turned on according to the light emitting control signal, and when the first terminal thereof obtains the driving signal, the sixth transistor transmits the driving signal to the light emitting element; The light emitting element emits light according to the driving signal.

10. The display device according to claim 9, characterized in that: The display phase includes a non-luminous period and a luminous period; In the non-light-emitting period, the second power supply signal is a ramp signal adjusted from the second level to a third level, the difference between the potential value of the control terminal of the driving transistor and the potential value of the first power supply signal is less than or equal to its threshold voltage, and the driving signal is not generated; In the light-emitting period, the second power supply signal is a ramp signal adjusted from the third level to the first level, and the difference between the potential value of the control terminal of the driving transistor and the potential value of the first power supply signal is greater than its threshold voltage, so as to generate a driving signal; The third level is between the first level and the second level.

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