Inverted micro light-emitting diode and preparation method thereof

By designing a multi-stage inclined light-out surface structure of flipped micro-light-emitting diodes, the problem of low light extraction efficiency of micro-light-emitting diodes is solved, more efficient light extraction is achieved, and process preparation is simplified.

CN119967975AActive Publication Date: 2025-05-09SUZHOU UNIV
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Patent Information

Application Number
CN202510450196.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-11
Publication Date
2025-05-09
Estimated Expiration
2045-04-11

AI Technical Summary

Technical Problem

Micro-LED light extraction efficiency is low, especially the vertical light extraction efficiency gradually decreases with the size of the micro-LED.

Method used

A flip-on micro light emitting diode is designed, which includes a plurality of light emitting units, and each light emitting unit is laminated in a flip-on direction to arrange a main body structure and a light-exit surface structure. The light-exit surface structure includes a multi-section inclined surface, and n is formed by etching. n is greater than or equal to 2, and the angle between the inclined surface and the horizontal surface gradually decreases along the light-exit direction.

Benefits of technology

By reducing total internal reflection, the possibility of light exit is increased, allowing more light to escape, thereby significantly improving the efficiency of top light extraction, simplifying process preparation, and reducing preparation complexity.

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Abstract

The invention discloses an inverted micro light-emitting diode and a preparation method thereof, the inverted micro light-emitting diode comprises a plurality of light-emitting units arranged according to a matrix, and each light-emitting unit comprises a main body structure and a light-emitting surface structure which are stacked along the light-emitting direction of the inverted micro light-emitting diode, the main body structure comprises an n-type semiconductor structure, and the n-type semiconductor structure and the light emitting surface structure are integrally formed; the light-emitting surface structure comprises an inclined surface structure, the inclined surface structure comprises n stages of inclined surfaces distributed from the edge of the n-type semiconductor structure to the center of the n-type semiconductor structure, and n is greater than or equal to 2; and the included angle between the inclined plane and the horizontal plane is gradually reduced along the light emitting direction. According to the inverted micro light-emitting diode, total internal reflection can be reduced by adopting the multiple sections of inclined planes, the light emitting possibility is increased, more light can escape, and therefore the top light extraction efficiency is improved.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an inverted micro-light emitting diode capable of improving top light extraction efficiency and a method for preparing the inverted micro-light emitting diode. Background Art

[0002] Micro-LEDs (Micro Light Emitting Diodes, micro-LEDs) have the advantages of high peak brightness, long service life, low power consumption, and high resolution, and have gradually shown their application in wearable devices, AR / VR devices, vehicle-mounted display devices, and micro-projectors. However, due to the influence of total internal reflection (TIR) ​​and Fresnel reflection, the light extraction efficiency of micro-LEDs is low, especially the light extraction efficiency in the vertical direction gradually decreases with the size of micro-LEDs.

[0003] In view of this, many solutions have been proposed to address the problem of low light extraction efficiency of micro-LEDs, including setting up anti-reflection films, surface micro-nano structures, and micro-lens arrays. However, although depositing an anti-reflection film on the surface of micro-LEDs to improve light efficiency is a relatively convenient way, it requires high-precision coating equipment; setting up surface micro-nano structures requires relatively complex structural design, and may also require high-precision equipment and complex process technology to produce microstructures; and the micro-lens array is installed on the micro-LED chip, and the micro-lens array is integrated into the micro-LED to improve the top light extraction efficiency. However, the chip size of micro-LEDs is constantly decreasing, and the difficulty of integration is increasing. The accuracy required for alignment is also increasing, and a suitable bonding solution must also be considered. Summary of the invention

[0004] In view of this, an object of the present invention is to provide an improved flip-chip micro-LED, which can effectively improve the light extraction efficiency at the top of the micro-LED.

[0005] The present invention provides a flip-chip micro-light emitting diode, comprising a plurality of light-emitting units arranged in a matrix, each of the light-emitting units comprising a main body structure and a light-emitting surface structure stacked along the light-emitting direction of the flip-chip micro-light-emitting diode, the main body structure comprising an n-type semiconductor structure, the n-type semiconductor structure and the light-emitting surface structure being integrally formed; the light-emitting surface structure comprising an inclined surface structure, the inclined surface structure comprising n-level inclined surfaces distributed from the edge of the n-type semiconductor structure to the center of the n-type semiconductor structure, wherein n is greater than or equal to 2; and the angle between the inclined surface and the horizontal plane gradually decreases along the light-emitting direction.

[0006] According to some preferred implementation aspects of the present invention, the n-type semiconductor structure and the light emitting surface structure are made of the same material, and the vertical height of the inclined surface gradually decreases along the light emitting direction.

[0007] According to some preferred implementation aspects of the present invention, the light emitting surface structure further includes a sidewall structure, and the sidewall structure is arranged between the n-type semiconductor structure and the slope structure along the light emitting direction; the height of the sidewall structure is greater than or equal to 100 nm.

[0008] According to some preferred implementation aspects of the present invention, the light emitting surface structure comprises a first plane located between adjacent inclined surfaces, and a length of the first plane is 0.01-2 μm.

[0009] According to some preferred implementation aspects of the present invention, the light emitting surface structure includes a second plane located at the center of the light emitting surface structure, and the length of the second plane is 37%-64% of the length of the micro light emitting diode.

[0010] According to some preferred implementation aspects of the present invention, the maximum thickness of the light emitting surface structure is 1.2-1.5 μm.

[0011] According to some preferred embodiments of the present invention, the size of the micro-LED is 5-20 μm, and n is less than or equal to 3, that is, the light-emitting surface structure of the flip-chip micro-LED with a main structure size of 5 μm-20 μm preferably has a three-level slope.

[0012] According to some preferred embodiments of the present invention, the n-level slope includes a first-level slope, a second-level slope and a third-level slope, the angle between the first-level slope and the horizontal plane is 45°-80°, the angle between the second-level slope and the horizontal plane is 30°-60°, and the angle between the third-level slope and the horizontal plane is 20°-45°.

[0013] According to some preferred implementation aspects of the present invention, the height of the first-level slope is greater than the height of the second-level slope, and the height of the second-level slope is greater than the height of the third-level slope.

[0014] Preferably, the height of the first-level inclined surface is 300nm-500nm, the height of the second-level inclined surface is 200nm-400nm; and the height of the third-level inclined surface is 100nm-300nm.

[0015] The present invention also provides a method for preparing the flip-chip micro-LED as described above, comprising the following steps: Providing a substrate, and preparing an epitaxial layer on the substrate; wherein the epitaxial layer includes a first n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer which are stacked; The epitaxial layer is etched to form a second n-type semiconductor layer and a plurality of main structures arranged at intervals; wherein the main structure comprises an n-type semiconductor structure, a light-emitting structure and a p-type semiconductor structure which are sequentially stacked on the second n-type semiconductor layer; the second n-type semiconductor layer is the remaining portion of the first n-type semiconductor layer after etching away the n-type semiconductor structure; removing the substrate; The second n-type semiconductor layer is etched multiple times to obtain the light emitting surface structure, so as to prepare a micro light emitting diode.

[0016] In some embodiments of the present invention, the method for preparing a flip-chip micro light emitting diode specifically comprises the following steps: Step S1: using an MOCVD process to grow an epitaxial layer on a substrate, the epitaxial layer sequentially including a first n-type semiconductor layer (n-GaN layer), a light-emitting layer (MQW layer), a p-type semiconductor layer (p-GaN layer), and an ITO layer; Step S2: etching the epitaxial layer to form a second n-type semiconductor layer and a plurality of spaced main structures; wherein the main structure comprises an n-type semiconductor structure, a light-emitting structure and a p-type semiconductor structure stacked in sequence on the second n-type semiconductor layer; the second n-type semiconductor layer is the remaining portion of the first n-type semiconductor layer after etching away the n-type semiconductor structure; the overall etching depth is 1-2 μm, and the size of the main structure is 5-20 μm; Step S3: using PECVD to prepare a silicon oxide insulating layer outside the main structure; Step S4: preparing an N electrode and a P electrode by EBE electron beam thermal evaporation, wherein the N electrode is located between adjacent main structures, and the P electrode is located on the ITO layer; Step S5: removing the substrate using laser lift-off technology; Step S6: Repeat the photolithography process on the second n-type semiconductor layer to form n-level inclined surfaces, obtain the light emitting surface structure, and finally obtain a micro light emitting diode.

[0017] According to some preferred implementation aspects of the present invention, the step of performing multiple etching processes on the second n-type semiconductor layer to obtain the light emitting surface structure comprises the following steps: Coating a photoresist layer on the surface of the second n-type semiconductor layer and performing photolithography to form a current pattern; Using the current pattern as a mask, etching the second n-type semiconductor layer so that the surface of the second n-type semiconductor layer forms an i-th level inclined surface; wherein 1≤i≤n; removing the photoresist layer; The above steps are repeated to form n-level inclined surfaces on the surface of the second n-type semiconductor layer to obtain the light emitting surface structure.

[0018] In the present invention, the n of the n-level inclined plane is preferably 3, that is, the n-level inclined plane includes a first-level inclined plane, a second-level inclined plane and a third-level inclined plane, and the second n-type semiconductor layer is etched multiple times to obtain the light-emitting surface structure, including the following steps: Coating a first photoresist layer on the surface of the second n-type semiconductor layer and performing photolithography to form a first pattern; Transferring the first pattern to the second n-type semiconductor layer using a plasma etching process, so that a first level inclined surface is formed on the surface of the second n-type semiconductor layer; removing the first photoresist layer; Coating a second photoresist layer on the surface of the second n-type semiconductor layer having the first level slope and performing photolithography to form a second pattern; Using a plasma etching process to transfer the second pattern to the second n-type semiconductor layer having the first-level slope, so that the surface of the second n-type semiconductor layer having the first-level slope forms a second-level slope; removing the second photoresist layer; Coating a third photoresist layer on the surface of the second n-type semiconductor layer having the first level inclined surface and the second level inclined surface and performing photolithography to form a third pattern; The third pattern is transferred to the second n-type semiconductor layer having the first and second level slopes by using a plasma etching process, so that the surface of the second n-type semiconductor layer having the first and second level slopes forms a third level slope, thereby obtaining the light emitting surface structure.

[0019] In some embodiments, the second n-type semiconductor layer is subjected to multiple etching processes to obtain the light-emitting surface structure, which specifically includes the following steps: Step S61: coating a first photoresist layer on the surface of the second n-type semiconductor layer and performing photolithography to form a first pattern; Step S62: using a plasma etching process to transfer the first pattern to the second n-type semiconductor layer, so that a first-level inclined surface is formed on the surface of the second n-type semiconductor layer, the etching depth is 300nm-500nm, preferably 400nm, and the angle between the first-level inclined surface and the horizontal plane is 45°-80°; Step S63: removing the first photoresist layer; coating a second photoresist layer on the surface of the second n-type semiconductor layer having the first level slope and performing photolithography to form a second pattern; Step S64: using a plasma etching process to transfer the second pattern to the second n-type semiconductor layer having the first-level inclined surface, so that the surface of the second n-type semiconductor layer having the first-level inclined surface forms a second-level inclined surface, the etching depth is 200nm-400nm, preferably 300nm, which is less than the etching depth of the first-level inclined surface; the angle between the second-level inclined surface and the horizontal plane is 30°-60°, which is less than the angle between the first-level inclined surface and the horizontal plane; Step S65: removing the second photoresist layer; coating a third photoresist layer on the surface of the second n-type semiconductor layer having the first level bevel and the second level bevel and performing photolithography to form a third pattern; Step S66: Using a plasma etching process, the third pattern is transferred to the second n-type semiconductor layer having the first level bevel and the second level bevel, so that the surface of the second n-type semiconductor layer having the first level bevel and the second level bevel forms a third level bevel. The etching depth is 100nm-300nm, preferably 200nm, and the etching depth is less than the etching depth of the second level bevel; the angle between the second level bevel and the horizontal plane is 20°-45°, which is less than the angle between the second level bevel and the horizontal plane.

[0020] Thus, a light-emitting surface structure with three levels of slopes is obtained on the second n-type semiconductor layer.

[0021] Due to the application of the above technical scheme, the present invention has the following advantages compared with the prior art: the flip-chip micro-light emitting diode of the present invention adopts multiple inclined surfaces to reduce total internal reflection, increase the possibility of light emission, and avoid the total internal reflection causing most of the light emitted in the light-emitting layer to return to the medium after total reflection and be absorbed by the semiconductor layer or the electrode layer, so that more light can escape, thereby improving the top light extraction efficiency; and there is no need for additional design and production of microlens arrays, reducing the subsequent alignment and gluing steps with micro-LEDs, and the process preparation is relatively convenient, simple and feasible, and has a high yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 This is a schematic diagram of light emitting from the top of a micro-LED; Figure 2 is a schematic structural diagram of a flip-chip micro light emitting diode provided by an embodiment of the present invention; Figure 3It is a three-dimensional schematic diagram of the top surface light emitting structure of the flip-chip micro light emitting diode provided by an embodiment of the present invention; Figure 4 is a cross-sectional schematic diagram of a top surface light emitting structure of a flip-chip micro-LED provided in an embodiment of the present invention; Figure 5 It is a schematic diagram of the preparation process of the flip-chip micro light-emitting diode provided by an embodiment of the present invention; Figure 6 It is a schematic diagram of the preparation process of the top surface light emitting structure of the flip-chip micro light emitting diode provided by an embodiment of the present invention; Figure 7 It is a structural schematic diagram of a mask when preparing a top surface light emitting structure provided in Example 6 of the present invention; Figure 8 is a result comparison diagram of the top LEE of the micro-LED of the embodiment of the present invention and the comparative example; The reference numerals include: inverted micro light emitting diode-1, light emitting unit-2, main structure-3, light emitting surface structure-4, substrate-5, first n-type semiconductor layer-6, light emitting layer-7, p-type semiconductor layer-8, ITO layer-9, second n-type semiconductor layer-10, n-type semiconductor structure-11, silicon oxide insulating layer-12, N electrode-13, P electrode-14, sidewall structure-15, first level slope-16, second level slope-17, third level slope-18, first plane-19, second plane-20, photoresist layer-21, mask-22, shading area-23. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0025] In traditional GaN-based micro-LEDs, the light emitted from the active layer passes through the semiconductor material (medium with a large refractive index) and is emitted into the air (medium with a small refractive index). Only a portion of the light at a certain angle can escape into the air, while most of the light at a certain angle returns to the medium after total reflection and is absorbed by the light-emitting layer or electrode. Figure 1As shown in Figure (a), only light within the critical angle can escape into the air, and the critical angle between GaN material and air is 23.4°. The flip-chip micro-LED provided by the present invention can increase the amount of light that escapes from the inclined surface after etching multiple inclined surfaces on the surface, allowing more light to escape, increasing the probability of light emitting from the surface, and thus improving the light extraction efficiency at the top. Figure 1 As shown in Figure (b), the flip-chip micro-LED provided by the present invention is described in detail below.

[0026] See also Figure 2 , Figure 2 1 is a schematic diagram of the structure of a flip-chip micro light emitting diode provided in an embodiment of the present invention. The flip-chip micro light emitting diode 1 includes a plurality of light emitting units 2 arranged in a matrix.

[0027] Each light emitting unit 2 comprises a main structure 3 and a light emitting surface structure 4 stacked along the light emitting direction of the flip chip micro LED 1. The main structure 3 comprises an n-type semiconductor structure 11, and the n-type semiconductor structure 11 and the light emitting surface structure 4 are integrally formed.

[0028] Furthermore, if Figure 3 and Figure 4 As shown, the light emitting surface structure 4 includes a bevel structure, which includes n-level bevels distributed from the edge of the n-type semiconductor structure 11 to the center of the n-type semiconductor structure 11, where n is greater than or equal to 2; the angle between the bevel and the horizontal plane gradually decreases along the light emitting direction. Figure 3 The middle figure (a) shows a light-emitting surface structure 4 in the shape of a prism pyramid. Figure 3 The middle figure (b) shows a light-emitting surface structure 4 in the shape of a truncated cone pyramid.

[0029] In one embodiment, n is less than or equal to three.

[0030] In one embodiment, the n-type semiconductor structure 11 and the light emitting surface structure 4 are made of the same material, and the vertical height of the inclined surface gradually decreases along the light emitting direction.

[0031] In one embodiment, if Figure 4 As shown, the light emitting surface structure 4 further includes a sidewall structure 15 , which is disposed between the n-type semiconductor structure 11 and the inclined surface structure along the light emitting direction; the height of the sidewall structure 15 is greater than or equal to 100 nm.

[0032] In one embodiment, the light emitting surface structure 4 includes a first plane 19 located between adjacent inclined surfaces, and the length of the first plane 19 is 0.01-2 μm. The first plane 19 can increase the light emitting area, further improve the light emitting probability, and thus improve the light extraction efficiency at the top.

[0033] In one embodiment, the light emitting surface structure 4 includes a second plane 20 located at the center of the light emitting surface structure 4, and the length of the second plane 20 is 37%-64% of the length of the micro-LED. For example, the length of the second plane 20 is 37%, 38%, 40%, 42%, 45%, 48%, 50%, 52%, 55%, 56%, 58%, 60%, 62% or 64% of the length of the micro-LED. The length of the micro-LED is the size of the micro-LED, more specifically, the size of the main structure of the micro-LED.

[0034] In one embodiment, the maximum thickness of the light emitting surface structure 4 is 1.2-1.5 μm, and the maximum thickness of the light emitting surface structure 4 is the height of the light emitting surface structure 4 in the light emitting direction. For example, the maximum thickness of the light emitting surface structure 4 may be 1.2 μm, 1.22 μm, 1.24 μm, 1.26 μm, 1.28 μm, 1.3 μm, 1.32 μm, 1.34 μm, 1.36 μm, 1.38 μm, 1.4 μm, 1.42 μm, 1.44 μm, 1.46 μm, 1.48 μm or 1.5 μm.

[0035] In one embodiment, the n-level bevels include a first-level bevel 16, a second-level bevel 17 and a third-level bevel 18, the angle between the first-level bevel 16 and the horizontal plane is 45°-80°, for example: 45°, 55°, 60°, 65°, 70°, 75° or 80°; the angle between the second-level bevel 17 and the horizontal plane is 30°-60°, for example: 30°, 35°, 40°, 45°, 50°, 55° or 60°; the angle between the third-level bevel 18 and the horizontal plane is 20°-45°, for example: 20°, 25°, 30°, 35°, 40° or 45°.

[0036] Furthermore, the height of the first-stage inclined surface 16 is greater than the height of the second-stage inclined surface 17 , and the height of the second-stage inclined surface 17 is greater than the height of the third-stage inclined surface 18 .

[0037] Further, the height of the first level bevel 16 is 300nm-500nm, the height of the second level bevel 17 is 200nm-400nm, and the height of the third level bevel 18 is 100nm-300nm. Preferably, the height of the first level bevel 16 is 400nm, the height of the second level bevel 17 is 300nm, and the height of the third level bevel 18 is 200nm.

[0038] In one embodiment, the size of the micro LED is 5-20 μm, for example, the size of the micro LED is 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, 11 μm, 12 μm, 13 μm, 14 μm, 15 μm, 16 μm, 17 μm, 18 μm, 19 μm or 20 μm.

[0039] like Figure 2-Figure 6 As shown, the present invention also provides a method for preparing the above-mentioned flip-chip micro-light emitting diode 1, which specifically comprises the following steps: Step S1: providing a substrate 5, and growing an epitaxial layer on the substrate 5 using a metal-organic chemical vapor deposition (MOCVD) process, wherein the epitaxial layer sequentially includes a first n-type semiconductor layer 6 (which may be an n-GaN layer), a light-emitting layer 7 (i.e., a multi-quantum well layer), a p-type semiconductor layer 8 (which may be a p-GaN layer), and a conductive layer (which may be an ITO layer 9).

[0040] The material of the substrate 5 is preferably sapphire or gallium nitride.

[0041] Step S2: etching the epitaxial layer so that the epitaxial layer forms a second n-type semiconductor layer 10 and a plurality of main structures 3 arranged at intervals.

[0042] The overall etching depth is 1-2 μm. The size of the main structure 3 is 5-20 μm. The main structure 3 includes an n-type semiconductor structure 11, a light emitting structure and a p-type semiconductor structure stacked in sequence on the second n-type semiconductor layer 10. The second n-type semiconductor layer 10 is the remaining portion of the first n-type semiconductor layer 6 after etching to remove the n-type semiconductor structure 11.

[0043] Step S3: using plasma enhanced chemical vapor deposition (PECVD) to prepare a silicon oxide insulating layer 12 outside the main structure 3 .

[0044] A window for subsequently preparing the P electrode 14 is left on the silicon oxide insulating layer 12 .

[0045] Step S4: Prepare the N electrode 13 and the P electrode 14 by electron beam evaporation (EBE), wherein the N electrode 13 is located between adjacent main structures 3 and connected to the second n-type semiconductor layer 10; the P electrode 14 is located on the ITO layer 9 and penetrates the silicon oxide insulating layer 12 and connected to the conductive layer.

[0046] Step S5: using laser lift-off technology to completely remove the substrate 5.

[0047] Step S6: performing multiple photolithography operations on the side of the second n-type semiconductor layer 10 away from the main structure 3 to form an n-level inclined surface, obtain a light emitting surface structure 4, and finally obtain a micro light emitting diode.

[0048] Preferably, if Figures 3 to 6As shown, n of the n-level inclined planes is 3, that is, the n-level inclined planes include a first-level inclined plane 16, a second-level inclined plane 17, and a third-level inclined plane 18. The second n-type semiconductor layer 10 is etched multiple times to obtain the light-emitting surface structure 4, which specifically includes the following steps: Step S61 : coating a first photoresist layer 21 on the surface of the second n-type semiconductor layer 10 and performing photolithography to form a first pattern.

[0049] Step S62 : using a plasma etching process to transfer the first pattern to the second n-type semiconductor layer 10 , so that a first-level inclined surface 16 is formed on the surface of the second n-type semiconductor layer 10 .

[0050] The etching depth is 300nm-500nm, preferably 400nm; the angle between the first-level inclined surface 16 and the horizontal plane is 45°-80°.

[0051] Step S63: removing the first photoresist layer 21; coating a second photoresist layer 21 on the surface of the second n-type semiconductor layer 10 having the first level inclined surface 16 and performing photolithography to form a second pattern.

[0052] Step S64 : using a plasma etching process to transfer the second pattern to the second n-type semiconductor layer 10 having the first-level slope 16 , so that a second-level slope 17 is formed on the surface of the second n-type semiconductor layer 10 having the first-level slope 16 .

[0053] The etching depth is 200nm-400nm, preferably 300nm, which is less than the etching depth of the first level bevel 16; the angle between the second level bevel 17 and the horizontal plane is 30°-60°, which is less than the angle between the first level bevel 16 and the horizontal plane.

[0054] Step S65: removing the second photoresist layer 21; coating a third photoresist layer 21 on the surface of the second n-type semiconductor layer 10 having the first level bevel 16 and the second level bevel 17 and performing photolithography to form a third pattern.

[0055] Step S66 : using a plasma etching process to transfer the third pattern to the second n-type semiconductor layer 10 having the first level slope 16 and the second level slope 17 , so that a third level slope 18 is formed on the surface of the second n-type semiconductor layer 10 having the first level slope 16 and the second level slope 17 .

[0056] The etching depth is 100nm-300nm, preferably 200nm, which is less than the etching depth of the second level bevel 17; the angle between the second level bevel 17 and the horizontal plane is 20°-45°, which is less than the angle between the second level bevel 17 and the horizontal plane. Thus, a light emitting surface structure 4 with three levels of bevels is obtained on the second n-type semiconductor layer 10.

[0057] In other embodiments, the above steps may be repeated to form a light-emitting surface structure 4 with more inclined surfaces where n is greater than 3; or the number of repetitions of the above steps may be reduced to form a light-emitting surface structure 4 with two levels of inclined surfaces where n is 2. Preferably, the light-emitting surface structure 4 of the flip-chip micro-LED 1 with a main structure 3 size of 5 μm-20 μm has a three-level inclined surface (n=3), and the light-emitting surface structure 4 of the flip-chip micro-LED 1 with a main structure 3 size of 20 μm-30 μm has a four-level inclined surface (n=4), and so on, the larger the size of the main structure 3, the larger n. Example 1

[0058] Please refer to Figures 1 to 4 The flip-chip micro-LED 1 provided in this embodiment includes a plurality of light-emitting units 2 arranged in a matrix. Each light-emitting unit 2 includes a main structure 3 and a light-emitting surface structure 4 stacked along the light-emitting direction of the flip-chip micro-LED 1. The main structure 3 includes an n-type semiconductor structure 11, and the n-type semiconductor structure 11 and the light-emitting surface structure 4 are integrally formed. The n-type semiconductor structure 11 and the light-emitting surface structure 4 are made of the same material.

[0059] The maximum thickness of the light emitting surface structure 4 is 1.38 μm, and the maximum thickness of the light emitting surface structure 4 is the height of the light emitting surface structure 4 in the light emitting direction. The light emitting surface structure 4 includes a bevel structure, a sidewall structure 15, a first plane 19 located between adjacent bevels, and a second plane 20 located at the center of the light emitting surface structure 4. The sidewall structure 15 is arranged between the n-type semiconductor structure 11 and the bevel structure along the light emitting direction, and the height of the sidewall structure 15 is equal to 150 nm. The length of the first plane 19 is 0.5 μm. The setting of the first plane 19 can increase the light emitting area, further improve the light emitting probability, and thus improve the light extraction efficiency at the top. Preferably, the length of the second plane 20 is 37% of the length of the micro light emitting diode.

[0060] The inclined plane structure includes n-level inclined planes distributed from the edge of the n-type semiconductor structure 11 to the center of the n-type semiconductor structure 11. In this embodiment, n is equal to 2. That is, the n-level inclined plane includes a first-level inclined plane 16 and a second-level inclined plane 17, and the angle between the first-level inclined plane 16 and the horizontal plane is 45°; the angle between the second-level inclined plane 17 and the horizontal plane is 30°, and the angle between the inclined plane and the horizontal plane gradually decreases along the light emitting direction.

[0061] The height of the first-level inclined surface 16 is 400 nm, the height of the second-level inclined surface 17 is 300 nm, and the vertical height of the inclined surface gradually decreases along the light emitting direction. Example 2

[0062] The structure of the flip-chip micro-LED 1 in this embodiment is substantially the same as that in the embodiment 1, except that in the light emitting surface structure 4 in this embodiment, the angle between the first-level inclined surface 16 and the horizontal plane is 80°; the angle between the second-level inclined surface 17 and the horizontal plane is 60°. Example 3

[0063] like Figure 5-Figure 6 As shown, in this embodiment, the second n-type semiconductor layer 10 is etched multiple times to obtain the light-emitting surface structure 4, which specifically includes the following steps: Step S61 : coating a first photoresist layer 21 on the surface of the second n-type semiconductor layer 10 and performing a first photolithography to form a first pattern.

[0064] Step S62 : using a plasma etching process to transfer the first pattern to the second n-type semiconductor layer 10 , so that a first-level inclined surface 16 is formed on the surface of the second n-type semiconductor layer 10 .

[0065] The etching depth corresponding to the plasma etching process is 400 nm, and the angle between the first-level inclined surface 16 and the horizontal plane is 45°.

[0066] Step S63: removing the first photoresist layer 21; coating the second photoresist layer 21 on the surface of the second n-type semiconductor layer 10 having the first level slope 16 and performing a second photolithography to form a second pattern.

[0067] The exposure time during the second photolithography is increased, resulting in a decrease in the area covered by the photoresist.

[0068] Step S64 : adjusting the gas flow rate and its ratio, and using a plasma etching process to transfer the second pattern to the second n-type semiconductor layer 10 having the first level slope 16 , so that the surface of the second n-type semiconductor layer 10 having the first level slope 16 forms a second level slope 17 .

[0069] The etching depth is 300 nm, which is less than the etching depth of the first-level inclined surface 16 ; the angle between the second-level inclined surface 17 and the horizontal plane is 30°.

[0070] Step S65: removing the second photoresist layer 21; coating a third photoresist layer 21 on the surface of the second n-type semiconductor layer 10 having the first level bevel 16 and the second level bevel 17 and performing a third photolithography to form a third pattern.

[0071] The exposure time during the third photolithography continues to increase, causing the area covered by the photoresist to continue to decrease.

[0072] Step S66: adjusting the gas flow rate and its ratio, and using a plasma etching process to transfer the third pattern to the second n-type semiconductor layer 10 having the first level bevel 16 and the second level bevel 17 , so that the surface of the second n-type semiconductor layer 10 having the first level bevel 16 and the second level bevel 17 forms a third level bevel 18 .

[0073] The etching depth corresponding to the plasma etching process is 200 nm, which is less than the etching depth of the second level bevel 17; the angle between the third level bevel 18 and the horizontal plane is 20°, which is less than the angle between the second level bevel 17 and the horizontal plane. Thus, a light emitting surface structure 4 with three levels of bevels is obtained on the second n-type semiconductor layer 10. Example 4

[0074] The difference between this embodiment and embodiment 3 is that the angle between the inclined surface on the light emitting surface structure 4 and the horizontal plane is different. In this embodiment, the angle between the first-level inclined surface 16 and the horizontal plane is 80°, the angle between the second-level inclined surface 17 and the horizontal plane is 60°, and the angle between the third-level inclined surface 18 and the horizontal plane is 45°. The remaining structures and preparation steps are basically the same as those in embodiment 3 and will not be repeated here. Example 5

[0075] This embodiment is a method for preparing a flip-chip micro-LED 1 with a multi-level inclined light emitting structure, comprising the following steps: Step S1: Provide a sapphire substrate 5, and use the MOCVD process to grow an epitaxial layer on the substrate 5, wherein the epitaxial layer sequentially includes a first n-type semiconductor layer 6 with a thickness of 5 μm and a material of n-GaN, a multi-quantum well layer with a thickness of 100 nm, a p-type semiconductor layer 8 with a thickness of 100 nm and a material of p-GaN, and an ITO layer 9 with a thickness of 100 nm.

[0076] Step S2: performing ICP dry etching on the epitaxial layer, so that the epitaxial layer forms a second n-type semiconductor layer 10 and a plurality of main structures 3 arranged at intervals.

[0077] The etching depth is 2 μm. The size of the main structure 3 is 10 μm; the main structure 3 includes an n-type semiconductor structure 11, a light-emitting structure and a p-type semiconductor structure which are sequentially stacked on the second n-type semiconductor layer 10, and the second n-type semiconductor layer 10 is the remaining part of the first n-type semiconductor layer 6 after etching to remove the n-type semiconductor structure 11.

[0078] Step S3: using PECVD to prepare a silicon oxide insulating layer 12 outside the main structure 3 , leaving a window on the silicon oxide insulating layer 12 for subsequent preparation of the P electrode 14 .

[0079] Step S4: preparing an N electrode 13 and a P electrode 14 by EBE electron beam thermal evaporation, wherein the N electrode 13 is located between adjacent main structures 3 , and the P electrode 14 is located on the ITO layer 9 and penetrates the silicon oxide insulating layer 12 .

[0080] Step S5: using laser lift-off technology to completely remove the substrate 5.

[0081] Step S6: performing multiple photolithography operations on the side of the second n-type semiconductor layer 10 away from the main structure 3 to form a three-level inclined surface, obtain a light emitting surface structure 4, and finally obtain a micro light emitting diode.

[0082] Step S6 adopts the method in Example 3, which will not be described in detail here. Example 6

[0083] The etching method of forming a multi-level inclined light-emitting structure on the light-emitting surface of the flip-chip micro-LED 1 in this embodiment is different from that in Embodiment 3 in that: Figure 7 As shown, in this embodiment, during the second photolithography in step S63 and the third photolithography in step S65, the light shielding area 23 of the mask 22 corresponding to the preparation of the second level bevel 17 and the third level bevel 18 is gradually reduced, and the exposure time of the photolithography is not changed, so as to achieve the same purpose as in embodiment 3. The remaining steps are basically the same as those in embodiment 3 and are not repeated here. Figure 7 (a) is a schematic diagram of the structure of the mask plate 22 during the first photolithography, (b) is a schematic diagram of the structure of the mask plate 22 during the second photolithography, and (c) is a schematic diagram of the structure of the mask plate 22 during the third photolithography. Comparative Example 1

[0084] The structure of the flip-chip micro-LED 1 in this comparative example is basically the same as that in Example 1, except that, in the light emitting surface structure 4 of this comparative example, there is no inclined surface and first plane 19, the entire light emitting surface structure 4 is rectangular, and the top of the light emitting surface structure 4 is a plane. Comparative Example 2

[0085] The structure of the flip-chip micro-LED 1 in this comparative example is basically the same as that in Example 1, except that the n-level inclined surface n in the light-emitting surface structure 4 of this comparative example is 1, that is, there is only a first-level inclined surface 16, and the angle between the first-level inclined surface 16 and the horizontal plane is 45°. Comparative Example 3

[0086] The structure of the flip-chip micro-LED 1 in this comparative example is basically the same as that in Example 1, except that the n-level inclined surface n in the light-emitting surface structure 4 of this comparative example is 1, that is, there is only a first-level inclined surface 16, and the angle between the first-level inclined surface 16 and the horizontal plane is 80°. Comparative Example 4

[0087] The structure of the flip-chip micro-LED 1 in this comparative example is substantially the same as that of Example 1, except that the entire light-emitting surface structure 4 in this comparative example is hemispherical, and there is no inclined surface and first plane 19 . Simulation and Results

[0088] The software based on Finite-Difference Time-Domain (FDTD) was used to simulate and calculate the top light extraction efficiency (LEE) of the flip-chip micro-LED surfaces of the above-mentioned embodiments and comparative examples. Embodiments 1 and 3 are relatively gentle multi-level slope solutions without strong steepness; Embodiments 2 and 4 are micro-LED structure models with larger multi-level slope angles and better steepness. The calculation results of the top light extraction efficiency of the two are as follows: Figure 8 As shown, Figure 8 Figure (a) shows the top light extraction efficiency results of the flip-chip micro-LEDs in Example 1, Example 3, Comparative Example 1, Comparative Example 2, and Comparative Example 4. Figure 8 Figure (b) shows the top light extraction efficiency results of the flip-chip micro-LEDs in Example 2, Example 4, Comparative Example 1, Comparative Example 3 and Comparative Example 4.

[0089] Figure 8 The results show that the light-emitting surface structures 4 in Examples 1-4 can effectively improve the light extraction efficiency at the top of the flip-chip micro-LED 1, and the inclined angles of Examples 1 and 3 are gentler than those of Examples 2 and 4. The top LEEs of Examples 1 and 2 with two inclined surfaces are basically flat, and are also significantly better than the hemispherical light-emitting surface structure of Comparative Example 4. That is, when only two inclined surfaces are etched twice to form the two inclined surfaces, the lifting effect of the top LEE of the flip-chip micro-LED is basically the same, but the angle between the inclined surface of Example 2 and the horizontal plane is larger, and it is easier to control during preparation.

[0090] The top LEE of the three-segment inclined surface of Example 3 and Example 4 is further improved, which is significantly improved compared with the structure of the hemispherical light-emitting surface of Comparative Example 4; and the effect of Example 3 is significantly better than that of Example 4, which can reach 1.43 times that of Comparative Example 4. That is, when etching three times, the small-angle three-segment inclined surface structure of Example 3 can obtain a larger top LEE, but the small-angle multi-segment inclined surface process is more difficult to implement than that of Example 4, and the inclination angle is difficult to control. Example 4 is easier to prepare.

[0091] The present invention does not involve the design and production of any microlenses, does not need to add optical lenses or optical elements to the light-emitting surface to focus and direct the light, and does not add other optical elements on the plane to realize the function. It is realized through traditional photolithography and etching processes on the original basis, and can also achieve the improvement of light extraction efficiency. The light-emitting surface design of the present invention with multiple sections of inclined surfaces is not an arc-shaped light-emitting surface, but a light-emitting surface with multiple sections of inclined surfaces, which is different from a spherical or arc-shaped surface, and the effect is better than a spherical or arc-shaped surface. The multiple sections of inclined surfaces improve the light extraction efficiency at the top based on the principle of refraction of light and increasing the light-emitting area, thereby improving the light extraction efficiency. And the light-emitting surface structure of the present invention is in the semiconductor gallium nitride layer, so the multiple sections of inclined surfaces are formed by etching on the surface of gallium nitride, so it is not a substrate material. Compared with the prior art, the present invention has the following beneficial effects: 1. The present invention directly prepares multiple inclined light-emitting surfaces on the GaN surface of the micro-LED, without the need to additionally design complex surface micro-nano structures to improve the light-emitting efficiency. Such multiple inclined surfaces correspond one-to-one to micro-LED pixels. Such multi-angle surface light-emitting has a relatively convenient and simple process, and is superior to the effect achieved by arc-shaped or hemispherical shapes. At the same time, the chip structure is designed as a flip-chip structure, which is more conducive to surface light emission. Arc-shaped and hemispherical light-emitting surfaces are usually difficult to prepare and form at one time, and have a low yield, especially the hemispherical surface increases the optical crosstalk between adjacent pixels.

[0092] 2. The multi-segment inclined surface of the present invention is directly on the micro-LED device. Compared with the traditional micro-lens array, the difference is that no additional design and production of the micro-lens array is required, and the subsequent alignment and gluing process with the micro-LED is also reduced.

[0093] 3. Due to total internal reflection, most of the light emitted in the light-emitting layer returns to the interior of the medium after total reflection and is absorbed by the semiconductor layer or the electrode layer. The multi-segment inclined surface designed and adopted in the present invention can reduce total internal reflection, increase the possibility of light emission, and allow more light to escape, thereby improving the top light extraction efficiency.

[0094] The above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with this technology to understand the contents of the present invention and implement them accordingly. They cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

[0095] The endpoints and any values ​​of the ranges disclosed in this article are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article.

Claims

1. A flip-chip micro light emitting diode, characterized in that: The flip-chip micro-LED comprises a plurality of light-emitting units arranged in a matrix, each of the light-emitting units comprising a main structure and a light-emitting surface structure stacked along the light-emitting direction of the flip-chip micro-LED, the main structure comprising an n-type semiconductor structure, the n-type semiconductor structure and the light-emitting surface structure being integrally formed; the light-emitting surface structure comprising an inclined surface structure, the inclined surface structure comprising n-level inclined surfaces distributed from the edge of the n-type semiconductor structure to the center of the n-type semiconductor structure, n being greater than or equal to 2; and the angle between the inclined surface and the horizontal plane gradually decreases along the light-emitting direction.

2. The flip-chip micro light emitting diode according to claim 1, characterized in that: The n-type semiconductor structure and the light emitting surface structure are made of the same material, and the vertical height of the inclined surface gradually decreases along the light emitting direction.

3. The flip-chip micro light emitting diode according to claim 1, characterized in that: The light emitting surface structure further includes a sidewall structure, and the sidewall structure is arranged between the n-type semiconductor structure and the inclined surface structure along the light emitting direction; the height of the sidewall structure is greater than or equal to 100 nm.

4. The flip-chip micro light emitting diode according to claim 1, characterized in that: The light emitting surface structure comprises a first plane located between adjacent inclined surfaces, and the length of the first plane is 0.01-2 μm; And / or, the light emitting surface structure includes a second plane located at the center of the light emitting surface structure, and the length of the second plane is 37%-64% of the length of the micro light emitting diode.

5. The flip-chip micro light emitting diode according to claim 1, characterized in that: The maximum thickness of the light emitting surface structure is 1.2-1.5 μm; And / or, the size of the micro light emitting diode is 5-20 μm; And / or, n is less than or equal to 3.

6. The flip-chip micro light emitting diode according to claim 5, characterized in that: The n-level inclined planes include a first-level inclined plane, a second-level inclined plane and a third-level inclined plane, wherein the angle between the first-level inclined plane and the horizontal plane is 45°-80°, the angle between the second-level inclined plane and the horizontal plane is 30°-60°, and the angle between the third-level inclined plane and the horizontal plane is 20°-45°; The height of the first-level slope is greater than the height of the second-level slope, and the height of the second-level slope is greater than the height of the third-level slope.

7. The flip-chip micro light emitting diode according to claim 6, characterized in that: The height of the first-level inclined surface is 300nm-500nm, the height of the second-level inclined surface is 200nm-400nm; and the height of the third-level inclined surface is 100nm-300nm.

8. A method for preparing a flip-chip micro light emitting diode according to any one of claims 1 to 7, characterized in that: The steps include: Providing a substrate, and preparing an epitaxial layer on the substrate; wherein the epitaxial layer includes a first n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer which are stacked; The epitaxial layer is etched to form a second n-type semiconductor layer and a plurality of main structures arranged at intervals; wherein the main structure comprises an n-type semiconductor structure, a light-emitting structure and a p-type semiconductor structure which are sequentially stacked on the second n-type semiconductor layer; the second n-type semiconductor layer is the remaining portion of the first n-type semiconductor layer after etching away the n-type semiconductor structure; removing the substrate; The second n-type semiconductor layer is etched multiple times to obtain the light emitting surface structure, so as to prepare a micro light emitting diode.

9. The preparation method according to claim 8, characterized in that: The step of performing multiple etching processes on the second n-type semiconductor layer to obtain the light emitting surface structure comprises the following steps: Coating a photoresist layer on the surface of the second n-type semiconductor layer and performing photolithography to form a current pattern; Using the current pattern as a mask, etching the second n-type semiconductor layer so that the surface of the second n-type semiconductor layer forms an i-th level inclined surface; wherein 1≤i≤n; removing the photoresist layer; The above steps are repeated to form n-level inclined surfaces on the surface of the second n-type semiconductor layer to obtain the light emitting surface structure.

10. The preparation method according to claim 8 or 9, characterized in that: The step of performing multiple etching processes on the second n-type semiconductor layer to obtain the light emitting surface structure comprises the following steps: Coating a first photoresist layer on the surface of the second n-type semiconductor layer and performing photolithography to form a first pattern; Transferring the first pattern to the second n-type semiconductor layer using a plasma etching process, so that a first level inclined surface is formed on the surface of the second n-type semiconductor layer; removing the first photoresist layer; Coating a second photoresist layer on the surface of the second n-type semiconductor layer having the first level slope and performing photolithography to form a second pattern; Using a plasma etching process to transfer the second pattern to the second n-type semiconductor layer having the first-level slope, so that the surface of the second n-type semiconductor layer having the first-level slope forms a second-level slope; removing the second photoresist layer; Coating a third photoresist layer on the surface of the second n-type semiconductor layer having the first level inclined surface and the second level inclined surface and performing photolithography to form a third pattern; The third pattern is transferred to the second n-type semiconductor layer having the first and second level slopes by using a plasma etching process, so that the surface of the second n-type semiconductor layer having the first and second level slopes forms a third level slope, thereby obtaining the light emitting surface structure.

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