A high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop

Abstract

This invention discloses a high-precision step-frequency ground-penetrating radar transceiver system based on dual phase-locked loops, belonging to the field of underground target detection technology. The system includes: a radio frequency (RF) signal transmitting circuit and a local oscillator (LO) signal generating circuit, used for transmitting RF signals externally and transmitting the generated reference LO signal to the receiving section, respectively; wherein, the RF signal transmitting circuit includes a first phase-locked loop connected to a bandpass filter bank, and the LO signal generating circuit includes a second phase-locked loop connected to the bandpass filter bank; the receiving section receives external echo signals and mixes them with the reference LO signal to output an intermediate frequency (IF) analog signal; the IF analog signal is digitally sampled by an IF sampling section to obtain a sampled signal, which is transmitted to the control and communication section; the power supply section provides power to the entire system. This invention improves range resolution and has low overall circuit complexity.

Description

Technical Field

[0001] This invention belongs to the field of underground target detection technology, specifically relating to a high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop. Background Technology

[0002] Ground penetrating radar (GPR) utilizes the interaction between electromagnetic waves and various underground objects to acquire information about subsurface targets. Due to its advantages of non-destructive detection, convenience, speed, and high resolution, it has become one of the important methods for underground exploration. In GPR applications, achieving higher range resolution often requires a large bandwidth of the transmitted signal. Traditional impulse-based GPR struggles to balance wide instantaneous bandwidth and high transmit power, making it difficult to achieve high resolution at certain depths. While linear frequency modulated (LFM) GPR does not have this problem, it requires high linearity between signal frequency and time, and signals with excessively large bandwidth often have poor amplitude flatness, affecting high-precision imaging results. In contrast, stepped-frequency (PMF) GPR, due to the discreteness of its signal in both the frequency and time domains, can not only balance detection depth and high range resolution, but its signals are also easier to generate and control, resulting in simpler hardware circuit design and making it of significant research value.

[0003] Many stepped-frequency ground-penetrating radar (GPR) systems are built using vector network analyzers (VNAs). The VNA directly generates and receives the stepped-frequency signal, making operation simple and setup convenient. However, this instrument is not specifically designed for GPR, resulting in GPR systems that are often large, bulky, and expensive, hindering the application and widespread adoption of stepped-frequency GPR. There are also stepped-frequency GPR systems designed using direct digital synthesizers (DDSs). DDS output signals are flexible and controllable, and the entire system is compact and flexible. However, the highest frequency of the DDS output signal is often low, thus failing to generate a sufficiently wide stepped-frequency signal, and the generated signal has significant spurious noise, making it difficult to meet the high-resolution requirements of high-precision detection. Furthermore, there are hybrid frequency designs that combine DDSs, mixers, frequency multipliers, and phase-locked loops. While this approach can generate sufficiently wide stepped-frequency signals, its circuit structure is often complex and its reliability is poor due to the involvement of multiple components. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides a high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop (PLL). It employs a dual PLL transmitter and a digital fixed intermediate frequency (IF) receiver, enabling it to operate in the 0.5~3.5 GHz frequency band, thus improving range resolution. Furthermore, the overall circuit structure is simple and compact, and the frequency and gain of each signal point can be adjusted according to actual conditions, making it better adaptable to various application scenarios.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] A high-precision stepped-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop is disclosed. The system includes a transmitting section, a receiving section, an intermediate frequency sampling section, a control and communication section, and a power supply section, wherein:

[0007] The transmitting section includes a radio frequency signal transmitting circuit and a local oscillator signal generating circuit, which are used to transmit radio frequency signals to the outside and transmit the generated reference local oscillator signal to the receiving section, respectively; wherein, the radio frequency signal transmitting circuit includes a first phase-locked loop connected to a bandpass filter bank, and the local oscillator signal generating circuit includes a second phase-locked loop connected to a bandpass filter bank;

[0008] The receiving section is used to receive external echo signals and mix them with a reference local oscillator signal to output an intermediate frequency analog signal.

[0009] The intermediate frequency analog signal is digitally sampled by the intermediate frequency sampling section to obtain a sampled signal, and the sampled signal is transmitted to the control communication section.

[0010] The power supply section provides power to the entire system.

[0011] The beneficial effects of this invention are as follows:

[0012] The broadband phase-locked loop used in this invention can easily output high-quality sinusoidal signals of different frequencies under control, and its operating frequency band is relatively wide. The upper limit of the output signal frequency is higher than that of DDS, and it can directly generate high-quality, ultra-wideband step frequency signals.

[0013] This invention uses two phase-locked loops (PLLs) with the same reference source to output radio frequency (RF) and local oscillator (LO) signals with a fixed phase difference at intermediate frequency (IF) under control, and the two signals do not lose correlation. Compared to a single PLL outputting two signals, one directly as the transmitted RF signal and the other as a LO signal with a fixed IF difference obtained through quadrature modulation, the dual PLL approach greatly simplifies the circuit structure and improves signal quality.

[0014] This invention employs a segmented filtering method using a bandpass filter bank, which can achieve bandpass filtering without harmonic omission for ultra-wideband stepped frequency signals. This circuit structure and the selected components can reduce the circuit area while ensuring high-performance filtering.

[0015] This invention employs a digital fixed intermediate frequency (IF) receiver. First, this structure greatly suppresses DC interference, improving the receiver's dynamic range and sensitivity. Second, it uses controllable gain devices, enabling individual gain control for each frequency signal, thus increasing system flexibility. Finally, the IF signal is sampled and processed digitally, reducing circuit complexity while improving signal processing quality and flexibility. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of a high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop according to the present invention;

[0017] Figure 2 This is a schematic diagram of the launching section of the present invention;

[0018] Figure 3 This is a schematic diagram of the receiving part of the present invention;

[0019] Figure 4 This is a schematic diagram of the bandpass filter bank structure of the present invention. Detailed Implementation

[0020] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0021] The high-precision step-frequency ground-penetrating radar transceiver system based on dual phase-locked loop proposed in this invention adopts a dual phase-locked loop transmitter and a digital fixed intermediate frequency structure receiver, which can achieve high-precision detection with a resolution better than 5cm within at least 2.5m underground.

[0022] Among these options, a phase-locked loop (PLL) scheme is chosen as the transmitter signal source. Compared to the DDS scheme, which suffers from low high-frequency response, insufficient bandwidth, and significant signal spuriousness, and the hybrid frequency scheme, which has a complex circuit structure, the PLL scheme offers significant advantages. Firstly, the output signal range of a wideband PLL can cover the required frequency band, and its circuit structure is relatively simple. Secondly, it generates high-quality signals with good spurious suppression. Finally, it allows for flexible frequency adjustment, facilitating the generation and adjustment of step-frequency signals.

[0023] The receiver employs a digital fixed intermediate frequency (IF) architecture. Compared to zero-IF receivers, which suffer from DC interference such as DC offset affecting high-resolution performance, and analog fixed-IF receivers, which suffer from amplitude and phase imbalance and complex circuit structures, digital fixed-IF receivers offer significant advantages. Firstly, the IF signal is easily sampled by an analog-to-digital converter (ADC), and subsequent processing can be entirely implemented in software, simplifying the circuit structure. Secondly, the entire digital demodulation process is more flexible and controllable, and easier to implement. Finally, digital demodulation avoids the amplitude and phase imbalance problems inherent in analog demodulation, improving signal processing quality.

[0024] This invention employs two phase-locked loops (PLLs) sharing the same reference signal to generate radio frequency (RF) and local oscillator (LO) signals respectively. Compared to the method of using a single PLL to divide the power into two paths and then orthogonally modulate one of them to obtain the LO signal, the dual PLL has certain advantages. On the one hand, the PLL output signal frequency can be flexibly controlled with low signal spuriousness, enabling the generation of two signals with a fixed frequency difference that meet the requirements. On the other hand, there is no additional circuitry or related issues associated with quadrature demodulation, resulting in a simpler circuit structure and better signal quality.

[0025] As shown in Figure 1, this invention consists of five parts: a transmitting section, a receiving section, an intermediate frequency (IF) sampling section, a control and communication section, and a power supply section. The transmitting section transmits radio frequency (RF) signals and transmits the generated reference local oscillator (LAN) signal to the receiving section. The receiving section receives external echo signals and mixes them with the LAN signal to output an IF analog signal. The IF analog signal is digitally sampled by the IF sampling section to obtain a sampled signal, which is then sent to the control and communication section. All three sections operate under the control of the control and communication section, which also communicates and transmits data with a computer via a network cable. The power supply section provides power to the entire system.

[0026] The transmitting section primarily handles the transmission of radio frequency (RF) signals and the generation of local oscillator (LO) signals. Its structure, as shown in Figure 2, includes a transmitter and a transmitting antenna. The transmitting antenna is a horn-type double-ridge antenna. The transmitter comprises a reference signal generation circuit, an RF signal transmission circuit, and a LO signal generation circuit. The reference signal generation circuit consists of a crystal oscillator, a π-type attenuator circuit, a low-noise amplifier, a low-pass filter, and a three-way power divider. A 50MHz temperature-compensated crystal oscillator generates the clock signal for the entire system. After attenuation by the π-type attenuator circuit, amplification by the LO amplifier, and filtering by the 50MHz low-pass filter, a reference signal is generated. This reference signal is then sent by the three-way power divider to the phase-locked loops (PLLs) of the RF signal transmission circuit and the LO signal generation circuit as reference input signals. The last path serves as the external clock for the FPGA (field-programmable gate array) core board, ensuring that the control signal timing is synchronized with the signal source timing, and also providing a synchronous clock for the intermediate frequency (IF) sampling. The RF signal transmission circuit includes a first cascaded PLL, a bandpass filter bank, and a power amplifier. A 50MHz reference signal enters the first phase-locked loop (PLL) of the RF signal transmitting circuit. Under the control of the FPGA core board, the first PLL outputs a first step frequency signal of 0.5~3.5GHz with a step size of 20MHz. This signal is filtered for harmonics by a bandpass filter bank and finally amplified by a power amplifier to output the transmitted RF signal. The local oscillator signal generation circuit consists of a second PLL and a bandpass filter bank. The 50MHz reference signal enters the second PLL of the local oscillator signal generation circuit. Under the control of the FPGA core board, the second PLL outputs a second step frequency signal of 0.52~3.52GHz with a step size of 20MHz. This signal is filtered for harmonics by a bandpass filter bank and then used as the reference local oscillator signal for receiving and mixing.

[0027] The receiving section primarily amplifies, filters, and mixes the echo signal to obtain an intermediate frequency (IF) analog signal output. Its structure, as shown in Figure 3, includes a receiver and a receiving antenna. The receiving antenna is the same horn-shaped double-ridge antenna as the transmitting antenna. The receiver includes RF processing circuitry and IF processing circuitry. The RF processing circuitry consists of a first-stage low-noise amplifier (LNO), a digital attenuator, a second-stage LNO, a bandpass filter bank, and a mixer, cascaded sequentially. The received echo signal is first amplified by the first-stage LNO, then attenuated by the digital attenuator according to the control signal, and then amplified by the second-stage LNO to obtain sufficient receiving gain. Finally, it passes through the bandpass filter bank to filter out harmonics and enters the mixer, where it is multiplied with the reference local oscillator signal to obtain the mixed signal. The IF processing circuitry consists of a low-pass filter and a digital variable gain amplifier (DGA). The mixed signal undergoes a first low-pass filter to obtain a fixed 20MHz IF signal, which is then adjusted by the DGA and finally filtered a second time to output the IF analog signal.

[0028] The bandpass filter bank mentioned in the transmitting and receiving section is a combined circuit that utilizes the time-discrete characteristics of stepped frequency signals. It employs a multi-channel segmented filtering method to achieve harmonic-free bandpass filtering of ultra-wideband stepped frequency signals with a relative bandwidth of 150%. The structure is shown in Figure 4. It consists of two 4-channel high-speed switches and eight surface-mount filters. The eight surface-mount filters are divided into four groups, each including one low-pass filter and one high-pass filter. The two 4-channel high-speed switches are positioned on both sides of the four groups of surface-mount filters. The surface-mount filters use Mini-Circuits' HFCN and LFCN series high-pass and low-pass filters, each with a small 1206 package size, resulting in a small overall circuit area, and they also offer excellent performance.

[0029] The intermediate frequency (IF) sampling section primarily performs digital sampling of the IF analog signal. This includes the ADC sampling circuit. The 20MHz IF analog signal is sampled into a 14-bit digital signal by the ADC at a rate of 100Msps, and finally transmitted to the FPGA core board for further processing.

[0030] The control and communication section primarily manages the operation of all modules of the ground-penetrating radar and communicates and transmits data with the computer. This includes the FPGA core board. The FPGA core board uses the black gold AC7020 core board, which houses a Xilinx ZYNQ7000 series FPGA. The FPGA core board communicates with the computer via a network cable, controlling the phase-locked loop (PLL) to transmit, stop, and set parameters for the stepped frequency signal according to the computer's instructions. It also controls the bandpass filter bank, digital attenuator, and DGA to achieve independent processing of each frequency point. The intermediate frequency (IF) signal sampling data is also transmitted from the FPGA core board to the computer via the network cable.

[0031] The power supply section primarily provides stable and reliable power supply voltages to various devices. It employs a two-stage step-down method: the externally input 9~36V DC power is first stepped down to 6.5V, 6V, and 5V DC by a first-stage DC-DC converter; then, it is converted to 6V, 5V, and 3.3V DC by a second-stage low dropout regulator (LDO); finally, after isolation by a ferrite bead, it provides low-ripple power to each device, ensuring proper operation of the RF components.

[0032] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop, characterized in that, The system includes a transmitting section, a receiving section, an intermediate frequency sampling section, a control and communication section, and a power supply section, wherein: The transmitting section includes a radio frequency signal transmitting circuit and a local oscillator signal generating circuit, which are used to transmit radio frequency signals to the outside and transmit the generated reference local oscillator signal to the receiving section, respectively; wherein, the radio frequency signal transmitting circuit includes a first phase-locked loop connected to a bandpass filter bank, and the local oscillator signal generating circuit includes a second phase-locked loop connected to a bandpass filter bank; The receiving section is used to receive external echo signals and mix them with a reference local oscillator signal to output an intermediate frequency (IF) analog signal. The receiving section includes an RF processing circuit and an IF processing circuit. The echo signal received by the RF processing circuit is first amplified by a first-stage low-noise amplifier, then attenuated by a digital attenuator according to a control signal, then amplified by a second-stage low-noise amplifier, and finally filtered out by a bandpass filter bank before entering a mixer and multiplying it with the reference local oscillator signal to obtain a mixed signal. The IF processing circuit obtains a fixed IF signal by passing the mixed signal through a first low-pass filter, then adjusts the power by passing it through a digital variable gain amplifier, and finally outputs an IF analog signal by passing it through a second low-pass filter. The system employs a digital fixed intermediate frequency (IF) receiver, and the IF analog signal is a fixed IF signal. The intermediate frequency analog signal is digitally sampled by the intermediate frequency sampling section to obtain a sampled signal, and the sampled signal is transmitted to the control communication section. The power supply section provides power to the entire system; The bandpass filter bank adopts a multi-channel segmented filtering method, including two 4-channel high-speed switches and eight patch filters. The eight patch filters are divided into four groups, each group including one low-pass filter and one high-pass filter. The two 4-channel high-speed switches are arranged on both sides of the four groups of patch filters.

2. The high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop according to claim 1, characterized in that, The transmitting section also includes a reference signal generation circuit. The temperature-compensated crystal oscillator of the reference signal generation circuit is used to generate the clock signal for the entire system. After being attenuated by a π-type attenuation circuit, amplified by a low-noise amplifier, and filtered by a low-pass filter, a reference signal is generated. The reference signal is sent by three power dividers to the first phase-locked loop and the second phase-locked loop of the RF signal transmitting circuit and the local oscillator signal generation circuit as reference input signals, and to the FPGA core board as an external clock.

3. A high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop according to claim 2, characterized in that, The radio frequency signal transmitting circuit includes a first phase-locked loop, a bandpass filter bank, and a power amplifier cascaded in sequence. The reference signal is output as a first step frequency signal through the first phase-locked loop. The first step frequency signal is filtered out for harmonics by the bandpass filter bank and amplified by the power amplifier to output a radio frequency signal.

4. A high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop according to claim 2, characterized in that, The local oscillator signal generation circuit includes a second phase-locked loop and a bandpass filter group cascaded in sequence. The reference signal is output as a second step frequency signal through the second phase-locked loop. The second step frequency signal is then filtered out for harmonics by the bandpass filter group and output as a reference local oscillator signal.

5. A high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop according to claim 1, characterized in that, The intermediate frequency sampling section uses an ADC to sample the intermediate frequency analog signal into a 14-bit digital signal at a rate of 100Msps.

6. A high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop according to claim 1, characterized in that, The control and communication section is also used to control all parts of the entire ground-penetrating radar transceiver system and to communicate and transmit data with the computer.

7. A high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop according to claim 1, characterized in that, The power supply section adopts a two-stage step-down method. The externally input 9~36V DC power is first stepped down to 6.5V, 6V and 5V DC power by the first-stage DC-DC converter, and then converted to 6V, 5V and 3.3V DC power by the second-stage low dropout linear regulator. Finally, after being isolated by a ferrite bead, it provides low ripple and high-quality power to each device.

8. A high-precision step-frequency ground-penetrating radar transceiver system based on a dual phase-locked loop according to claim 3 or 4, characterized in that, The first step frequency signal has a frequency of 0.5~3.5GHz and a step size of 20MHz, and the second step frequency signal has a frequency of 0.52~3.52GHz and a step size of 20MHz.

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