Serial redirection system, method, device, controller, program product and medium

Abstract

The application discloses a serial port redirection system, method, device, controller, program product and medium, belongs to the field of servers, and is used for continuously consuming serial port data sent by a server in the case that a processing device in a BMC is faulty, and solves the problem that a server operating system cannot be normally started due to BMC failure. The cache device including the first and second cache modules is arranged, the serial port data is cached by the first cache module and read out by the processing device when the processing device is not faulty, and when the processing device is faulty, the serial port data is controlled to be written into the second cache module, and the second cache module is controlled to discard the cached serial port data, so that the second cache module continuously keeps a non-empty state and is written with the cached data, that is, the continuous writing of the serial port data in the server is supported, and even when the processing device in the BMC is faulty, the server operating system can be normally started, and the availability of the server is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of servers, in particular to a serial port redirection system, method, device, controller, program product and medium. BACKGROUND

[0002] In traditional server management, a serial port is a common system management interface for accessing the BIOS (Basic Input / Output System) settings or command line interface of the operating system of the server through it. With the gradual development of server management towards remote management and automation, the input and output of the serial port is redirected to the BMC (Baseboard Management Controller) to allow administrators to remotely access serial port data through the network; however, there is a lack of a mature serial port redirection method in the related art, which causes the server operating system to fail to start normally in the case of BMC failure.

[0003] Therefore, how to provide a solution to the above technical problems is a problem that those skilled in the art need to solve at present. SUMMARY

[0004] The purpose of the present application is to provide a serial port redirection system, method, device, controller, program product and medium, which sets a cache device including a first and a second cache module, caches serial port data by the first cache module and reads out by the processing device when the processing device is not faulty, and controls the serial port data to be written into the second cache module and controls the second cache module to discard the cached serial port data when the processing device is faulty, so that the second cache module continuously maintains a non-empty state and is written with cache data, that is, the continuous writing of serial port data in the server is supported, and even when the processing device in the BMC is faulty, the server operating system can be started normally, and the availability of the server is improved.

[0005] To solve the above technical problems, the present application provides a serial port redirection system applied to a baseboard management controller, comprising:

[0006] A data analysis device is configured to send the analyzed serial port data to the first and second cache modules, and send the received space remaining state to the serial port data source, so that the serial port data source sends serial port data according to the space remaining state, wherein the space remaining state includes an empty state and a non-empty state.

[0007] The cache device is configured to control serial port data to be written into a first cache module in the cache device when the processing device is not faulty, and send a space remaining state of the first cache module to the data analysis device; control serial port data to be written into a second cache module in the cache device when the processing device is faulty, and send a space remaining state of the second cache module to the data analysis device; and control the second cache module to discard cached serial port data when the second cache module is in a non-empty state.

[0008] The processing device is configured to read cached data from the first cache module and send the data to a network terminal.

[0009] In another aspect, the cache device comprises:

[0010] The monitoring module is configured to generate a first control signal when a first preset condition is met, and generate a second control signal when a second preset condition is met, wherein the first preset condition is that a continuous time length during which the first cache module is in a non-empty state does not exceed a preset time length, and the second preset condition is that the continuous time length during which the first cache module is in the non-empty state exceeds the preset time length.

[0011] The logic control module is configured to control a write enable of the first cache module under control of the first control signal, and control a write enable of the second cache module under action of the second control signal; send a space remaining state of the first cache module to the data analysis device under control of the first control signal, and send a space remaining state of the second cache module to the data analysis device under control of the second control signal; and control a read enable of the second cache module when the second cache module is in a non-empty state, so that the second cache module discards cached serial port data.

[0012] The first cache module is configured to cache serial port data when the write enable is enabled.

[0013] The second cache module is configured to cache serial port data when the write enable is enabled.

[0014] In another aspect, controlling the write enable of the first cache module under control of the first control signal comprises:

[0015] controlling the write enable of the first cache module when a serial port data write enable signal from a serial port data source and the first control signal are simultaneously received;

[0016] controlling the write enable of the second cache module under action of the second control signal comprises:

[0017] controlling the write enable of the second cache module when a serial port data write enable signal from a serial port data source and the second control signal are simultaneously received.

[0018] In another aspect, the logic control module comprises:

[0019] The write enable control unit is configured to send a write enable signal to the first cache module when a serial data write enable signal of the serial data source and the first control signal are received simultaneously, and send a write enable signal to the second cache module when a serial data write enable signal of the serial data source and the second control signal are received simultaneously.

[0020] The first input end is connected with a state output end of the first cache module, the second input end is connected with a state output end of the second cache module, and the output end is connected with a data selector of the data analysis device. The data selector is configured to output a signal of the first input end as an output signal when the first control signal is received, and output a signal of the second input end as the output signal when the second control signal is received. The state output end is configured to output a space remaining state of the cache module.

[0021] The read enable control module connected with the second cache module is configured to control a read enable of the second cache module when the second cache module is in a non-empty state, so that the second cache module discards the cached serial data.

[0022] In another aspect, the write enable control unit includes a first AND gate, a second AND gate and a first NOT gate.

[0023] The first input end of the first AND gate is connected with an output end of a serial data write enable signal of the serial data source, the first end of the first NOT gate is connected with the monitoring module, the second input end of the first AND gate is connected with the second end of the first NOT gate, and the output end of the first AND gate is connected with a write enable end of the first cache module. The first input end of the second AND gate is connected with the output end of the serial data write enable signal of the serial data source, the second input end of the second AND gate is connected with the monitoring module, and the output end of the second AND gate is connected with a write enable end of the second cache module.

[0024] In another aspect, the second cache module outputs a first level through the state output end when the second cache module is in a non-empty state, and outputs a second level through the state output end when the second cache module is in an empty state. The read enable effective level of the second cache module is the second level.

[0025] The read enable control module is a NOT gate, the first end of the read enable control module is connected with the state output end of the second cache module, and the second end of the read enable control module is connected with a read enable control end of the second cache module.

[0026] In another aspect, the processing device includes a high-level reduced instruction set machine processor and a network module.

[0027] The high-level reduced instruction set machine processor is configured to read the cached data from the first cache module, and send the read cached data to a network terminal through the network module.

[0028] In another aspect, the first cache module and / or the second cache module is a first-in-first-out unit.

[0029] In another aspect, the serial port redirection system further comprises:

[0030] a prompter connected to the monitoring module, configured to prompt the processing device failure when the second control signal is received.

[0031] In another aspect, the monitoring module is specifically configured to:

[0032] in response to a trigger of a rising edge of a clock signal, if the first cache module is in a non-empty state, the count value of the counter is increased by one, and if the first cache module is in an empty state, the count value of the counter is cleared;

[0033] when the current count value of the counter is not greater than a preset threshold, the first control signal is output, and when the current count value of the counter is greater than the preset threshold, the second control signal is output.

[0034] To solve the above technical problems, the application further provides a serial port redirection method applied to a processor in a baseboard management controller, comprising:

[0035] when the processing device is not in failure, controlling the serial port data to be written into the first cache module, and sending the space remaining state of the first cache module to the data analysis device;

[0036] when the processing device is in failure, controlling the serial port data to be written into the second cache module in the processor, and sending the space remaining state of the second cache module to the data analysis device;

[0037] when the second cache module is in a non-empty state, controlling the second cache module to discard the cached serial port data;

[0038] The baseboard management controller comprises a processor, a first cache module, a second cache module, a data analysis device and a processing device.

[0039] The data analysis device is configured to send the analyzed serial port data to the first cache module and the second cache module, and send the received space remaining state to the serial port data source, so that the serial port data source sends serial port data according to the space remaining state, wherein the space remaining state comprises an empty state and a non-empty state.

[0040] The processing device is configured to read the cached data from the first cache module and send the cached data to a network terminal.

[0041] To solve the above technical problems, the application further provides a serial port redirection device, comprising:

[0042] a memory configured to store a computer program;

[0043] a processor for implementing the steps of the serial port redirection method as described above when executing the computer program.

[0044] To solve the above technical problems, the application further provides a substrate management controller comprising the serial port redirection system or the serial port redirection device as described above.

[0045] To solve the above technical problems, the application further provides a computer program product comprising computer programs / instructions for implementing the steps of the serial port redirection method as described above when executed by a processor.

[0046] To solve the above technical problems, the application further provides a computer readable storage medium having stored thereon a computer program for implementing the steps of the serial port redirection method as described above when executed by a processor.

[0047] Beneficial effects: The application provides a serial port redirection system, considering that (1) the smooth transmission of serial port data in the server to the BMC is a prerequisite for the normal startup of the operating system, and (2) the cache jam of serial port data in the BMC will hinder the smooth transmission of serial port data in the server, therefore, the application sets a cache device comprising a first and a second cache module, when the processing device is not faulty, the first cache module caches serial port data and the processing device reads out, and when the processing device is faulty, the serial port data is written into the second cache module, and the second cache module discards the cached serial port data, so that the second cache module continuously maintains a non-empty state and is written with cache data, that is, the continuous writing of serial port data in the server is supported, even when the processing device in the BMC is faulty, the normal startup of the operating system of the server can be supported, and the availability of the server is improved.

[0048] The application further provides a serial port redirection method, system, device, substrate management controller, computer program product and computer readable storage medium, which have the same beneficial effects as the serial port redirection method described above. BRIEF DESCRIPTION OF DRAWINGS

[0049] In order to more clearly illustrate the technical solutions in the embodiments of the application, the related technologies and the drawings needed in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative effort.

[0050] Figure 1 The structure diagram of the first serial port redirection system provided by the application is shown in the figure.

[0051] Figure 2 A structure schematic diagram of a second serial port redirection system provided by the application;

[0052] Figure 3 A working mode switching logic schematic diagram of a cache device provided by the application;

[0053] Figure 4 A structure schematic diagram of a cache device provided by the application;

[0054] Figure 5 A data flow schematic diagram of a serial port redirection system in a normal working mode provided by the application;

[0055] Figure 6 A working logic schematic diagram of a cache device in a normal working mode provided by the application;

[0056] Figure 7 A data flow schematic diagram of a serial port redirection system in an abnormal working mode provided by the application;

[0057] Figure 8 A working logic schematic diagram of a cache device in an abnormal working mode provided by the application;

[0058] Figure 9 A flow schematic diagram of a serial port redirection method provided by the application;

[0059] Figure 10 A structure schematic diagram of a serial port redirection device provided by the application;

[0060] Figure 11 A structure schematic diagram of a computer readable storage medium provided by the application. DETAILED DESCRIPTION

[0061] The core of the application is to provide a serial port redirection system, method, device, controller, program product and medium, a cache device including a first and a second cache module is arranged, when the processing device is not faulty, the first cache module caches serial port data and the processing device reads out, when the processing device is faulty, serial port data is written into the second cache module, and the second cache module discards cached serial port data, so that the second cache module continuously maintains a non-empty state and is written with cached data, that is, continuous writing of serial port data in the server is supported, even when the processing device in the BMC is faulty, the server operating system can be normally started, and the availability of the server is improved.

[0062] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0063] Reference is made to Figure 1 , Figure 1 A structural schematic diagram of a serial port redirection system provided by the present application is provided, which is applied to a baseboard management controller and comprises:

[0064] A data analysis device 1 is configured to send the analyzed serial port data to a first cache module 21 and a second cache module 22, and send the received space remaining state to a serial port data source, so that the serial port data source sends serial port data according to the space remaining state, wherein the space remaining state comprises an empty state and a non-empty state.

[0065] A cache device 2 is configured to control the serial port data to be written into the first cache module 21 in the internal when the processing device 3 is not faulty, and send the space remaining state of the first cache module 21 to the data analysis device 1, and control the serial port data to be written into the second cache module 22 in the internal when the processing device 3 is faulty, and send the space remaining state of the second cache module 22 to the data analysis device 1, and further configured to control the second cache module 22 to discard the cached serial port data when the second cache module 22 is in the non-empty state.

[0066] A processing device 3 is configured to read the cached data from the first cache module 21 and send to a network terminal.

[0067] Specifically, considering the technical problems in the background art, and combining the consideration of (1) the serial port data in the server is successfully transmitted to the BMC, which is the premise of the normal start of the operating system, and (2) the cache jam of the serial port data in the BMC will hinder the smooth transmission of the serial port data in the server, therefore, in the embodiments of the present application, two cache modules, i.e. the first cache module 21 and the second cache module 22, are provided in the BMC, the first cache module 21 is used as the cache module normally used by the BMC in the serial port redirection, and the second cache module 22 is used as the temporary cache module used by the BMC when the processing device 3 is faulty, so that when the processing device 3 is faulty, the serial port data source in the server can also continuously transmit the serial port data to the BMC, and the serial port redirection system ensures the normal start of the operating system of the server.

[0068] In the embodiment, the processing device 3 is unable to read out the data in the second cache module 22 due to a fault. In this case, the second cache module 22 is controlled to discard the cached serial port data when the second cache module 22 is in the non-empty state, so that the second cache module 22 can continuously maintain the empty state, and the serial port data source can send the serial port data according to the space remaining state.

[0069] Specifically, in order to facilitate the serial port data source to determine whether to send serial port data according to the space remaining state, the cache device 2 in the embodiment can send the space remaining state of the first cache module 21 to the data analysis device 1 when the processing device 3 is not faulty, and send the space remaining state of the second cache module 22 to the data analysis device 1 when the processing device 3 is faulty.

[0070] Specifically, the first cache module 21 in the embodiment can cache serial port data when the processing device 3 is not faulty, and correspondingly, the non-faulty processing device 3 can read the cached data from the first cache module 21 and send it to the network terminal. Under the reading action of the processing device 3, the first cache module 21 can continuously maintain the empty state, so that the serial port data source can continuously send the serial port data to be sent to the BMC, and the operating system of the server can be normally started.

[0071] In the embodiment, by controlling the second cache module 22 to discard the cached serial port data, the empty state of the second cache module 22 can be efficiently and low-costly maintained, and a second cache module 22 with a relatively low capacity can be selected. The fault of the processing device 3 specifically refers to the inability to normally read out the cached data from the first cache module 21, so that the first cache module 21 is in the non-empty state for a long time, and ultimately causes the serial port data source to be unable to continuously send the serial port data to the BMC, resulting in the operating system of the server being unable to be normally started.

[0072] Specifically, the data analysis device 1 can be of various types, which are not limited in the embodiment of the present application, for example, can be an LPC / eSPI interface module, which can be used to analyze data from an LPC (Low-Pin-Count) or eSPI (Enhanced Serial Peripheral Interface) bus, when the address of the analyzed data belongs to the serial port address space, the corresponding serial port data can be sent to the first cache module 21 and the second cache module 22 cache device 2.

[0073] The present application provides a serial port redirection system, considering that (1) "smooth transmission of serial port data in the server to the BMC" is the premise of normal startup of the operating system, (2) "cache congestion of serial port data in the BMC" will hinder the smooth transmission of serial port data in the server, therefore, in the present application, a cache device including a first and a second cache module is provided, when the processing device is not faulty, the first cache module caches serial port data and the processing device reads out, and when the processing device is faulty, the serial port data is written into the second cache module, and the second cache module discards the cached serial port data, so that the second cache module continuously maintains a non-empty state and is written with cache data, that is, the continuous writing of serial port data in the server is supported, even when the processing device in the BMC is faulty, the server operating system can be normally started, and the availability of the server is improved.

[0074] On the basis of the above embodiment:

[0075] As an optional embodiment, the cache device 2 includes:

[0076] The monitoring module is configured to generate a first control signal when a first preset condition is met, and generate a second control signal when a second preset condition is met, wherein the first preset condition is that the continuous time length of the first cache module 21 in a non-empty state does not exceed a preset time length, and the second preset condition is that the continuous time length of the first cache module 21 in a non-empty state exceeds a preset time length;

[0077] The logic control module is configured to control the write enable of the first cache module 21 under the control of the first control signal, and control the write enable of the second cache module 22 under the action of the second control signal; under the control of the first control signal, the space remaining state of the first cache module 21 is sent to the data analysis device 1, and under the control of the second control signal, the space remaining state of the second cache module 22 is sent to the data analysis device 1; when the second cache module 22 is in a non-empty state, the read enable of the second cache module 22 is controlled, so that the second cache module 22 discards the cached serial port data;

[0078] The first cache module 21 is used for caching serial port data when write enable;

[0079] The second cache module 22 is used for caching serial port data when write enable.

[0080] Specifically, in order to better illustrate the embodiments of the present application, please refer to Figure 2 With Figure 3 , Figure 2 The structure diagram of a second serial port redirection system provided by the present application, Figure 3 The working mode switching logic diagram of a cache device 2 provided by the present application, Figure 2 The cache sub-device in the cache device 2 refers to the common part of the cache device 2 except the monitoring module, and the cache sub-device includes the first cache module 21 and the second cache module 22, Figure 2 The processing device 3 in the cache device 2 includes an advanced reduced instruction set machine, an interconnection module and a network module, the interconnection module is responsible for the communication between the advanced reduced instruction set machine, the cache device 2 and the network module, and the advanced reduced instruction set machine is used for reading the cached serial port data in the cache device 2 and sending to the network terminal through the network module, Figure 3 The switching logic of the normal working mode and the abnormal working mode of the cache device 2 is indicated in the cache device 2, that is, the first control signal can switch the cache device 2 to the normal working mode, and the second control signal can switch the cache device 2 to the abnormal working mode.

[0081] Specifically, considering that the processing device 3 can read the serial port data in the first cache module 21 under normal circumstances, so that the first cache module 21 “will not appear long-term non-empty state”, and the first cache module 21 may appear long-term non-empty state when the processing device 3 fails, therefore, the monitoring module in the embodiment of the present application can efficiently and accurately determine whether the processing device 3 is faulty by monitoring the space remaining state of the first cache module 21, without interacting with the processing device 3; Specifically, two preset conditions can be set, when the first preset condition is met, the first control signal is generated to perform “related control action of processing device 3 non-fault state”, and when the second preset condition is met, the second control signal is generated to perform “related control action of processing device 3 fault state”.

[0082] Specifically, after having the first control signal and the second control signal, the logic control module can realize the relevant control actions in the two working modes mentioned above under the control of the first control signal and the second control signal, that is, in the "normal working mode of the processing device 3", the first cache module 21 write enable can be controlled under the control of the first control signal, the space remaining state of the first cache module 21 is sent to the data analysis device 1; in the "working mode of the processing device 3 in failure", the second cache module 22 write enable can be controlled under the control of the second control signal, the space remaining state of the second cache module 22 is sent to the data analysis device 1; and when the second cache module 22 is in a non-empty state, the second cache module 22 read enable can be controlled so that the second cache module 22 discards the cached serial port data.

[0083] Of course, in addition to this specific form, the cache device 2 can also be of other types, which are not limited by the embodiments of the present application.

[0084] As an optional embodiment, under the control of the first control signal, the control of the first cache module 21 write enable includes:

[0085] When the serial port data write enable signal of the serial port data source and the first control signal are received at the same time, the first cache module 21 write enable is controlled;

[0086] Under the action of the second control signal, the control of the second cache module 22 write enable includes:

[0087] When the serial port data write enable signal of the serial port data source and the second control signal are received at the same time, the second cache module 22 write enable is controlled.

[0088] Specifically, considering that when the serial port data write enable of the serial port data source, the corresponding cache module is write-enabled, the accuracy of the write enable timing can be improved, and the cache module is prevented from being utilized, therefore, in the embodiments of the present application, whether it is the write enable control of the first cache module 21 or the second cache module 22, the serial port data write enable signal of the serial port data source is taken as one of the prerequisite conditions, that is, the first cache module 21 write enable can be controlled when the serial port data write enable signal of the serial port data source and the first control signal are received at the same time, and the second cache module 22 write enable can be controlled when the serial port data write enable signal of the serial port data source and the second control signal are received at the same time.

[0089] As an optional embodiment, the logic control module includes:

[0090] The write enable control unit is configured to send a write enable signal to the first buffer module 21 when a serial data write enable signal of a serial data source and a first control signal are received simultaneously, and to send a write enable signal to the second buffer module 22 when a serial data write enable signal of the serial data source and a second control signal are received simultaneously;

[0091] The first input end is connected with a state output end of the first buffer module 21, the second input end is connected with a state output end of the second buffer module 22, and the output end is connected with a data selector of the data parsing device 1. The data selector is configured to output a signal of the first input end thereof from the output end when a first control signal is received, and to output a signal of the second input end thereof from the output end when a second control signal is received. The state output end is configured to output a space remaining state of the buffer module.

[0092] The read enable control module connected with the second buffer module 22 is configured to control a read enable of the second buffer module 22 when the second buffer module 22 is in a non-empty state, so that the second buffer module 22 discards the buffered serial data.

[0093] Specifically, considering that the three control works (write enable control, space remaining state transmission and read enable control) in the logic control module are implemented by three independent modules respectively, the structure of the logic control module is clear and easy to maintain. Therefore, the logic control module in the embodiment of the present application includes a write enable control unit, a data selector and a read enable control module. The write enable control module can send a write enable signal to the first buffer module 21 when a serial data write enable signal of a serial data source and a first control signal are received simultaneously, and can send a write enable signal to the second buffer module 22 when a serial data write enable signal of the serial data source and a second control signal are received simultaneously. The data selector (MUX, Multiplexer) can output a signal of the first input end thereof from the output end when a first control signal is received, and can output a signal of the second input end thereof from the output end when a second control signal is received. The state output end is configured to output a space remaining state of the buffer module. The read enable control module can control a read enable of the second buffer module 22 when the second buffer module 22 is in a non-empty state, so that the second buffer module 22 discards the buffered serial data.

[0094] Of course, in addition to the specific structure, the logic control module can also be of other types, which are not limited in the embodiment of the present application.

[0095] As an optional embodiment, the write enable control unit includes a first AND gate, a second AND gate and a first NOT gate.

[0096] The first input end of the first AND gate is connected with the output end of the serial port data write enable signal of the serial port data source, the first end of the first NOT gate is connected with the monitoring module, the second input end of the first AND gate is connected with the second end of the first NOT gate, and the output end of the first AND gate is connected with the write enable end of the first cache module 21; the first input end of the second AND gate is connected with the output end of the serial port data write enable signal of the serial port data source, the second input end of the second AND gate is connected with the monitoring module, and the output end of the second AND gate is connected with the write enable end of the second cache module 22.

[0097] Specifically, in order to better illustrate the embodiment of the application, please refer to Figure 4 , Figure 4 The structure diagram of the cache device 2 provided by the application is shown in the figure, Figure 4 The first NOT gate in the figure is located at the input end of the lower side of the first AND gate, which is indicated by a circle symbol, the first AND gate, the second AND gate and the first NOT gate constitute a write enable control unit, and the “NOT gate composed of a triangle and a circle” on the right side of the second cache module 22 indicates a read enable control module. Figure 4 The cache device 2 in the figure is composed of the write enable control unit, the data selector, the read enable control module, the first cache module 21 and the second cache module 22.

[0098] Specifically, the write enable control unit composed of the first AND gate, the second AND gate and the first NOT gate has the advantages of simple structure and low cost, the first control signal can be low level, the write enable signal can be high level, and the serial port data write enable signal can also be high level.

[0099] Of course, in addition to this specific structure, the write enable control unit can also be of other types, which are not limited in the embodiment of the application.

[0100] Specifically, in order to better illustrate the embodiment of the application, please refer to Figures 5 to 8 , Figure 5 The data flow diagram of the serial port redirection system in the normal working mode provided by the application is shown in the figure; Figure 6 The working logic diagram of the cache device 2 in the normal working mode provided by the application is shown in the figure; Figure 7 The data flow diagram of the serial port redirection system in the abnormal working mode provided by the application is shown in the figure; Figure 8 The working logic diagram of the cache device 2 in the abnormal working mode provided by the application is shown in the figure, Figure 5 The dotted line with an arrow in the figure indicates the data flow of the serial port redirection system in the normal working mode, that is, starting from the data analysis device 1, passing through the first cache module 21, the interconnection module, the RISC machine, the interconnection module and the network module, Figure 6 The working condition of the cache device 2 in the normal working mode is shown in the figure, Figure 6The modules that are not in operation are represented by dashed lines. In this mode, the second AND gate, the second cache module 22 and the read enable control module are not in operation, Figure 7 The arrowed dashed line in the figure represents the data flow of the serial port redirection system in the abnormal operation mode, i.e., from the data analysis device 1 to the second cache module 22, Figure 8 The working condition of the cache device 2 in the abnormal operation mode, Figure 8 The modules that are not in operation are represented by dashed lines. In this mode, the first AND gate and the first cache module 21 are not in operation.

[0101] As an optional embodiment, the second cache module 22 outputs a first level through its state output end when it is in a non-empty state, and outputs a second level through its state output end when it is in an empty state, and the read enable effective level of the second cache module 22 is the second level;

[0102] The read enable control module is a NOT gate, the first end of the read enable control module is connected with the state output end of the second cache module 22, and the second end of the read enable control module is connected with the read enable control end of the second cache module 22.

[0103] Specifically, considering that the level of the read enable signal of the second cache module 22 is opposite to the level of the output signal of the second cache module 22 in the non-empty state, the read enable control module in the embodiment of the application can be implemented by using a NOT gate, which has the advantages of simple structure and low cost, wherein the first level can be a low level, and the second level can be a high level.

[0104] Of course, in addition to this specific structure, the read enable control module can also be in other specific forms, which are not limited in the embodiment of the application.

[0105] As an optional embodiment, the processing device 3 comprises a high-level reduced instruction set machine processor and a network module.

[0106] The high-level reduced instruction set machine processor is used to read the cache data from the first cache module 21, and send the read cache data to the network terminal through the network module.

[0107] Specifically, the ARM (Advanced RISC Machines) processor is the core processor of the BMC, which can read the cache data in the first cache module 21 and send it to the network terminal through the network module. When the ARM processor fails, it cannot read the cache data in the first cache module 21, and when the network module fails, the ARM processor also cannot continuously read the cache data in the first cache module 21, i.e., the failure of the processing device 3 can be regarded as the failure of the ARM processor and / or the network module.

[0108] The network module can be a LAN (Local Area Network) or the like, and embodiments of the present application are not limited in this regard.

[0109] Of course, in addition to this specific configuration, the processing device 3 can be of other types, and embodiments of the present application are not limited in this regard.

[0110] As an optional embodiment, the first cache module 21 and / or the second cache module 22 is a first-in first-out unit.

[0111] Specifically, the FIFO (First-In-First-Out) has the advantages of simple structure and strong stability.

[0112] Of course, in addition to the FIFO, the first cache module 21 and / or the second cache module 22 can be of other types, and embodiments of the present application are not limited in this regard.

[0113] As an optional embodiment, the serial port redirection system further comprises:

[0114] The prompter connected to the monitoring module is used to prompt the processing device 3 failure when the second control signal is received.

[0115] Specifically, considering that in the case of processing device 3 failure, the second control signal of the monitoring module can trigger the prompter to prompt failure, therefore, in the present embodiment, the prompter is provided, which can prompt the processing device 3 failure when the second control signal is received, so as to facilitate the staff to learn about the situation in time and handle it.

[0116] The prompter can be of various types, such as a light-emitting diode or a display, and embodiments of the present application are not limited in this regard.

[0117] As an optional embodiment, the monitoring module is specifically used for:

[0118] In response to the trigger of the rising edge of the clock signal, if the first cache module 21 is in a non-empty state, the count value of the counter is incremented by one, and if the first cache module 21 is in an empty state, the count value of the counter is cleared.

[0119] When the current count value of the counter is not greater than the preset threshold, the first control signal is output, and when the current count value of the counter is greater than the preset threshold, the second control signal is output.

[0120] Specifically, considering that the duration of the second cache module 22 in the non-empty state can be measured by counting in the manner triggered by the clock signal, the monitoring module in the embodiment of the application can, in response to the trigger of the rising edge of the clock signal, add one to the count value of the counter if the first cache module 21 is in the non-empty state, and clear the count value of the counter if the first cache module 21 is in the empty state, so as to measure the duration of the non-empty state, and can determine that the processing device 3 is faulty and output the second control signal when the current count value of the counter is greater than the preset threshold, so as to efficiently and at low cost determine whether the duration of the non-empty state of the first cache module 21 exceeds the preset threshold.

[0121] The preset threshold can be flexibly set, and the embodiment of the application does not limit this.

[0122] Of course, in addition to this specific form, the determination of whether the duration of the non-empty state of the first cache module 21 exceeds the preset threshold can also be implemented in other forms, which are not limited by the embodiment of the application.

[0123] Please refer to Figure 9 , Figure 9 A flowchart of a serial port redirection method provided by the application, which is applied to a processor in a baseboard management controller, comprises:

[0124] S101: When the processing device 3 is not faulty, controlling the serial port data to be written into the first cache module 21, and sending the space remaining state of the first cache module 21 to the data analysis device 1;

[0125] S102: When the processing device 3 is faulty, controlling the serial port data to be written into the second cache module 22 in the processor, and sending the space remaining state of the second cache module 22 to the data analysis device 1;

[0126] S103: When the second cache module 22 is in the non-empty state, controlling the second cache module 22 to discard the cached serial port data;

[0127] The baseboard management controller comprises a processor, a first cache module 21, a second cache module 22, a data analysis device 1 and a processing device 3.

[0128] The data analysis device 1 is configured to send the analyzed serial port data to the first cache module 21 and the second cache module 22, and send the received space remaining state to the serial port data source, so that the serial port data source sends serial port data according to the space remaining state, wherein the space remaining state comprises an empty state and a non-empty state.

[0129] The processing device 3 is configured to read the cached data from the first cache module 21 and send the cached data to a network terminal.

[0130] For the introduction of the serial port redirection method provided by the embodiment of the application, please refer to the foregoing embodiment of the serial port redirection system, and the embodiment of the application will not be described here again.

[0131] For the introduction of the serial port redirection method provided by the embodiment of the application, please refer to the foregoing embodiment of the serial port redirection system, and the embodiment of the application will not be described here again. Figure 10 , Figure 10 A flowchart of a serial port redirection device provided by the application is shown in the figure, and the serial port redirection device comprises:

[0132] The memory 101 is used for storing a computer program.

[0133] The processor 102 is used for implementing the steps of the serial port redirection method in the foregoing embodiment when the computer program is executed.

[0134] For the introduction of the serial port redirection device provided by the embodiment of the application, please refer to the foregoing embodiment of the serial port redirection system, and the embodiment of the application will not be described here again.

[0135] The application further provides a baseboard management controller comprising the serial port redirection system or the serial port redirection device in the foregoing embodiment.

[0136] For the introduction of the baseboard management controller provided by the embodiment of the application, please refer to the foregoing embodiment of the serial port redirection system, and the embodiment of the application will not be described here again.

[0137] The application further provides a computer program product comprising a computer program / instruction, which, when executed by a processor, implements the steps of the serial port redirection method in the foregoing embodiment.

[0138] For the introduction of the computer program product provided by the embodiment of the application, please refer to the foregoing embodiment of the serial port redirection system, and the embodiment of the application will not be described here again.

[0139] For the introduction of the serial port redirection method provided by the embodiment of the application, please refer to the foregoing embodiment of the serial port redirection system, and the embodiment of the application will not be described here again. Figure 11 , Figure 11 A structural diagram of a computer readable storage medium provided by the application is shown in the figure, and the computer readable storage medium 111 stores a computer program 112, which, when executed by a processor, implements the steps of the serial port redirection method in the foregoing embodiment.

[0140] For the introduction of the computer readable storage medium provided by the embodiment of the application, please refer to the foregoing embodiment of the serial port redirection system, and the embodiment of the application will not be described here again.

[0141] Embodiments of the present application are described herein with reference to the accompanying drawings, of which: various embodiments are described with progressive

[0142] The above description of disclosed embodiments is intended to be illustrative and not restrictive. Many embodiments of the application will be apparent to those of skill in the art upon reviewing the above description. The scope of the application should, therefore, be determined not with reference to the above description, but instead should be given with reference to the appended claims, along with their full scope of equivalents.

Claims

1. A serial port redirection system, comprising: The application is applied to a baseboard management controller, comprising: a data analysis device, configured to send serial port data obtained by analysis to a first cache module and a second cache module, and send a received space remaining state to a serial port data source, so that the serial port data source sends serial port data according to the space remaining state, wherein the space remaining state comprises an empty state and a non-empty state; a cache device, configured to control serial port data to be written into the first cache module in the internal when the processing device is not faulty, and send a space remaining state of the first cache module to the data analysis device, and control serial port data to be written into the second cache module in the internal when the processing device is faulty, and send a space remaining state of the second cache module to the data analysis device, and further configured to control the second cache module to discard cached serial port data when the second cache module is in the non-empty state; a processing device, configured to read cached data from the first cache module and send the data to a network terminal.

2. The serial port redirection system of claim 1, wherein, The cache device comprises: a monitoring module, configured to generate a first control signal when a first preset condition is met, and generate a second control signal when a second preset condition is met, wherein the first preset condition is that a continuous time length of the first cache module being in the non-empty state does not exceed a preset time length, and the second preset condition is that the continuous time length of the first cache module being in the non-empty state exceeds the preset time length; a logic control module, configured to control a write enable of the first cache module under control of the first control signal, and control a write enable of the second cache module under action of the second control signal, and send a space remaining state of the first cache module to the data analysis device under control of the first control signal, and send a space remaining state of the second cache module to the data analysis device under control of the second control signal, and control a read enable of the second cache module when the second cache module is in the non-empty state, so that the second cache module discards cached serial port data; the first cache module, configured to cache serial port data when the write enable is enabled; the second cache module, configured to cache serial port data when the write enable is enabled.

3. The serial port redirection system of claim 2, wherein, Controlling the write enable of the first cache module under control of the first control signal comprises: controlling the write enable of the first cache module when the serial port data write enable signal of the serial port data source and the first control signal are received at the same time; Controlling the write enable of the second cache module under action of the second control signal comprises: controlling the write enable of the second cache module when the serial port data write enable signal of the serial port data source and the second control signal are received at the same time.

4. The serial port redirection system of claim 3, wherein, The logic control module comprises: a write enable control unit, configured to send a write enable signal to the first cache module when the serial port data write enable signal of the serial port data source and the first control signal are received at the same time, and send a write enable signal to the second cache module when the serial port data write enable signal of the serial port data source and the second control signal are received at the same time. The first input end is connected with a state output end of the first cache module, the second input end is connected with a state output end of the second cache module, and the output end is connected with a data selector of the data analysis device, which is used for outputting the signal of the first input end from the output end when the first control signal is received, and outputting the signal of the second input end from the output end when the second control signal is received, wherein the state output end is used for outputting the space remaining state of the cache module. A read enable control module connected with the second cache module is used for controlling the read enable of the second cache module when the second cache module is in the non-empty state, so that the second cache module discards the cached serial port data.

5. The serial port redirection system of claim 4, wherein, The write enable control unit comprises a first AND gate, a second AND gate and a first NOT gate; The first input end of the first AND gate is connected with an output end of a serial port data write enable signal of a serial port data source, the first end of the first NOT gate is connected with the monitoring module, the second input end of the first AND gate is connected with the second end of the first NOT gate, and the output end of the first AND gate is connected with a write enable end of the first cache module; the first input end of the second AND gate is connected with the output end of the serial port data write enable signal of the serial port data source, the second input end of the second AND gate is connected with the monitoring module, and the output end of the second AND gate is connected with a write enable end of the second cache module.

6. The serial port redirection system of claim 4, wherein, The second cache module outputs a first level through the state output end when the second cache module is in the non-empty state, and outputs a second level through the state output end when the second cache module is in the empty state, and the read enable effective level of the second cache module is the second level; The read enable control module is a NOT gate, the first end of the read enable control module is connected with the state output end of the second cache module, and the second end of the read enable control module is connected with a read enable control end of the second cache module.

7. The serial port redirection system of claim 2, wherein, The processing device comprises a high-level reduced instruction set machine processor and a network module. The high-level reduced instruction set machine processor is used for reading the cached data from the first cache module and sending the read cached data to a network terminal through the network module.

8. The serial port redirection system of claim 2, wherein, The first cache module and / or the second cache module is a first-in-first-out unit.

9. The serial port redirection system of claim 2, wherein, The serial port redirection system further comprises: A prompter connected with the monitoring module, which is used for prompting the processing device failure when the second control signal is received.

10. The serial port redirection system according to any one of claims 2 to 9, wherein, The monitoring module is specifically used for: In response to the trigger of the rising edge of the clock signal, if the first cache module is in the non-empty state, the count value of the counter is increased by one, and if the first cache module is in the empty state, the count value of the counter is cleared; When the current count value of the counter is not greater than a preset threshold, the first control signal is output, and when the current count value of the counter is greater than the preset threshold, the second control signal is output.

11. A serial port redirection method, characterized in that, The processor applied to the baseboard management controller comprises: When the processing device is not faulty, the serial port data is written into the first cache module, and the space remaining state of the first cache module is sent to the data analysis device; When the processing device is faulty, the serial port data is written into the second cache module in the processing device, and the space remaining state of the second cache module is sent to the data analysis device. When the second cache module is in the non-empty state, the second cache module is controlled to discard the cached serial port data; The baseboard management controller comprises a processor, a first cache module, a second cache module, a data analysis device and a processing device. The data analysis device is configured to send the analyzed serial port data to the first cache module and the second cache module, and send the received space remaining state to the serial port data source, so that the serial port data source sends serial port data according to the space remaining state, wherein the space remaining state comprises an empty state and a non-empty state. The processing device is configured to read the cached data from the first cache module and send the cached data to the network terminal.

12. A serial port redirection device, comprising: It comprises: a memory for storing a computer program; a processor for executing the computer program to implement the steps of the serial port redirection method according to claim 11.

13. A baseboard management controller, comprising: It comprises the serial port redirection system according to any one of claims 1 to 10 or the serial port redirection device according to claim 12.

14. A computer program product comprising computer programs / instructions, characterized in that, The computer program / instruction is executed by the processor to implement the steps of the serial port redirection method according to claim 11.

15. A computer-readable storage medium, characterized in that, The computer program is stored on the computer readable storage medium, and the computer program is executed by the processor to implement the steps of the serial port redirection method according to claim 11.

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