Wafer yield prediction method and device, electronic equipment and storage medium

Abstract

The present disclosure relates to a wafer yield prediction method and device, an electronic device and a storage medium. The method comprises: obtaining defect density data and a defect distribution map of a wafer to be predicted, wherein the defect density data comprises area defect densities of multiple areas of the wafer, and the defect distribution map indicates a position distribution of defects on the wafer; determining a first prediction result according to the defect density data by using a first prediction model, wherein the first prediction result indicates a yield of the wafer predicted by the first prediction model; determining a second prediction result according to the defect distribution map by using a second prediction model, wherein the second prediction result indicates a yield of the wafer predicted by the second prediction model; and determining a target yield of the wafer according to the first prediction result and the second prediction result. In this way, the accuracy and efficiency of wafer yield prediction can be improved.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of semiconductor manufacturing, and particularly relates to a wafer yield prediction method and device, an electronic device and a storage medium. BACKGROUND

[0002] In the integrated semiconductor manufacturing process, the prediction of wafer yield is crucial for reducing cost and improving production efficiency, where the wafer yield refers to the ratio of the number of qualified chips on a whole wafer after all process steps to the total number of chips on the whole wafer. The wafer yield is usually affected by various factors, including device performance, process control, material quality, design factors and defect density, etc. With the advancement of semiconductor manufacturing technology, the wafer size gradually decreases, and the defects (such as micro-cracks, particles, contamination, etc.) on the wafer surface become the main factors affecting the yield. Microscopic and macroscopic defects on the wafer can cause chip failure, thereby reducing the yield.

[0003] The existing defect detection technology, especially high-precision detection methods such as scanning electron microscopes and optical detection equipment, has become a key quality control tool. Although the current defect detection equipment can effectively identify the defects on the wafer and output data such as the type, number, location and distribution map of the defects, how to quickly and accurately predict the wafer yield remains a challenge to be solved. SUMMARY

[0004] In view of this, the present disclosure provides a wafer yield prediction method and device, an electronic device and a storage medium, which can improve the accuracy and efficiency of wafer yield prediction.

[0005] According to an aspect of the present disclosure, a wafer yield prediction method is provided, comprising: obtaining defect density data and a defect distribution map of a wafer to be predicted, wherein the defect density data comprises area defect densities of multiple regions of the wafer, and the defect distribution map indicates the location distribution of defects on the wafer; determining a first prediction result by using a first prediction model according to the defect density data, wherein the first prediction result indicates the yield of the wafer predicted by the first prediction model; determining a second prediction result by using a second prediction model according to the defect distribution map, wherein the second prediction result indicates the yield of the wafer predicted by the second prediction model; and determining a target yield of the wafer according to the first prediction result and the second prediction result.

[0006] In a possible implementation, the obtaining of the defect density data and the defect distribution map of the wafer to be predicted comprises: determining a plurality of regions of the wafer and the number of defects in each region according to a preset region division manner, and determining a ratio between the number of defects in each region and the area of each region as the region defect density of each region; and generating a defect distribution map according to the positions of the defects on the wafer.

[0007] In a possible implementation, the first prediction model comprises a linear regression model, and the generation process of the first prediction model comprises: obtaining a first sample data set, the first sample data set comprising sample defect density data of a plurality of sample wafers and real yields corresponding to the sample wafers; and fitting parameters in a preset linear regression model by using the first sample data set to obtain the first prediction model.

[0008] In a possible implementation, the second prediction model comprises a convolutional neural network model, and the training process of the second prediction model comprises: obtaining a second sample data set, the second sample data set comprising sample defect distribution maps of a plurality of sample wafers and real yields corresponding to the sample wafers; outputting sample prediction results of the sample wafers by using a preset convolutional neural network model according to the sample defect distribution maps of the sample wafers, the sample prediction results indicating predicted yields of the sample wafers output by the convolutional neural network model; and optimizing parameters in the convolutional neural network model according to a loss between the predicted yields of the sample wafers and the real yields of the sample wafers, to obtain the trained second preset model.

[0009] In a possible implementation, the determining of the target yield of the wafer according to the first prediction result and the second prediction result comprises: performing weighted summation on the first prediction result and the second prediction result based on a first weight coefficient corresponding to the first prediction model and a second weight coefficient corresponding to the second prediction model, to obtain the target yield of the wafer, the sum of the first weight coefficient and the second weight coefficient being 1.

[0010] In a possible implementation, the determining of the target yield of the wafer according to the first prediction result and the second prediction result comprises: outputting the target yield of the wafer according to the first prediction result and the second prediction result by using a target regression model, wherein parameters in the target regression model comprise a weight coefficient for weighting the first prediction result output by the first prediction model and a weight coefficient for weighting the second prediction result output by the second prediction model.

[0011] In a possible implementation, the generation process of the target regression model comprises: obtaining a third sample data set, the third sample data set comprising first sample prediction results, second sample prediction results and true yields of a plurality of sample wafers, wherein the first sample prediction results comprise predicted yields of the sample wafers determined by using the first prediction model, and the second sample prediction results comprise predicted yields of the sample wafers determined by using the second prediction model; outputting, by using an initial regression model, sample predicted yields of the sample wafers according to the first sample prediction results and the second sample prediction results of each sample wafer; and optimizing parameters in the initial regression model according to a loss between the sample predicted yields of each sample wafer output by the initial regression model and the true yields of each sample wafer, to obtain the target regression model.

[0012] According to another aspect of the present disclosure, a wafer yield prediction apparatus is provided, comprising: an acquisition module configured to acquire defect density data and a defect distribution map of a wafer to be predicted, the defect density data comprising area defect densities of a plurality of areas of the wafer, and the defect distribution map indicating a position distribution of defects on the wafer; a first prediction module configured to determine a first prediction result according to the defect density data by using a first prediction model, the first prediction result indicating a yield of the wafer predicted by the first prediction model; a second prediction module configured to determine a second prediction result according to the defect distribution map by using a second prediction model, the second prediction result indicating a yield of the wafer predicted by the second prediction model; and a target determination module configured to determine a target yield of the wafer according to the first prediction result and the second prediction result.

[0013] According to another aspect of the present disclosure, an electronic device is provided, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0014] According to another aspect of the present disclosure, a non-volatile computer readable storage medium having computer program instructions stored thereon is provided, wherein the computer program instructions are executed by a processor to implement the above method.

[0015] According to another aspect of the present disclosure, a computer program product is provided, comprising computer readable code, or a non-volatile computer readable storage medium carrying computer readable code, when the computer readable code is run in a processor of an electronic device, the processor in the electronic device executes the above method.

[0016] According to aspects of the present disclosure, by predicting the yield of the wafer according to the defect density data by using the first prediction model (i.e., predicting the yield of the wafer based on the defect density distribution feature), predicting the yield of the wafer based on the defect distribution map by using the second prediction model (i.e., predicting the yield of the wafer based on the defect position distribution feature), which is equivalent to predicting the yield of the wafer from the defect density distribution and the defect position distribution respectively, and then determining the target yield of the wafer according to the yield predicted by the two models, the advantages of the two prediction models can be combined (i.e., combining the defect density distribution and the defect position distribution), and the more accurate target yield of the wafer can be efficiently predicted, i.e., the accuracy and efficiency of the wafer yield prediction are improved.

[0017] Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0018] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the present disclosure and serve to explain the principles of the present disclosure.

[0019] Figure 1 A flowchart of a wafer yield prediction method according to an embodiment of the present disclosure is shown.

[0020] Figure 2 A schematic diagram of a wafer yield prediction process according to an embodiment of the present disclosure is shown.

[0021] Figure 3 A block diagram of a wafer yield prediction device according to an embodiment of the present disclosure is shown.

[0022] Figure 4 A block diagram of an electronic device 1900 according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0023] Various exemplary embodiments, features, and aspects of the present disclosure will be explained in detail below with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements or elements having a similar function. Although various aspects of the embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0024] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations.

[0025] The term "and / or", as used herein, merely describes association between associated objects, and can exist in three forms: for example, A and / or B can mean: A alone, both A and B, and B alone. In addition, the term "at least one of" as used herein means any one of the plurality of components or any combination of at least two of the plurality of components, for example, including at least one of A, B, and C can mean including at least one of any one or more of A, B, and C. In the description of the disclosure, the meaning of "a plurality of" is two or more, unless explicitly specified otherwise.

[0026] It should be understood that the terms "first", "second" and the like in the claims, specification and drawings of the present disclosure are used for distinguishing between similar objects, and are not necessarily used to describe a particular sequential or chronological order. The terms "include", "including", "comprising", "comprises" and the like as used herein specify the presence of the stated features, integers, steps, operations, elements, components and / or groups but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0027] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following detailed description. Those skilled in the art should understand that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, elements and circuits well known to those skilled in the art are not described in detail in order to highlight the main ideas of the present disclosure.

[0028] The wafer yield prediction method of the embodiments of the present disclosure can be deployed on various terminal devices through software or hardware modification. The terminal device involved in the embodiments of the present disclosure can refer to a device with a wireless connection function and / or a wired connection function. The wireless connection function refers to the connection with other devices through wireless connection modes such as wifi and Bluetooth. The terminal device involved in the embodiments of the present disclosure can also communicate with other devices through the wired connection function. The terminal device involved in the embodiments of the present disclosure can be touch screen or non-touch screen, or even without a screen. The touch screen can be controlled by clicking, sliding, etc. on the display screen through fingers, stylus, etc. The non-touch screen device can be connected to a mouse, keyboard, touch panel, etc. input device, and the terminal device is controlled through the input device. The device without a screen, for example, can be a Bluetooth speaker without a screen. For example, the terminal device of the present application can include but is not limited to user equipment (User Equipment, UE), mobile device, mobile terminal, handheld device, tablet computer, notebook computer, palm computer, computing device, etc.

[0029] The wafer yield prediction method of the embodiments of the present disclosure can also be deployed on a server, which can be located in the cloud or locally, can be a physical device, or a virtual device such as a virtual machine, a container, etc., and has a wireless communication function, wherein the wireless communication function can be arranged in a chip (system) or other components or assemblies of the server. It can be a device with a wireless connection function, and the wireless connection function means that it can be connected to other servers or terminal devices through Wi-Fi, Bluetooth, etc. The server involved in the embodiments of the present disclosure can also have the function of wired connection for communication. For example, the server of the embodiments of the present disclosure can be located in the cloud, communicate with the terminal device, receive the defect density data and defect distribution map of the wafer to be predicted sent by the terminal device, and use the wafer yield prediction method deployed on the server to obtain the predicted target yield based on the defect density data and the defect distribution map, and return it to the terminal device to show the predicted target yield to the user in the terminal device.

[0030] Figure 1 A flowchart of a wafer yield prediction method according to an embodiment of the present disclosure is shown. As shown in Figure 1 , the method comprises steps S11 to S14.

[0031] In step S11, the defect density data and defect distribution map of the wafer to be predicted are obtained, the defect density data comprising the area defect density of a plurality of regions of the wafer, and the defect distribution map indicating the position distribution of defects on the wafer.

[0032] It is known that there is a significant correlation between the defect density of a wafer and the wafer yield. Generally speaking, the higher the defect density on a wafer, the lower the yield of the wafer. This correlation is particularly evident in semiconductor manufacturing, because defects on a wafer will directly affect the performance and quality of individual dies, thereby affecting the yield of the entire wafer. Therefore, defect density is a standard indicator for measuring the number of defects on a wafer and is commonly used to evaluate defects occurring during production and their impact on yield. There are various methods for calculating defect density, and a commonly used defect density calculation method is: defect density = total number of defects / area, the total number of defects referring to the number of defects detected within a specified area, and the area is usually expressed in square centimeters. For example, if 100 defects are detected on a wafer, and the area of the wafer is 200 cm 2 , then the overall defect density of the wafer = 100 / 200 = 0.5 defects / cm 2 .

[0033] It is considered that the defect distribution of different regions on the same wafer is usually different. For example, the outer ring region of the wafer is usually more prone to defects due to material stress, temperature gradient and other factors, and thus the defects in the edge region may have a greater impact on yield, especially under uneven conditions in the production process. The center region of the wafer is generally affected by more uniform processes, and the defect density and yield change are relatively stable, but in some cases, defects in the center region may also have a greater impact on the overall yield, especially when there are local problems in the process equipment. Therefore, the embodiments of the present disclosure propose to divide the wafer into multiple regions and determine the regional defect density of each region, so as to predict the wafer yield based on the distribution of the regional defect densities of the multiple regions. In this way, the different defect distribution characteristics of different regions (such as the edge region and the center region) of the wafer can be captured, and the impact of the defect density of different regions on the overall yield of the wafer can be more accurately reflected. In addition, more accurate yield prediction can also be achieved in combination with the defect distribution map (i.e., the position distribution of defects on the wafer).

[0034] Therefore, in a possible implementation, the above obtaining the defect density data and the defect distribution map of the wafer to be predicted can include:

[0035] According to the preset region division manner, the multiple regions of the wafer and the number of defects in each region are determined, and the ratio between the number of defects in each region and the area of each region is determined as the regional defect density of each region.

[0036] According to the position of the defects on the wafer, a defect distribution map is generated.

[0037] For example, the region division manner can include dividing the wafer into multiple regions according to the radius of the wafer. For example, assuming that the radius of the wafer is r, the wafer can be divided into a circular region (i.e., a center region, an inner radius region) with a radius of , and a circular ring region (i.e., an edge region, an outer radius region) from a radius of to r. Of course, for example, the wafer can also be divided into a circular region with a radius of , a circular ring region with a radius of to , and a circular ring region with a radius of to r. The region division manner can also include dividing the wafer into multiple regions according to a preset fixed ratio. For example, 10% of the region along the outer edge of the wafer inward can be divided as the edge region, and the remaining 90% of the region can be divided as the center region. Of course, for example, the wafer can also be divided into three regions of 10%, 50% and 60% along the outer edge of the wafer inward, and the like. The embodiments of the present disclosure do not limit this.

[0038] It should be understood that the area sizes of the regions divided by the wafer can be uniform or non-uniform, for example, the wafer can be divided into three regions, i.e., a circular region with a radius of r, a circular ring region with a radius of r to r, and a circular ring region with a radius of r to r, and in fact, the number of regions and the size of the regions divided by the wafer can be customized by a person skilled in the art according to actual needs, and the wafer region division manner is not limited by the embodiments of the present disclosure.

[0039] In actual applications, a defect detection device known in the art (such as an optical detection device such as a scanning electron microscope) can be used to detect the positions of defects on the wafer and the number of defects in each region on the wafer, and the embodiments of the present disclosure do not limit this.

[0040] It should be understood that the total area of the wafer is known, and the area of each region divided on the wafer is also known, and then after detecting the number of defects in each region on the wafer, the ratio between the number of defects in each region and the area of each region can be calculated to obtain the area defect density of each region. For example, if the wafer is divided into an edge region and a center region, the area defect density of the edge region can be represented as: The area defect density of the center region can be represented as:

[0041] Wherein, after detecting the positions of defects on the wafer, a defect distribution map can be generated based on the positions of defects on the wafer, the defect distribution map can indicate the positions of defects and the positions without defects on the wafer (i.e., indicating the position distribution of defects on the wafer), or in other words, each pixel on the defect distribution map can indicate whether the position corresponding to each pixel on the wafer has a defect. In actual applications, the defect distribution map can be represented as a heat map (i.e., indicating the position distribution of defects on the wafer with color), a grayscale map (indicating the position distribution of defects on the wafer with grayscale value), a matrix (indicating the position distribution of defects on the wafer with elements in the matrix), and the like, and the embodiments of the present disclosure do not limit this.

[0042] In step S12, a first prediction result indicating the yield of the wafer predicted by the first prediction model is determined according to the defect density data by using the first prediction model.

[0043] In one possible implementation, the first prediction model can include a linear regression model, i.e., a linear regression model can be used to predict the yield of the wafer according to the defect density data (such as the area defect density of the center region and the edge region), and the generation process of the first prediction model can include:

[0044] ​​​​obtaining a first sample dataset, the first sample dataset comprising sample defect density data of a plurality of sample wafers and a true yield of each sample wafer corresponding to the sample wafer;

[0045] fitting parameters in a preset linear regression model by using the first sample dataset to obtain a first prediction model.

[0046] In the step S11, the sample defect density data of each sample wafer in the first sample dataset can be generated by referring to the method for obtaining the defect density data in the step S11, that is, the sample wafer can be divided into a plurality of regions (such as an edge region and a center region), and the area defect density of each region can be calculated; and the true yield of each sample wafer can be detected by using a wafer yield detection device known in the art or other detection techniques, so as to obtain the first sample dataset.

[0047] In actual application, the first sample dataset actually obtained can further include noise data (such as invalid area defect density) and abnormal data (such as too large or too small true yield), and can further include missing values (such as missing area defect density, missing true yield, etc.), inconsistent data formats (such as area defect density being density, quantity, defect / cm 2 , defect / μm 2 , etc.), and therefore, the first sample dataset can be subjected to data cleaning, that is, the noise data and abnormal data can be removed, the missing values can be supplemented, and the data format can be unified, so as to obtain the first sample dataset after data cleaning, and the first prediction model is generated.

[0048] In the step S12, the linear regression model can be self-defined by a person skilled in the art, and the specific form of the linear regression model is not limited in the embodiments of the present disclosure. For example, assuming that the regions of the wafer are a center region and an edge region, the linear regression model can be represented by formula (1):

[0049] y = w1*Dedge + w2*Dcenter + b (1)

[0050] wherein, y represents the predicted yield, Dedge represents the area defect density of the edge region, Dcenter represents the area defect density of the center region, w1 and w2 are weight parameters in the linear regression model, and b is a bias term parameter.

[0051] It should be understood that the sample defect density data of the plurality of sample wafers and the true yield corresponding to each sample wafer are known, which is equivalent to knowing Dedge, Dcenter and y in formula (1), and based on this, a linear fitting method known in the art, such as least squares method, gradient descent method, normal equation (Least Squares), can be used to fit the parameters w1, w2 and b in the linear regression model based on the sample defect density data of the plurality of sample wafers and the true yield corresponding to each sample wafer, that is, to obtain the parameter values of the parameters in the linear regression model. Knowing the values of w1, w2 and b in formula (1), the first prediction model is obtained, and the input data of the first prediction model can be the area defect density of the center region and the area defect density of the edge region, and the output is the predicted wafer yield.

[0052] It should be noted that the linear regression model shown in formula (1) is used to generate the first prediction model, which is one possible implementation provided by the embodiments of the present disclosure. In fact, those skilled in the art can customize the linear regression model that adapts to the number of regions according to the number of regions divided on the wafer, etc., to generate the corresponding first prediction model, which is not limited by the embodiments of the present disclosure.

[0053] In step S13, a second prediction result is determined according to the defect distribution map using the second prediction model, and the second prediction result indicates the yield of the wafer predicted by the second prediction model.

[0054] It is known that the convolutional neural network (CNN) model is usually used for image processing and can also be used to process data with spatial structure. Therefore, the second prediction model can adopt a convolutional neural network model, for example, for the defect distribution map, the convolutional neural network model can be used to automatically extract defect distribution features from the defect distribution map and predict the wafer yield. Based on this, the training process of the second prediction model can include:

[0055] Obtaining a second sample data set, the second sample data set including sample defect distribution maps of a plurality of sample wafers and true yields corresponding to each sample wafer;

[0056] Using a preset convolutional neural network model to output sample prediction results of each sample wafer according to the sample defect distribution maps of each sample wafer, the sample prediction results indicating the predicted yields of the sample wafers output by the convolutional neural network model;

[0057] According to the loss between the predicted yield of each sample wafer and the true yield of each sample wafer, the parameters in the convolutional neural network model are optimized to obtain the trained second preset model.

[0058] The sample defect distribution map of each sample wafer can be generated according to the position of the defects on each sample wafer, that is, the sample defect distribution map corresponding to each sample wafer can be generated; and the real yield of each sample wafer can be detected by using a wafer yield detection device and other detection technologies known in the art, so as to obtain the second sample data set, wherein the real yield of each sample wafer, that is, the label of the sample defect distribution map of each sample wafer. It should be understood that the sample wafers used in the second sample data set and the sample wafers used in the first sample data set can be the same batch of sample wafers, or can be different batches of sample wafers, that is, there can be an intersection between the sample wafers used in the second sample data set and the sample wafers used in the first sample data set, or there can be no intersection, and the embodiments of the present disclosure do not limit this.

[0059] The specific network structure of the convolutional neural network model can be customized by a person skilled in the art according to actual needs, for example, the convolutional neural network model can include multiple convolutional layers, pooling layers and fully connected layers to realize the extraction of image features and prediction. The convolutional layer (Conv2D) can be used to extract image features (such as defect distribution features) of the input image, the pooling layer (MaxPooling2D) can be used to reduce the dimension of the input image to reduce the amount of calculation, and the fully connected layer (Dense) can be used to map the features extracted by the convolutional layer to the predicted value of the yield. It should be understood that a person skilled in the art can customize the operator size (such as the size of the convolution operator) and the operator type (such as the type of the pooling operator used in the pooling layer, which can be a maximum pooling operator, an average pooling operator, etc., and an activation operator can also be set in the convolutional layer) used in the convolutional layer, the pooling layer and the fully connected layer, and the embodiments of the present disclosure do not limit this.

[0060] The parameters in the convolutional neural network model are optimized according to the loss between the predicted yield of each sample wafer and the real yield of each sample wafer, for example, the deviation between the predicted yield of each sample wafer and the real yield of each sample wafer can be calculated, and the sum, mean or mean square value of the deviation between the predicted yield and the real yield of each sample wafer in the plurality of sample wafers can be calculated as the total loss, and then the parameters in the convolutional neural network model are optimized based on the total loss by using a gradient descent and back propagation optimization algorithm to obtain the trained second prediction model.

[0061] It should be understood that the above training process for the convolutional neural network model can be iteratively performed for multiple rounds until a preset training end condition is reached, for example, the training end condition can include that the training round reaches a specified round, the total loss has converged or is zero, etc., and the convolutional neural network model reaching the above training end condition is determined as the second prediction model; wherein a test set can also be set, and the model performance (such as accuracy, recall rate, etc.) of the trained convolutional neural network model is tested by the test set, if the model test result does not meet the preset standard, the convolutional neural network model can be further trained by constructing a second sample data set with larger data volume, until the model performance of the trained convolutional neural network model reaches the preset standard, and the second prediction model is obtained.

[0062] In step S14, the target yield of the wafer is determined according to the first prediction result and the second prediction result.

[0063] Among them, the results predicted by the first prediction model and the second prediction model can be integrated in a weighted distribution manner to make a final prediction, for example, the weighted average method or model weighted integration can be used. That is, the first prediction result and the second prediction result output by the first prediction model and the second prediction model (such as linear regression model and convolutional neural network model) can be weighted and summed to obtain the final prediction result, that is, the target yield of the wafer predicted.

[0064] Therefore, the above determination of the target yield of the wafer according to the first prediction result and the second prediction result can include: weighting and summing the first prediction result and the second prediction result based on a preset first weight coefficient corresponding to the first prediction model and a second weight coefficient corresponding to the second prediction model, to obtain the target yield of the wafer, and the sum of the first weight coefficient and the second weight coefficient is 1. This method can be understood as multiplying the prediction result of each model by a corresponding weight and weighting and summing them to obtain the final yield prediction value. The weighting method can be represented by formula (2):

[0065] Y final = W1 y linear + W2 y cnn (2)

[0066] Among them, W1 and W2 represent the first weight coefficient corresponding to the first prediction model and the second weight coefficient corresponding to the second prediction model, respectively, y linear represents the first prediction result output by the first prediction model, y cnn represents the second prediction result output by the second prediction model, and Y final represents the target yield predicted, by satisfying W1+W2=1, it can be ensured that the final prediction result is a reasonable weighted average value.

[0067] By combining the first prediction model (linear regression model) and the second prediction model (convolutional neural network model) and assigning different weight coefficients to them, the yield prediction can be realized by using the weighted ensemble model. In this way, the advantages of the two prediction models can be combined (i.e., the first prediction model extracts the defect density distribution and the second prediction model extracts the defect position distribution), and a more accurate yield prediction value (i.e., a more accurate target yield) can be obtained, thereby improving the accuracy and robustness of the prediction.

[0068] Optionally, the first weight coefficient and the second weight coefficient can be set according to the importance of the two prediction models combined with artificial experience, for example, the first weight coefficient corresponding to the first prediction model can be set to 0.6, and the second weight coefficient corresponding to the second prediction model can be set to 0.4.

[0069] Optionally, in order to obtain more accurate first weight coefficient and second weight coefficient, a new linear regression model can also be trained to optimize the first weight coefficient and the second weight coefficient, so that the finally predicted target yield is as close as possible to the true yield value. Or, a target regression model can also be directly trained to weight and sum the first prediction result and the second prediction result to obtain the predicted target yield. Therefore, the above determining the target yield of the wafer according to the first prediction result and the second prediction result can include:

[0070] Using the target regression model to output the target yield of the wafer according to the first prediction result and the second prediction result, wherein the parameters in the target regression model include the weight coefficient for weighting the first prediction result output by the first prediction model and the weight coefficient for weighting the second prediction result output by the second prediction model. Wherein, the target regression model can be represented as the linear regression model form shown in the above formula (2) (i.e., without bias term), or can also be represented as the linear regression model form shown in the above formula (1) (i.e., with bias term), and the embodiments of the present disclosure do not limit this.

[0071] The target regression model is used to output the target yield of the wafer according to the first prediction result and the second prediction result, which is equivalent to using the parameters in the target regression model to weight and sum the first prediction result and the second prediction result to obtain the target yield of the wafer. It should be understood that when the target regression model is in the form of the above formula (2), the parameters in the target regression model (i.e., the weight coefficients for weighting the first prediction result output by the first prediction model and the weight coefficients for weighting the second prediction result output by the second prediction model) can be determined as the first weight coefficient and the second weight coefficient, and the embodiments of the present disclosure do not limit this. For example, the target regression model can be trained using common regression methods (such as ridge regression and Lasso regression), and the embodiments of the present disclosure do not limit this.

[0072] In a possible implementation, the generation process of the target regression model can include:

[0073] obtaining a third sample data set including first sample prediction results, second sample prediction results, and real yields of a plurality of sample wafers, wherein the first sample prediction results include predicted yields of the sample wafers determined by the first prediction model, and the second sample prediction results include predicted yields of the sample wafers determined by the second prediction model;

[0074] using the initial regression model to output sample prediction yields of the sample wafers according to the first sample prediction results and the second sample prediction results of the sample wafers;

[0075] optimizing the parameters in the initial regression model according to the loss between the sample prediction yields of the sample wafers output by the initial regression model and the real yields of the sample wafers to obtain a target regression model.

[0076] It should be understood that the sample wafers used in the third sample data set can be the same batch of sample wafers as those used in the first sample data set and the second sample data set, or can be different batches of sample wafers, that is, the sample wafers used in the third sample data set can include all or part of the sample wafers used in the first sample data set and the second sample data set, or can use sample wafers different from those used in the first sample data set and the second sample data set, and the embodiments of the present disclosure do not limit this.

[0077] After the first prediction model is fitted using the first sample data set and the second prediction model is trained using the second sample data set, the first prediction model can be used to output first sample prediction results of each sample wafer based on sample defect density data of each sample wafer used in the third sample data set, and the second prediction model can be used to output second sample prediction results of each sample wafer based on sample defect distribution maps of each sample wafer used in the third sample data set. The true yields of each sample wafer used in the third sample data set can be detected by a wafer yield detection device known in the art or other detection techniques to obtain the third sample data set. It should be understood that if the sample wafers used in the third sample data set include the sample wafers used in the first sample data set and the second sample data set, the first sample prediction results and the second sample prediction results generated during the generation of the first prediction model and the training of the second prediction model can be directly obtained, and the corresponding true yields are not limited by the embodiments of the present disclosure for the acquisition method of the third sample data set.

[0078] Training the target regression model using the third sample data set is equivalent to training the target regression model by combining the true yields of the sample wafers with the prediction results of the two prediction models as new features. That is, the outputs of the two prediction models can be used as a new training set to train an initial regression model (such as a linear regression model) to learn the optimal weight coefficients, so that the prediction results (i.e., target yields) output by the trained target regression model are as close to the true yields as possible. The initial regression model can be in the form of the linear regression model shown in the above formula (2) (i.e., without a bias term) or in the form of the linear regression model shown in the above formula (1) (i.e., with a bias term), and the embodiments of the present disclosure do not limit this.

[0079] Using the initial regression model, the sample prediction yields of each sample wafer can be output based on the first sample prediction results and the second sample prediction results of each sample wafer, that is, the first sample prediction results and the second sample prediction results of each sample wafer are input into the initial regression model to obtain the sample prediction yields of each sample wafer output by the initial regression model. Then, the loss between the sample prediction yields of each sample wafer output by the initial regression model and the true yields of each sample wafer can be calculated to optimize the parameters in the initial regression model, that is, to optimize the weight coefficients for weighting the first prediction results output by the first prediction model and the weight coefficients for weighting the second prediction results output by the second prediction model in the initial regression model. When the initial regression model also includes a bias term parameter, the bias term parameter in the initial regression model can also be optimized.

[0080] The loss between the sample predicted yield of each sample wafer output by the initial regression model and the true yield of each sample wafer is used to optimize the parameters in the initial regression model, for example, the deviation between the sample predicted yield of each sample wafer and the true yield of each sample wafer can be calculated, and the sum, mean or mean square value of the deviation between the sample predicted yield and the true yield of each sample wafer in the plurality of sample wafers is calculated as the total loss, and then an optimization algorithm known in the art is used to optimize the parameters in the initial regression model based on the total loss to obtain the target regression model. It should be understood that the optimization process of the initial regression model described above can be iteratively performed for multiple rounds until a preset end condition is reached, for example, the end condition can include that the iteration round reaches a specified round, the total loss has converged or is zero, etc., so that the initial regression model that reaches the end condition is determined as the target regression model, and the target yield of the wafer is output according to the first prediction result and the second prediction result using the target regression model.

[0081] According to the wafer yield prediction method of the embodiments of the present disclosure, the first prediction model is used to predict the yield of the wafer according to the defect density data (i.e., the yield of the wafer is predicted based on the defect density distribution feature), and the second prediction model is used to predict the yield of the wafer based on the defect distribution map (i.e., the yield of the wafer is predicted based on the defect position distribution feature), which is equivalent to predicting the yield of the wafer from the defect density distribution and the defect position distribution respectively, so that the target yield of the wafer is determined according to the yields predicted by the two models, which can efficiently predict the more accurate target yield of the wafer by combining the respective advantages of the two prediction models (i.e., combining the defect density distribution and the defect position distribution), i.e., improving the accuracy and efficiency of wafer yield prediction.

[0082] Based on the steps S11 to S14 of the embodiments of the present disclosure described above, the embodiments of the present disclosure also provide Figure 2 A schematic diagram of a wafer yield prediction process is shown, as shown in Figure 2As shown, the prediction process includes: a data input stage, including inputting wafer defect density data and defect distribution image data (a two-dimensional image of wafer defects, that is, a kind of defect distribution map); a linear regression model training stage, including: linear regression modeling of defect density data, inputting defect density data, and outputting linear regression prediction results (i.e., first prediction results y_linear_pred); a CNN model training stage, including: convolutional neural network modeling of defect image data, inputting defect distribution image data, and outputting CNN prediction results (i.e., second prediction results y_cnn_pred); an integration stage, including: weighting and integrating the prediction results output by the two models, and optimizing weight coefficients W1 and W2 through a regression model (i.e., determining the first weight coefficient and the second weight coefficient by using a target regression model), inputting the first prediction results y_linear_pred and the second prediction results y_cnn_pred, and outputting weighted integrated prediction results (i.e., predicted target yield y_final_pred); a prediction and result output stage, including: using the final integrated model (i.e., a model obtained by integrating the first prediction model and the second prediction model using the first weight coefficient and the second weight coefficient) to predict new data, and outputting yield prediction results, inputting the trained integrated model and test data (i.e., new defect density data and defect distribution maps), and outputting final yield loss prediction results (i.e., outputting predicted target yield y_final_pred), and then the model can be deployed to an actual production environment to predict the yield of the wafer in real time.

[0083] In actual application, after obtaining the trained first prediction model, the second prediction model and the above-mentioned target regression model, the trained models can be deployed to a production environment and integrated into a yield management system to obtain defect density data and defect distribution maps of wafers in a production process in real time, so as to realize online prediction of the target yield of the wafer. In the yield management system, a warning mechanism can also be added, that is, if the predicted target yield is lower than a certain threshold, the system can trigger a warning to prompt the production line to adjust process parameters or check the equipment state.

[0084] In actual application, new sample data sets can also be collected periodically to incrementally train the models, so as to ensure that the models can adapt to changing production environments and process conditions, and the models can also be adjusted and optimized according to actual production results to ensure that the prediction accuracy improves over time. In addition, the prediction models can also be integrated with other production management systems to form a complete intelligent manufacturing system, realizing comprehensive optimization and intelligentization of the production process, and the embodiments of the present disclosure do not limit this.

[0085] The key of wafer yield prediction is how to efficiently and accurately analyze defect data and its impact on yield. The prediction method of the embodiments of the present disclosure can significantly improve the prediction efficiency and accuracy by introducing machine learning and deep learning, combined with regional analysis and visualization means, and provide effective support for subsequent defect analysis and yield improvement.

[0086] According to the prediction method of the embodiments of the present disclosure, the efficiency and accuracy of yield loss prediction can be greatly improved by using machine learning and deep learning methods. By constructing a prediction model, the yield can be directly predicted according to historical data and current defect data without analyzing each region one by one. By using a training set containing a large amount of historical wafer defect data (including defect type, location, distribution, density, etc.), a deep learning model (such as convolutional neural network, CNN) is trained to recognize the pattern of defects and predict the yield of each wafer. The concentrated area analysis of defects is realized, the defect distribution is analyzed by convolutional neural network (CNN), the concentrated area of defects on the wafer is automatically detected and marked, the manual intervention is reduced, and the analysis efficiency is improved.

[0087] According to the prediction method of the embodiments of the present disclosure, the regional analysis method can be used to simplify the calculation according to the characteristics of different regions on the wafer. For the defect density and yield in each region, a prediction model is constructed to analyze the regional defect density, and finally summarized into the prediction of the whole wafer. By dividing the wafer into different regions, the yield of the whole wafer is predicted based on the defect density of each region using a linear regression model based on the defect density of each region, which can reduce the global calculation amount. In addition, the defect distribution map is combined with the yield to generate a heat map, which can intuitively show the failure rate and yield loss of each region on the wafer, and facilitate subsequent defect analysis.

[0088] According to the prediction method of the embodiments of the present disclosure, the method can reduce the calculation cost. On a large-scale data set, the calculation amount required for each prediction can be reduced by using incremental learning and online learning methods, avoiding training by loading all data at once, thereby reducing the calculation cost.

[0089] According to the prediction method of the embodiments of the present disclosure, in order to facilitate the defect analysis work, the defect distribution map, the area defect density and the prediction result on the wafer can be intuitively displayed by integrating the visualization tool. For example, by using means such as heat map, 3D graphics or interactive chart, the yield of different areas can be quickly displayed to help engineers quickly find the concentrated area of defects and the potential problem source. In addition, the visualization of the concentrated area of defects can be realized, the concentrated area of defects is displayed by color depth through the heat map, and the key area affecting the yield can be quickly found by combining the actual production data and the yield heat map. In addition, the visualization of the prediction result can be realized, the yield loss prediction result is displayed in a graphical manner, the contribution of each area to the overall yield is clear, and more accurate adjustment and optimization can be made.

[0090] As described above, there is a significant negative correlation between wafer defect density and wafer yield. By effectively controlling and reducing the defect density, the yield of the wafer can be significantly improved, which is also an important goal in the semiconductor manufacturing process. By establishing a model between the defect density and the yield, the yield of the wafer can be predicted according to the defect density, which helps manufacturers to adjust the process parameters in time and optimize the production process, thereby improving the yield of the wafer. In turn, the yield of the wafer can be predicted in advance, the workload of the subsequent CP test can be reduced, the CP test cycle can be shortened, and the production efficiency of the memory chip can be improved.

[0091] The prediction method of the embodiments of the present disclosure realizes the innovative application of integrating linear regression and convolutional neural network. In the field of semiconductor yield prediction, traditional methods usually use linear regression or deep learning (CNN) methods alone, while the embodiments of the present disclosure propose a unique integrated method of combining linear regression and convolutional neural network (CNN) to output the final yield prediction result in a weighted manner. By integrating linear regression and CNN models, the advantages of both are used to improve the prediction effect, thereby improving the accuracy of yield loss prediction, especially in complex defect data processing. The embodiments of the present disclosure propose a weighted decision mechanism of the integrated method, that is, the prediction results of the two models are synthesized by assigning specific weights.

[0092] The prediction method of the embodiments of the present disclosure realizes the weight optimization training method, which uses the prediction results of the historical data (i.e., the prediction results generated by linear regression and CNN, respectively) as new feature inputs to further train a regression model to optimize the final weight coefficient, thereby determining the importance of each model in the final prediction. Instead of simply manually setting, this method optimizes the weight coefficient through a regression model, thereby improving the accuracy and adaptability of the model, which can dynamically adjust the weight according to different data sets. The embodiments of the present disclosure propose a weight optimization algorithm and a regression training step, that is, the weight in the integrated model is optimized by the training set to improve the prediction accuracy.

[0093] The prediction method of the embodiments of the present disclosure realizes the prediction of input feature design based on defect density. Innovatively, the defect density (including the defect density of the edge region and the center region) is taken as a key input feature for predicting yield, instead of relying only on traditional single defect data (such as the number of defects, position, etc.). By taking the defect density of different regions on the wafer as an independent feature, the influence of defects in different regions on yield can be more accurately reflected, and the accuracy and delicacy of the prediction model are enhanced. The embodiments of the present disclosure propose a defect density region division and region feature extraction method, that is, a prediction model is constructed by calculating the defect density in different regions.

[0094] The prediction method of the embodiments of the present disclosure realizes the application of a deep learning model based on a defect distribution image. In traditional defect detection and yield prediction, image data is rarely used for prediction. However, the present technology processes the defect distribution map (such as a heat map, a two-dimensional defect coordinate map) of the wafer through a convolutional neural network model, automatically learns the defect pattern, and predicts yield loss. The convolutional neural network model can automatically extract features from complex defect distribution images and has strong spatial information processing capability, which can more effectively identify potential influencing factors than traditional numerical methods. The embodiments of the present disclosure propose a defect distribution map processing method, that is, a technology for inputting image data into a CNN and predicting yield loss.

[0095] The prediction method of the embodiments of the present disclosure realizes an integrated method for improving prediction efficiency. Not only is there innovation in improving prediction accuracy, but also a method for improving prediction efficiency is proposed. By combining traditional linear regression with deep learning, the high computational cost and low efficiency of a single model in complex problems are avoided. By integrating two different prediction models (linear regression model and CNN model), efficient processing of complex defect data is realized, which can significantly improve the efficiency of prediction, especially in large-scale production data. The embodiments of the present disclosure propose a calculation efficiency optimization method for integrated models, that is, how to combine different models and methods to improve the calculation efficiency of the prediction process.

[0096] The prediction method of the embodiments of the present disclosure realizes a weighting mechanism for dynamically adjusting model output. Unlike traditional static model weight settings, the weights of linear regression and CNN output are dynamically adjusted to adapt to changes in different data sets and different process conditions. Dynamic weight adjustment means that the model can automatically adjust according to actual conditions, data changes, and actual prediction errors, increase the influence of a certain prediction model on the final prediction result, and thus improve the flexibility and accuracy of prediction. The embodiments of the present disclosure propose a dynamic adjustment method for the weighting mechanism, that is, automatically adjusting the weights of linear regression and CNN output according to different data and process conditions.

[0097] Figure 3 A block diagram of a wafer yield prediction device according to an embodiment of the present disclosure is shown as follows:Figure 3 The apparatus shown includes:

[0098] The acquisition module 301 is configured to acquire defect density data and a defect distribution map of a wafer to be predicted, the defect density data including area defect densities of a plurality of areas of the wafer, and the defect distribution map indicating a position distribution of defects on the wafer.

[0099] The first prediction module 302 is configured to determine a first prediction result according to the defect density data by using a first prediction model, the first prediction result indicating a yield of the wafer predicted by the first prediction model.

[0100] The second prediction module 303 is configured to determine a second prediction result according to the defect distribution map by using a second prediction model, the second prediction result indicating a yield of the wafer predicted by the second prediction model.

[0101] The target determination module 304 is configured to determine a target yield of the wafer according to the first prediction result and the second prediction result.

[0102] In a possible implementation, the acquisition of the defect density data and the defect distribution map of the wafer to be predicted includes: determining a plurality of areas of the wafer and a number of defects in each area according to a preset area division manner, and determining a ratio between the number of defects in each area and an area of each area as an area defect density of each area; and generating the defect distribution map according to positions of the defects on the wafer.

[0103] In a possible implementation, the first prediction model includes a linear regression model, and a generation process of the first prediction model includes: acquiring a first sample data set including sample defect density data of a plurality of sample wafers and real yields corresponding to the sample wafers; and fitting parameters in a preset linear regression model by using the first sample data set to obtain the first prediction model.

[0104] In a possible implementation, the second prediction model includes a convolutional neural network model, and a training process of the second prediction model includes: acquiring a second sample data set including sample defect distribution maps of a plurality of sample wafers and real yields corresponding to the sample wafers; outputting sample prediction results of the sample wafers by using a preset convolutional neural network model according to the sample defect distribution maps of the sample wafers, the sample prediction results indicating predicted yields of the sample wafers output by the convolutional neural network model; and optimizing parameters in the convolutional neural network model according to a loss between the predicted yields of the sample wafers and the real yields of the sample wafers to obtain the trained second preset model.

[0105] In a possible implementation, the determining the target yield of the wafer according to the first prediction result and the second prediction result comprises: performing weighted summation on the first prediction result and the second prediction result based on a first weight coefficient corresponding to the first prediction model and a second weight coefficient corresponding to the second prediction model, to obtain the target yield of the wafer, and a sum of the first weight coefficient and the second weight coefficient is 1.

[0106] In a possible implementation, the determining the target yield of the wafer according to the first prediction result and the second prediction result comprises: outputting the target yield of the wafer according to the first prediction result and the second prediction result by using a target regression model, wherein parameters in the target regression model include a weight coefficient for weighting the first prediction result output by the first prediction model and a weight coefficient for weighting the second prediction result output by the second prediction model.

[0107] In a possible implementation, the generation process of the target regression model comprises: obtaining a third sample data set, the third sample data set including first sample prediction results, second sample prediction results and real yields of a plurality of sample wafers, wherein the first sample prediction results include predicted yields of the sample wafers determined by using the first prediction model, and the second sample prediction results include predicted yields of the sample wafers determined by using the second prediction model; outputting sample predicted yields of the sample wafers according to the first sample prediction results and the second sample prediction results of the sample wafers by using an initial regression model; and optimizing parameters in the initial regression model according to a loss between the sample predicted yields of the sample wafers output by the initial regression model and the real yields of the sample wafers, to obtain the target regression model.

[0108] According to the wafer yield prediction apparatus, the first prediction model is used to predict the yield of the wafer according to the defect density data (i.e., the yield of the wafer is predicted based on the defect density distribution feature), the second prediction model is used to predict the yield of the wafer based on the defect distribution map (i.e., the yield of the wafer is predicted based on the defect position distribution feature), which means that the yield of the wafer is predicted based on the defect density distribution and the defect position distribution respectively, and then the target yield of the wafer is determined according to the yields predicted by the two models, so that the target yield of the wafer can be predicted efficiently and accurately by combining the advantages of the two prediction models (i.e., the defect density distribution and the defect position distribution), and the accuracy and efficiency of the wafer yield prediction are improved.

[0109] In some embodiments, the apparatus provided by the embodiments of the present disclosure has functions or includes modules that can be used to perform the methods described in the above method embodiments, and specific implementation can be referred to the description of the above method embodiments. For brevity, details are not described here again.

[0110] The embodiments of the present disclosure also provide a computer readable storage medium having stored thereon computer program instructions, which when executed by a processor, implement the above method. The computer readable storage medium can be a volatile or non-volatile computer readable storage medium.

[0111] The embodiments of the present disclosure also provide an electronic device, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0112] The embodiments of the present disclosure also provide a computer program product, comprising computer readable code, or a non-volatile computer readable storage medium carrying computer readable code, when the computer readable code is run in the processor of an electronic device, the processor in the electronic device executes the above method.

[0113] Figure 4 A block diagram of an electronic device 1900 according to an embodiment of the present disclosure is shown. For example, the electronic device 1900 can be provided as a server or a terminal device. Referring to Figure 4 , the electronic device 1900 includes a processing component 1922, which further includes one or more processors, and memory resources represented by a memory 1932, for storing instructions executable by the processing component 1922, such as application programs. The application programs stored in the memory 1932 can include one or more than one module each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute instructions to perform the above method.

[0114] The electronic device 1900 can also include a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input output interface 1958 (I / O interface). The electronic device 1900 can operate based on an operating system stored in the memory 1932, such as Windows Server TM , Mac OS X TM , Unix TM , Linux TM , FreeBSD TM or the like.

[0115] In an example embodiment, a non-transitory computer-readable storage medium, such as the memory 1932 including computer program instructions, is also provided, which can be executed by the processing component 1922 of the electronic device 1900 to complete the above method.

[0116] The present disclosure can be a system, a method, and / or a computer program product. The computer program product can include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present disclosure.

[0117] The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium can be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or punched tape, a

[0118] The computer readable program instructions described herein can be downloaded to respective computing / processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and / or a wireless network. The network can comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and / or edge servers. A network adapter card or network interface in each computing / processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing / processing device.

[0119] Computer readable program instructions for carrying out operations of the present disclosure can be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate array (FPGA), or programmable logic array (PLA) can execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present disclosure.

[0120] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0121] These computer readable program instructions can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks. These computer readable program instructions can also be stored in a computer readable storage medium that can include random access memory (RAM), read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory or other data storage device. When the computer readable program instructions are loaded into the computer and other programmable data processing apparatus, a series of operational steps are implemented that provide processes such that the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0122] The computer readable program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer, other programmable data processing apparatus, or other device implement the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0123] The flow diagrams and the block diagrams in the drawings are presented to illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flow diagrams and the block diagrams can represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logic functions. In some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks can sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flow diagrams, and combinations thereof, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and

[0124] Embodiments of the present disclosure have been described above, and the description is intended to be illustrative of the embodiments and not restrictive. Many modifications and variations of the described embodiments are possible and are within the scope of the disclosure. The selection of terms is intended to best describe the principles of the embodiments, practical application, or technical improvements in the art, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A wafer yield prediction method, characterized by, The method comprises: obtaining defect density data and a defect distribution map of a wafer to be predicted, wherein the defect density data comprises area defect densities of a plurality of regions of the wafer, and the defect distribution map indicates a position distribution of defects on the wafer; determining a first prediction result according to the defect density data by using a first prediction model, wherein the first prediction result indicates a yield of the wafer predicted by the first prediction model; determining a second prediction result according to the defect distribution map by using a second prediction model, wherein the second prediction result indicates a yield of the wafer predicted by the second prediction model; determining a target yield of the wafer according to the first prediction result and the second prediction result.

2. The method of claim 1, wherein, The method comprises: determining a plurality of regions of the wafer and a number of defects in each region according to a preset region division manner, and determining a ratio between the number of defects in each region and an area of each region as an area defect density of each region; generating a defect distribution map according to positions of the defects on the wafer.

3. The method of claim 1, wherein, The first prediction model comprises a linear regression model, and a generation process of the first prediction model comprises: obtaining a first sample data set comprising sample defect density data of a plurality of sample wafers and a real yield corresponding to each sample wafer; fitting parameters in a preset linear regression model by using the first sample data set to obtain the first prediction model.

4. The method of claim 1, wherein, The second prediction model comprises a convolutional neural network model, and a training process of the second prediction model comprises: obtaining a second sample data set comprising sample defect distribution maps of a plurality of sample wafers and a real yield corresponding to each sample wafer; outputting a sample prediction result of each sample wafer according to the sample defect distribution map of each sample wafer by using a preset convolutional neural network model, wherein the sample prediction result indicates a predicted yield of the sample wafer output by the convolutional neural network model; optimizing parameters in the convolutional neural network model according to a loss between the predicted yield of each sample wafer and the real yield of each sample wafer to obtain the trained second preset model.

5. The method of claim 1, wherein, The method comprises: performing weighted summation on the first prediction result and the second prediction result based on a first weight coefficient corresponding to the first prediction model and a second weight coefficient corresponding to the second prediction model to obtain the target yield of the wafer, wherein a sum of the first weight coefficient and the second weight coefficient is 1.

6. The method of claim 1, wherein, The method comprises: outputting the target yield of the wafer according to the first prediction result and the second prediction result by using a target regression model, wherein parameters in the target regression model comprise a weight coefficient for weighting the first prediction result output by the first prediction model and a weight coefficient for weighting the second prediction result output by the second prediction model.

7. The method of claim 6, wherein, The generation process of the target regression model comprises: obtaining a third sample data set comprising first sample prediction results, second sample prediction results and true yields of a plurality of sample wafers, wherein the first sample prediction results comprise predicted yields of the sample wafers determined by using the first prediction model, and the second sample prediction results comprise predicted yields of the sample wafers determined by using the second prediction model; outputting sample predicted yields of the sample wafers according to the first sample prediction results and the second sample prediction results of the sample wafers by using an initial regression model; optimizing parameters in the initial regression model according to a loss between the sample predicted yields of the sample wafers output by the initial regression model and the true yields of the sample wafers, to obtain the target regression model.

8. A wafer yield prediction device, characterized by comprising: comprise: an acquisition module, configured to acquire defect density data and a defect distribution map of a wafer to be predicted, wherein the defect density data comprises area defect densities of a plurality of areas of the wafer, and the defect distribution map indicates a position distribution of defects on the wafer; a first prediction module, configured to determine a first prediction result according to the defect density data by using a first prediction model, wherein the first prediction result indicates a yield of the wafer predicted by the first prediction model; a second prediction module, configured to determine a second prediction result according to the defect distribution map by using a second prediction model, wherein the second prediction result indicates a yield of the wafer predicted by the second prediction model; a target determination module, configured to determine a target yield of the wafer according to the first prediction result and the second prediction result.

9. An electronic device, comprising: comprise: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to implement the method in any one of claims 1 to 7 when executing the instructions stored in the memory.

10. A non-transitory computer readable storage medium having stored thereon computer program instructions, wherein, The computer program instructions, when executed by the processor, implement the method in any one of claims 1 to 7. The computer program instructions, when executed by the processor, implement the method in any one of claims 1 to 7.

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