Slot offset determination for non-terrestrial networks

Abstract

The invention relates to slot offset determination for non-terrestrial networks. A method of slot offset determination for a non-terrestrial network, the method comprising: receiving a physical downlink control channel (PDCCH), the PDCCH comprising downlink control information (DCI) that schedules transmission of a physical uplink shared channel (PUSCH); and receiving a slot offset for the transmission of the PUSCH. An additional slot offset is determined based on the timing advance value. A total slot offset is determined based on the slot offset and the additional slot offset. The PUSCH is transmitted based on the total slot offset and the timing advance value.

Description

[0001] This application is a divisional application of an invention patent application with an application date of May 8, 2020, application number 202080048112.8, and titled "Time Slot Offset Determination for Non-Terrestrial Networks".

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This patent application claims priority to U.S. Provisional Patent Application No. 62 / 846,332 filed on May 10, 2019 and U.S. Provisional Patent Application No. 62 / 864,700 filed on June 21, 2019. The entire contents of the above applications are incorporated herein by reference. Technical Field

[0004] The present disclosure relates generally to wireless communications, including wireless communications in non-terrestrial networks. Background Art

[0005] Wireless communications have evolved significantly from early voice systems to today's highly complex integrated communications platforms. The next generation of wireless communications systems, fifth generation new radio (5G NR), will extend wireless communications to operate very different users and sometimes conflicting services and applications. In general, 5G NR will evolve based on the 3rd Generation Partnership Project (3GPP) Long Term Evolution Advanced (LTE-Advanced) standard with the addition of potential new radio access technologies (RATs) to improve wireless connectivity solutions. Summary of the invention

[0006] In general, in one aspect, a method includes: receiving a physical downlink control channel (PDCCH) including downlink control information (DCI) for scheduling transmission of a physical uplink shared channel (PUSCH); and receiving a time slot offset for transmission of the PUSCH. Determining an additional time slot offset based on a timing advance value. Determining a total time slot offset based on the time slot offset and the additional time slot offset. Transmitting the PUSCH based on the total time slot offset and the timing advance value.

[0007] In general, in one aspect, a user equipment (UE) device includes a transceiver, one or more processors, and a memory storing instructions that, when executed by the one or more processors, cause the one or more processors to perform operations including: receiving, by the transceiver, a PDCCH including a DCI that schedules the transmission of a PUSCH; receiving, by the transceiver, a time slot offset for the transmission of the PUSCH; determining, by the transceiver, an additional time slot offset based on a timing advance value; determining a total time slot offset based on the time slot offset and the additional time slot offset; and transmitting, by the transceiver, the PUSCH based on the total time slot offset and the timing advance value.

[0008] In general, in one aspect, a non-transitory computer-readable storage medium stores instructions that, when executed by one or more processors, cause the one or more processors to perform operations including: receiving a PDCCH that includes a DCI that schedules the transmission of a PUSCH; receiving a time slot offset for the transmission of the PUSCH; determining an additional time slot offset based on a timing advance value; determining a total time slot offset based on the time slot offset and the additional time slot offset; and transmitting the PUSCH based on the total time slot offset and the timing advance value.

[0009] In general, in one aspect, a method includes transmitting a PDCCH to a UE, the PDCCH including a DCI for scheduling transmission of a PUSCH; transmitting a time slot offset and a timing advance value for transmission of the PUSCH to the UE; and receiving the PUSCH from the UE, wherein the PUSCH is transmitted based on the timing advance and a total time slot offset, the total time slot offset being determined based on the time slot offset and an additional time slot offset derived from the timing advance.

[0010] In general, in one aspect, a base station (BS) includes a transceiver, one or more processors, and a memory storing instructions that, when executed by the one or more processors, cause the one or more processors to perform operations including: transmitting a PDCCH to a UE and by the transceiver, the PDCCH including a DCI that schedules transmission of a PUSCH; transmitting a time slot offset and a timing advance value for transmission of the PUSCH to the UE and by the transceiver; and receiving the PUSCH from the UE and by the transceiver, wherein the PUSCH is transmitted based on the timing advance and the total time slot offset, the total time slot offset being determined based on the time slot offset and an additional time slot offset derived from the timing advance.

[0011] In general, in one aspect, a non-transitory computer-readable storage medium stores instructions that, when executed by one or more processors, cause the one or more processors to perform operations including: transmitting a PDCCH to a UE, the PDCCH including a DCI that schedules transmission of a PUSCH; transmitting a time slot offset and a timing advance value for transmission of the PUSCH to the UE; and receiving the PUSCH from the UE, wherein the PUSCH is transmitted based on the timing advance and a total time slot offset, the total time slot offset being determined based on the time slot offset and an additional time slot offset derived from the timing advance.

[0012] Implementations of any of the above aspects may include one or a combination of two or more of the following features.

[0013] The total time slot offset may be determined based on the sum of the time slot offset and the additional time slot offset. The time slot offset may be received from a non-terrestrial base station. The additional time slot offset may be determined by applying an upper limit function to the timing advance value in the time slot. The additional time slot offset may be determined by applying a lower limit function to the timing advance value in the time slot. In some examples, the timing advance value is received in a random access response (RAR). In some examples, the additional time slot offset is determined based on a full timing advance value including a timing advance adjustment. In other examples, the additional time slot offset is determined based on a common component of the timing advance value. The common component of the timing advance value may be indicated in a system information block (SIB) or a physical broadcast channel (PBCH). In some examples, the additional time slot offset is determined based on a differential component of the timing advance value. The differential component of the timing advance value may be indicated in the RAR. In some examples, the additional time slot offset is determined based on the common component of the timing advance value and the differential component of the timing advance value, which may also include any adjustments to the timing advance value. At least one of the common component or the differential component may be determined based on one or more network parameters, the one or more network parameters including at least one of a location of an airborne platform or a space platform in a non-terrestrial network (NTN) or a location of a UE. In some examples, a configuration message is received indicating whether the total time slot offset is determined based on a time slot offset or based on a time slot offset and an additional time slot offset. The configuration message may be received in a RAR, in a SIB, in a PBCH, or from higher layer signaling.

[0014] The details of one or more specific implementations are set forth in the following figures and description. The techniques described herein may be implemented by one or more wireless communication systems, components of wireless communication systems (e.g., user equipment, base stations), or other systems, devices, methods, or non-transitory computer-readable media, etc. Other features and advantages will be apparent in the detailed description and drawings, as well as in the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 An exemplary wireless communication system is shown.

[0016] Figure 2 An example of infrastructure equipment is shown.

[0017] Figure 3 Examples of platforms or devices are shown.

[0018] Figure 4 Exemplary components of baseband circuitry and radio front-end circuitry are shown.

[0019] Figure 5 Exemplary protocol functions that may be implemented in a wireless communication system are shown.

[0020] Figure 6An exemplary computer system is shown.

[0021] Fig. 7A and Figure 7B An example of a non-terrestrial network (NTN) is shown.

[0022] Figure 8 An example of time domain resource allocation for a physical uplink shared channel (PUSCH) with a large timing advance (TA) is shown.

[0023] Fig. 9 An example of signal propagation delay in an NTN is shown.

[0024] Fig.10 and Fig.11 An exemplary process for slot offset determination is shown.

[0025] Like reference symbols in the various drawings indicate like elements. DETAILED DESCRIPTION

[0026] In order to increase network coverage and support various use cases beyond the capabilities of ground-based infrastructure, 3GPP has released standards for integrating non-terrestrial networks (NTNs) into the 5G NR framework. Generally speaking, an NTN includes a network or a segment of a network that uses an aerial platform or a space platform to access a transmission equipment relay node or base station. Due to this configuration, communications between user equipment and base stations in NTNs typically experience large signal propagation delays. The 5G NR framework provides timing advances to offset propagation delays and time-align uplink signals received at the base station, but offsetting large propagation delays requires larger timing advance values, which can affect other aspects of resource allocation, such as time domain resource allocation for physical uplink shared channel (PUSCH) transmissions.

[0027] To avoid non-causal time domain resource allocation for PUSCH transmissions and to accommodate the large propagation delays (and timing advance values) commonly seen in NTNs, the techniques described herein define an additional time slot offset denoted S, which may be in addition to the time slot offset K indicated for PUSCH transmissions. 2 The additional time slot offset S value can be derived based on the timing advance value (or the component of the timing advance value) in the time slot (denoted as G). By effectively increasing the time slot offset K 2In the context of NTN networks, the techniques described herein provide greater flexibility in time domain resource allocation, which allows the network to schedule PUSCH and other uplink transmissions in a manner that meets causal requirements, provides sufficient time for UE processing and accommodates large timing advance values, among other benefits. Since the additional slot offset can be derived from the timing advance, no additional signaling from the base station is required. Although discussed in the context of resource allocation for PUSCH transmissions in NTN networks, the techniques described herein are applicable to allocations for other uplink transmissions in any 5G NR network, such as physical uplink control channel (PUCCH) transmissions with hybrid automatic repeat request (HARQ) feedback, especially those with large cell sizes.

[0028] Figure 1 An exemplary wireless communication system 100 is shown. For convenience and not limitation, the exemplary system 100 is described in the context of LTE and 5G NR communication standards defined by the 3GPP technical specifications. However, the techniques described herein may also be implemented in other communication systems using other communication standards such as other 3GPP standards or IEEE 802.16 protocols (e.g., WMAN or WiMAX).

[0029] System 100 includes UE 101a and UE 101b (collectively referred to as "UE 101"). In this example, UE 101 is shown as a smartphone (eg, a handheld, touch-screen mobile computing device that can connect to one or more cellular networks). In other examples, any of the multiple UEs 101 may include other mobile computing devices or non-mobile computing devices, such as consumer electronic devices, cellular phones, smart phones, feature phones, tablet computers, wearable computer devices, personal digital assistants (PDAs), pagers, wireless handheld devices, desktop computers, laptop computers, in-vehicle infotainment (IVI), in-car entertainment (ICE) devices, instrument clusters (ICs), heads-up display (HUD) devices, on-board diagnostic (OBD) devices, on-board mobile equipment (DME), mobile data terminals (MDTs), electronic engine management systems (EEMS), electronic / engine control units (ECUs), electronic / engine control modules (ECMs), embedded systems, microcontrollers, control modules, engine management systems (EMS), networked or "smart" appliances, machine type communication (MTC) devices, machine-to-machine (M2M) devices, Internet of Things (IoT) devices, or combinations thereof, etc.

[0030] In some examples, any one of the plurality of UEs 101 may be an IoT UE, which may include a network access layer designed for low-power IoT applications utilizing short-term UE connections. The IoT UE may utilize technologies such as M2M or MTC to exchange data with an MTC server or device utilizing, for example, a public land mobile network (PLMN), a proximity service (ProSe), a device-to-device (D2D) communication, a sensor network, an IoT network, or a combination thereof. M2M or MTC data exchange may be a machine-initiated data exchange. The IoT network describes interconnected IoT UEs, which may include uniquely identifiable embedded computing devices (within the Internet infrastructure) with short-lived connections. The IoT UE may execute background applications (e.g., keep-alive messages, status updates, etc.) to facilitate the connection of the IoT network. In some examples, the UE 101 may be a narrowband (NB)-IoT UE 101. NB-IoT uses a physical layer optimized for extremely low power consumption (e.g., a full carrier BW of 180kHz, and a subcarrier spacing of 3.75kHz or 15kHz) to provide access to network services. A number of E-UTRA functions are not used for NB-IoT and do not need to be supported by the RAN node 111 and UE 101 that use only NB-IoT. Examples of such E-UTRA functions may include inter-RAT mobility, handover, measurement reporting, public warning function, GBR, CSG, support of HeNB, relay, carrier aggregation, dual connectivity, NAICS, MBMS, real-time services, interference avoidance for in-device coexistence, RAN-assisted WLAN interworking, sidelink communication / discovery, MDT, emergency calls, CS fallback, and self-configuration / self-optimization, etc. In NB-IoT operation, the UE 101 may use 12 subcarriers with a subcarrier BW of 15 kHz in the downlink and a single subcarrier with a subcarrier BW of 3.75 kHz or 15 kHz in the uplink, or alternatively use 3, 6, or 12 subcarriers with a subcarrier BW of 15 kHz.

[0031] In various examples, the UE 101 may be a MulteFire (MF) UE 101. An MF UE 101 is an LTE-based UE 101 that operates (exclusively) in an unlicensed spectrum. The unlicensed spectrum is defined in the MF specifications provided by the MulteFire Forum and may include, for example, 1.9 GHz (Japan), 3.5 GHz, and 5 GHz. MulteFire is closely aligned with 3GPP standards and builds on elements of the 3GPP specifications for LAA / eLAA, thereby enhancing standard LTE to operate in a global unlicensed spectrum. In some examples, LBT may be implemented to coexist with other unlicensed spectrum networks (such as WiFi, other LAA networks, etc.). In various examples, some or all UEs 101 may be NB-IoT UEs 101 operating in accordance with MF. In such examples, these UEs 101 may be referred to as "MF NB-IoT UE 101", however, unless otherwise specified, the term "NB-IoT UE 101" may refer to "MF UE 101" or "MF and NB-IoT UE 101". Therefore, the terms "NB-IoT UE 101", "MF UE 101" and "MF NB-IoT UE 101" may be used interchangeably throughout the present disclosure.

[0032] UE 101 is configured to connect (e.g., be communicatively coupled) to an access network (AN) or radio access network (RAN) 110. In some examples, RAN 110 may be a next generation RAN (NG RAN), an evolved UMTS terrestrial radio access network (E-UTRAN), or a traditional RAN, such as a UMTS terrestrial radio access network (UTRAN) or a GSM EDGE radio access network (GERAN). As used herein, the term "NG RAN" or the like may refer to a RAN 110 operating in a 5G NR system 100, while the term "E-UTRAN" or the like may refer to a RAN 110 operating in an LTE or 4G system 100, and the term "MF RAN" or the like refers to a RAN 110 operating in an MF system 100. Multiple UEs 101 utilize connections (or channels) 103 and 104, respectively, each connection including a physical communication interface or layer (discussed in further detail below). Connections 103 and 104 may include several different physical DL channels and several different physical UL channels. As an example, the physical DL channel includes PDSCH, PMCH, PDCCH, EPDCCH, MPDCCH, R-PDCCH, SPDCCH, PBCH, PCFICH, PHICH, NPBCH, NPDCCH, NPDSCH and / or any other physical DL channel mentioned herein. For example, the physical UL channel includes PRACH, PUSCH, PUCCH, SPUCCH, NPRACH, NPUSCH and / or any other physical UL channel mentioned herein.

[0033] In order to connect to RAN 110, multiple UEs 101 utilize connections (or channels) 103 and 104, respectively, each of which may include a physical communication interface or layer, as described below. In this example, connections 103 and 104 are shown as air interfaces to achieve communication coupling, and may be consistent with cellular communication protocols, such as global system for mobile communications (GSM) protocols, code division multiple access (CDMA) network protocols, push-to-talk (PTT) protocols, cellular PTT (POC) protocols, universal mobile telecommunications system (UMTS) protocols, 3GPP LTE protocols, 5G NR protocols, or combinations thereof, as well as other communication protocols. In some examples, multiple UEs 101 may use interfaces 105 such as ProSe interfaces to directly exchange communication data. Interface 105 may alternatively be referred to as sidelink interface 105 and may include one or more logical channels, such as physical sidelink control channel (PSCCH), physical sidelink shared channel (PSSCH), physical sidelink downlink channel (PSDCH) or physical sidelink broadcast channel (PSBCH) or combinations thereof, etc.

[0034] UE 101b is shown configured to access access point (AP) 106 (also referred to as "WLAN node 106", "WLAN 106", "WLAN termination 106", "WT 106", etc.) using connection 107. Connection 107 may include a local wireless connection, such as a connection consistent with any IEEE 802.11 protocol, wherein AP 106 will include wireless fidelity Router. In this example, AP 106 is shown connected to the Internet without being connected to the core network of the wireless system, as described in further detail below. In various examples, UE 101b, RAN 110 and AP 106 may be configured to use LTE-WLAN aggregation (LWA) operation or LTW / WLAN radio level operation integrated with IPsec tunnel (LWIP). LWA operation may involve UE 101b in RRC_CONNECTED state being configured by RAN nodes 111a, 111b to utilize radio resources of LTE and WLAN. LWIP operation may involve UE 101b using IPsec protocol tunnel to use WLAN radio resources (e.g., connection 107) to authenticate and encrypt packets (e.g., IP packets) sent through connection 107. IPsec tunnel transmission may include encapsulating the entire original IP packet and adding a new packet header, thereby protecting the original header of the IP packet.

[0035] The RAN 110 includes one or more AN nodes or RAN nodes 111a and 111b (collectively referred to as "RAN nodes 111") that enable connections 103 and 104. As used herein, the terms "access node", "access point", etc. may describe equipment that provides radio baseband functions for data or voice connections or both between a network and one or more users. These access nodes may be referred to as base stations (BS), gNodeBs, gNBs, eNodeBs, eNBs, NodeBs, RAN nodes, road side units (RSUs), transmit receive points (TRxPs or TRPs), etc., and may include ground stations (e.g., terrestrial access points) or satellite stations that provide coverage within a geographic area (e.g., a cell), etc. As used herein, the terms "NG RAN nodes" and the like may refer to RAN nodes 111 (e.g., gNBs) operating in a 5G NR system 100, while the term "E-UTRAN node" may refer to RAN nodes 111 (e.g., eNBs) operating in an LTE or 4G system 100. In some examples, multiple RAN nodes 111 may be implemented as one or more of dedicated physical devices such as macrocell base stations or low power (LP) base stations for providing femtocells, picocells, or other similar cells with smaller coverage areas, smaller user capacity, or higher bandwidth than macrocells.

[0036] In some examples, some or all of the multiple RAN nodes 111 may be implemented as one or more software entities running on a server computer as part of a virtual network that may be referred to as a cloud RAN (CRAN) or a virtual baseband unit pool (vBBUP). The CRAN or vBBUP may implement RAN functional partitioning, such as a packet data convergence protocol (PDCP) partitioning, where the radio resource control (RRC) and PDCP layers are operated by the CRAN / vBBUP, and other layer 2 (e.g., data link layer) protocol entities are operated by individual RAN nodes 111; a medium access control (MAC) / physical layer (PHY) partitioning, where the RRC, PDCP, MAC, and radio link control (RLC) layers are operated by the CRAN / vBBUP, and the PHY layer is operated by individual RAN nodes 111; or a "lower PHY" partitioning, where the RRC, PDCP, RLC, and MAC layers and the upper portion of the PHY layer are operated by the CRAN / vBBUP, and the lower portion of the PHY layer is operated by individual RAN nodes 111. This virtualization framework allows idle processor cores of the RAN nodes 111 to execute, for example, other virtualized applications. In some examples, individual RAN nodes 111 may represent nodes using respective F1 interfaces ( Figure 1 In some examples, the gNB-DU may include one or more remote radio heads or RFEMs (see, e.g., Figure 2 ), and the gNB-CU may be operated by a server (not shown) located in the RAN 110 or by a server pool in a manner similar to the CRAN / vBBUP. In addition or alternatively, one or more of the RAN nodes 111 may be a next generation eNB (ng-eNB), including a RAN node that provides E-UTRA user plane and control plane protocol terminals to the UE 101 and is connected to a 5G core network (e.g., the core network 120) using a next generation interface.

[0037] In a vehicle-to-everything (V2X) scenario, one or more of the RAN nodes 111 may be or act as an RSU. The term "roadside unit" or "RSU" refers to any traffic infrastructure entity used for V2X communication. The RSU may be implemented in or by a suitable RAN node or a stationary (or relatively stationary) UE, wherein an RSU implemented in or by a UE may be referred to as a "UE-type RSU", an RSU implemented in or by an eNB may be referred to as an "eNB-type RSU", an RSU implemented in or by a gNB may be referred to as a "gNB-type RSU", and so on. In some examples, the RSU is a computing device coupled to a radio frequency circuit located on the road side that provides connectivity support to a passing vehicle UE 101 (vUE 101). The RSU may also include internal data storage circuitry for storing intersection map geometry, traffic statistics, media, and applications or other software for sensing and controlling ongoing vehicle and pedestrian traffic. The RSU may operate on the 5.9 GHz Direct Short Range Communications (DSRC) band to provide extremely low latency communications required for high-speed events, such as collision avoidance, traffic warnings, and the like. In addition or alternatively, the RSU may operate on the cellular V2X band to provide the aforementioned low latency communications as well as other cellular communications services. In addition or alternatively, the RSU may operate as a Wi-Fi hotspot (2.4 GHz band) or provide connectivity to one or more cellular networks to provide uplink and downlink communications, or both. Some or all of the computing device and the RSU's RF circuitry may be packaged in a weather-resistant enclosure suitable for outdoor installation, and may include a network interface controller to provide a wired connection (e.g., Ethernet) to a traffic signal controller or a backhaul network, or both.

[0038] Any of the RAN nodes 111 may serve as an endpoint for the air interface protocol and may be the first point of contact for the UE 101. In some examples, any of the multiple RAN nodes 111 may perform various logical functions of the RAN 110, including but not limited to functions of a radio network controller (RNC), such as radio bearer management, uplink and downlink dynamic radio resource management and data packet scheduling, and mobility management.

[0039] In some examples, multiple UEs 101 may be configured to communicate with each other or with any of multiple RAN nodes 111 over a multi-carrier communication channel using orthogonal frequency division multiplexing (OFDM) communication signals according to various communication techniques, such as, but not limited to, OFDMA communication techniques (e.g., for downlink communications) or SC-FDMA communication techniques (e.g., for uplink and ProSe or sidelink communications), although the scope of the techniques described herein is not limited in this respect. The OFDM signal may include multiple orthogonal subcarriers.

[0040] In some examples, downlink (DL) transmissions and uplink (UL) transmissions may be organized into frames having a duration of 10 ms, where each frame includes ten 1 ms subframes. The slot duration may be 14 symbols with a normal CP and 12 symbols with an extended CP, and may be time-scaled as a function of the subcarrier spacing used, so that there is always an integer number of slots in a subframe. In some examples, such as LTE implementations, a DL resource grid may be used for DL ​​transmissions from any RAN node 111 to UE 101, and UL transmissions from UE 101 to RAN node 111 may utilize a suitable UL resource grid in a similar manner. These resource grids may refer to a time-frequency grid and indicate the physical resources in the DL or UL in each slot. Each column and each row of the DL resource grid may correspond to one OFDM symbol and one OFDM subcarrier, respectively, and each column and each row of the UL resource grid may correspond to one SC-FDMA symbol and one SC-FDMA subcarrier, respectively. The duration of the resource grid in the time domain corresponds to one slot in a radio frame. The resource grid consists of multiple resource blocks (RBs) that describe the mapping of a specific physical channel to resource elements (REs). In the frequency domain, this can represent the minimum amount of resources that can be currently allocated. Each RB consists of a set of REs. RE is the smallest time-frequency unit in the resource grid. Each RE is uniquely identified by an index pair (k, l) in a time slot, where and are indices in the frequency domain and time domain, respectively. RE(k, l) on antenna port p corresponds to the complex value The antenna ports are defined so that the channel on which a symbol on the antenna port is transmitted can be inferred from the channel on which another symbol on the same antenna port is transmitted. There is one resource grid per antenna port. The set of antenna ports supported depends on the reference signal configuration in the cell, and these aspects are discussed in more detail in 3GPP TS 36.211, the entire contents of which are incorporated herein by reference.

[0041] In some examples, such as 5G NR implementations, DL and UL transmissions are organized into frames with 10ms duration, each duration consisting of ten 1ms subframes. The number of consecutive OFDM symbols per subframe is Each frame is divided into two equally sized half-frames of five subframes, each subframe having half-frame 0 including subframes 0-4 and half-frame 1 including subframes 5-9. There is one set of frames in UL and one set of frames in DL on a carrier. The UL frame number i for transmission from a UE shall be in N TA,offset T starts before the start of the corresponding downlink frame at the UE given by 3GPP TS 38.213TA =(N TA +N TA,offset )T c For a subcarrier spacing configuration μ, the time slots are numbered in increasing order within a subframe. and are numbered in increasing order within the frame as Existence in the time slot Consecutive OFDM symbols, where Depends on the cyclic prefix given in Tables 4.3.2-1 and 4.3.2-2 of 3GPP TS 38.211. Slots in a subframe The start of the OFDM symbol in the same subframe in time OFDM symbols in a time slot may be classified as "downlink", "flexible", or "uplink", where downlink transmissions occur only in "downlink" or "flexible" symbols and UE 101 transmits only in "uplink" or "flexible" symbols.

[0042] For each parameter and carrier, define subcarriers and The resource grid of symbols starts at the common There is a set of resource grids per transmission direction (e.g., uplink or downlink), where the subscript x is set to DL for downlink and x is set to UL for uplink. For a given antenna port p, subcarrier spacing configuration μ, and transmission direction (e.g., downlink or uplink), there is one resource grid.

[0043] RB is defined as contiguous subcarriers. In the frequency domain with subcarrier spacing μ, common RBs are numbered from 0 upwards. The center of subcarrier 0 of common resource block 0 with subcarrier spacing μ coincides with "point A". Common resource block numbering in the frequency domain The relationship between the resource element (k, l) and the subcarrier spacing configuration μ is given by is given by, where k is defined relative to point A such that k=0 corresponds to a subcarrier centered at point A. Point A is used as a common reference point for the resource block grid and is obtained from offsetToPointA for the PCell downlink, where offsetToPointA represents the frequency offset between point A and the lowest subcarrier of the lowest resource block, offsetToPointA has a subcarrier spacing provided by the higher layer parameter subCarrierSpacingCommon and overlaps with the SS / PBCH block used for initial cell selection by the UE, expressed in units of resource blocks, assuming a subcarrier spacing of 15 kHz for FR1 and 60 kHz for FR2; and absoluteFrequencyPointA for all other cases, where absoluteFrequencyPointA represents the frequency position of point A as expressed in the ARFCN.

[0044] The PRBs of subcarrier configuration μ are defined within a BWP and are numbered from 0 to Where i is the number of BWPs. The physical resource blocks in BWPi With the public The relationship between Given, where is a common RB, where BWP starts relative to common RB 0. VRBs are defined within BWP and are numbered from 0 to Where i is the number of BWPs.

[0045] Each element in the resource grid for antenna port p and subcarrier spacing configuration μ is called RE and is represented by (k, l) p,μ Uniquely identifies a resource element (k, l), where k is an index in the frequency domain and l refers to the symbol position in the time domain relative to some reference point. p,μ Corresponding to physical resources and complex values The antenna ports are defined such that the channel on which a symbol on the antenna port is transmitted can be inferred from the channel on which another symbol on the same antenna port is transmitted. The two antenna ports are considered to be quasi-co-located if the large-scale properties of the channel on which the symbol on one antenna port is transmitted can be inferred from the channel on which the symbol on the other antenna port is transmitted. The large-scale properties include one or more of delay spread, Doppler spread, Doppler shift, average gain, average delay, and spatial Rx parameters.

[0046] BWP is μ on a given carrier. i A subset of contiguous common resource blocks as defined in subclause 4.4.4.3 of 3GPP TS 38.211 for a given parameter set in BWPi. Starting position and resource blocks in BWP The number of and The configuration of the BWP is described in clause 12 of 3GPP TS 38.213. The UE 101 may be configured with up to four BWPs in the DL, with a single DL BWP being active at a given time. The UE 101 is not expected to receive PDSCH, PDCCH, or CSI-RS (except RRM) outside of the active BWP. The UE 101 may be configured with up to four BWPs in the UL, with a single UL BWP being active at a given time. If the UE 101 is configured with a supplementary UL, the UE 101 may be configured with up to four additional BWPs in the supplementary UL, with a single supplementary UL BWP being active at a given time. The UE 101 does not transmit PUSCH or PUCCH outside of the active BWP, and for active cells, the UE does not transmit SRS outside of the active BWP.

[0047] A NB is defined as six non-overlapping consecutive PRBs in the frequency domain. The total number of DL NBs in the configured DL transmission BW in a cell is given by In the narrow band n NB Including PRB index In the case of

[0048] if The broadband is defined as four non-overlapping narrowbands in the frequency domain. The total number of uplink broadbands in the uplink transmission bandwidth configured in the cell is given by Given, and the broadbands are numbered in the order of increasing narrowband numbers Among them, the bandwidth n WB By narrowband index 4n WB +i, where i=0,1,...,3. If but and a single broadband One or more non-overlapping narrow bands.

[0049] There are several different physical channels and physical signals that are transmitted using RBs or individual REs. A physical channel corresponds to a set of REs that carry information originating from higher layers. Physical UL channels may include PUSCH, PUCCH, PRACH, and / or any other physical UL channels discussed herein, and physical DL channels may include PDSCH, PBCH, PDCCH, and / or any other physical DL channels discussed herein. Physical signals are transmitted by the physical layer (e.g., Figure 5The physical UL signal may include DMRS, PTRS, SRS, and / or any other physical UL signal discussed herein, and the physical DL signal may include DMRS, PTRS, CSI-RS, PSS, SSS, and / or any other physical DL signal discussed herein.

[0050] The PDSCH carries user data and higher layer signaling to multiple UEs 101. Typically, DL scheduling (allocation of control and shared channel resource blocks to UEs 101 within a cell) may be performed at any one of the RAN nodes 111 based on channel quality information fed back from any one of the multiple UEs 101. Downlink resource allocation information may be sent on a PDCCH for (e.g., allocated to) each of the UEs 101. The PDCCH uses CCEs to transmit control information (e.g., DCI), and a group of CCEs may be referred to as a "control region." A control channel is formed by an aggregation of one or more CCEs, where different coding rates for the control channel are achieved by aggregating different numbers of CCEs. The CCEs are numbered from 0 to N. ,,-,k -1, where N ,,-,k-1 is the number of CCEs in the control region of subframe k. Before being mapped to REs, the PDCCH complex symbols may first be organized into quadruplets, which may then be arranged using a subblock interleaver for rate matching. Each PDCCH may be transmitted using one or more of these CCEs, where each CCE may correspond to nine sets of four physical REs, referred to as REGs. Four QoS symbols may be mapped to each REG. Depending on the size of the DCI and the channel conditions, one or more CCEs may be used to transmit the PDCCH. There may be four or more different PDCCH formats defined with different numbers of CCEs (e.g., aggregation levels, L=1, 2, 4, or 8 in LTE, and L=1, 2, 4, 8, or 16 in NR). UE 101 monitors a set of PDCCH candidates on one or more activated serving cells as configured by high-layer signaling for control information (e.g., DCI), where monitoring means attempting to decode each of the PDCCHs (or PDCCH candidates) in the set according to all monitored DCI formats (e.g., DCI formats 0 to 6-2, as discussed in Section 5.3.3 of 3GPP TS 38.212, DCI formats 0_0 to 2_3, as discussed in Section 7.3 of 3GPP TS 38.212, etc.). UE 101 monitors (or attempts to decode) the corresponding PDCCH candidate set in one or more configured monitoring occasions according to the corresponding search space configuration. The DCI transmits DL, UL or SL scheduling information, a request for aperiodic CQI reporting, LAA common information, notification of MCCH changes, UL power control commands for one cell and / or one RNTI, notification of a group of UEs 101 regarding the slot format, notification of a group of UEs regarding PRBs and OFDM symbols (where the UE may assume that no transmission is intended for the UE), TPC commands for PUCCH and PUSCH, and / or TPC commands for PUCCH and PUSCH. The DCI encoding steps are discussed in 3GPP TS 38.212, the entire contents of which are incorporated herein by reference.

[0051] Some examples may use the concept of resource allocation for control channel information, which is an extension of the above concept. For example, EPDCCH using PDSCH resources can be used for control information transmission. One or more ECCEs can be used to transmit EPDCCH. Similar to the above, each ECCE can correspond to nine sets of four physical resource elements, called EREG. In some cases, ECCE can have other numbers of EREGs.

[0052] As previously described, the PDCCH may be used to schedule DL transmissions on the PDSCH and UL transmissions on the PUSCH, wherein the DCI on the PDCCH includes, for example, a downlink assignment containing at least a modulation and coding format, resource allocation, and HARQ information associated with the DL-SCH; and / or an uplink scheduling grant containing at least a modulation and coding format, resource allocation, and HARQ information associated with the UL-SCH. In addition to scheduling, the PDCCH may be used to activate and deactivate configured PUSCH transmissions with configured grants; activate and deactivate PDSCH semi-persistent transmissions; notify one or more UEs 101 of the time slot format; notify one or more UEs 101 of PRBs and OFDM symbols, wherein the UE 101 may assume that no transmission is intended for the UE; transmit TPC commands for PUCCH and PUSCH; transmit one or more TPC commands for SRS transmission by one or more UEs 101; switch the active BWP of the UE 101; and initiate a random access procedure, among other things.

[0053] In a NR specific implementation, the UE 101 monitors (or attempts to decode) the corresponding PDCCH candidate set in one or more configured control resource sets (CORESETs) in one or more configured monitoring opportunities according to the corresponding search space configuration. A CORESET may include a PRB set with a duration of 1 to 3 OFDM symbols. A CORESET may additionally or alternatively include and in the time domain Symbol. A CORESET includes six REGs numbered in an increasing order in a time-first manner, where a REG is equal to one RB during one OFDM symbol. UE 101 can be configured with multiple CORESETs, where each CORESET is associated with only one control channel element (CCE) to resource element group (REG) mapping. Interleaved and non-interleaved CCE to REG mappings are supported in a CORESET. Each REG that carries a PDCCH carries its own demodulation reference signal (DMRS).

[0054] In some examples, multiple UEs 101 and multiple RAN nodes 111 communicate (e.g., transmit and receive) data over a licensed medium (also referred to as a "licensed spectrum" or "licensed band") and an unlicensed shared medium (also referred to as an "unlicensed spectrum" and / or "unlicensed band"). The licensed spectrum may include channels operating in a frequency range of approximately 400 MHz to approximately 3.8 GHz, and the unlicensed spectrum may include a 5 GHz band.

[0055] To operate in an unlicensed spectrum, multiple UEs 101 and multiple RAN nodes 111 may operate using license assisted access (LAA), enhanced LAA (eLAA), or another enhanced LAA (feLAA) mechanism. In these specific implementations, multiple UEs 101 and multiple RAN nodes 111 may perform one or more known medium sensing operations or carrier sensing operations or both to determine whether one or more channels in the unlicensed spectrum are unavailable or otherwise occupied before transmitting in the unlicensed spectrum. The medium / carrier sensing operation may be performed according to a listen-before-talk (LBT) protocol. LBT is a mechanism for equipment (e.g., multiple UEs 101, multiple RAN nodes 111) to sense a medium (e.g., a channel or carrier frequency) and transmit when the medium is sensed to be idle (or when a specific channel in the medium is sensed to be unoccupied). The medium sensing operation may include a clear channel assessment (CCA), which uses energy detection to determine whether there are other signals on the channel in order to determine whether the channel is occupied or clear. The LBT mechanism allows cellular / LAA networks to coexist with existing systems in unlicensed spectrum and with other LAA networks. Energy detection may include sensing RF energy over an intended transmission band over a period of time and comparing the sensed RF energy to a predefined or configured threshold.

[0056] The existing system in the 5 GHz band may be a WLAN based on IEEE 802.11 technology. The WLAN adopts a contention-based channel access mechanism (e.g., CSMA with collision avoidance (CSMA / CA). In some examples, when a WLAN node (e.g., a mobile station (MS) such as UE 101, AP 106, etc.) intends to transmit, the WLAN node may first perform CCA before transmitting. In addition, in the case where more than one WLAN node senses the channel as idle and transmits at the same time, a backoff mechanism is used to avoid conflicts. The backoff mechanism can be a counter randomly drawn within the contention window size (CWS), which increases exponentially when a conflict occurs and is reset to a minimum value when the transmission is successful. In some examples, the LBT mechanism designed for LAA is similar to CSMA / CA for WLAN. In some examples, the LBT process for a DL or UL transmission burst (including PDSCH or PUSCH transmission) may have a LAA contention window of variable length between X and Y extended CAA (ECCA) time slots, where X and Y are the minimum and maximum values ​​of the CWS for LAA. In one example, the minimum CWS for LAA transmission may be 9 microseconds (μs); however, the size of the CWS and the maximum channel occupancy time (e.g., transmission burst) may be based on government regulatory requirements.

[0057] In some examples, the LAA mechanism is built on the carrier aggregation technology of the LTE-Advanced system. In CA, each aggregated carrier is called a component carrier. In some examples, the component carrier may have a bandwidth of 1.4MHz, 3MHz, 5MHz, 10MHz, 15MHz, or 20MHz, and up to five component carriers may be aggregated to provide a maximum aggregate bandwidth of 100MHz. In a frequency division duplex (FDD) system, the number of aggregated carriers may be different for DL ​​and UL. For example, the number of UL component carriers may be equal to or less than the number of DL component carriers. In some cases, each component carrier may have a different bandwidth from other component carriers. In a time division duplex (TDD) system, the number of component carriers and the bandwidth of each component carrier are typically the same for DL ​​and UL.

[0058] Carrier aggregation may also include separate serving cells to provide separate component carriers. The coverage of the serving cells may be different, for example, because component carriers on different frequency bands may experience different path losses. The primary serving cell (PCell) may provide a primary component carrier for both UL and DL, and may handle RRC and non-access stratum (NAS) related activities. Other serving cells are referred to as secondary component carriers (SCells), and each SCell may provide a separate secondary component carrier for both UL and DL. Secondary component carriers may be added and removed as needed, and changing the primary component carrier may require UE 101 to undergo switching. In LAA, eLAA, and feLAA, some or all of the SCells may operate in an unlicensed spectrum (referred to as "LAA SCells"), and the LAA SCells are assisted by the PCells operating in a licensed spectrum. When a UE is configured with more than one LAA SCell, the UE may receive UL authorizations on the configured LAA SCells, indicating different PUSCH start positions within the same subframe.

[0059] The RAN nodes 111 are configured to communicate with each other using an interface 112. In an example, such as when the system 100 is an LTE system (e.g., when the core network 120 is an evolved packet core (EPC) network), the interface 112 may be an X2 interface 112. The X2 interface may be defined between two or more RAN nodes 111 (e.g., two or more eNBs, etc.) connected to the EPC 120, or between two eNBs connected to the EPC 120, or both. In some examples, the X2 interface may include an X2 user plane interface (X2-U) and an X2 control plane interface (X2-C). The X2-U may provide a flow control mechanism for user packets transmitted over the X2 interface, and may be used to transmit information about the delivery of user data between eNBs. For example, X2-U may provide specific sequence number information about user data transmitted from the primary eNB to the secondary eNB; information about successful in-sequence delivery of PDCP protocol data units (PDUs) from the secondary eNB to the UE 101 for user data; information about PDCP PDUs that were not delivered to the UE 101; information about the current minimum expected buffer size at the secondary eNB for transmitting user data to the UE; and the like. X2-C may provide intra-LTE access mobility functions, including context transfer from a source eNB to a target eNB, or user plane transmission control; load management functions; inter-cell interference coordination functions; and the like. In an example where the system 100 is a MF system (e.g., when the CN 120 is a NHCN 120), the interface 112 may be an X2 interface 112. The X2 interface may be defined between two or more RAN nodes 111 (e.g., two or more MF-APs, etc.) connected to the NHCN 120, and / or between two MF-APs connected to the NHCN 120. In these examples, the X2 interface may operate in the same or similar manner as previously discussed.

[0060] In some examples, such as when the system 100 is a 5G NR system (e.g., when the core network 120 is a 5G core network), the interface 112 may be an Xn interface 112. The Xn interface may be defined between two or more RAN nodes 111 (e.g., two or more gNBs, etc.) connected to the 5G core network 120, between a RAN node 111 (e.g., a gNB) and an eNB connected to the 5G core network 120, or between two eNBs connected to the 5G core network 120, or a combination of the above. In some examples, the Xn interface may include an Xn user plane (Xn-U) interface and an Xn control plane (Xn-C) interface. The Xn-U may provide non-guaranteed delivery of user plane PDUs and support / provide data forwarding and flow control functions. The Xn-C may provide management and error handling functions for managing functions of the Xn-C interface; mobility support for UE 101 in a connected mode (e.g., CM-CONNECTED), including functions for managing UE mobility in a connected mode between one or more RAN nodes 111; and the like. Mobility support may include context transfer from the old (source) serving RAN node 111 to the new (target) serving RAN node 111, and control of the user plane tunnel between the old (source) serving RAN node 111 and the new (target) serving RAN node 111. The protocol stack of Xn-U may include a transport network layer built on an Internet Protocol (IP) transport layer, and a GPRS Tunneling Protocol (GTP-U) layer for carrying user plane PDUs on top of a user datagram protocol (UDP) or IP layer or both. The Xn-C protocol stack may include an application layer signaling protocol (referred to as the Xn Application Protocol (Xn-AP)) and a transport network layer built on a stream control transmission protocol (SCTP). SCTP may be on top of the IP layer and may provide guaranteed delivery of application layer messages. In the transport IP layer, point-to-point transport is used to deliver signaling PDUs. In other specific implementations, the Xn-U protocol stack or the Xn-C protocol stack or both may be the same or similar to the user plane and / or control plane protocol stacks shown and described herein.

[0061] RAN 110 is shown as being communicatively coupled to a core network 120 (referred to as "CN 120"). CN 120 includes one or more network elements 122 configured to provide various data and telecommunication services to customers / subscribers (e.g., users of UE 101) connected to CN 120 using RAN 110. Components of CN 120 may be implemented in one physical node or separate physical nodes and may include components for reading and executing instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium). In some examples, network function virtualization (NFV) may be used to virtualize some or all of the network node functions described herein using executable instructions stored in one or more computer-readable storage media, as will be described in further detail below. A logical instance of CN 120 may be referred to as a network slice, and a logical instance of a portion of CN 120 may be referred to as a network sub-slice. NFV architecture and infrastructure may be used to virtualize one or more network functions onto physical resources comprising a combination of industry-standard server hardware, storage hardware, or switches (alternatively performed by proprietary hardware). In other words, a NFV system may be used to perform virtual or reconfigurable implementations, or both, of one or more network components or functions.

[0062] In general, the application server 130 may be an element that provides applications that use IP bearer resources with the core network (e.g., UMTS packet service (PS) domain, LTE PS data service, etc.). The application server 130 may also be configured to utilize the CN 120 to support one or more communication services for the UE 101 (e.g., VoIP sessions, PTT sessions, group communication sessions, social network services, etc.).

[0063] In some examples, CN 120 may be a 5G core network (referred to as "5GC 120"), and RAN 110 may be connected to CN 120 using a next generation interface 113. In some examples, next generation interface 113 may be divided into two parts: a next generation user plane (NG-U) interface 114, which carries traffic data between multiple RAN nodes 111 and a user plane function (UPF); and an S1 control plane (NG-C) interface 115, which is a signaling interface between the RAN node 111 and an access and mobility management function (AMF).

[0064] In some examples, CN 120 may be an EPC (referred to as “EPC 120” or the like), and RAN 110 may be connected to CN 120 using an S1 interface 113. In some examples, S1 interface 113 may be divided into two parts: an S1 user plane (S1-U) interface 114, which carries traffic data between RAN node 111 and a serving gateway (S-GW); and an S1-MME interface 115, which is a signaling interface between RAN node 111 and a mobility management entity (MME).

[0065] In the example where CN 120 is MF NHCN 120, one or more network elements 122 may include or operate one or more NH-MMEs, local AAA agents, NH-GWs, and / or other similar MF NHCN elements. The NH-MME provides functions similar to the MME in the EPC 120. The local AAA agent is an AAA agent that is part of the NHN, which provides the AAA functions required for interworking with the PSP AAA and 3GPP AAA. The PSP AAA is an AAA server (or server pool) that uses non-USIM credentials associated with the PSP, and may be inside or outside the NHN, and the 3GPP AAA is discussed in more detail in 3GPP TS23.402. The NH-GW provides functions similar to the combined S-GW / P-GW connected to the non-EPC routed PDN. For the EPC routed PDN connection, the NHN-GW provides functions similar to the S-GW previously discussed in the interaction with the MF-AP through the S1 interface 113, and is similar to the TWAG in the interaction with the PLMN PDN-GW through the S2a interface. In some examples, MF AP 111 may be connected to EPC 120 discussed previously. In addition, RAN 110 (sometimes referred to as "MF RAN 110") may be connected to NHCN 120 via S1 interface 113. In these embodiments, S1 interface 113 may be divided into two parts: S1 interface 114, which carries traffic data between RAN node 111 (e.g., "MF-AP 111") and NH-GW; and S1-MME-N interface 115, which is a signaling interface between RAN node 111 and NH-MME. S1-U interface 114 and S1-MME-N interface 115 have the same or similar functions as S1-U interface 114 and S1-MME interface 115 of EPC 120 discussed herein.

[0066] Figure 2An example of infrastructure equipment 200 is shown. Infrastructure equipment 200 (or "system 200") can be implemented as a base station, a radio head, a RAN node (such as the RAN node 111 or AP 106 shown and described previously), an application server 130, or any other component or device described herein. In other examples, system 200 can be implemented in or by a UE.

[0067] System 200 includes: application circuit 205, baseband circuit 210, one or more radio front end modules (RFEM) 215, memory circuit 220, power management integrated circuit (PMIC) 225, power tee circuit 230, network controller circuit 235, network interface connector 240, satellite positioning circuit 245 and user interface circuit 250. In some examples, system 200 may include additional elements such as, for example, memory, storage, display, camera, one or more sensors or input / output (I / O) interfaces or combinations thereof. In other examples, the components described with reference to system 200 may be included in more than one device. For example, various circuits may be separately included in more than one device for CRAN, vBBU or other specific implementations.

[0068] The application circuit 205 may include circuits such as, but not limited to, one or more processors (or processor cores), cache memory, one or more of the following: a low dropout regulator (LDO), an interrupt controller, a serial interface such as SPI, I2C or a general programmable serial interface module, a real-time clock (RTC), a timer-counter including an interval timer and a watchdog timer, a general input / output (I / O or IO), a memory card controller such as a secure digital (SD) multimedia card (MMC) or similar products, a universal serial bus (USB) interface, a mobile industry processor interface (MIPI) interface, and a joint test access group (JTAG) test access port. The processor (or core) of the application circuit 205 may be coupled to or may include a memory or storage element, and may be configured to execute instructions stored in the memory or storage device to enable various applications or operating systems to run on the system 200. In some examples, the memory or storage element may include an on-chip memory circuit, which may include any suitable volatile or non-volatile memory, such as DRAM, SRAM, EPROM, EEPROM, flash memory, solid-state memory, or a combination thereof, etc.

[0069] The processor of the application circuit 205 may include, for example, one or more processor cores (CPUs), one or more application processors, one or more graphics processing units (GPUs), one or more reduced instruction set computing (RISC) processors, one or more Acorn RISC Machine (ARM) processors, one or more complex instruction set computing (CISC) processors, one or more digital signal processors (DSPs), one or more FPGAs, one or more PLDs, one or more ASICs, one or more microprocessors or controllers, or a combination thereof. In some examples, the application circuit 205 may include or may be a dedicated processor or controller configured to perform various techniques described herein. As an example, the processor of the application circuit 205 may include one or more Apple A series processors, Intel or Processor: Advanced Micro Devices (AMD) Processor, Accelerated Processing Unit (APU) or Processor; ARM-based processors licensed by ARM Holdings, Ltd., such as the ARM Cortex-A series processors provided by Cavium (TM), Inc. and MIPS-based designs from MIPS Technologies, Inc., such as the MIPSWarrior P-class processor; etc. In some examples, system 200 may not utilize application circuit 205, and instead may include a dedicated processor or controller to process IP data received, for example, from an EPC or 5GC.

[0070] In some examples, the application circuit 205 may include one or more hardware accelerators, which may be microprocessors, programmable processing devices, etc. The one or more hardware accelerators may include, for example, computer vision (CV) or deep learning (DL) accelerators or both. In some examples, the programmable processing device may be one or more field programmable devices (FPDs), such as field programmable gate arrays (FPGAs), etc.; programmable logic devices (PLDs), such as complex PLDs (CPLDs) or high-capacity PLDs (HCPLDs); ASICs, such as structured ASICs; programmable SoCs (PSoCs), or combinations thereof, etc. In such specific implementations, the circuits of the application circuit 205 may include logic blocks or logic architectures, as well as other interconnected resources that can be programmed to perform various functions such as the processes, methods, functions described herein. In some examples, the circuitry of application circuit 205 may include a memory cell (e.g., an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a static memory (e.g., a static random access memory (SRAM), or an antifuse)) for storing logic blocks, logic architectures, data, or other data in a lookup table (LUT) or the like.

[0071] The baseband circuit 210 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits. Figure 4 The various hardware electronic components of baseband circuit 210 are discussed.

[0072] The user interface circuit 250 may include one or more user interfaces designed to enable a user to interact with the system 200 or a peripheral component interface designed to enable a peripheral component to interact with the system 200. The user interface may include, but is not limited to, one or more physical or virtual buttons (e.g., a reset button), one or more indicators (e.g., light emitting diodes (LEDs)), a physical keyboard or keypad, a mouse, a touch pad, a touch screen, a speaker or other audio transmitting device, a microphone, a printer, a scanner, a headset, a display screen or display device, or a combination thereof, etc. The peripheral component interface may include, but is not limited to, a non-volatile memory port, a universal serial bus (USB) port, an audio jack, a power interface, etc.

[0073] The radio front end module (RFEM) 215 may include a millimeter wave (mmWave) RFEM and one or more sub-millimeter wave radio frequency integrated circuits (RFICs). In some examples, the one or more sub-millimeter wave RFICs may be physically separated from the mmWave RFEM. The RFIC may include connections to one or more antennas or antenna arrays (see, e.g., Figure 4Antenna array 411), and the RFEM can be connected to multiple antennas. In some examples, both millimeter wave and sub-millimeter wave radio functions can be implemented in the same physical RFEM 215 that combines both millimeter wave antennas and sub-millimeter waves.

[0074] Memory circuit 220 may include one or more of the following: volatile memory, such as dynamic random access memory (DRAM) or synchronous dynamic random access memory (SDRAM); and non-volatile memory (NVM), such as high-speed electrically erasable memory (commonly referred to as flash memory), phase change random access memory (PRAM), or magnetoresistive random access memory (MRAM), or a combination thereof. In some examples, memory circuit 220 may include a memory device obtained from and For example, the memory circuit 220 may be implemented as one or more of the following: a solder-in package integrated circuit, a socket memory module, and a plug-in memory card.

[0075] PMIC 225 may include a voltage regulator, a surge protector, a power alarm detection circuit, and one or more backup power sources, such as a battery or capacitor. The power alarm detection circuit may detect one or more of a brownout (undervoltage) and a surge (overvoltage) condition. Power tee circuit 230 may provide power extracted from a network cable to provide both power and data connections for infrastructure equipment 200 using a single cable.

[0076] The network controller circuit 235 may provide connectivity to the network using a standard network interface protocol such as Ethernet, Ethernet based on a GRE tunnel, Ethernet based on Multi-Protocol Label Switching (MPLS), or some other suitable protocol. Network connectivity may be provided to and from the infrastructure equipment 200 using a network interface connector 240 using a physical connection, which may be an electrical connection (commonly referred to as a "copper interconnect"), an optical connection, or a wireless connection. The network controller circuit 235 may include one or more dedicated processors or FPGAs, or both, for communicating using one or more of the aforementioned protocols. In some examples, the network controller circuit 235 may include multiple controllers for providing connectivity to other networks using the same or different protocols.

[0077] The positioning circuit 245 includes circuits for receiving and decoding signals transmitted or broadcast by a positioning network of a global navigation satellite system (GNSS). Examples of GNSS include the United States' Global Positioning System (GPS), Russia's Global Navigation System (GLONASS), the European Union's Galileo system, China's Beidou Navigation Satellite System, regional navigation systems or GNSS augmentation systems (e.g., using the Indian constellation (NAVIC), Japan's Quasi-Zenith Satellite System (QZSS), France's Doppler Orbit Chart and Satellite Integrated Radio Positioning (DORIS) for navigation), etc. The positioning circuit 245 may include various hardware elements (e.g., including hardware devices such as switches, filters, amplifiers, antenna elements, etc. for facilitating OTA communication) to communicate with components of the positioning network such as navigation satellite constellation nodes. In some examples, the positioning circuit 245 may include a micro technology (micro PNT) IC for positioning, navigation, and timing, which uses a master timing clock to perform position tracking and estimation without GNSS assistance. The positioning circuit 245 may also be part of or interact with the baseband circuit 210 or RFEM 215 or both to communicate with nodes and components of the positioning network. The positioning circuitry 245 may also provide data (eg, location data, time data) to the application circuitry 205 , which may use the data to synchronize operations with various infrastructure (eg, the RAN node 111 , etc.).

[0078] Figure 2 The components shown can communicate with each other using interface circuits that can include any number of bus or interconnect (IX) technologies, such as industry standard architecture (ISA), extended ISA (EISA), peripheral component interconnect (PCI), peripheral component interconnect extended (PCIx), PCI express (PCIe), or any number of other technologies. The bus or IX can be a proprietary bus, for example, used in a SoC-based system. Other bus or IX systems can be included, such as an I2C interface, an SPI interface, a point-to-point interface, and a power bus, etc.

[0079] Figure 3 An example of a platform 300 (or "device 300") is shown. In some examples, the computer platform 300 may be suitable for use as a UE 101, an application server 130, or any other component or device discussed herein. The platform 300 may include any combination of the components shown in the examples. The components (or portions thereof) of the platform 300 may be implemented as integrated circuits (ICs), discrete electronic devices, or other modules, logical components, hardware, software, firmware, or combinations thereof adapted in the computer platform 300, or as components otherwise incorporated within the chassis of a larger system. Figure 3The block diagram is intended to show a high-level view of the components of platform 300. However, in some examples, platform 300 may include fewer, additional, or alternative components, or include Figure 3 Different arrangements of components are shown.

[0080] The application circuit 305 includes circuits such as, but not limited to, one or more processors (or processor cores), cache memory, and one or more of an LDO, an interrupt controller, a serial interface (such as SPI, I2C, or a general programmable serial interface module), an RTC, a timer-counter (including an interval timer and a watchdog timer), a general I / O, a memory card controller (such as an SDMMC or similar controller), a USB interface, a MIPI interface, and a JTAG test access port. The processor (or core) of the application circuit 305 may be coupled to or may include a memory / storage element, and may be configured to execute instructions stored in the memory or storage device to enable various applications or operating systems to run on the system 300. In some examples, the memory or storage element may be an on-chip memory circuit, which may include any suitable volatile or non-volatile memory, such as DRAM, SRAM, EPROM, EEPROM, flash memory, solid-state memory, or a combination thereof, etc.

[0081] The processor of application circuit 205 may include, for example, one or more processor cores, one or more application processors, one or more GPUs, one or more RISC processors, one or more ARM processors, one or more CISC processors, one or more DSPs, one or more FPGAs, one or more PLDs, one or more ASICs, one or more microprocessors or controllers, multi-threaded processors, ultra-low voltage processors, embedded processors, some other known processing elements, or any suitable combination thereof. In some examples, application circuit 205 may include or may be a dedicated processor / controller for performing techniques described herein.

[0082] As an example, the processor of the application circuit 305 may include an Apple A series processor. The processor of the application circuit 1105 may also be one or more of the following: based on Architecture Core TM Processors such as Quark TM 、Atom TM , i3, i5, i7 or MCU class processors, or available from Santa Clara, CA company( Another such processor is Intel Corporation, Santa Clara, CA); Advanced Micro Devices (AMD) Processor or Accelerated Processing Unit (APU); from Snapdragon by Technologies, Inc. TM Processor, Texas Instruments, Open Multimedia ApplicationsPlatform(OMAP) TM processors; MIPS-based designs from MIPS Technologies, Inc., such as the MIPS Warrior M-class, Warrior I-class, and Warrior P-class processors; ARM-based designs licensed from ARM Holdings, Ltd., such as the ARM Cortex-A, Cortex-R, and Cortex-M series processors; etc. In some examples, application circuit 305 can be part of a system on a chip (SoC), in which application circuit 305 and other components are formed as a single integrated circuit or a single package.

[0083] Additionally or alternatively, the application circuit 305 may include circuits such as, but not limited to, one or more field programmable devices (FPDs) such as FPGAs; programmable logic devices (PLDs), such as complex PLDs (CPLDs), high capacity PLDs (HCPLDs); ASICs, such as structured ASICs; programmable SoCs (PSoCs), or combinations thereof, etc. In some examples, the application circuit 305 may include logic blocks or logic structures, and other interconnected resources that may be programmed to perform various functions such as the processes, methods, functions described herein. In some examples, the application circuit 305 may include a memory unit (e.g., an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a static memory (e.g., a static random access memory (SRAM) or an antifuse)) for storing the logic blocks, logic structures, data, or other data in a lookup table (LUT), etc.

[0084] The baseband circuit 310 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits. Figure 4 The various hardware electronic components of baseband circuit 310 are discussed.

[0085] The RFEM 315 may include a millimeter wave (mmWave) RFEM and one or more sub-millimeter wave radio frequency integrated circuits (RFICs). In some examples, the one or more sub-millimeter wave RFICs may be physically separated from the mmWave RFEM. The RFIC may include connections to one or more antennas or antenna arrays (see, e.g., Figure 4 The antenna array 411 of the embodiment of the present invention can be connected to multiple antennas, and the RFEM can be connected to multiple antennas. In some examples, both the millimeter wave and sub-millimeter wave radio functions can be implemented in the same physical RFEM 315 that combines both millimeter wave antennas and sub-millimeter waves.

[0086] The memory circuit 320 may include any number and type of memory devices for providing a fixed amount of system memory. For example, the memory circuit 320 may include one or more of the following: volatile memory, such as random access memory (RAM), dynamic RAM (DRAM) or synchronous dynamic RAM (SDRAM); and non-volatile memory (NVM), such as high-speed electrically erasable memory (commonly referred to as flash memory), phase change random access memory (PRAM), or magnetoresistive random access memory (MRAM), or a combination thereof, etc. The memory circuit 320 may be developed according to the Joint Electron Device Engineering Council (JEDEC) based low power double data rate (LPDDR) design such as LPDDR2, LPDDR3, LPDDR4, etc. The memory circuit 320 may be implemented as one or more of the following: a solder-in package integrated circuit, a single die package (SDP), a dual die package (DDP) or a quad die package (Q17P), a socketed memory module, a dual in-line memory module (DIMM) including a micro DIMM or a mini DIMM, or soldered to a motherboard using a ball grid array (BGA). In a low-power implementation, memory circuit 320 may be an on-chip memory or register associated with application circuit 305. To provide persistent storage of information such as data, applications, operating systems, etc., memory circuit 320 may include one or more mass storage devices, which may include, for example, a solid-state disk drive (SSDD), a hard disk drive (HDD), a micro HDD, a resistive change memory, a phase change memory, a holographic memory, or a chemical memory. In some examples, computer platform 300 may be combined with a memory device obtained from and Three-dimensional (3D) cross-point (XPOINT) memory.

[0087] The removable memory circuit 323 may include a device, circuit, housing, casing, port or socket, etc., for coupling a portable data storage device to the platform 300. These portable data storage devices may be used for mass storage and may include, for example, flash memory cards (e.g., Secure Digital (SD) cards, micro SD cards, xD picture cards), as well as USB flash drives, optical disks, or external HDDs, or combinations thereof, etc.

[0088] The platform 300 may further include an interface circuit (not shown) for connecting external devices to the platform 300. External devices connected to the platform 300 using the interface circuit include a sensor circuit 321 and an electromechanical component (EMC) 322, and a removable memory device coupled to a removable memory circuit 323.

[0089] Sensor circuit 321 includes a device, module, or subsystem that is intended to detect events or changes in its environment and send information about the detected events (e.g., sensor data) to one or more other devices, modules, or subsystems. Examples of such sensors include: an inertial measurement unit (IMU), such as an accelerometer, gyroscope, or magnetometer; a microelectromechanical system (MEMS) or nanoelectromechanical system (NEMS) including a three-axis accelerometer, a three-axis gyroscope, or a magnetometer; a liquid level sensor; a flow sensor; a temperature sensor (e.g., a thermistor); a pressure sensor; a barometric pressure sensor; a gravity meter; an altimeter; an image capture device (e.g., a camera or a lensless aperture); a light detection and ranging (LiDAR) sensor; a proximity sensor (e.g., an infrared radiation detector, etc.), a depth sensor, an ambient light sensor, an ultrasonic transceiver; a microphone or other audio capture device, or a combination thereof, etc.

[0090] The EMC 322 includes devices, modules, or subsystems that are intended to enable the platform 300 to change its state, position, or orientation or to move or control a mechanism, system, or subsystem. In addition, the EMC 322 may be configured to generate and send messages or signaling to other components of the platform 300 to indicate the current state of the EMC 322. Examples of EMC 322 include, among other electromechanical components, one or more power switches, relays (such as electromechanical relays (EMRs) or solid-state relays (SSRs)), actuators (e.g., valve actuators), audible sound generators, visual warning devices, motors (e.g., DC motors or stepper motors), wheels, thrusters, propellers, claws, clamps, hooks, or combinations thereof. In some examples, the platform 300 is configured to operate one or more EMCs 322 based on one or more capture events, instructions, or control signals received from a service provider or client, or both.

[0091] In some examples, the interface circuit may connect the platform 300 to the positioning circuit 345. The positioning circuit 345 includes a circuit for receiving and decoding signals transmitted or broadcast by a positioning network of a GNSS. Examples of GNSS may include the United States' GPS, Russia's GLONASS, the European Union's Galileo system, China's Beidou navigation satellite system, a regional navigation system or a GNSS augmentation system (e.g., NAVIC), Japan's QZSS, France's DORIS, etc. The positioning circuit 345 includes various hardware elements (e.g., including hardware devices such as switches, filters, amplifiers, antenna elements, etc. for facilitating OTA communications) to communicate with components of the positioning network such as navigation satellite constellation nodes. In some examples, the positioning circuit 345 may include a micro PNT IC that uses a master timing clock to perform position tracking or estimation without GNSS assistance. The positioning circuit 345 may also be part of or interact with the baseband circuit 210 or the RFEM 315 or both to communicate with nodes and components of the positioning network. Positioning circuitry 345 may also provide data (eg, position data, time data) to application circuitry 305, which may use the data to synchronize operations with various infrastructure (eg, radio base stations), for turn-by-turn navigation applications, and the like.

[0092] In some examples, the interface circuit may connect the platform 300 with a near field communication (NFC) circuit 340. The NFC circuit 340 is configured to provide contactless short-range communication based on the radio frequency identification (RFID) standard, wherein a magnetic field is sensed to enable communication between the NFC circuit 340 and an NFC-enabled device (e.g., an "NFC touch point") external to the platform 300. The NFC circuit 340 includes an NFC controller coupled to an antenna element and a processor coupled to the NFC controller. The NFC controller may be a chip or IC that provides NFC functionality to the NFC circuit 340 by executing an NFC controller firmware and an NFC stack. The NFC stack may be executed by the processor to control the NFC controller, and the NFC controller firmware may be executed by the NFC controller to control the antenna element to transmit a short-range RF signal. The RF signal may power a passive NFC tag (e.g., a microchip embedded in a sticker or wristband) to transfer stored data to the NFC circuit 340, or initiate data transfer between the NFC circuit 340 and another active NFC device (e.g., a smart phone or an NFC-enabled POS terminal) proximate to the platform 300.

[0093] The driver circuit 346 may include software and hardware elements for controlling specific devices embedded in, attached to, or otherwise communicatively coupled to the platform 300. The driver circuit 346 may include various drivers to allow other components of the platform 300 to interact with or control various input / output (I / O) devices that may be present in or connected to the platform 300. For example, the driver circuit 346 may include: a display driver for controlling and allowing access to a display device, a touch screen driver for controlling and allowing access to a touch screen interface of the platform 300, a sensor driver for obtaining sensor readings of the sensor circuit 321 and controlling and allowing access to the sensor circuit 321, an EMC driver for obtaining an actuator position of the EMC 322 or controlling and allowing access to the EMC 322, a camera driver for controlling and allowing access to an embedded image capture device, and an audio driver for controlling and allowing access to one or more audio devices.

[0094] A power management integrated circuit (PMIC) 325 (also referred to as “power management circuit 325”) may manage power provided to various components of platform 300. Specifically, PMIC 325 may control power source selection, voltage scaling, battery charging, or DC-DC conversion with respect to baseband circuit 310. PMIC 325 may be included when platform 300 is capable of being powered by battery 330, for example, when the device is included in UE 101.

[0095] In some examples, the PMIC 325 may control or otherwise be part of various power saving mechanisms of the platform 300. For example, if the platform 300 is in the RRC_Connected state, in which the platform is still connected to the RAN node because it expects to receive traffic soon, then after a period of inactivity, the platform may enter a state known as discontinuous reception mode (DRX). During this state, the platform 300 may be powered off for short time intervals, thereby saving power. If there is no data traffic activity for a longer period of time, the platform 300 may transition to the RRC_Idle state, in which it is disconnected from the network and does not perform operations such as channel quality feedback or switching. This may allow the platform 300 to enter a very low power state in which it periodically wakes up to listen to the network and then powers off again. In some examples, the platform 300 may not receive data in the RRC_Idle state, but must transition back to the RRC_Connected state to receive data. Additional power saving modes may prevent the device from using the network for longer than the paging interval (ranging from a few seconds to a few hours). During this period, the device may not be able to connect to the network and may be completely powered off. Any data sent during this period may be significantly delayed, and it is assumed that the delay is acceptable.

[0096] Battery 330 may power platform 300, but in some examples, platform 300 may be deployed in a fixed location and may have a power source coupled to a power grid. Battery 330 may be a lithium-ion battery, a metal-air battery such as a zinc-air battery, an aluminum-air battery, or a lithium-air battery, etc. In some examples, such as in V2X applications, battery 330 may be a typical lead-acid car battery.

[0097] In some examples, the battery 330 may be a "smart battery" that includes or is coupled to a battery management system (BMS) or a battery monitoring integrated circuit. The BMS may be included in the platform 300 to track the state of charge (SoCh) of the battery 330. The BMS may be used to monitor other parameters of the battery 330, such as the state of health (SoH) and state of function (SoF) of the battery 330 to provide fault prediction. The BMS may transmit information about the battery 330 to the application circuit 305 or other components of the platform 300. The BMS may also include an analog-to-digital (ADC) converter that allows the application circuit 305 to directly monitor the voltage of the battery 330 or the current from the battery 330. The battery parameters may be used to determine actions that the platform 300 may perform, such as transmission frequency, network operation, or sensing frequency.

[0098] A power block or other power source coupled to the grid can be coupled to the BMS to charge the battery 330. In some examples, the power block 330 can be replaced with a wireless power receiver to obtain power wirelessly, for example, through a loop antenna in the computer platform 300. In these examples, a wireless battery charging circuit can be included in the BMS. The specific charging circuit selected can depend on the size of the battery 330 and therefore the current required. Charging can be performed using the aviation fuel standard published by the Aviation Fuel Alliance, the Qi wireless charging standard published by the Wireless Power Alliance, or the Rezence charging standard published by the Wireless Power Alliance.

[0099] The user interface circuit 350 includes various input / output (I / O) devices present in or connected to the platform 300, and includes one or more user interfaces designed to implement user interaction with the platform 300 or peripheral component interfaces designed to implement interaction with peripheral components of the platform 300. The user interface circuit 350 includes input device circuits and output device circuits. The input device circuit includes any physical or virtual means for accepting input, including one or more physical or virtual buttons (e.g., a reset button), a physical keyboard, a keypad, a mouse, a touchpad, a touch screen, a microphone, a scanner, or a headset, or a combination thereof, etc. The output device circuit includes any physical or virtual means for displaying information or otherwise conveying information (such as sensor readings, actuator positions, or other information). The output device circuitry may include any number or combination of audio or visual displays, including one or more simple visual outputs or indicators (e.g., binary state indicators (e.g., light emitting diodes (LEDs)), multi-character visual outputs, or more complex outputs, such as a display device or touch screen (e.g., a liquid crystal display (LCD), an LED display, a quantum dot display, or a projector), where the output of characters, graphics, or multimedia objects is generated or produced by the operation of the platform 300. The output device circuitry may also include a speaker or other audio emitting device, or a printer. In some examples, the sensor circuitry 321 may be used as an input device circuit (e.g., an image capture device or a motion capture device) and one or more EMCs may be used as an output device circuit (e.g., an actuator for providing tactile feedback). In another example, an NFC circuit may be included to read an electronic tag or connect to another NFC-enabled device, the NFC circuitry including an NFC controller and a processing device coupled to an antenna element. The peripheral component interface may include, but is not limited to, a non-volatile memory port, a USB port, an audio jack, or a power interface.

[0100] Although not shown, the components of the platform 300 can communicate with each other using a suitable bus or interconnect (IX) technology, which can include any number of technologies, including ISA, EISA, PCI, PCIx, PCIe, a time-triggered protocol (TTP) system, a FlexRay system, or any number of other technologies. The bus or IX can be a proprietary bus or IX, for example, used in a SoC-based system. Other bus or IX systems can be included, such as an I2C interface, an SPI interface, a point-to-point interface, and a power bus, etc.

[0101] Figure 4 4 and 415. The baseband circuit 410 may correspond to the exemplary components of the radio front end module (RFEM) 415. Figure 2 The baseband circuit 210 and Figure 3The baseband circuit 310. RFEM 415 may correspond to Figure 2 RFEM 215 and Figure 3 RFEM 315. As shown, RFEM 415 may include a radio frequency (RF) circuit 406, a front end module (FEM) circuit 408, and an antenna array 411 coupled together.

[0102] The baseband circuit 410 includes circuits or control logic components or both, which are configured to execute various radio or network protocols and control functions that enable communication with one or more radio networks using the RF circuit 406. The radio control functions may include, but are not limited to, signal modulation and demodulation, encoding and decoding, and radio frequency shifting. In some examples, the modulation and demodulation circuits of the baseband circuit 410 may include fast Fourier transform (FFT), precoding or constellation mapping and demapping functions. In some examples, the encoding and decoding circuits of the baseband circuit 410 may include convolution, tail-biting convolution, turbo, Viterbi, or low-density parity check (LDPC) encoder and decoder functions. The modulation and demodulation and encoder and decoder functions are not limited to these examples and may include other suitable functions in other examples. The baseband circuit 410 is configured to process baseband signals received from the receive signal path of the RF circuit 406 and generate baseband signals for the transmit signal path of the RF circuit 406. The baseband circuit 410 is configured to communicate with application circuits (e.g., Figure 2 and Figure 3 The application circuits 205 and 305 are shown to interact to generate and process baseband signals and control the operation of the RF circuit 406. The baseband circuit 410 may handle various radio control functions.

[0103] The aforementioned circuits and control logic components of the baseband circuit 410 may include one or more single-core or multi-core processors. For example, the one or more processors may include a 3G baseband processor 404A, a 4G or LTE baseband processor 404B, a 5G or NR baseband processor 404C, or some other baseband processors 404D for other existing generations, generations under development or generations to be developed in the future (e.g., the sixth generation (6G)). In some examples, some or all of the functions of the baseband processors 404A-404D may be included in a module stored in the memory 404G and executed using a central processing unit (CPU) 404E. In some examples, some or all of the functions of the baseband processors 404A-404D may be provided as a hardware accelerator (e.g., FPGA or ASIC) loaded with an appropriate bitstream or logic block stored in a corresponding memory unit. In some examples, the memory 404G may store program code of a real-time OS (RTOS), which, when executed by the CPU 404E (or other baseband processor), is used to enable the CPU 404E (or other baseband processor) to manage resources of the baseband circuit 410, schedule tasks, or perform other operations. Examples of RTOS may include Operating System Embedded (OSE) provided TM , by Mentor Nucleus RTOS provided TM , by Mentor Versatile Real-Time Executive (VRTX) provided by Express Provided by ThreadX TM ,Depend on FreeRTOS and REX OS provided by OpenKernel (OK) OKL4 is provided, or any other suitable RTOS, such as those discussed herein. In addition, the baseband circuit 410 includes one or more audio digital signal processors (DSPs) 404F. The audio DSP 404F includes elements for compression and decompression and echo cancellation, and may include other suitable processing elements in some examples.

[0104] In some examples, each of processors 404A-404E includes a corresponding memory interface to send data to and receive data from memory 404G. Baseband circuit 410 may also include one or more interfaces for communicatively coupling to other circuits or devices, such as an interface for sending data to and receiving data from a memory external to baseband circuit 410; an interface for sending data to and receiving data from a memory external to the baseband circuit; Figure 2 and Figure 3The application circuit interface for sending data to and receiving data from the application circuit 205, 305; Figure 4 RF circuit 406 to send data and receive data from the RF circuit; an RF circuit interface for receiving data from one or more wireless hardware elements (e.g., near field communication (NFC) components, Low power consumption components, components, etc.) to send data and receive data from these wireless hardware elements; and a power management interface for sending power or control signals to the PMIC 325 and receiving power or control signals from the PMIC.

[0105] In some examples (which may be combined with the above examples), the baseband circuit 410 includes one or more digital baseband systems, which are coupled to each other and to the CPU subsystem, the audio subsystem, and the interface subsystem using an interconnection subsystem. The digital baseband subsystem may also be coupled to the digital baseband interface and the mixed signal baseband subsystem using another interconnection subsystem. Each of the interconnection subsystems may include a bus system, a point-to-point connector, a network on chip (NOC) structure, or some other suitable bus or interconnection technology, such as those discussed herein. The audio subsystem may include a DSP circuit, a buffer memory, a program memory, a voice processing accelerator circuit, a data converter circuit such as an analog-to-digital converter circuit and a digital-to-analog converter circuit, an analog circuit including one or more of an amplifier and a filter, etc. In some examples, the baseband circuit 410 may include a protocol processing circuit having one or more control circuit instances (not shown) to provide control functions for a digital baseband circuit or a radio frequency circuit (e.g., a radio front end module 415).

[0106] although Figure 4Not shown, but in some examples, the baseband circuit 410 includes various processing devices (e.g., a "multi-protocol baseband processor" or "protocol processing circuit") to operate one or more wireless communication protocols and various processing devices to implement PHY layer functions. In some examples, the PHY layer functions include the aforementioned radio control functions. In some examples, the protocol processing circuit operates or implements various protocol layers or entities of one or more wireless communication protocols. For example, when the baseband circuit 410 or the RF circuit 406 or both are part of a millimeter wave communication circuit or some other suitable cellular communication circuit, the protocol processing circuit may operate an LTE protocol entity or a 5G NR protocol entity or both. In this example, the protocol processing circuit may operate MAC, RLC, PDCP, SDAP, RRC, and NAS functions. In some examples, when the baseband circuit 410 or the RF circuit 406 or both are part of a Wi-Fi communication system, the protocol processing circuit may operate one or more IEEE-based protocols. In this example, the protocol processing circuit may operate Wi-Fi MAC and logical link control (LLC) functions. The protocol processing circuitry may include one or more memory structures (e.g., 404G) for storing program code and data for operating protocol functions, and one or more processing cores for executing program code and performing various operations using data. The baseband circuitry 410 may also support radio communications for more than one wireless protocol.

[0107] The various hardware elements of the baseband circuit 410 discussed herein may be implemented as, for example, a solder-in substrate including one or more integrated circuits (ICs), a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more ICs. In some examples, the components of the baseband circuit 410 may be appropriately combined in a single chip or a single chipset, or disposed on the same circuit board. In some examples, some or all of the components of the baseband circuit 410 and the RF circuit 406 may be implemented together, such as, for example, a system on a chip (SoC) or a system-level package (SiP). In some examples, some or all of the components of the baseband circuit 410 may be implemented as a separate SoC communicatively coupled to the RF circuit 406 (or multiple instances of the RF circuit 406). In some examples, some or all of the components of the baseband circuit 410 and the application circuits 205, 305 may be implemented together as a separate SoC mounted to the same circuit board (e.g., a "multi-chip package").

[0108] In some examples, baseband circuitry 410 may provide communications compatible with one or more radio technologies. For example, baseband circuitry 410 may support communications with E-UTRAN or other WMANs, WLANs, or WPANs. Examples in which baseband circuitry 410 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuitry.

[0109] RF circuit 406 can use modulated electromagnetic radiation to achieve communication with a wireless network through a non-solid medium. In some examples, RF circuit 406 may include components such as switches, filters, or amplifiers to facilitate communication with a wireless network. RF circuit 406 may include a receive signal path, which may include circuits for down-converting RF signals received from FEM circuit 408 and providing baseband signals to baseband circuit 410. RF circuit 406 may also include a transmit signal path, which may include circuits for up-converting baseband signals provided by baseband circuit 410 and providing RF output signals for transmission to FEM circuit 408.

[0110] The receive signal path of the RF circuit 406 includes a mixer circuit 406a, an amplifier circuit 406b, and a filter circuit 406c. In some examples, the transmit signal path of the RF circuit 406 may include a filter circuit 406c and the mixer circuit 406a. The RF circuit 406 also includes a synthesizer circuit 406d for synthesizing frequencies used by the mixer circuit 406a of the receive signal path and the transmit signal path. In some examples, the mixer circuit 406a of the receive signal path may be configured to down-convert the RF signal received from the FEM circuit 408 based on the synthesized frequency provided by the synthesizer circuit 406d. The amplifier circuit 406b may be configured to amplify the down-converted signal, and the filter circuit 406c may be a low pass filter (LPF) or a band pass filter (BPF) configured to remove unwanted signals from the down-converted signal to generate an output baseband signal. The output baseband signal may be provided to the baseband circuit 410 for further processing. In some examples, the output baseband signal can be a zero frequency baseband signal, although this is not required.In some examples, the mixer circuit 406a of the receive signal path can include a passive mixer.

[0111] In some examples, mixer circuit 406a of the transmit signal path can be configured to up-convert an input baseband signal based on a synthesized frequency provided by synthesizer circuit 406d to generate an RF output signal for FEM circuit 408. The baseband signal can be provided by baseband circuit 410 and can be filtered by filter circuit 406c.

[0112] In some examples, the mixer circuit 406a of the receive signal path and the mixer circuit 406a of the transmit signal path may include two or more mixers and may be arranged for orthogonal down-conversion and up-conversion, respectively. In some examples, the mixer circuit 406a of the receive signal path and the mixer circuit 406a of the transmit signal path may include two or more mixers and may be arranged for image suppression (e.g., Hartley image suppression). In some examples, the mixer circuit 406a of the receive signal path and the mixer circuit 406a of the transmit signal path may be arranged for direct down-conversion and direct up-conversion, respectively. In some examples, the mixer circuit 406a of the receive signal path and the mixer circuit 406a of the transmit signal path may be configured for superheterodyne operation.

[0113] In some examples, the output baseband signal and the input baseband signal may be analog baseband signals. In some examples, the output baseband signal and the input baseband signal may be digital baseband signals, and the RF circuit 406 may include an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) circuit, and the baseband circuit 410 may include a digital baseband interface to communicate with the RF circuit 406.

[0114] In some dual-mode examples, separate radio IC circuits may be provided to process signals for each spectrum, but the techniques described herein are not limited in this respect.

[0115] In some examples, synthesizer circuit 406d can be a fractional-N synthesizer or a fractional N / N+1 synthesizer, although other types of frequency synthesizers can be used. For example, synthesizer circuit 406d can be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase-locked loop with a frequency divider.

[0116] Synthesizer circuit 406d may be configured to synthesize an output frequency based on the frequency input and the divider control input for use by mixer circuit 406a of RF circuit 406. In some examples, synthesizer circuit 406d may be a fractional-N / N+1 synthesizer.

[0117] In some examples, the frequency input may be provided by a voltage controlled oscillator (VCO), although this is not required. The divider control input may be provided by the baseband circuit 410 or the application circuit 205 / 305 according to the desired output frequency. In some examples, the divider control input (e.g., N) may be determined from a lookup table based on the channel indicated by the application circuit 205, 305.

[0118] The synthesizer circuit 406d of the RF circuit 406 may include a frequency divider, a delay locked loop (DLL), a multiplexer, and a phase accumulator. In some examples, the frequency divider may be a dual-mode frequency divider (DMD), and the phase accumulator may be a digital phase accumulator (DPA). In some examples, the DMD may be configured to divide the input signal by N or N+1 (e.g., based on a carry) to provide a fractional division ratio. In some examples, the DLL may include a cascaded, tunable, delay element, a phase detector, a charge pump, and a set of D-type flip-flops. The delay element may be configured to divide the VCO cycle into Nd equal phase groups, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[0119] In some examples, the synthesizer circuit 406d can be configured to generate a carrier frequency as an output frequency, while in other examples, the output frequency can be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and can be used with a quadrature generator and divider circuit to generate multiple signals with multiple different phases relative to each other at the carrier frequency. In some examples, the output frequency can be an LO frequency (fLO). In some examples, the RF circuit 406 can include an IQ or polarity converter.

[0120] FEM circuitry 408 may include a receive signal path that may include circuitry configured to operate on RF signals received from antenna array 411, amplify the received signals, and provide an amplified version of the received signals to RF circuitry 406 for further processing. FEM circuitry 408 may also include a transmit signal path that may include circuitry configured to amplify signals for transmission provided by RF circuitry 406 for transmission by one or more antenna elements in antenna array 411. Amplification by either the transmit signal path or the receive signal path may be accomplished only in RF circuitry 406, only in FEM circuitry 408, or in both RF circuitry 406 and FEM circuitry 408.

[0121] In some examples, FEM circuit 408 may include a TX / RX switch to switch between transmit mode and receive mode operation. FEM circuit 408 may include a receive signal path and a transmit signal path. The receive signal path of FEM circuit 408 may include an LNA to amplify a received RF signal and provide the amplified received RF signal as an output (e.g., to RF circuit 406). The transmit signal path of FEM circuit 408 may include a power amplifier (PA) for amplifying an input RF signal (e.g., provided by RF circuit 406), and one or more filters for generating an RF signal for subsequent transmission by one or more antenna elements of antenna array 411.

[0122] The antenna array 411 includes one or more antenna elements, each of which is configured to convert an electrical signal into a radio wave to travel through the air and convert the received radio wave into an electrical signal. For example, a digital baseband signal provided by the baseband circuit 410 is converted into an analog RF signal (e.g., a modulated waveform), which is amplified and transmitted using the antenna elements of the antenna array 411 including one or more antenna elements (not shown). The antenna elements may be omnidirectional, directional, or a combination thereof. The antenna elements may be formed into a variety of arrangements as known and / or discussed herein. The antenna array 411 may include a microstrip antenna or a printed antenna fabricated on the surface of one or more printed circuit boards. The antenna array 411 may be formed as a patch of metal foil of various shapes (e.g., a patch antenna) and may be coupled to the RF circuit 406 and / or the FEM circuit 408 using a metal transmission line or the like.

[0123] The processor of the application circuit 205 / 305 and the processor of the baseband circuit 410 can be used to execute elements of one or more instances of the protocol stack. For example, the processor of the baseband circuit 410 can be used alone or in combination to perform layer 3, layer 2, or layer 1 functions, while the processor of the application circuit 205, 305 can utilize data received from these layers (e.g., packet data) and further perform layer 4 functions (e.g., TCP and UDP layers). As mentioned herein, layer 3 may include an RRC layer, which will be described in further detail below. As mentioned herein, layer 2 may include a MAC layer, an RLC layer, and a PDCP layer, which will be described in further detail below. As mentioned herein, layer 1 may include a PHY layer of a UE / RAN node, which will be described in further detail below.

[0124] Figure 5 Various protocol functions that can be implemented in a wireless communication device are shown. Specifically, Figure 5 An arrangement 500 is included to illustrate the interconnection between various protocol layers / entities. Various protocol layers and entities operating in conjunction with the 5G NR system standard and the LTE system standard are provided. Figure 5 The following description, but Figure 5 Some or all aspects of the invention may also be applicable to other wireless communication network systems.

[0125] In addition to other higher layer functions not shown, the protocol layers of arrangement 500 may also include one or more of PHY 510, MAC 520, RLC 530, PDCP 540, SDAP 547, RRC 555, and NAS layer 557. These protocol layers may include one or more service access points (e.g., Figure 5Items 559, 556, 550, 549, 545, 535, 525 and 515).

[0126] PHY 510 can send and receive physical layer signals 505, which can be received from or sent to one or more other communication devices. Physical layer signals 505 may include one or more physical channels, such as those discussed herein. PHY 510 may also perform link adaptation or adaptive modulation and coding (AMC), power control, cell search (e.g., for initial synchronization and switching purposes) and other measurements used by higher layers (e.g., RRC 555). PHY 510 may also further perform error detection on transmission channels, forward error correction (FEC) encoding and decoding of transmission channels, modulation and demodulation of physical channels, interleaving, rate matching, mapping to physical channels, and MIMO antenna processing. In some examples, an instance of PHY 510 may use one or more PHY-SAP 515 to process requests from an instance of MAC 520 and provide instructions thereto. In some examples, requests and instructions transmitted using PHY-SAP 515 may include one or more transmission channels.

[0127] An instance of MAC 520 may process requests from and provide indications to an instance of RLC 530 using one or more MAC-SAPs 525. These requests and indications transmitted using MAC-SAPs 525 may include one or more logical channels. MAC 520 may perform mapping between logical channels and transport channels, multiplexing MAC SDUs from one or more logical channels onto transport blocks (TBs) to be delivered to PHY 510 using transport channels, demultiplexing MAC SDUs from TBs delivered from PHY 510 using transport channels to one or more logical channels, multiplexing MAC SDUs onto TBs, scheduling information reporting, error correction through HARQ, and logical channel prioritization.

[0128] An instance of RLC 530 may process requests from an instance of PDCP 540 and provide indications thereto using one or more radio link control service access points (RLC-SAPs) 535. These requests and indications transmitted using RLC-SAPs 535 may include one or more RLC channels. RLC 530 may operate in a variety of operating modes, including: transparent mode (TM), unacknowledged mode (UM), and acknowledged mode (AM). RLC 530 may perform transmission of upper layer protocol data units (PDUs), error correction through automatic repeat request (ARQ) for AM data transmission, and concatenation, segmentation, and reassembly of RLC SDUs for UM and AM data transmission. RLC 530 may also perform resegmentation of RLC data PDUs for AM data transmission, reorder RLC data PDUs for UM and AM data transmission, detect duplicate data for UM and AM data transmission, discard RLC SDUs for UM and AM data transmission, detect protocol errors for AM data transmission, and perform RLC re-establishment.

[0129] An instance of PDCP 540 may utilize one or more Packet Data Convergence Protocol Service Access Points (PDCP-SAP) 545 to process requests from an instance of RRC 555 or an instance of SDAP 547, or both, and provide indications thereto. These requests and indications transmitted using PDCP-SAP 545 may include one or more radio bearers. PDCP 540 may perform header compression and decompression of IP data, maintain PDCP sequence numbers (SNs), perform in-order delivery of higher layer PDUs when lower layers are reestablished, eliminate duplication of lower layer SDUs when lower layers are reestablished for radio bearers mapped on RLC AM, encrypt and decrypt control plane data, perform integrity protection and integrity verification on control plane data, control timer-based data discard, and perform security operations (e.g., encryption, decryption, integrity protection, or integrity verification).

[0130] An instance of SDAP 547 may utilize one or more SDAP-SAPs 549 to process requests from one or more higher layer protocol entities and provide instructions thereto. These requests and instructions transmitted using SDAP-SAPs 549 may include one or more QoS flows. SDAP 547 may map QoS flows to data radio bearers (DRBs) and vice versa, and may also mark QoS flow identifiers (QFIs) in DL and UL packets. A single SDAP entity 547 may be configured for a separate PDU session. In the UL direction, NG-RAN 110 may control the mapping of QoS flows to DRBs in two different ways (reflective mapping or explicit mapping). For reflective mapping, SDAP 547 of UE 101 may monitor the QFI of the DL packets of each DRB, and may apply the same mapping to packets flowing in the UL direction. For DRBs, SDAP 547 of UE 101 may map UL packets belonging to a QoS flow corresponding to the QoS flow ID and PDU session observed in the DL packets of the DRB. To implement reflective mapping, the NG-RAN may mark the DL packets with a QoS flow ID over the Uu interface. The explicit mapping may involve the RRC 555 configuring the SDAP 547 with explicit mapping rules of QoS flows to DRBs, which may be stored and followed by the SDAP 547. In some examples, the SDAP 547 may be used only in NR implementations and may not be used in LTE implementations.

[0131] The RRC 555 may configure aspects of one or more protocol layers using one or more management service access points (M-SAPs), which may include one or more instances of PHY 510, MAC 520, RLC 530, PDCP 540, and SDAP 547. In some examples, an instance of the RRC 555 may process requests from one or more NAS entities 557 using one or more RRC-SAPs 556 and provide instructions thereto. The main services and functions of the RRC 555 may include broadcasting of system information (e.g., included in a master information block (MIB) or system information block (SIB) related to NAS), broadcasting of system information related to the access stratum (AS), paging, establishment, maintenance, and release of an RRC connection between the UE 101 and the RAN 110 (e.g., RRC connection paging, RRC connection establishment, RRC connection modification, and RRC connection release), establishment, configuration, maintenance, and release of point-to-point radio bearers, security functions including key management, inter-RAT mobility, and measurement configuration for UE measurement reporting. The MIB and SIB may include one or more information elements, each of which may include separate data fields or data structures.

[0132] NAS 557 may form the highest layer of the control plane between UE 101 and AMF. NAS 557 may support the mobility and session management procedures of UE 101 to establish and maintain an IP connection between UE 101 and P-GW in the LTE system.

[0133] In some examples, one or more protocol entities of arrangement 500 may be implemented in UE 101, RAN node 111, AMF in NR implementation or MME in LTE implementation, UPF in NR implementation or S-GW and P-GW in LTE implementation, etc., for control plane or user plane communication protocol stacks between the aforementioned devices. In some examples, one or more protocol entities that may be implemented in one or more of UE 101, gNB 111, AMF, etc. may communicate with corresponding peer protocol entities that may be implemented in or on another device (using the services of corresponding lower layer protocol entities to perform such communication). In some examples, the gNB-CU of gNB 111 may host the RRC 555, SDAP 547, and PDCP 540 of the gNB that control the operation of one or more gNB-DUs, and the gNB-DUs of gNB 111 may each host the RLC 530, MAC 520, and PHY 510 of gNB 111.

[0134] In some examples, the control plane protocol stack may include, in order from the highest layer to the lowest layer, NAS 857, RRC 855, PDCP 540, RLC 530, MAC 520, and PHY 810. In this example, upper layers 560 may be built on top of NAS 557, which includes an IP layer 561, SCTP 562, and an application layer signaling protocol (AP) 563.

[0135] In some examples such as NR implementations, AP 563 may be an NG application protocol layer (NGAP or NG-AP) 563 for an NG interface 113 defined between an NG-RAN node 111 and an AMF, or AP 563 may be an Xn application protocol layer (XnAP or Xn-AP) 563 for an Xn interface 112 defined between two or more RAN nodes 111.

[0136] The NG-AP 563 may support the functionality of the NG interface 113 and may include an elementary procedure (EP). The NG-AP EP may be an interaction unit between the NG-RAN point 111 and the AMF. The NG-AP 563 services may include two groups: UE-associated services (e.g., services related to the UE 101) and non-UE-associated services (e.g., services related to the entire NG interface instance between the NG-RAN node 111 and the AMF). These services may include functions such as, but not limited to: a paging function for sending a paging request to the NG-RAN node 111 involved in a specific paging area; a UE context management function for allowing the AMF to establish, modify or release the UE context in the AMF and the NG-RAN node 111; a mobility function for the UE 101 in ECM-CONNECTED mode, for intra-system HO to support mobility within the NG-RAN, and for inter-system HO to support mobility from / to the EPS system; a NAS signaling transmission function for transmitting or rerouting NAS messages between the UE 101 and the AMF; a NAS node selection function for determining the association between the AMF and the UE 101; an NG interface management function for setting up the NG interface and monitoring errors through the NG interface; a warning message transmission function for providing a means for transmitting a warning message using the NG interface or cancelling an ongoing warning message broadcast; a configuration transmission function for requesting and transmitting RAN configuration information (e.g., SON information, or performance measurement (PM) data) between two RAN nodes 111 using the CN 120; or a combination thereof, etc.

[0137] The XnAP 563 may support the functionality of the Xn interface 112 and may include XnAP basic mobility procedures and XnAP global procedures. The XnAP basic mobility procedures may include procedures for handling UE mobility within the NG RAN 111 (or E-UTRAN), such as handover preparation and cancellation procedures, SN state transfer procedures, UE context retrieval and UE context release procedures, RAN paging procedures, or procedures related to dual connectivity, etc. The XnAP global procedures may include procedures not related to a specific UE 101, such as Xn interface setup and reset procedures, NG-RAN update procedures, or cell activation procedures, etc.

[0138] In an LTE specific implementation, the AP 563 may be an S1 application protocol layer (S1-AP) 563 for the S1 interface 113 defined between the E-UTRAN node 111 and the MME, or the AP 563 may be an X2 application protocol layer (X2AP or X2-AP) 563 for the X2 interface 112 defined between two or more E-UTRAN nodes 111.

[0139] The S1 application protocol layer (S1-AP) 563 may support the functionality of the S1 interface, and similar to the NG-AP discussed previously, the S1-AP may include an S1-AP EP. The S1-AP EP may be an interaction unit between the E-UTRAN node 111 and the MME within the LTE CN 120. The S1-AP 563 services may include two groups: UE-associated services and non-UE-associated services. The functions performed by these services may include, but are not limited to: E-UTRAN Radio Access Bearer (E-RAB) management, UE capability indication, mobility, NAS signaling transmission, RAN Information Management (RIM), and configuration transmission.

[0140] The X2AP 563 may support the functions of the X2 interface 112 and may include an X2AP basic mobility procedure and an X2AP global procedure. The X2AP basic mobility procedure may include a procedure for handling UE mobility within the E-UTRAN 120, such as a handover preparation and cancellation procedure, an SN state transfer procedure, a UE context retrieval and a UE context release procedure, a RAN paging procedure, or a procedure related to dual connectivity, etc. The X2AP global procedure may include a procedure not related to a specific UE 101, such as an X2 interface setup and reset procedure, a load indication procedure, an error indication procedure, or a cell activation procedure, etc.

[0141] The SCTP layer (alternatively referred to as the SCTP / IP layer) 562 may provide guaranteed delivery of application layer messages (e.g., NGAP or XnAP messages in NR implementations, or S1-AP or X2AP messages in LTE implementations). The SCTP 562 may ensure reliable delivery of signaling messages between the RAN node 111 and the AMF / MME based in part on the IP protocol supported by the IP 561. The Internet Protocol layer (IP) 561 may be used to perform packet addressing and routing functions. In some implementations, the IP layer 561 may deliver and transmit PDUs using point-to-point transport. In this regard, the RAN node 111 may include L2 and L1 layer communication links (e.g., wired or wireless) with the MME / AMF to exchange information.

[0142] In some examples, the user plane protocol stack may include SDAP 547, PDCP 540, RLC 530, MAC 520, and PHY 510 in order from the highest layer to the lowest layer. The user plane protocol stack may be used for communication between UE 101, RAN node 111, and UPF 302 in NR implementation, or communication between S-GW and P-GW in LTE implementation. In this example, the upper layer 551 may be built on top of SDAP 547 and may include a user datagram protocol (UDP) and IP security layer (UDP / IP) 552, a general packet radio service (GPRS) tunneling protocol layer (GTP-U) 553 for the user plane, and a user plane PDU layer (UP PDU) 563.

[0143] The transport network layer 554 (also referred to as the "transport layer") may be built on top of the IP transport, and the GTP-U 553 may be used on top of the UDP / IP layer 552 (including the UDP layer and the IP layer) to carry the user plane PDU (UP-PDU). The IP layer (also referred to as the "Internet layer") may be used to perform packet addressing and routing functions. The IP layer may assign IP addresses to user data packets, for example, in any of the IPv4, IPv6, or PPP formats.

[0144] GTP-U 553 may be used to carry user data within the GPRS core network and between the radio access network and the core network. For example, the transmitted user data may be packets in any of the IPv4, IPv6 or PPP formats. UDP / IP 552 may provide a checksum for data integrity, port numbers for addressing different functions at the source and destination, and encryption and authentication of selected data flows. The RAN node 111 and the S-GW may exchange user plane data using a protocol stack including an L1 layer (e.g., PHY510), an L2 layer (e.g., MAC 520, RLC 530, PDCP 540 and / or SDAP 547), a UDP / IP layer 552, and a GTP-U 553 using an S1-U interface. The S-GW and the P-GW may exchange user plane data using a protocol stack including an L1 layer, an L2 layer, a UDP / IP layer 552, and a GTP-U 553 using an S5 / S8a interface. As previously discussed, the NAS protocol may support the mobility of UE 101 and session management procedures to establish and maintain an IP connection between UE 101 and the P-GW.

[0145] In addition, despite Figure 5Not shown, but an application layer may exist above AP 563 and / or transport network layer 554. The application layer may be a layer where a user of UE 101, RAN node 111, or other network element interacts with a software application, for example, executed by application circuitry 205 or application circuitry 305, respectively. The application layer may also provide one or more interfaces for the software application to interact with a communication system (such as baseband circuitry 410) of UE 101 or RAN node 111. In some examples, the IP layer or the application layer, or both, may provide functionality the same or similar to layers 5 to 7 of the Open Systems Interconnection (OSI) model, or portions thereof (e.g., OSI layer 7—application layer, OSI layer 6—presentation layer, and OSI layer 5—session layer).

[0146] Figure 6 is a block diagram illustrating components for reading instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium) and performing any one or more of the techniques described herein. Specifically, Figure 6 A schematic diagram of hardware resources 600 is shown, including one or more processors (or processor cores) 610, one or more memories or storage devices 620, and one or more communication resources 630, each of which may be communicatively coupled using a bus 640. For specific implementations where node virtualization (e.g., NFV) is utilized, a hypervisor 602 may be executed to provide an execution environment for one or more network slices or sub-slices to utilize the hardware resources 600.

[0147] Processor 610 may include processor 612 and processor 614. Processor 610 may be, for example, a central processing unit (CPU), a reduced instruction set computing (RISC) processor, a complex instruction set computing (CISC) processor, a graphics processing unit (GPU), a DSP such as a baseband processor, an ASIC, an FPGA, a radio frequency integrated circuit (RFIC), another processor (including those discussed herein), or any suitable combination thereof.

[0148] The memory / storage device 620 may include main memory, disk storage, or any suitable combination thereof. The memory / storage device 620 may include, but is not limited to, any type of volatile or non-volatile memory, such as dynamic random access memory (DRAM), static random access memory (SRAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, or solid-state storage, or a combination thereof, etc.

[0149] The communication resources 630 may include an interconnect or network interface component or other suitable device to communicate with one or more peripheral devices 604 or one or more databases 606 using the network 608. For example, the communication resources 630 may include a wired communication component (e.g., for coupling using USB), a cellular communication component, an NFC component, (or Low power consumption) components, components and other communication components.

[0150] The instructions 650 may include software, programs, applications, applet, applications, or other executable code for causing at least any one of the processors 610 to perform any one or more of the methods discussed herein. The instructions 650 may reside completely or partially in at least one of the processors 610 (e.g., in a cache memory of the processor), the memory / storage device 620, or any suitable combination thereof. In addition, any portion of the instructions 650 may be transmitted to the hardware resources 600 from any combination of the peripheral devices 604 or the database 606. Thus, the memory of the processor 610, the memory / storage device 620, the peripheral devices 604, and the database 606 are examples of computer-readable and machine-readable media.

[0151] In order to increase network coverage and support various use cases beyond the capabilities of ground-based infrastructure, 3GPP has released standards for integrating non-terrestrial networks (NTNs) into the 5G NR framework. Generally speaking, an NTN includes a network or a segment of a network that uses an air platform or a space platform to access a transmission equipment relay node or base station (BS). In the context of 5G, an NTN may have a variety of architectures and configurations as described in 3GPP Technical Specifications (TS) 38.811 and TS 38.821, the entire contents of which are incorporated herein by reference.

[0152] For example, Fig. 7AAn NTN 700 is shown, which serves UEs 701a-701c within a cell 702 and has a bent-pipe configuration aerial platform or space platform 704. UEs 701a-701c (collectively referred to as "UE 701") can be any type of UE (e.g., UE 101) and can communicate with platform 704 directly or through an intermediate terminal (such as a very small aperture terminal (VSAT)) using service links 703a-703c. In some examples, platform 704 can be an aerial vehicle, such as an unmanned aircraft system (UAS) (e.g., a tethered UAS (TUA), a lighter-than-air UAS (LTA), a heavier-than-air UAS (HTA)), or a space vehicle, such as a satellite (e.g., a low earth orbit (LEO) satellite, a medium earth orbit (MEO) satellite, a geostationary earth orbit (GEO) satellite, or a high elliptical orbit (HEO) satellite, etc.). The platform 704 may perform RF filtering, frequency conversion, and amplification on signals received from the UE 701, and may transmit the processed signals to the gateway 706 (or vice versa) using the feeder link 705. In this way, the platform 704 acts as an air relay node or a spatial relay node (e.g., a "bent pipe") between the UE 701 and the gateway 706. The gateway 706 may provide the signals received from the platform 704 to the BS 708 (e.g., a gNB or other RAN node 111), which interacts with the core network 710 (e.g., a 5G core network or other core network 120) to connect the NTN 700 to the core network 710. In some examples, the BS 708 may include or otherwise perform the functions of the gateway 706.

[0153] Figure 7B Another exemplary NTN 720 is shown for serving a UE 701 within a cell 702. Unlike the NTN 700, the NTN 720 includes a regenerative configuration aerial platform or space platform 722. In this configuration, in addition to the RF filtering, frequency conversion, and amplification operations performed by the bent pipe configuration platform (e.g., platform 704), the platform 722 can also perform demodulation / decoding, switching / routing, and coding / modulation operations on the signal received from the UE 701. In this way, the platform 722 effectively operates as an aerial or space BS (e.g., a gNB or other RAN node 111). Due to this added functionality, the platform 722 does not need to interact with a terrestrial BS (e.g., BS 708), but instead can communicate with a gateway 706, which is part of or interacts with the core network 710.

[0154] Regardless of the specific configuration, there are certain challenges in supporting NTN within the 5G NR framework. One challenge stems from the large signal propagation delay between the UE and the BS over the air or space link, as the propagation delay can exceed one transmission time interval (TTI) in some cases. In addition, the variation of signal propagation delay between a particular UE and the BS and between UEs within a cell is much larger in NTN relative to terrestrial networks due to, for example, large NTN cell sizes, terrain fluctuations within the cell, and rapid changes in the overall distance between the UE and the BS caused by the mobile platform.

[0155] In order to account for propagation delays and perform timing alignment for receiving uplink (UL) signals from different UEs, the 5G NR framework supports the use of timing advance (TA). Generally speaking, the UE uses TA to adjust the start of its UL transmission relative to the received downlink (DL) transmission. In some examples, the initial TA for the UE is calculated by the BS during the random access process (for example, when the UE transmits an access request on the physical random access channel (PRACH) during initialization or after switching from idle mode to connected mode). The calculated TA may offset (or partially offset) the propagation delay of the UL signal received from the UE at the BS. In a 5G NR system, the BS (or UE) may adjust the TA based on (N TA +N TA offset )*T C Calculate TA, where T C It is the basic time unit of the network (defined in 3GPP TS 38.211 as And where N TA and N TAoffset Depends in part on the frequency range and band used for uplink transmissions as defined in 3GPP TS 38.211. After calculating the initial TA, the BS may send a TA command to the UE in a random access response (RAR) to configure the UE with the calculated TA. The initial TA may be further adjusted by the UE (e.g., using autonomous adjustment) or the BS (e.g., using MAC, RRC, or other higher layer signaling to the UE) to account for changes in propagation delay caused by, for example, mobility of the UE or BS, or both.

[0156] For PUSCH transmission, the BS signals the slot offset value (K 2 ) and the index of the starting symbol to control the time domain resource allocation for UL transmission, as defined in Section 6.1.2 of 3GPP TS 38.214. Therefore, the time slot allocated for PUSCH transmission is where n is the time slot of the received physical downlink control channel (PDCCH) transmission with scheduled downlink control information (DCI), K 2is a slot offset based in part on the parameter set for PUSCH (in the range of 0 to 32), and μ VWX,Y and μ VDD,Y are the subcarrier spacing configurations for PUSCH and PDCCH respectively. In other words, the time slot offset K 2 is the number of time slots between the reception of a PDCCH transmission (carrying a DCI with an UL grant) and the time slot corresponding to the granted PUSCH transmission (before TA is applied). Because PUSCH transmissions are scheduled relative to the reception of a PDCCH transmission (carrying a DCI with a corresponding UL grant), non-causal time domain resource allocation occurs when a PUSCH transmission is scheduled to start before or after the reception of a PDCCH transmission. Therefore, to avoid non-causal resource allocation for PUSCH transmissions, the time gap between a PDCCH transmission (carrying a DCI with an UL grant) and the corresponding PUSCH transmission is offset (e.g., by the time slot offset K). 2 definition) should be larger than TA to allow the UE sufficient processing time to prepare for PUSCH transmission.

[0157] For example, Figure 8 An example of time domain resource allocation for a PUSCH transmission (with a large TA) is shown. In this example, after reception of a PDCCH transmission 804a, the resource allocation is performed according to a time slot offset 806a (e.g., a time slot offset K 2 ), UE 800a is scheduled for PUSCH transmission 802a. Similarly, after reception of PDCCH transmission 804b, UE 800b is scheduled for PUSCH transmission 802b according to slot offset 806b. To account for propagation delay, each of UEs 800a, 800b is configured to apply TA 808a, 808b to the scheduled PUSCH transmission 804a, 804b to produce an adjusted PUSCH transmission 810a, 810b that is scheduled for transmission prior to the initially scheduled PUSCH transmission. Thus, when received at BS 812, PUSCH transmissions 810a, 810b are time-aligned (e.g., they are received at the BS within a predetermined PUSCH reception window). However, UE 800a has a larger TA 808a relative to TA 808b of UE 800b (e.g., due to a larger overall distance between UE 800a and BS 812, such as when UE 800a and BS 812 are communicatively coupled via an NTN). Therefore, due to causal constraints and the processing time required by UE 800a, the time slot offset 806a limited to a maximum of 32 time slots under the 5G NR standard may not be sufficient to support PUSCH transmission 810a after applying the large TA 808a.

[0158] To avoid non-causal time domain resource allocation for PUSCH transmissions and to accommodate the larger propagation delays (and TA values) commonly seen in NTNs, the techniques described herein define an additional time slot offset denoted S, which may be in addition to the indicated time slot offset K. 2 The value of the additional time slot offset S can be derived based on the TA value (or component of the TA value) in the time slot (denoted as G). By effectively increasing the time slot offset K 2 In the context of NTN networks, the techniques described herein provide greater flexibility in time domain resource allocation, which allows the network to schedule PUSCH transmissions in a manner that meets causal requirements, provides sufficient time for UE processing, and accommodates large TA values, among other benefits. Since the additional time slot offset is derived based on the TA (e.g., at the UE), no additional signaling from the BS is required. Although discussed in the context of resource allocation for PUSCH transmissions in NTN networks, the techniques described herein are applicable to allocations for other transmissions in any 5G NR network, such as physical uplink control channel (PUCCH) transmissions with hybrid automatic repeat request (HARQ) feedback, especially those with large cell sizes.

[0159] According to the techniques described herein, the time slot offset between the reception of a PDCCH (carrying a DCI with an UL grant) and the time slot corresponding to a PUSCH transmission (before applying TA) is equal to K 2 +S, where K 2 Indicated by the BS to the UE (as described above), and S is derived by the UE from the TA value (or component of the TA value) in the time slot (denoted as G). In some examples, S=ceil(G) or S=ceil(G)+1, where ceil is an upper limit function. In some examples, S=floor(G) or S=floor(G)+1, where floor is a lower limit function. The value of S may be per beam or per cell. In some examples, whether to use an additional time slot offset S is configured by MAC, RRC or other higher layer signaling. In some examples, whether to use an additional time slot offset S is indicated to the UE in the RAR received from the BS. In some examples, whether to use an additional time slot offset S is indicated to the UE in the system information block (SIB).

[0160] In some examples, G is a full TA value (in timeslot), which may include an initial TA value indicated to the UE in a RAR message or through other signaling, and any adjustments to the TA value (e.g., by the UE, the BS, or both). In some examples, G is a portion of a TA value (in timeslot) indicated to the UE in a RAR message or through other signaling. For example, see Fig. 9, the signal propagation delay D (900) between a particular UE 902 and a BS 904 can be represented as the sum of two addends D1 (906) and D2 (908), where addend D1 (906) represents a "common" signal propagation delay (which is constant for all UEs within a cell 910) and addend D2 (908) represents a differential signal propagation delay (which depends on the location of the UE 902 within the cell 910). In some examples, the common delay D1 can be measured from a point 912 representing a minimum propagation delay or an average propagation delay for the cell 910. In some examples, the differential delay D2 can be determined based on the difference between the total signal propagation delay D of the UE 902 and the common delay D1.

[0161] Thus, in some examples, the TA for the UE may be divided into two parts such that TA=TA1+TA2, where TA1 corresponds to a common propagation delay D1 and TA2 corresponds to a differential propagation delay D2. G may then be determined based on a portion of the TA (e.g., G may be TA1 or TA2 (in a time slot)) or the entire TA (e.g., G may be TA=TA1+TA2). In some examples, TA1 is broadcasted by the BS to the UEs within the cell. In some examples, TA1 is indicated to the UE in a physical broadcast channel (PBCH) transmission. In some examples, TA1 is indicated to the UE in an SIB. In some examples, TA2 is indicated to the UE in an RAR message. In some examples, TA2 may be adjusted using a TA adjustment command from the BS to the UE or by autonomous adjustment of the UE. In some examples, TA1, TA2, or TA or a combination thereof is determined based on the absolute or relative position of a satellite (or other air or space platform) or the UE or both (e.g., by the BS or the UE).

[0162] Fig.10 A flow chart of an exemplary process 1000 for time slot offset determination is shown. In some examples, Figures 1 to 9 An electronic device, network, system, chip or component, or a portion or specific implementation thereof, may be configured to perform process 1000.

[0163] Operations of process 1000 include receiving a PDCCH that includes DCI that schedules transmission of a PUSCH (1002). The PDCCH may be received, for example, by a UE (e.g., UE 101, 701) from a BS (e.g., BS 708, 722 or other RAN node 111), each of which may operate in an NTN (e.g., NTN 700, 720). A time slot offset for transmission of the PUSCH is also received (1004). The time slot offset may correspond to a time slot offset K. 2 , and reception can be achieved at the UE from the BS.

[0164] An additional time slot offset is determined based on the TA value (1006). The TA value may be configured to offset the signal propagation delay between the UE and the BS, and may be received from the BS in a RAR message or through other signaling implementations. In some examples, determining an additional time slot offset (e.g., time slot offset S) includes applying an upper limit function to the TA value in the time slot. In some examples, determining an additional time slot offset includes applying a lower limit function to the TA value in the time slot. The additional time slot offset may be determined based on the full TA value (in the time slot) including any TA adjustment applied by the UE or BS. In some examples, the additional time slot offset is determined based on a common component of the TA value (in the time slot), which may be indicated to the UE in the SIB or PBCH. In some examples, the additional time slot offset is determined based on a differential component of the TA value (in the time slot), which may be indicated in the RAR message. In some examples, the additional time slot offset is determined based on the common component of the TA value and the differential component of the TA value, which may also include any adjustment of the TA value by the UE or BS. In some examples, the common component or the differential component or both are determined based at least in part on one or more network parameters, such as the location of an aerial or space platform in the NTN, the location of a BS, the location of a UE, or a combination thereof, and the like.

[0165] A total slot offset is determined based on the slot offset and the additional slot offset (1008). For example, the total slot offset may be determined based on the sum of the slot offset and the additional slot offset. In some examples, a configuration message is received indicating whether the total slot offset is determined based on the slot offset or based on the slot offset and the additional slot offset. The configuration message may be received from the BS in an RAR, in an SIB, in a PBCH, or in other higher layer signaling. A PUSCH is transmitted based on the total slot offset and the TA value (1010).

[0166] Fig.11 A flow chart of an exemplary process 1100 for time slot offset determination is shown. In some examples, Figures 1 to 9 An electronic device, network, system, chip or component, or a portion or specific implementation thereof, may be configured to perform process 1100.

[0167] The operations of process 1100 include transmitting a PDCCH to a UE, the PDCCH including DCI scheduling transmission of a PUSCH (1102). The PDCCH may be transmitted to a UE (e.g., UE 101, 701) by, for example, a BS (e.g., BS 708, 722 or other RAN node 111), each of which may operate in an NTN (e.g., NTN 700, 720). A slot offset and a timing advance value for transmission of the PUSCH are also transmitted to the UE (1104). The slot offset may correspond to a slot offset K. 2, and the timing advance value may be an initial TA value or an adjustment to a previously configured TA value. The slot offset and timing advance value may be transmitted to the UE as part of the same or separate transmissions.

[0168] For example, a PUSCH is received at a BS from a UE (1106). The PUSCH is transmitted (e.g., by the UE) based on a timing advance and a total slot offset determined based on the slot offset and an additional slot offset derived from the timing advance. The additional slot offset (e.g., slot offset S) may be derived based on techniques described herein. In some examples, the additional slot offset is derived based on a full TA value (e.g., G) (in a slot), which may include any adjustments to the TA value by the UE or the BS or both. In some examples, the additional slot offset is derived based on a portion of the TA value (in a slot), such as a common component of the TA value or a differential component of the TA value or both.

[0169] It is understood that the use of personally identifiable information should be subject to privacy policies and practices that are generally recognized to meet or exceed industry or government requirements for maintaining user privacy. Specifically, personally identifiable information data should be managed and processed to minimize the risk of unintentional or unauthorized access or use, and the nature of the authorized use should be clearly stated to users.

[0170] In different specific implementations, the methods described herein can be implemented in software, hardware, or a combination thereof. In addition, the order of the blocks of the method can be changed, and various elements can be added, reordered, combined, omitted, modified, etc. Various modifications and changes can be made, which will be apparent to those skilled in the art who benefit from this disclosure. The various specific implementations described herein are intended to be illustrative and not restrictive. Many variations, modifications, additions, and improvements are possible. Therefore, multiple examples can be provided for the components described herein as a single example. The boundaries between various components, operations, and data repositories are arbitrary to a certain extent, and specific operations are shown in the context of a specific exemplary configuration. Other allocations of functions are contemplated, and they may fall within the scope of the appended claims. Finally, the structure and function presented as discrete components in the exemplary configuration may be implemented as a combined structure or component.

[0171] In various examples, one or more of the techniques described herein may be implemented by: a system; an apparatus; one or more non-transitory computer-readable media comprising instructions that, when executed by one or more processors of an electronic device, cause the electronic device to perform one or more of the techniques described herein; a method, technique or process, a datagram, a packet, a frame, a segment, a protocol data unit (PDU) or a message; a signal encoded with data; an electromagnetic signal carrying computer-readable instructions, wherein execution of the computer-readable instructions by one or more processors causes the one or more processors to perform one or more of the techniques described herein; a computer program comprising instructions, wherein execution of the program by a processing element causes the processing element to perform one or more of the techniques described herein; or a chip, a microchip, a system on a chip, an integrated circuit; or a combination thereof, and the like.

[0172] The following terms and definitions may apply to the examples described herein.

[0173] The term "circuit" as used herein refers to a circuit or a system of multiple circuits configured to perform a specific function in an electronic device. A circuit or circuit system may be part of or include a hardware component such as an electronic circuit, a logic circuit, a processor (shared, dedicated or group) and / or a memory (shared, dedicated or group) configured to provide the function, an application specific integrated circuit (ASIC), a field programmable device (FPD) (e.g., a field programmable gate array (FPGA), a programmable logic device (PLD), a complex PLD (CPLD), a high capacity PLD (HCPLD), a structured ASIC or a programmable SoC), a digital signal processor (DSP), etc. In some examples, a circuit may execute one or more software or firmware programs to provide at least some of the functions. The term "circuit" may also refer to a combination of one or more hardware elements and a program code for performing the function of the program code (or a combination of circuits used in an electrical or electronic system). In these examples, the combination of hardware elements and program codes may be referred to as a circuit of a specific type.

[0174] As used herein, the term "processor circuit" refers to, is part of, or includes a circuit capable of sequentially and automatically performing a series of arithmetic or logical operations or recording, storing, and / or transmitting digital data. The term "processor circuit" may refer to one or more application processors, one or more baseband processors, a physical central processing unit (CPU), a single-core processor, a dual-core processor, a triple-core processor, a quad-core processor, and / or any other device capable of executing or otherwise operating computer-executable instructions (such as program code, software modules, and / or functional processes). The terms "application circuit" and / or "baseband circuit" may be considered synonymous with "processor circuit" and may be referred to as "processor circuit".

[0175] As used herein, the term "memory" and / or "memory circuit" refers to one or more hardware devices for storing data, including random access memory (RAM), magnetoresistive RAM (MRAM), phase change random access memory (PRAM), dynamic random access memory (DRAM) and / or synchronous dynamic random access memory (SDRAM), core memory, read-only memory (ROM), magnetic disk storage media, optical storage media, flash memory devices, or other machine-readable media for storing data. The term "computer-readable medium" may include, but is not limited to, memory, portable or fixed storage devices, optical storage devices, and various other media capable of storing, containing or carrying instructions or data.

[0176] As used herein, the term "interface circuit" refers to a circuit that enables, is a part of, or includes information exchange between two or more components or devices. The term "interface circuit" may refer to one or more hardware interfaces, such as a bus, an I / O interface, a peripheral component interface, a network interface card, etc.

[0177] As used herein, the term "user equipment" or "UE" refers to a device that has radio communication capabilities and can describe a remote user of network resources in a communication network. In addition, the terms "user equipment" or "UE" may be considered synonymous and may be referred to as a client, mobile phone, mobile device, mobile terminal, user terminal, mobile unit, mobile station, mobile user, subscriber, user, remote station, access agent, user agent, receiver, radio equipment, reconfigurable radio equipment, reconfigurable mobile device, etc. In addition, the term "user equipment" or "UE" may include any type of wireless / wired device or any computing device that includes a wireless communication interface.

[0178] As used herein, the term "network element" refers to physical or virtualized equipment and / or infrastructure for providing wired or wireless communication network services. The term "network element" may be considered synonymous with and / or referred to as a networked computer, networking hardware, network equipment, network node, router, switch, hub, bridge, radio network controller, RAN equipment, RAN node, gateway, server, virtualized VNF, NFVI, etc.

[0179] As used herein, the term "computer system" refers to any type of interconnected electronic devices, computer devices, or components thereof. Additionally, the terms "computer system" and / or "system" may refer to various components of a computer that are communicatively coupled to one another. Furthermore, the terms "computer system" and / or "system" may refer to multiple computer devices and / or multiple computing systems that are communicatively coupled to one another and configured to share computing and / or networking resources.

[0180] As used herein, the terms "appliance", "computer appliance", etc. refer to a computer device or computer system with program code (e.g., software or firmware) that is specifically designed to provide specific computing resources. A "virtual appliance" is a virtual machine image to be implemented by a device equipped with a hypervisor that virtualizes or emulates a computer appliance or is otherwise dedicated to providing specific computing resources.

[0181] The term "element" refers to an indivisible unit with well-defined boundaries at a given level of abstraction, where an element may be any type of entity including, for example, one or more devices, systems, controllers, network elements, modules, etc., or a combination thereof.

[0182] The term "device" refers to a physical entity that is embedded within or attached to another physical entity in its vicinity that has the capability to transfer digital information to or from that physical entity.

[0183] The term "entity" refers to the different components of an architecture or device, or the information passed as a payload.

[0184] The term "controller" refers to an element or entity that has the ability to affect a physical entity, such as by changing its state or causing the physical entity to move.

[0185] As used herein, the term "resource" refers to a physical or virtual device, a physical or virtual component within a computing environment, and / or a physical or virtual component within a specific device, such as a computer device, a mechanical device, a memory space, a processor / CPU time and / or a processor / CPU usage rate, a processor and accelerator load, a hardware time or usage rate, a power supply, an input / output operation, a port or a network socket, a channel / link allocation, throughput, memory usage rate, storage, a network, a database and an application, a unit of work, etc. "Hardware resources" may refer to computing, storage and / or network resources provided by physical hardware elements. "Virtualized resources" may refer to computing, storage and / or network resources provided by a virtualized infrastructure to an application, a device, a system, etc. The term "network resources" or "communication resources" may refer to resources that a computer device / system can access via a communication network. The term "system resources" may refer to any kind of shared entity that provides a service, and may include computing resources and / or network resources. System resources may be considered as a set of coherent functions, network data objects or services that can be accessed through a server, wherein such system resources reside on a single host or multiple hosts and can be clearly identified.

[0186] As used herein, the term "channel" refers to any tangible or intangible transmission medium for transmitting data or data streams. The term "channel" may be synonymous and / or equivalent to "communication channel", "data communication channel", "transmission channel", "data transmission channel", "access channel", "data access channel", "link", "data link", "carrier", "radio frequency carrier" and / or any other similar terms representing a path or medium through which data is transmitted. In addition, the term "link" as used herein refers to a connection between two devices for transmitting and receiving information over a RAT.

[0187] As used herein, the term "communication protocol" (wired or wireless) refers to a set of standardized rules or instructions implemented by a communication device and / or system to communicate with other devices and / or systems, including instructions for packetizing / unpacking data, modulating / demodulating signals, implementing protocol stacks, etc.

[0188] As used herein, the terms "instantiate," "instantiate," and the like refer to the creation of an instance. "Instance" also refers to a specific occurrence of an object, which may occur, for example, during the execution of program code.

[0189] The terms "coupled," "communicatively coupled," and their derivatives are used herein. The term "coupled" may mean that two or more elements are in direct physical or electrical contact with each other, may mean that two or more elements are in indirect contact with each other but still cooperate or interact with each other, and / or may mean that one or more other elements are coupled or connected between the elements said to be coupled to each other. The term "directly coupled" may mean that two or more elements are in direct contact with each other. The term "communicatively coupled" may mean that two or more elements may be in contact with each other by means of communication, including through a wire or other interconnect connection, through a wireless communication channel or link, etc.

[0190] The term "information element" refers to a structural element that contains one or more fields. The term "field" refers to the individual contents of an information element, or a data element that contains the contents.

[0191] The term "admission control" refers to a verification process in a communication system where a check is performed before a connection is established to see if current resources are sufficient for the proposed connection.

[0192] The term "SMTC" refers to the SSB-based measurement timing configuration configured by SSB-MeasurementTimingConfiguration.

[0193] The term "SSB" refers to SS / PBCH block.

[0194] The term "primary cell" refers to an MCG cell operating on a primary frequency, in which the UE either performs an initial connection establishment procedure or initiates a connection re-establishment procedure.

[0195] The term "primary SCG cell" refers to an SCG cell in which a UE performs random access when reconfiguration is performed using a synchronization procedure for DC operation.

[0196] The term "secondary cell" refers to a cell that provides additional radio resources on top of a special cell for a UE configured with CA.

[0197] The term "secondary cell group" refers to a subset of serving cells including a PSCell for a UE configured with DC and zero or more secondary cells.

[0198] The term "serving cell" refers to a primary cell for a UE in RRC_CONNECTED without CA / DC configured, where there is only one serving cell including the primary cell.

[0199] The term "serving cell" refers to a cell group including a special cell for a UE configured with CA / DC and in RRC_CONNECTED and all secondary cells.

[0200] The term "special cell" refers to the PCell of the MCG or the PSCell of the SCG for DC operation; otherwise, the term "special cell" refers to the Pcell.

Claims

1. A method comprising: Receiving a physical downlink control channel PDCCH, wherein the PDCCH includes downlink control information DCI for scheduling transmission of a physical uplink shared channel PUSCH; receiving a time slot offset for transmission of the PUSCH; determining an additional time slot offset based on the timing advance value; determining a total time slot offset based on the time slot offset and the additional time slot offset; as well as The PUSCH is transmitted based on the total slot offset and the timing advance value.

2. The method of claim 1, wherein the total time slot offset is determined based on the sum of the time slot offset and the additional time slot offset.

3. The method according to any one of claims 1 or 2, wherein determining the additional time slot offset comprises applying an upper limit function to the timing advance value in a time slot.

4. The method according to any one of claims 1 or 2, wherein determining the additional time slot offset comprises applying a floor function to the timing advance value in a time slot.

5. The method according to any one of claims 1 to 4, wherein the timing advance value is received in a random access response, RAR.

6. The method according to any one of claims 1 to 5, further comprising receiving a configuration message indicating whether the total time slot offset is determined based on the time slot offset or based on the time slot offset and the additional time slot offset.

7. The method of claim 6, wherein the configuration message is received in a RAR, in a system information block SIB, in a physical broadcast channel PBCH, or via higher layer signaling.

8. The method according to any one of claims 1 to 7, wherein the additional time slot offset is determined based on a full timing advance value including a timing advance adjustment.

9. The method according to any one of claims 1 to 8, wherein the additional time slot offset is determined based on a common component of the timing advance value.

10. The method of claim 9, wherein the common component of the timing advance value is indicated in a SIB or a PBCH.

11. The method according to any one of claims 1 to 10, wherein the additional time slot offset is determined based on a differential component of the timing advance value.

12. The method of claim 11, wherein the differential component of the timing advance value is indicated in a RAR.

13. The method according to any one of claims 1 to 12, wherein the additional time slot offset is determined based on a common component of the timing advance value and a differential component of the timing advance value. The method of claim 13 , wherein at least one of the common component or the differential component is determined based on one or more network parameters.

15. The method of claim 14, wherein the one or more network parameters include at least one of a location of an air platform or a space platform or a location of a user equipment UE in a non-terrestrial network NTN.

16. The method according to any one of claims 1 to 15, wherein the additional time slot offset is determined based on a common component of the timing advance value, a differential component of the timing advance value, and an adjustment to the timing advance value.

17. The method according to any one of claims 1 to 16, wherein the time slot offset is received from a non-terrestrial base station.

18. The method according to any one of claims 1 to 17, wherein the method is performed by a UE.

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