A method for preparing a solar cell and a solar cell

By using gradient increase in laser power in solar cells to process doped polysilicon layer, the problem of silicon wafer damage during laser removal is solved, the open circuit voltage and efficiency are improved, the laser life is extended, and the silicon wafer fragmentation rate is reduced.

CN119997655BActive Publication Date: 2025-07-22JINKO SOLAR (HAINING) CO LTS
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Patent Information

Application Number
CN202510451719.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-04-10
Publication Date
2025-07-22
Estimated Expiration
2045-04-10

AI Technical Summary

Technical Problem

In the prior art, when laser power uniformly removes the doped polysilicon layer of the tunneled oxide passivation contact (TOPCon) battery, the damage at the thinner position of the doped polysilicon layer in the silicon wafer is increased, affecting the increase of the open circuit voltage.

Method used

The doped polysilicon layer is processed using laser technology of different powers, and the laser power is gradually increased along the center of the base layer to the outer peripheral edge. The thickness interval is divided according to the thickness of the doped polysilicon layer, and the doped polysilicon layer in each interval is removed using lasers of different powers.

Benefits of technology

It reduces damage in the intermediate area of the solar cell, improves open circuit voltage and efficiency, extends the service life of the laser, and reduces the silicon chip debris rate.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application relates to the technical field of solar cells, and particularly to a preparation method of a solar cell and a solar cell. The solar cell includes a base layer having a first surface and a second surface disposed opposite to each other. The first surface has a first region and a second region. The preparation method includes: forming a doped polysilicon layer on the first surface; using a laser process with different powers to remove the doped polysilicon layer located in the first region. Along the direction from the center of the base layer to the outer periphery, as the thickness of the doped polysilicon layer gradually increases, the power of the laser process gradually increases. According to the thickness of different regions of the doped polysilicon layer, this application sets corresponding laser powers, avoiding using a large power to remove the doped polysilicon layer in the thinner middle region, causing damage to the middle region of the solar cell, and achieving the improvement of the open-circuit voltage, efficiency, service life of the laser, and reduction of the fragmentation rate of the silicon wafer during the laser treatment while ensuring the removal of the doped polysilicon layer.
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Description

Technical Field

[0001] This application relates to the technical field of solar cells, and particularly to a preparation method of a solar cell and a solar cell. Background Art

[0002] At present, for tunnel oxide passivated contact (TOPCon) cells, the thickness distribution of the doped polysilicon layer on the back of the silicon wafer after phosphorus diffusion has the characteristic of being thinner in the middle and thicker at the edges. In order to ensure that the doped polysilicon layer can be removed completely, the current laser power is set uniformly.

[0003] However, the uniform laser power will increase the damage to the thinner position of the doped polysilicon layer in the middle of the silicon wafer, which is not conducive to the improvement of the open-circuit voltage. Summary of the Invention

[0004] The embodiments of this application provide a preparation method of a solar cell and a solar cell, aiming to reduce the laser damage on the back of the solar cell, improve the open-circuit voltage, and increase the efficiency of the solar cell.

[0005] The embodiments of this application provide a preparation method of a solar cell. The solar cell includes a base layer, the base layer has a first surface and a second surface which are oppositely arranged, the first surface has a first region and a second region, and the preparation method includes:

[0006] Form a doped polysilicon layer on the first surface;

[0007] Use laser processes with different powers to process the doped polysilicon layer located in the first region. Along the direction from the center of the base layer to the outer periphery, divide the thickness range of the doped polysilicon layer in the first region into thickness intervals with a preset thickness increase as a gradient. As the thickness of the doped polysilicon layer in each thickness interval gradually increases, the power of the laser process gradually increases.

[0008] In a possible design, in the step of gradually increasing the power of the laser process as the thickness of the doped polysilicon layer gradually increases, the preparation method further includes:

[0009] Along the direction from the center of the base layer to the outer periphery, when the thickness of the doped polysilicon layer increases by 3 nm each time, the power of the laser process increases by 1% - 2%.

[0010] In a possible design, after the step of forming the doped polysilicon layer on the first surface, the preparation method further includes:

[0011] Measure the thickness of the doped polysilicon layer in the first region along the direction from the center to the outer periphery of the base layer, and divide the thickness of the doped polysilicon layer in the first region into n thickness intervals with an increase of the preset thickness as a gradient;

[0012] Among them, the n thickness intervals at least include a first thickness interval and a second thickness interval. The doped polysilicon layer in the second thickness interval is closer to the outer periphery of the base layer than the doped polysilicon layer in the first thickness interval. The laser process is at least provided with a first laser and a second laser. The first laser processes the doped polysilicon layer in the first thickness interval, and the second laser processes the doped polysilicon layer in the second thickness interval. The power of the second laser is greater than the power of the first laser. In a possible design, the power of the laser process is 45W - 60W.

[0013] In a possible design, the frequency of the laser process is 600KHz;

[0014] The speed of the laser process is 50000mm / s, and the pulse width of the laser process is 0.5μs.

[0015] In a possible design, in the step of processing the doped polysilicon layer in the first region by using the laser process, the preparation method further includes:

[0016] Perform at least 2 laser etchings on the doped polysilicon layer in the first region by using the laser process.

[0017] In a possible design, after the step of processing the doped polysilicon layer in the first region by using the laser process, the preparation method further includes:

[0018] Clean the first region with an alkaline solution.

[0019] In a possible design, the preparation method further includes:

[0020] Texturize the first surface to form a first tower base;

[0021] The size of the first tower base in the first region after cleaning with the alkaline solution is a, and the size of the first tower base in the second region is b, where 2 ≤ a / b ≤ 4.

[0022] In a possible design, the preparation method further includes:

[0023] Form a first electrode on the second region.

[0024] An embodiment of the present application further provides a solar cell, which is prepared by the preparation method of the above-mentioned solar cell. The solar cell includes a base layer having a first surface and a second surface disposed opposite to each other;

[0025] A tunneling oxide layer, a doped polysilicon layer, a back antireflection layer, and a first electrode are formed on the first surface.

[0026] The beneficial effects of the embodiment of the present application are as follows: According to the thickness of different regions of the doped polysilicon layer, the corresponding laser power is set, avoiding the use of a large power to remove the doped polysilicon layer in the thinner middle region, causing damage to the middle region of the solar cell, thereby realizing the improvement of the open-circuit voltage, the improvement of the efficiency, the improvement of the service life of the laser, and the reduction of the fragmentation rate of the silicon wafer during the laser treatment process while ensuring the removal of the doped polysilicon layer.

[0027] It should be understood that the above general description and the following detailed description are only exemplary and do not limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 is a cross-sectional view of a partial structure of the solar cell provided by the present application;

[0029] Figure 2 is a schematic view of the first surface of the solar cell provided by the present application;

[0030] Figure 3 is a schematic view of forming a tunneling oxide layer on the first surface of the solar cell provided by the present application;

[0031] Figure 4 is a schematic view of forming a doped polysilicon layer on the first surface of the solar cell provided by the present application;

[0032] Figure 5 is a schematic view of processing the doped polysilicon layer in the first region of the first surface by a laser process;

[0033] Figure 6 is a schematic view of each thickness gradient of the doped polysilicon layer in the first region of the first surface provided by the present application;

[0034] Figure 7 is a schematic view of using a corresponding laser for the thickness of the doped polysilicon layer corresponding to the first region provided by the present application.

[0035] REFERENCE MARKS:

[0036] 1 - Solar cell;

[0037] 11 - Base layer;

[0038] 11a - First surface;

[0039] 11a1 - First region;

[0040] 11a2 - Second region;

[0041] 11b - Second surface;

[0042] 12 - Tunneling oxide layer;

[0043] 13 - Doped polysilicon layer;

[0044] 13a - Amorphous silicon;

[0045] 14 - Back anti - reflection layer;

[0046] 15 - First electrode;

[0047] 16 - Emitter;

[0048] 17 - Passivation layer;

[0049] 18 - Front anti - reflection layer;

[0050] 19 - Second electrode;

[0051] 21 - First thickness interval;

[0052] 22 - Second thickness interval;

[0053] 23 - Third thickness interval;

[0054] 31 - First laser;

[0055] 32 - Second laser;

[0056] 33 - Third laser.

[0057] The accompanying drawings herein are incorporated into and constitute a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application. Detailed embodiments

[0058] To better understand the technical solutions of the present application, the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0059] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts belong to the scope protected by the present application.

[0060] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The singular forms "a", "the", and "said" used in the embodiments of the present application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0061] It should be understood that the term "and / or" used herein is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0062] It should be noted that the orientation terms such as "upper", "lower", "left", and "right" described in the embodiments of the present application are described from the angles shown in the drawings and should not be construed as a limitation on the embodiments of the present application. In addition, in the context, it should also be understood that when it is mentioned that an element is connected "above" or "below" another element, it can not only be directly connected "above" or "below" another element, but also be indirectly connected "above" or "below" another element through an intermediate element.

[0063] As Figure 1 shown is a cross-sectional schematic view of the solar cell 1. The solar cell 1 includes a base layer 11, and the base layer 11 is an N-type silicon substrate. The base layer 11 has a first surface 11a and a second surface 11b which are oppositely arranged. A tunneling oxide layer 12, a doped polysilicon layer 13, a back antireflection layer 14, and a first electrode 15 are sequentially formed on the first surface 11a of the solar cell 1. An emitter 16, a passivation layer 17, a front antireflection layer 18, and a second electrode 19 are sequentially formed on the second surface 11b of the solar cell 1.

[0064] Among them, as Figure 2 shown is a schematic view of the first surface 11a of the solar cell 1. Both the first surface 11a and the second surface 11b have a first region 11a1 and a second region 11a2. The second region 11a2 refers to the region on the first surface 11a where the metal electrode is provided, and the first region 11a1 refers to the region on the first surface 11a where the metal electrode is not provided. That is to say, the region on the first surface 11a other than the second region 11a2 is the first region 11a1. The distribution of the first region 11a1 and the second region 11a2 on the second surface 11b is the same as that on the first surface 11a, and will not be elaborated herein.

[0065] Based on Figure 1 the solar cell 1 shown, the manufacturing method of the solar cell 1 may include:

[0066] S1: Texturize the first surface 11a and the second surface 11b of the base layer 11 to form a first tower base on the first surface 11a and a second tower base on the second surface 11b, reducing the reflectivity of the first surface 11a and the second surface 11b, and removing mechanical damage on the first surface 11a and the second surface 11b of the base layer 11 simultaneously.

[0067] S2: Boron dope the base layer 11 to form a PN junction to achieve the conversion of light energy into electrical energy.

[0068] S3: Remove the excess PN junction on the first surface 11a by alkali polishing treatment to avoid short - circuit caused by the formation of a diffusion layer around the first surface 11a.

[0069] S4: Continuously deposit SiO2 on the first surface 11a to form a tunneling oxide layer 12 to provide good interface passivation.

[0070] S5: Form amorphous silicon on the tunneling oxide layer 12, phosphorus dope the amorphous silicon, and form a doped polysilicon layer 13 after annealing to form a good passivated contact structure. The tunneling oxide layer 12 and the doped polysilicon layer 13 effectively reduce the interface recombination loss of the solar cell 1, improve the open - circuit voltage and fill factor of the solar cell 1, thereby enhancing the photoelectric conversion efficiency of the solar cell 1.

[0071] S6: Use a laser process to treat the doped polysilicon layer 13 in the first region 11a1 of the first surface 11a to reduce parasitic light absorption.

[0072] S7: Clean the doped polysilicon layer 13 using the RCA process.

[0073] S8: Deposit an Al2O3 electrode on the emitter 16 of the second surface 11b to form a passivation layer 17, passivate the first surface 11a, reduce the recombination rate of the first surface 11a, and increase the secondary reflection.

[0074] S9: Deposit SiNx on the doped polysilicon layer 13 to form a back anti - reflection layer 14.

[0075] S10: Deposit SiNx on the passivation layer 17 to form a front anti - reflection layer 18. Using the principle of thin - film interference, reduce the light reflection, thereby reducing the surface light reflection of the first surface 11a and improving the conversion efficiency of the solar cell 1.

[0076] S11: Perform screen printing and sintering in the second region 11a2 of the back anti - reflection layer 14 to form a first electrode 15. Perform screen printing and sintering in the second region 11a2 of the front anti - reflection layer 18 to form a second electrode 19. The first electrode 15 and the second electrode 19 can collect the current generated in the PN junction of the solar cell 1 due to light irradiation and transmit it to an external load.

[0077] In other embodiments, solar cells may be fabricated using other manufacturing processes, which are not limited in this embodiment.

[0078] Among them, please refer to Figure 3 , Figure 3 which is a schematic diagram of forming the tunneling oxide layer 12 on the silicon wafer. After removing the first surface 11a using an alkali polishing process, SiO2 is deposited on the first surface using the LPCAD (Low Pressure Chemical Vapor Deposition) process to form the tunneling oxide layer 12, and amorphous silicon 13a is formed on the tunneling oxide layer 12.

[0079] Please refer to Figure 4 , Figure 4 which is a schematic diagram of forming the doped polysilicon layer 13. The amorphous silicon 13a is continuously doped with phosphorus (the dots in the figure represent phosphorus) to form the doped polysilicon layer 13 (including PSG (Phosphosilicate Glass)).

[0080] Then, please refer to Figure 5 , Figure 5 which is a schematic diagram of processing the doped polysilicon layer 13 in the first region 11a1 of the first surface 11a using a laser process. The curved frame area in the figure represents the laser scanning area. After forming the doped polysilicon layer 13, a laser is used to scan the first region 11a1 of the first surface 11a to remove the doped polysilicon layer 13 located in the first region 11a1.

[0081] It should be noted that in actual operation, when processing the doped polysilicon layer 13 in the first region 11a1 of the first surface 11a, a part of the tunneling oxide layer 12 in the first region 11a1 of the first surface 11a may also be removed (as shown in Figure 4 ). Alternatively, in actual operation, when processing the doped polysilicon layer 13 in the first region 11a1 of the first surface 11a, a part of the tunneling oxide layer 12 in the first region 11a1 of the first surface 11a will not be removed.

[0082] Specifically, the specific process of forming the phosphorus-doped polysilicon layer 13 may be as follows:

[0083] Step 1: Place the silicon wafer processed by the LPCAD (Low Pressure Chemical Vapor Deposition) process into a phosphorus diffusion furnace tube, and complete the temperature rise T1 and leak detection.

[0084] Among them, in Step 1, when the silicon wafer enters the furnace tube, it needs to be heated to the required temperature (the temperature of opening the furnace door will decrease), and leak detection is performed to determine the furnace tube conditions. After the furnace tube conditions are qualified, the normal process can be carried out.

[0085] Specifically, the heating temperature T1 can be set between 780°C and 800°C, the constant pressure can be set between 50 mBar and 150 mBar, and the N2 flow rate can be set between 500 sccm and 4000 sccm. Among them, when the pressure setting is 1030 mBar, the airtightness is checked.

[0086] Step 2: Heat up to the preset deposition temperature T2 to complete the pre-oxygenation.

[0087] Among them, in Step 2, the function of the pre-oxygenation is to generate an oxide layer, reduce the influence of the dead layer, and improve surface passivation.

[0088] Specifically, the heating temperature T2 can be set between 800°C and 850°C, the constant pressure can be set between 50 mBar and 150 mBar, the N2 flow rate of the pre-oxygen can be set between 500 sccm and 4000 sccm, the O2 flow rate can be set between 500 sccm and 4000 sccm, and the small N2 flow rate is between 500 sccm and 4000 sccm.

[0089] Step 3: Heat up to T3 to complete the deposition.

[0090] Among them, in Step 3, impurity deposition is carried out on the surface of the silicon wafer.

[0091] Specifically, the heating temperature T3 can be set between 800°C and 860°C, the constant pressure can be set between 50 mBar and 150 mBar, the N2 flow rate of the pre-oxygen can be set between 500 sccm and 4000 sccm, the O2 flow rate can be set between 500 sccm and 4000 sccm, the small N2 flow rate can be set between 100 sccm and 4000 sccm, and the source chemical can be set as POCL3.

[0092] Step 4: Heat up to the push temperature T4 to carry out push crystallization.

[0093] Among them, in Step 4, the impurities deposited on the surface diffuse into the silicon wafer, and the high temperature crystallizes the polysilicon.

[0094] Specifically, the heating temperature T4 can be set between 870°C and 920°C, the constant pressure can be set between 50 mBar and 300 mBar, and the N2 flow rate can be set between 500 sccm and 4000 sccm.

[0095] Step 5: Oxidation cooling annealing.

[0096] Among them, in Step 5, a thicker PSG (Phosphosilicate Glass) is generated after the oxidation cooling annealing, which serves as a protective layer for the subsequent processes. The annealing segregates the metal impurities inside the silicon wafer, reducing recombination.

[0097] Specifically, the temperature reduction of oxidation to the outlet tube temperature can be set at 780°C to 860°C, the O2 flow rate can be set at 500 sccm to 4000 sccm, the N2 flow rate can be set at 500 sccm to 4000 sccm, and the constant pressure can be set at 300 mBar to 600 mBar.

[0098] In other embodiments, other manufacturing processes can be used to fabricate the doped polysilicon layer, and this embodiment does not limit it here.

[0099] Among them, in the step of forming the doped polysilicon layer 13, since the gas atmosphere around the reaction chamber (furnace tube) is more likely to contact the periphery of the silicon wafer, the generated SiO2 has the characteristics of being thin in the middle and thick at the edges. The deposited SiO2 and P2O5 also have the characteristics of being thin in the middle and thick at the edges. The doped polysilicon layer 13 formed in the subsequent oxidation annealing process also has the characteristics of being thick around and thin in the middle, resulting in the thickness distribution of PSG (Phosphosilicate Glass) in the generated doped polysilicon layer 13 being thin in the middle and thick at the edges.

[0100] In this regard, in this embodiment, in the step of using the laser process to remove the doped polysilicon layer 13 located in the first region 11a1, the preparation method further includes: along the direction from the center of the base layer 11 to the outer periphery, as the thickness of the doped polysilicon layer 13 gradually increases, the power of the laser process gradually increases.

[0101] That is to say, along the direction from the center of the base layer 11 to the outer periphery, the doped polysilicon layer 13 in the first region 11a1 is divided into thickness intervals with a preset thickness increase as a gradient. As the thickness of the doped polysilicon layer 13 in each thickness interval gradually increases, the power of the laser process gradually increases.

[0102] Specifically, as Figure 6 shown is a schematic diagram of the distribution of the doped polysilicon layer 13 in a part of the first region 11a1 on the first surface 11a. According to the thickness change of the doped polysilicon layer 13, the doped polysilicon layer 13 in this part of the first region 11a1 is divided into n thickness intervals, where n≥2. The density of the shaded part in the figure represents the thickness degree of the doped polysilicon layer 13 in each interval, that is, a large density of the shaded part indicates a thick thickness of the doped polysilicon layer 13 in this interval, and a small density of the shaded part indicates a thin thickness of the doped polysilicon layer 13 in this region.

[0103] Exemplarily, please continue to refer to Figure 6, in this embodiment, taking the doped polysilicon layer 13 in the first region 11a1 being divided into three thickness intervals as an example, along the direction from the center of the base layer 11 to the outer periphery, the doped polysilicon layer 13 in this part of the first region 11a1 is divided into a first thickness interval 21, a second thickness interval 22, and a third thickness interval 23. The doped polysilicon layer 13 in the second thickness interval 22 is closer to the outer periphery of the base layer 11 than the doped polysilicon layer 13 in the first thickness interval 21. The doped polysilicon layer 13 in the third thickness interval 23 is closer to the outer periphery of the base layer 11 than the doped polysilicon layer 13 in the second thickness interval 22. The thickness of the doped polysilicon layer 13 in the first thickness interval 21 is less than the thickness of the doped polysilicon layer 13 in the second thickness interval 22, and the thickness of the doped polysilicon layer 13 in the second thickness interval 22 is less than the thickness of the doped polysilicon layer 13 in the third thickness interval 23.

[0104] Correspondingly, as shown in FIG. 7 is a schematic diagram of processing with different laser powers according to the thickness of each thickness interval. Specifically, a first laser 31 is set to process the doped polysilicon layer 13 in the first thickness interval 21, a second laser 32 is set to process the doped polysilicon layer 13 in the second thickness interval 22, and a third laser 33 is set to process the doped polysilicon layer 13 in the third thickness interval 23. Among them, since the thickness of the doped polysilicon layer 13 in the first thickness interval 21 is less than the thickness of the doped polysilicon layer 13 in the second thickness interval 22, and the thickness of the doped polysilicon layer 13 in the second thickness interval 22 is less than the thickness of the doped polysilicon layer 13 in the third thickness interval 23, the power of the first laser 31 is set to be less than the power of the second laser 32, and the power of the second laser 32 is less than the power of the third laser 33.

[0105] Of course, according to the step change in the thickness of the doped polysilicon layer 13, the doped polysilicon layer 13 in the first region 11a1 may further include a fourth thickness interval, a fifth thickness interval, etc. Correspondingly, a fourth laser is set to process the doped polysilicon layer 13 in the fourth thickness interval, a fifth laser is set to process the doped polysilicon layer 13 in the fifth thickness interval, and so on. Specifically, it can be set according to the actual situation, and this embodiment does not limit it here.

[0106] In this embodiment, according to the thickness of different regions of the doped polysilicon layer 13, the corresponding laser power is set to avoid using a larger power to remove the doped polysilicon layer 13 in the thinner middle region and cause damage to the middle region of the solar cell 1. While ensuring the removal of the doped polysilicon layer 13, the open circuit voltage is increased, the efficiency is improved, and the fragmentation rate of the silicon wafer during the laser processing is reduced.

[0107] At the same time, it avoids waste of laser resources, increases the service life of the laser, and saves costs.

[0108] Specifically, in this embodiment, the doped polysilicon layer 13 in the first region 11a1 is set with a thickness increase gradient of 3 nm, and the laser power is adjusted accordingly by 1% - 2%. That is to say, along the direction from the center of the base layer 11 to the outer periphery, for every 3 nm increase in the thickness of the doped polysilicon layer 13, the power of the laser process increases by 1% - 2%.

[0109] Exemplarily, please continue to refer to Figure 6 and Figure 7 , in this embodiment, with a thickness change gradient of 3 nm for the doped polysilicon layer 13, the doped polysilicon layer 13 in the first region 11a1 is divided into multiple thickness intervals. Specifically, the thickness of the doped polysilicon layer 13 in the first thickness interval 21 is approximately 3 nm different from that in the second thickness interval 22, and the thickness of the doped polysilicon layer 13 in the second thickness interval 22 is approximately 3 nm different from that in the third thickness interval 23, and so on. Correspondingly, the power of the second laser 32 can be increased by 1% - 2% compared to the power of the first laser 31, and the power of the third laser 33 can be increased by 1% - 2% compared to the power of the second laser 32, and so on.

[0110] Further, for example, the thickness of the doped polysilicon layer 13 in the first thickness interval 21 can be 34 nm, and correspondingly, the power of the first laser 31 can be set to 53 W. The thickness of the doped polysilicon layer 13 in the second thickness interval 22 can be 37 nm, and correspondingly, the power of the second laser 32 can be set to 53.7 W. The thickness of the doped polysilicon layer 13 in the third thickness interval 23 can be 40 nm, and correspondingly, the power of the third laser 33 can be set to 54.4 W, and so on.

[0111] In this embodiment, if the laser power for processing the doped polysilicon layer 13 in the first thickness interval 21 is too high, such as using the power of the third laser 33 to process the doped polysilicon layer 13 in the first thickness interval 21, it may affect the base layer 11 and cause damage to the base layer 11. If the power of the third laser corresponding to the doped polysilicon layer 13 in the third thickness interval 23 is too low, such as using the power of the first laser 31 to process the doped polysilicon layer 13 in the third thickness interval 23, it may not be able to completely remove the doped polysilicon layer 13 in the third thickness interval 23.

[0112] Similarly, if the laser power for processing the doped polysilicon layer 13 in the second thickness range 22 is too high, such as using the power of the third laser 33 to process the doped polysilicon layer 13 in the second thickness range 22, it may affect the base layer 11 and cause damage to the base layer 11. If the power of the second laser corresponding to the doped polysilicon layer 13 in the second thickness range 22 is too low, such as using the power of the first laser 31 to process the doped polysilicon layer 13 in the second thickness range 22, it may not be able to completely remove the doped polysilicon layer 13 in the second thickness range 22.

[0113] Alternatively, along the direction from the center of the base layer 11 to the outer periphery, the rising preset thickness of the doped polysilicon layer 13 in the first region 11a1 can also be set to other values. For example, it can also be based on changing the thickness of the doped polysilicon layer 13 by 2 nm as a gradient, changing the thickness of the doped polysilicon layer 13 by 4 nm as a gradient, changing the thickness of the doped polysilicon layer 13 by 5 nm as a gradient, etc. The doped polysilicon layer 13 in the first region 11a1 is divided into multiple thickness ranges. Correspondingly, on the basis of being able to remove the doped polysilicon layer 13 in each thickness range and minimizing the damage to other layer structures as much as possible, the laser power corresponding to each thickness range is adjusted. It can be specifically set according to the actual situation, and this embodiment does not limit it here.

[0114] In some embodiments, the power of the laser process for processing the doped polysilicon layer 13 in the first region 11a1 can be set to 45W - 60W. Specifically, the corresponding laser power can be adjusted according to the thickness of the doped polysilicon layer 13 in each thickness range. For details, reference can be made to the above content, and this embodiment will not elaborate here. It can be specifically set according to the actual situation, increasing or decreasing the various parameters of the laser process, and this embodiment does not limit it here.

[0115] Among them, the laser can be an infrared laser, an ultraviolet laser, etc. It scans the first region 11a1 to process the doped polysilicon layer 13 in the first region 11a1, and the doped polysilicon layer 13 in the second region 11a2 will not be affected, which is convenient for subsequent etching processing.

[0116] In some embodiments, the frequency of the laser process can be 600KHz to improve efficiency. It can be specifically set according to the actual situation, increasing or decreasing the various parameters of the laser process, and this embodiment does not limit it here.

[0117] In some embodiments, the speed of the laser process can be 50000mm / s to reduce the processing time. The pulse width of the laser process can be 0.5μs, the turn-on delay of the laser process can be 40μs, and the turn-off delay of the laser process can be 100μs. It can be specifically set according to the actual situation, increasing or decreasing the various parameters of the laser process, and this embodiment does not limit it here.

[0118] In some embodiments, in the step of removing the doped polysilicon layer 13 located in the first region 11a1 by a laser process, the preparation method further includes: performing at least two laser etchings on the doped polysilicon layer 13 in the first region 11a1 by a laser process.

[0119] Since the width of a single laser scan is limited, when the laser scans each thickness interval, the number of laser scans can be adjusted according to the width range of each thickness interval to ensure that the doped polysilicon layer 13 in each thickness interval is completely removed.

[0120] Exemplarily, the number of laser scans can be 2, 3, 4, etc., which can be specifically set according to the actual situation. The number of laser scans can be increased or decreased, and this embodiment does not limit it here.

[0121] In some embodiments, the thickness of the doped polysilicon layer 13 is measured by an instrument to ensure the accuracy of the measurement. For example, an ellipsometer can be used for measurement. Alternatively, other instruments can also be used to measure the thickness of the doped polysilicon layer 13, as long as the accuracy of the thickness measurement of the doped polysilicon layer 13 is ensured, and this embodiment does not limit it here.

[0122] Specifically, after the step of forming the doped polysilicon layer 13 on the first surface 11a, the preparation method further includes: measuring the thickness of the doped polysilicon layer 13 in the first region 11a1 by an ellipsometer along the direction from the center of the base layer 11 to the outer periphery, dividing the thickness of the doped polysilicon layer 13 in the first region 11a1 into multiple thickness intervals with a gradient of 3 nm increase, and correspondingly, adjusting the laser process to perform laser etching with powers corresponding to each gradient thickness interval.

[0123] An ellipsometer is an optical measurement device used to detect the thickness of thin films, optical constants, and the microstructure of materials. The ellipsometer does not contact the sample to be measured, does not damage the sample to be measured, and does not require a vacuum test environment. The ellipsometer has the advantages of high measurement accuracy, non-contact, non-destructive, and no need for a vacuum, etc.

[0124] It should be noted that the operating principle of the ellipsometer is prior art, and this embodiment will not elaborate on it here.

[0125] After the step of processing the doped polysilicon layer 13 located in the first region 11a1 by a laser process, the preparation method further includes: cleaning the first region 11a1 with an alkaline solution.

[0126] The first region 11a1 is cleaned and modified by the alkaline solution to remove impurities in the first region 11a1 and prepare for depositing the back anti-reflection layer 14.

[0127] Among them, the alkaline solution can be a potassium hydroxide solution and an aqueous solution. Alternatively, other solutions can also be used, which can be specifically set according to the actual situation and are not limited in this embodiment.

[0128] After the first region 11a1 is cleaned with the alkaline solution, the first tower base in the first region 11a1 is etched, and the size of the first tower base increases, which can increase the number of reflections of light between the first tower bases in the first region 11a1, reduce the reflectivity of the first region 11a1, and improve the photoelectric conversion efficiency and performance of the solar cell 1.

[0129] In some embodiments, the size of the first tower base is a, and the size of the first tower base in the second region 11a2 is b, where 2 ≤ a / b ≤ 4. For example, the size of the first tower base in the first region 11a1 can be 2 times, 3 times, 4 times, etc. the size of the first tower base in the second region 11a2.

[0130] This embodiment also provides a photovoltaic module, which includes a first cover plate, a first encapsulant film, a battery string, a second encapsulant film, and a second cover plate stacked. The battery string includes a plurality of electrically connected solar cells 1. The solar cell is prepared by the preparation method described above.

[0131] Among them, the first cover plate is located on the light-facing side of the battery string, is used to transmit sunlight, and is also used to improve the waterproof and moisture-proof capabilities of the photovoltaic module, and jointly seals the battery string with the second cover plate. During the lamination process of the photovoltaic module, the first encapsulant film and the second encapsulant film are used to encapsulate the battery string, prevent the performance of the battery string from being affected by the external environment, and at the same time can bond the first cover plate, the battery string, and the second cover plate into a whole.

[0132] The materials of the first encapsulant film and the second encapsulant film can be one of materials such as ethylene-vinyl acetate copolymer (EVA), polyolefin elastomer (POE), polyvinyl butyral (PVB), etc., and can also be an EPE encapsulant film (EVA-POE-EVA co-extruded structure) or an EP encapsulant film (EVA-EP co-extruded structure).

[0133] This embodiment also provides a tandem cell, which includes a top cell, an intermediate connection layer, and a bottom cell. The intermediate connection layer is connected between the bottom cell and the top cell. The top cell is one of a perovskite cell, a cadmium telluride solar cell 1, a copper indium gallium selenide solar cell 1, or a gallium arsenide solar cell 1, and the bottom cell is the above-mentioned solar cell 1.

[0134] For the selection of the intermediate connection layer, it is usually selected from transparent materials with a high refractive index. An effective intermediate connection layer needs to have high light transmittance to reduce the reflection and absorption of light at the interface of the connection layer, and good conductivity to reduce the impact of series resistance on the device performance. Exemplarily, a transparent conductive metal oxide thin film (ITO) can be used as the intermediate connection layer.

[0135] The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A method for preparing a solar cell, characterized in that, The solar cell (1) includes a base layer (11), the base layer (11) having a first surface (11a) and a second surface (11b) disposed opposite to each other, the first surface (11a) having a first region (11a1) and a second region (11a2), and the preparation method includes: Forming a doped polysilicon layer (13) on the first surface (11a); Processing the doped polysilicon layer (13) located in the first region (11a1) by a laser process with different powers, and along the direction from the center of the base layer (11) to the outer periphery, dividing the thickness range of the doped polysilicon layer (13) in the first region (11a1) into thickness intervals with a preset thickness increase as a gradient. As the thickness of the doped polysilicon layer (13) in each thickness interval gradually increases, the power of the laser process gradually increases.

2. The manufacturing method of the solar cell according to claim 1, characterized in that, In the step where the power of the laser process gradually increases as the thickness of the doped polysilicon layer (13) gradually increases, the preparation method further includes: Along the direction from the center of the base layer (11) to the outer periphery, for every 3 nm increase in the thickness of the doped polysilicon layer (13), the power of the laser process increases by 1% - 2%.

3. The manufacturing method of the solar cell according to claim 1, characterized in that, After the step of forming the doped polysilicon layer (13) on the first surface (11a), the preparation method further includes: Along the direction from the center of the base layer (11) to the outer periphery, using an ellipsometer to measure the thickness of the doped polysilicon layer (13) in the first region (11a1), and dividing the thickness of the doped polysilicon layer (13) in the first region (11a1) into n thickness intervals with the preset thickness increase as a gradient; Wherein, the n thickness intervals at least include a first thickness interval (21) and a second thickness interval (22), the doped polysilicon layer (13) in the second thickness interval (22) is closer to the outer periphery of the base layer (11) than the doped polysilicon layer (13) in the first thickness interval (21), the laser process is at least provided with a first laser (31) and a second laser (32), the first laser (31) processes the doped polysilicon layer (13) in the first thickness interval (21), the second laser (32) processes the doped polysilicon layer (13) in the second thickness interval (22), and the power of the second laser (32) is greater than the power of the first laser (31).

4. The manufacturing method of a solar cell according to any one of claims 1 to 3, characterized in that, The power of the laser process is 45W - 60W.

5. The manufacturing method of the solar cell according to any one of claims 1 to 3, characterized in that, The frequency of the laser process is 600KHz; The speed of the laser process is 50000mm / s, and the pulse width of the laser process is 0.5μs.

6. The manufacturing method of a solar cell according to any one of claims 1 to 3, characterized in that, In the step of processing the doped polysilicon layer (13) located in the first region (11a1) by the laser process, the preparation method further includes: Performing at least 2 laser etchings on the doped polysilicon layer (13) in the first region (11a1) by the laser process.

7. The method for preparing a solar cell according to any one of claims 1 to 3, characterized in that, After the step of processing the doped polysilicon layer (13) located in the first region (11a1) by the laser process, the preparation method further includes: Clean the first region (11a1) with an alkaline solution.

8. The manufacturing method of the solar cell according to any one of claims 1 to 3, characterized in that, The preparation method further includes: Texturize the first surface (11a) to form a first pyramid base; After cleaning with the alkaline solution, the size of the first pyramid base in the first region (11a1) is a, and the size of the first pyramid base in the second region (11a2) is b, where 2 ≤ a / b ≤ 4.

9. The method for preparing a solar cell according to any one of claims 1 to 3, characterized in that, The preparation method further includes: Form a first electrode (15) on the second region (11a2).

10. A solar cell, characterized in that, The solar cell (1) is prepared by the preparation method of the solar cell (1) according to any one of claims 1 to 9. The solar cell (1) includes a base layer (11), and the base layer (11) has a first surface (11a) and a second surface (11b) that are oppositely arranged; A tunneling oxide layer (12), a doped polysilicon layer (13), a back antireflection layer (14), and a first electrode (15) are formed on the first surface (11a).

Citation Information

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