Display panel and display device

Abstract

The embodiment of the invention provides a display panel and a display device. A display area of the display panel comprises a shift register unit, a first electrode and a pixel circuit, and the first electrode is electrically connected with the pixel circuit; the display area comprises at least one first area and at least two second areas, and the second areas are located on the two sides of the first area in the first direction; the first region comprises a shift register unit and a first electrode, and the second region comprises a pixel circuit and a first electrode; the pixel circuits connected with the n first electrodes in the first area are located in one second area, the pixel circuits connected with the m first electrodes in the first area are located in the other second area, and n and m are both positive integers. The plurality of first electrodes in the first area respectively pull wires to the two second areas on the left side and the right side to be connected with the corresponding pixel circuits, the number of connecting wires arranged on a single side can be reduced, and therefore the area occupied by the connecting wires on the single side is reduced. When being applied to transparent display, the display panel can reduce the occupation of a transmission area and improve the transmittance.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] At present, in the design of borderless products, the shift register unit is placed under the light-emitting device. The shift register unit is retracted relative to the edge of the display panel and occupies the position where the pixel circuit is originally set, which causes the pixel circuit to be squeezed to the inside of the display area. The squeezed pixel circuit and the light-emitting device are electrically connected through connecting wires. With the increase of pixel density (Pixels Per Inch, pixel density) or the influence of factors such as the demand for large-size products, the number of squeezed pixel circuits will increase, resulting in an increase in the number of connecting wires between two adjacent pixel rows. The connecting wires will occupy more space, limiting the increase of PPI and transparent display effect. Summary of the invention

[0003] Embodiments of the present invention provide a display panel and a display device to solve the technical problem that an increased number of connection lines occupies more space and affects the improvement of PPI and transparent display effect.

[0004] In a first aspect, an embodiment of the present invention provides a display panel, wherein a display area of ​​the display panel includes a shift register unit, a first electrode and a pixel circuit, wherein the first electrode is electrically connected to the pixel circuit; the display area includes at least one first area and at least two second areas, wherein the second areas are located on both sides of the first area along a first direction; the first area includes a shift register unit and a first electrode, and the second area includes a pixel circuit and a first electrode; a pixel circuit connected to n first electrodes in the first area is located in one second area, and a pixel circuit connected to m first electrodes in the first area is located in another second area, wherein n and m are both positive integers.

[0005] In a second aspect, based on the same inventive concept, an embodiment of the present invention provides a display device, including a display panel provided by any embodiment of the present invention.

[0006] The display panel and display device provided by the embodiments of the present invention have the following beneficial effects: the multiple first electrodes in the first area are respectively connected to the two second areas on the left and right sides for wiring to the corresponding pixel circuits, which can reduce the number of connection lines arranged on one side, and thus reduce the area occupied by the connection lines on one side. In transparent display applications, the design of the embodiments of the present invention can reduce the occupation of the transmission area by the connection lines arranged on one side, ensure the transmittance of the transmission area, and improve the display effect of the transparent display. In non-transparent display, the design of the embodiments of the present invention can reduce the spacing distance between adjacent pairs of pixel circuits in the second direction, meeting the high PPI display requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without paying any creative labor.

[0008] Figure 1 A schematic diagram of a display panel provided by an embodiment of the present invention; Figure 2 for Figure 1 A local schematic diagram of the Q1 position in the middle area; Figure 3 A partial schematic diagram of another display panel provided by an embodiment of the present invention; Figure 4 for Figure 3 A circuit diagram of a shift register unit; Figure 5 A partial schematic diagram of another display panel provided by an embodiment of the present invention; Figure 6 for Figure 5 A circuit diagram of a shift register unit; Figure 7 A schematic diagram of another display panel provided by an embodiment of the present invention; Figure 8 A schematic diagram of a film layer structure of another display panel provided by an embodiment of the present invention; Fig. 9 A schematic diagram of another display panel provided by an embodiment of the present invention; Fig.10 A schematic diagram of another display panel provided by an embodiment of the present invention; Fig.11 A schematic diagram of another display panel provided by an embodiment of the present invention; Fig.12 A schematic diagram of another display panel provided by an embodiment of the present invention; Fig.13 A schematic diagram of another display panel provided by an embodiment of the present invention; Fig.14 A schematic diagram of another display panel provided by an embodiment of the present invention; Fig.15 A schematic diagram of a pixel circuit provided by an embodiment of the present invention; Fig.16 is a schematic diagram of a pixel circuit in the second area in an embodiment of the present invention; Fig.17 Schematic diagram of a pixel circuit in the third area in an embodiment of the present invention; Fig.18A schematic diagram of another display panel provided by an embodiment of the present invention; Fig.19 A partial schematic diagram of another display panel provided by an embodiment of the present invention; Fig. 20 A partial schematic diagram of another display panel provided by an embodiment of the present invention; Fig.21 A partial schematic diagram of another display panel provided by an embodiment of the present invention; Fig. 22 A partial schematic diagram of another display panel provided by an embodiment of the present invention; Fig.23 A partial schematic diagram of another display panel provided by an embodiment of the present invention; Fig.24 A partial schematic diagram of another display panel provided by an embodiment of the present invention; Fig.25 A schematic diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0009] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0010] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "said" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0011] Figure 1 A schematic diagram of a display panel provided by an embodiment of the present invention, Figure 2 for Figure 1 A local schematic diagram of the Q1 position in the middle area. Figure 2As shown, the display area AA of the display panel includes a shift register unit 10, a first electrode 21 and a pixel circuit 30, and the first electrode 21 is electrically connected to the pixel circuit 30; the display area AA includes at least one first area Z1 and at least two second areas Z2, and along the first direction x, the second areas Z2 are located on both sides of the first area Z1; the first area Z1 includes the shift register unit 10 and the first electrode 21, and the second area Z2 includes the pixel circuit 30 and the first electrode 21; the pixel circuit 30 connected to n first electrodes 21 in the first area Z1 is located in one second area Z2, and the pixel circuit 30 connected to m first electrodes 21 in the first area Z1 is located in another second area Z2, and n and m are both positive integers. Wherein, n+m is equal to the total number of first electrodes 21 in the first area Z1.

[0012] A second electrode 22 is also provided in the display area AA. Optionally, the first electrode 21 is an anode and the second electrode 22 is a cathode. The first electrode 21 and the second electrode 22 form an electrode pair, and the light emitting device ( Figure 2 The two electrodes of the light emitting device (not shown) are connected correspondingly. The light emitting device may be a light emitting diode (LED), such as a micro-LED, a mini-LED, etc. That is, a first electrode 21 is connected between the light emitting device and the corresponding pixel circuit 30. Figure 2 It is shown in FIG. 2 that the first electrode 21 is electrically connected to the pixel circuit 30 via the connection line 40 . Figure 2 In the figure, a plurality of second electrodes 22 arranged in the first direction x are connected to each other to form a long strip common electrode. In other embodiments, the second electrodes 22 may be independent of each other, that is, the first electrode 21 and the second electrode 22 are both block structures, which are not shown in the figure.

[0013] The display panel provided by the embodiment of the present invention is provided with a display area AA including a first area Z1 and a second area Z2, the first area Z1 is located between the two second areas Z2, the shift register unit 10 is arranged in the first area Z1, and the pixel circuits 30 connected to the first electrodes 21 located in the first area Z1 are respectively located in the two second areas Z2. Then, the multiple first electrodes 21 in the first area Z1 are respectively connected to the corresponding pixel circuits 30 by pulling wires to the two second areas Z2 on the left and right sides, so that the number of connecting wires 40 arranged on one side can be reduced, and the area occupied by the connecting wires 40 on one side is also reduced.

[0014] As the PPI increases, after the shift register unit 10 is set in the display area AA, the number of pixel circuits 30 compressed to the inside of the display area AA will increase, which will lead to an increase in the number of misalignments between the first electrode 21 and the pixel circuit 30, resulting in an increase in the number of connecting wires 40. As the size of the display panel increases, the load of the shift register unit 10 will increase, and it is necessary to increase its driving capability by increasing the size of the shift register unit 10, which will cause the shift register unit 10 located in the display area AA to occupy more space, and will also lead to an increase in the number of connecting wires 40. In transparent display applications, the increase in the number of connecting wires 40 will occupy the area of ​​the transmission area and affect the transparent display effect. The design of the embodiment of the present invention can reduce the occupation of the transmission area by the connecting wires 40 arranged on one side, ensure the transmittance of the transmission area, and improve the display effect of the transparent display. In non-transparent display, the design of the embodiment of the present invention can reduce the spacing distance between the adjacent pairs of pixel circuits 30 in the second direction y, meeting the high PPI display requirements.

[0015] In some embodiments, Figure 2 As shown, in the second zone Z2, a plurality of pixel circuits 30 are arranged in a circuit row 30H in the first direction x; in the first direction x, the shift register unit 10 and the circuit row 30H overlap. This is equivalent to the shift register unit 10 separating the circuit rows 30H on the left and right sides of the first direction x. From the overall display area, the shift register unit 10 is arranged between the pixel circuits 30 arranged along the first direction x. This can be applied to transparent display technology, so that a transparent area is also left between adjacent shift register units 10 in the second direction y, thereby improving the uniformity of the overall transmittance of the display panel.

[0016] In some embodiments, Figure 2 As shown, the first zone Z1 has a virtual line X1 extending along the second direction y, and the second direction y intersects the first direction x; n first electrodes 21 and m first electrodes 21 are respectively located on both sides of the virtual line X1. In other words, the first electrodes 21 on the left and right sides of the virtual line X1 are respectively connected to the pixel circuit 30 located in the second zone Z2. Such a setting can avoid the connection lines 40 connected to the two second zones Z2 from crossing, and simplify the wiring method of the connection lines 40.

[0017] In the embodiment of the present invention, n and m are integers, n≥1, m≥1. In some embodiments, the values ​​of n and m are not much different, so that the number of connecting lines 40 on the left and right sides of the virtual line X1 is not much different, so that the widths occupied by the connecting lines 40 arranged in the two second zones Z2 in the second direction y are basically the same. In some embodiments, n=m. In practice, the number of connecting lines 40 on the left and right sides of the virtual line X1 can be designed according to the PPI of the display panel, the structure of the pixel circuit 30, and the structure of the shift register unit 10.

[0018] In some embodiments, Figure 3 A partial schematic diagram of another display panel provided by an embodiment of the present invention. Figure 3 Only the location of one shift register unit 10 is shown. Figure 4 for Figure 3 The circuit diagram of the shift register unit in FIG. Figure 3 and Figure 4 As shown, the shift register unit 10 includes an output module 101 and a driving module 102. The shift register unit 10 includes sixteen transistors and three capacitors. The sixteen transistors are the first transistor M1 to the sixteenth transistor M16, and the three capacitors are the first capacitor C1, the second capacitor C2 and the third capacitor C3. Among them, the ninth transistor M9 and the tenth transistor M10 constitute the output module 101, and the other transistors constitute the driving module 102. Figure 4 Nodes N1 to N7, input terminal IN and output terminal OUT in the shift register unit are also indicated. A drive signal line 51 is arranged in the display panel, and the drive signal line 51 includes a first voltage signal line VGL, a second voltage signal line VGH, a first clock signal line CK, a second clock signal line XCK, a reset signal line RST, and a start signal line STV. The first voltage signal line VGL and the second voltage signal line VGH both transmit constant voltage signals, and the voltage value of the signal transmitted by the first voltage signal line VGL is less than the voltage value of the signal transmitted by the second voltage signal line VGH. That is, the first voltage signal line VGL transmits a low-level voltage signal, and the second voltage signal line VGH transmits a high-level voltage signal. Among them, the input terminal IN of the first-stage shift register unit 10 is connected to the start signal line STV, and the input terminal IN of the i-th stage shift register unit 10 is connected to the output terminal OUT of the i-1th stage shift register unit 10, where i is an integer, i≥2.

[0019] Depend on Figure 3 It can be seen that in the first zone Z1, the output module 101 and the driving module 102 are arranged in the first direction x, so that the length of the shift register unit 10 in the first direction x is greater than its length in the second direction y. The second direction y intersects the first direction x, and typically, the second direction y is perpendicular to the first direction x. Such an arrangement can reduce the difference between the length of the shift register unit 10 in the second direction y and the length of the pixel circuit 30 in the second direction y in the second zone Z2. In transparent display, the length of the transmission area in the first zone Z1 in the second direction y and the length of the transmission area in the second zone Z2 in the second direction y are close to each other, thereby improving the uniformity of transparent display.

[0020] In addition, if Figure 3As shown, the second voltage signal line VGH in the driving signal line 51 is located at a side of the output module 101 away from the driving module 102, and the other signal lines are located at a side of the driving module 102 away from the output module 101. Such an arrangement facilitates the electrical connection between the second voltage signal line VGH and the transistor in the output module 101, reduces winding, and ensures the signal output capability of the output module 101.

[0021] Figure 3 The structure of a shift register unit is shown. The embodiment of the present invention also provides another shift register unit. Figure 5 A partial schematic diagram of another display panel provided by an embodiment of the present invention. Figure 5 Only the location of one shift register unit 10 is shown. Figure 6 for Figure 5 The circuit diagram of the shift register unit in FIG. Figure 5 and Figure 6 As shown, the shift register unit 10 includes eight transistors and two capacitors, the eight transistors are the first transistor M1 to the eighth transistor M8, and the two capacitors are the first capacitor C1 and the second capacitor C2. The driving module 102 includes the first transistor M1 to the sixth transistor M6, and the output module 101 includes the seventh transistor M7 and the eighth transistor M8. Figure 6 Nodes N1 to N3, input terminal IN and output terminal OUT in the shift register unit are also indicated. The driving signal line 51 in the display panel includes a first voltage signal line VGL, a second voltage signal line VGH, a first clock signal line CK, a second clock signal line XCK, and a start signal line STV. Among them, the input terminal IN of the first-stage shift register unit 10 is connected to the start signal line STV, and the input terminal IN of the i-th stage shift register unit 10 is connected to the output terminal OUT of the i-1th stage shift register unit 10, where i is an integer, i≥2.

[0022] Figure 5 In the embodiment, the output module 101 and the driving module 102 are arranged in the first direction x in the first zone Z1, so that the length of the shift register unit 10 in the first direction x is greater than its length in the second direction y. In addition, the second voltage signal line VGH in the driving signal line 51 is located on the side of the output module 101 away from the driving module 102, and the remaining signal lines are located on the side of the driving module 102 away from the output module 101. Such an arrangement facilitates the electrical connection of the second voltage signal line VGH with the transistor in the output module 101, reduces winding, and ensures the signal output capability of the output module 101.

[0023] like Figure 2As shown, the display panel includes a plurality of connection lines 40, and the connection lines 40 include a first connection line 41 and a second connection line 42. The first connection line 41 extends from the first zone Z1 to the second zone Z2, and the second connection line 42 is located in the second zone Z2. The first connection line 41 is connected between the first electrode 21 located in the first zone Z1 and the pixel circuit 30 electrically connected thereto, and the second connection line 42 is connected between at least part of the first electrode 21 located in the second zone Z2 and the pixel circuit 30. In the embodiment of the present invention, the shift register unit 10 is arranged in the first zone Z1 in the display area AA, and the shift register unit 10 occupies the position where the pixel circuit 30 is arranged, so that part of the pixel circuit 30 is compressed left and right into the second zone Z2, and there is a misalignment between at least part of the first electrode 21 in the second zone Z2 and the first electrode 21 in the first zone Z1 and the corresponding pixel circuit 30. The first connection line 41 is arranged to realize the electrical connection between the first electrode 21 in the first zone Z1 and the pixel circuit 30, and the second connection line 42 is arranged to realize the electrical connection between the first electrode 21 in the second zone Z1 and the pixel circuit 30.

[0024] like Figure 2 As shown, at least part of the connecting wires 40 include at least one first sub-segment 40a and at least one second sub-segment 40b, the first sub-segment 40a and the second sub-segment 40b are connected to each other, the first sub-segment 40a extends along a first direction x, and the second sub-segment 40b extends along a second direction y, and the second direction y intersects the first direction x. At least part of the connecting wires 40 are in a stepped shape, and such a configuration can make the multiple connecting wires 40 more compact when arranged, saving the space occupied by the arrangement of the multiple connecting wires 40.

[0025] In some embodiments, a constant voltage signal line extending along the second direction y is arranged in the second zone Z2, and the second sub-line segment 40b can be arranged to overlap with the constant voltage signal line, so as to improve the signal crosstalk problem. The constant voltage signal line can be, for example, a power signal line electrically connected to the pixel circuit 30, or a constant voltage signal line electrically connected to the shift register unit 10, such as Figure 3 The illustrated first voltage signal line VGL or the second voltage signal line VGH.

[0026] In some embodiments, Figure 7 A schematic diagram of another display panel provided by an embodiment of the present invention, such as Figure 7 As shown, in the second zone Z2, a plurality of pixel circuits 30 are arranged in a circuit row 30H in the first direction x. Figure 7It is a top view, and it can be understood that the direction perpendicular to the plane where the display panel is located is parallel to the top view direction. In the direction perpendicular to the plane where the display panel is located, at least part of the connecting line 40 located in the second zone Z2 overlaps with the circuit row 30H. In the transparent display application, a second signal line 52 extending along the second direction y is also provided in the display area AA, and the second signal line 52 and the circuit row 30H cross to define a plurality of transmission zones TG in the second zone Z2. At least part of the connecting line 40 in the second zone Z2 is arranged to overlap with the circuit row 30H, and the connecting line 40 in the second zone Z2 can be closely arranged so that the connecting line 40 does not affect the size of the transmission zone TG in the second zone Z2, thereby ensuring the transmittance of the second zone Z2 and improving the transparent display effect.

[0027] In addition, for the connection line 40 routed in the first zone Z1 , the connection line 40 is also arranged to overlap with the shift register unit 10 as much as possible, so as to reduce the influence on the transmittance of the first zone Z1 .

[0028] like Figure 7 As shown, the display area AA includes a first transmission area TG1 and a second transmission area TG2, the first transmission area TG1 is located in the first area Z1, and the second transmission area TG2 is located in the second area Z2. In the first direction x, the first transmission area TG1 and the second transmission area TG2 at least partially overlap, and the shift register unit 10 and the circuit row 30H at least partially overlap. This arrangement makes the non-transmission area in the first area Z1 and the non-transmission area in the second area Z2 roughly aligned, and the transmission area in the first area Z1 and the transmission area in the second area Z2 roughly aligned, which can improve the uniformity of the overall transmittance in the display area AA.

[0029] In some embodiments, the shapes of the second transmission zones TG2 in the second zone Z2 are substantially the same, so that the transmittance of the second zone Z2 is more uniform.

[0030] In other embodiments, the shape of each second transmission region TG2 in the second zone Z2 may be a rectangle, a substantially rectangle, or other shapes. In practice, the shape of the second transmission region TG2 may be appropriately adjusted according to the wiring space requirements in the second zone Z2.

[0031] In some embodiments, Figure 8 A schematic diagram of a film layer structure of another display panel provided by an embodiment of the present invention is shown in FIG. Figure 8 As shown, the display panel includes a substrate 00 , a light shielding layer 01 located on the substrate 00 , a semiconductor layer 02 , a first metal layer 03 , a second metal layer 04 , a third metal layer 05 , a fourth metal layer 06 and a fifth metal layer 07 . Figure 8The figure shows the position of a transistor TFT in the pixel circuit 30. The active layer of the transistor TFT is located in the semiconductor layer 02. In the direction e perpendicular to the plane where the substrate 00 is located, the light shielding layer 01 overlaps with the active layer of the transistor TFT. The light shielding layer 01 is used to shield the active layer of the transistor TFT on the substrate 00 side to prevent light from irradiating the active layer and affecting the performance of the transistor TFT. The gate of the transistor TFT is located in the first metal layer 03, and an electrode plate such as a storage capacitor in the pixel circuit 30 is provided in the second metal layer 04, and the other electrode plate of the storage capacitor is located in the first metal layer 03. The source and drain of at least part of the transistor TFT are provided in the third metal layer 05. Among them, the first metal layer 03 and the second metal layer 04 are made of the same material, including metal molybdenum, and the third metal layer 05 includes titanium and / or aluminum, such as a titanium / aluminum / titanium structure.

[0032] In addition, optionally, a power supply structure is arranged in the fourth metal layer 06, and the power supply structure can be, for example, a positive power supply structure connected to the pixel circuit 30, and the positive power supply structure is used to provide a first power supply signal Pvdd to the pixel circuit 30. A first electrode 21 and a second electrode 22 are arranged in the fifth metal layer 07, and the first electrode 21 and the second electrode 22 are used to bind and connect the light-emitting device 60. For example, the positive electrode 601 of the light-emitting device 60 is connected to the first electrode 21 through the eutectic layer 08, and the negative electrode 602 of the light-emitting device 60 is connected to the second electrode 22 through the eutectic layer 08, and the first electrode 21 is electrically connected to the pixel circuit 30. The manufacturing materials of the fourth metal layer 06 and the fifth metal layer 07 can be the same as the manufacturing materials of the third metal layer 05, including titanium and / or aluminum.

[0033] In the embodiment of the present invention, the connecting wire 40 and the first electrode 21 are located in the same layer, and the connecting wire 40 and the first electrode 21 are manufactured in the same process without adding a new process.

[0034] In other embodiments, Fig. 9 Schematic diagram of another display panel provided by an embodiment of the present invention. Fig. 9As shown, the pixel circuit 30 in the second zone Z2 includes a first pixel circuit 31 and a second pixel circuit 32; a connecting line 40 is connected between the first pixel circuit 31 and the first electrode 21 connected thereto; along a direction perpendicular to the plane where the display panel is located, the second pixel circuit 32 overlaps with the first electrode 21 connected thereto; and a third line segment 43 is connected between the second pixel circuit 32 and the first electrode 21. Among them, a plurality of first pixel circuits 31 arranged in the first direction x form a pixel circuit group 30Z, and at least one second pixel circuit 32 is spaced between two adjacent pixel circuit groups 30Z. A pixel circuit group 30Z may include one, two or more first pixel circuits 31. In this embodiment, the pixel circuit 30 connected to the first electrode 21 in the first zone Z1 is arranged in the second zone Z2, and a connecting line 40 is arranged to realize the electrical connection between the first electrode 21 and the pixel circuit 30. The pixel circuits 30 in the second zone Z2 are arranged closely, and there are also pixel circuits 30 overlapping with the first electrode 21 in the second zone Z2. When the first electrode 21 and the pixel circuit 30 overlap in the second zone Z2 and are connected to each other, the third line segment 43 between the two will be relatively short, and the voltage drop on the third line segment 43 will be relatively small.

[0035] In addition, by Fig. 9 It can be seen that due to the interlaced arrangement of the second pixel circuit 32 and the first pixel circuit 31 in the second zone Z2, part of the connecting line 40 will cross the third line segment 43. In order to avoid the connecting line 40 and the third line segment 43 being short-circuited, the connecting line 40 and the third line segment 43 can be arranged in different layers, or one of the lines at the intersection of the two lines adopts a bridge design.

[0036] Fig. 9 It is shown that the same position of each pixel circuit 30 in the second zone Z2 is connected to the connecting line 40, that is, the signal output end position of the pixel circuit 30 is the same. In other embodiments, the second pixel circuit 32 and the first pixel circuit 31 in the second zone Z2 are interspersed, and the signal output end positions of the second pixel circuit 32 and the first pixel circuit 31 can be set differently. For example, by adjusting the arrangement of transistors in the pixel circuit, the signal output end of the second pixel circuit 32 is located above the pixel circuit, and the signal output end of the first pixel circuit 31 is located below the pixel circuit, so that the third line segment 43 corresponding to the second pixel circuit 32 and the connecting line 40 corresponding to the first pixel circuit 31 can be avoided from crossing, thereby avoiding the cross-line design, and no new wiring film layer needs to be added, which can save the process.

[0037] In other embodiments, Fig.10 A schematic diagram of another display panel provided by an embodiment of the present invention, such as Fig.10As shown, the display area AA also includes a second electrode 22 and a light-emitting device 60, the first electrode 21 and the second electrode 22 form an electrode pair 20D, and the second electrode 22 is arranged in the same layer as the first electrode 21. The two electrodes of the light-emitting device 60 are respectively electrically connected to the first electrode 21 and the second electrode 22 in an electrode pair 20D. The display area AA is divided into a plurality of electrode groups 20Z, and an electrode group 20Z includes N electrode pairs 20D, where N is a positive integer and N≥2. Fig.10 Take N=3 as an example.

[0038] Optionally, the colors of the N light emitting devices 60 correspondingly connected to one electrode group 20Z are different from each other. When N=3, the three light emitting devices 60 correspondingly connected to one electrode group 20Z include a red light emitting device, a green light emitting device and a blue light emitting device.

[0039] In some embodiments, Fig.11 A schematic diagram of another display panel provided by an embodiment of the present invention, such as Fig.11 As shown, in at least one electrode group 20Z in the first zone Z1, the pixel circuit 30 connected to n1 first electrodes 21 is located in one second zone Z2, and the pixel circuit 30 connected to n2 first electrodes 21 is located in another second zone Z2, n1 and n2 are both positive integers, n1+n2=N. Fig.11 Taking N=3, n1=1, n2=2 as an example, it can be seen that among the three first electrodes 21 of the electrode group 20Z1, the pixel circuit 30 connected to one first electrode 21 is located in the second zone Z2 on the right, and the pixel circuit 30 connected to two first electrodes 21 is located in the second zone Z2 on the left. In practice, depending on the size of the shift register unit 10, the structure of the pixel circuit 30, and the design of the display panel PPI, there may be Fig.12 The electrode group 20Z1 is shown. In the application, it can be flexibly adjusted according to the panel structure, so that the wiring of the connecting wires 40 in the two second zones Z2 on both sides of the first zone Z1 is more balanced, and the area occupied by the connecting wires 40 in the two second zones Z2 is also relatively balanced. When applied in transparent display, the transmittance of the two second zones Z2 can be basically consistent, thereby improving the transparent display effect.

[0040] In some embodiments, Fig.12 A schematic diagram of another display panel provided by an embodiment of the present invention, such as Fig.12 As shown, in at least one electrode group 20Z, n3 first electrodes 21 are located in the first zone Z1, n4 first electrodes 21 are located in the second zone Z2, n3 and n4 are both positive integers, and n3+n4=N. Fig.12Taking N=3, n3=1, n4=2 as an example, it can be seen that among the three first electrodes 21 of the electrode group 20Z2, one first electrode 21 is located in the first zone Z1, and two first electrodes 21 are located in the second zone Z2. In practice, depending on the size of the shift register unit 10, the structure of the pixel circuit 30, and the design of the display panel PPI, there may be Fig.12 Schematic diagram of electrode group 20Z2.

[0041] In some embodiments, Fig.13 A schematic diagram of another display panel provided by an embodiment of the present invention, such as Fig.13 As shown, the display area includes a driving signal line 51 and a second signal line 52 extending along a second direction y, the second direction y intersects with the first direction x, the shift register unit 10 is electrically connected to the driving signal line 51, and the pixel circuit 30 is electrically connected to the second signal line 52; the second signal line 52 includes a data line. Figure 3 It can be understood that a plurality of driving signal lines 51 need to be provided for a group of shift register units 10. Fig.13 The number of driving signal lines 51 is only for illustration.

[0042] In the display panel, a shift register unit 10, a first electrode 21, and a second electrode 22 are arranged in the first zone Z1, and a pixel circuit 30, a first electrode 21, and a second electrode 22 are arranged in the second zone Z2. The pixel circuit 30 that was originally required to be arranged in the first zone Z1 is arranged in the second zone Z2, so that the pixel circuit 30 in the second zone Z2 is arranged relatively densely. In the display area AA, the first electrode 21 and the second electrode 22 are used to connect the light-emitting device. For the overall display effect, the arrangement rules of the first electrode 21 in the first zone Z1 and the second zone Z2 are basically the same, and the first electrode 21 overlaps with the structure below it (signal line, pixel circuit 30 or shift register unit 10, etc.). The overlap of the first electrode 21 with the structure below includes many situations.

[0043] Depend on Fig.13 It can be seen from the top view that, along the direction perpendicular to the plane where the display panel is located, at least one first electrode 21 overlaps with the driving signal line 51 and the shift register unit 10 at the same time, and at least one first electrode 21 overlaps with the second signal line 52 and the pixel circuit 30 at the same time. In addition, in some embodiments, at least one first electrode 21 overlaps with the driving signal line 51 and the pixel circuit 30 at the same time. In some embodiments, at least one first electrode 21 overlaps with the driving signal line 51 and the second signal line 52 at the same time. Affected by the display panel PPI, the pixel circuit 30 structure, the shift register unit 10 structure, and the size of the first electrode 21, the first electrode 21 may overlap with a signal line or a circuit structure (such as the pixel circuit 30, the shift register unit 10) below it, and may also include the situation where the first electrode 21 overlaps with a signal line and a circuit structure at the same time.

[0044] In some embodiments, Fig.14 A schematic diagram of another display panel provided by an embodiment of the present invention, Fig.14 The display area also includes a redundant electrode 23, and the connection line between the first electrode 21 and the pixel circuit 30 is not shown. Fig.14 As shown, the display area AA includes a driving signal line 51 and a second signal line 52 extending along a second direction y, the second direction y intersects with the first direction x, the shift register unit 10 is electrically connected to the driving signal line 51, the pixel circuit 30 is electrically connected to the second signal line 52, and the second signal line 52 includes a data line. The display area AA also includes a redundant electrode 23, the redundant electrode 23 and a first electrode 21 are connected to the same pixel circuit 30, and at least one redundant electrode 23 is correspondingly arranged for one first electrode 21. Fig.14 For example, the redundant electrode 23 and the first electrode 21 are electrically connected to form an integrated structure, that is, an electrode with a relatively large area, a part of which is the first electrode 21, and another part of which is the redundant electrode 23. In other embodiments, the redundant electrode 23 and the first electrode 21 are two independent electrodes. The redundant electrode 23 is designed to repair defective pixels in the display panel. Fig.14 It is indicated in the figure that there is no light-emitting device 60 bound to the position where the redundant electrode 23 is located. In other embodiments, the light-emitting device 60 is bound to the position where the redundant electrode 23 is located at some positions, but the light-emitting device 60 at this position cannot emit light due to damage. During the manufacturing process, two AB electrodes are set at the corresponding position of a sub-pixel, and the light-emitting device 60 is first bound to the corresponding position of the A electrode during bonding. Then a lighting test is performed, and when a dead point is found (that is, a light-emitting device 60 that cannot emit light normally), a light-emitting device 60 is re-bound to the B electrode at the dead point. At this time, the B electrode is the first electrode 21, and the light-emitting device bound to the position of the A electrode can be removed or retained, and the A electrode is the redundant electrode 23.

[0045] Depend on Fig.14 It can be seen from the top view that, along a direction perpendicular to the plane of the display panel, at least one redundant electrode 23 overlaps with the driving signal line 51 , and / or at least one redundant electrode 23 overlaps with the second signal line 52 . Fig.14 It is shown in FIG. 1 that no light emitting device 60 is bound to the position of the redundant electrode 23 .

[0046] Fig.14 The scheme of using the redundant electrode 23 to repair defects is illustrated. In other embodiments, when a pixel has a defect, it can be repaired in situ. That is, when a pixel has a defect, the defective light-emitting device is first removed, and then a new light-emitting device is re-bound at the original position using the first electrode 21 and the second electrode 22.

[0047] In some embodiments, Figure 7 As shown, in the second direction y, the distance between two adjacent first electrodes 21 is d1, and the distance between two adjacent shift register units 10 is d2, and d1 is greater than d2. The corresponding positions of the first electrode 21 and the second electrode 22 are used to bind the light-emitting device. In the first zone Z1, d1 is set to be greater than d2, so that the first electrode 21 can overlap with the shift register unit 10. The first electrode 21 and the second electrode 22 are generally made of metal materials. The embodiment of the present invention is applied in a transparent display to avoid the occupation of the space of the transmission zone by the first electrode 21, thereby improving the transmittance of the transparent display. Further, the first electrode 21 and the second electrode 22 in the first zone Z1 are both overlapped with the shift register unit 10, so that the light-emitting device can also overlap with the shift register unit 10, further avoiding the occupation of the space of the transmission zone by the light-emitting device.

[0048] like Figure 7 As shown, the display area AA also includes a third area Z3, and the third area Z3 includes a pixel circuit 30, a first electrode 21, and a second electrode 22. The arrangement density of the pixel circuit 30 in the third area Z3 is less than the arrangement density of the pixel circuit 30 in the second area Z2. The third area Z3 is a regular area in the display area AA, and the second area Z2 is a densely arranged area of ​​the pixel circuit 30 in the display area AA. In the third area Z3, the first electrode 21 overlaps with the pixel circuit 30 connected thereto.

[0049] In some embodiments, Figure 7 It can be seen that the length of the pixel circuit 30 in the second zone Z2 in the first direction x is less than the length of the pixel circuit 30 in the third zone Z3 in the first direction x, and / or the length of the pixel circuit 30 in the second zone Z2 in the second direction y is greater than the length of the pixel circuit 30 in the third zone Z3 in the second direction y, and the second direction y intersects with the first direction x. Such a setting can compress the length occupied by a single pixel circuit 30 in the second zone Z2 in the first direction x, so that relatively more pixel circuits 30 can be arranged in the second zone Z2. In the embodiment of the present invention, the pixel circuits 30 in the second zone Z2 and the pixel circuits 30 in the third zone Z3 are set differently, which can ensure that the driving performance of each pixel circuit 30 is consistent, and at the same time, it can also ensure that a sufficient number of pixel circuits 30 are arranged in the second zone Z2.

[0050] Fig.15 A schematic diagram of a pixel circuit provided by an embodiment of the present invention is shown in FIG. Fig.15As shown, the pixel circuit includes a driving transistor Tm, a data writing transistor T1, an electrode reset transistor T2, a gate reset transistor T3, a threshold compensation transistor T4, a first light emission control transistor T5, a second light emission control transistor T6, and a storage capacitor Cst. The driving of the pixel circuit requires a scanning signal S1, a scanning signal S2, a light emission control signal Emit, a reset signal Vref, a first power signal Pvdd, and a data signal Data. One electrode of the light emitting device 60 is connected to the pixel circuit, and the other electrode is connected to the second power signal Pvee.

[0051] Fig.15 The pixel circuit provided in the embodiment is an optional implementation of the present invention, and the structure of the pixel circuit is not limited in the embodiment of the present invention. The pixel circuit can be an aTbC structure, that is, including a transistors and b capacitors, where a and b are positive integers.

[0052] Fig.16 FIG. 4 is a schematic diagram of a pixel circuit in the second area according to an embodiment of the present invention. Fig.17 FIG. 4 is a schematic diagram of a pixel circuit in the third area according to an embodiment of the present invention. Fig.16 and Fig.17 Can be combined Fig.15 Understand. Fig.16 and Fig.17 It can be seen that the display panel is also provided with a scanning signal line S1, a scanning signal line S2, a light emitting control signal line Emit, a reset signal line Vref, and a data signal line Data, and each signal line and the signal provided thereto are labeled the same.

[0053] Depend on Fig.16 and Fig.17 It can be seen that the length of the driving transistor Tm of the pixel circuit 30 in the second zone Z2 in the first direction x is less than the length of the driving transistor Tm of the pixel circuit 30 in the third zone Z3 in the first direction x, and the length of the driving transistor Tm of the pixel circuit 30 in the second zone Z2 in the second direction y is greater than the length of the driving transistor Tm of the pixel circuit 30 in the third zone Z3 in the second direction y, and the second direction y intersects with the first direction x. Such a setting facilitates the manufacture of the length of the pixel circuit 30 in the second zone Z2 in the first direction x less than the length of the pixel circuit 30 in the third zone Z3 in the first direction x, so that a sufficient number of pixel circuits 30 can be closely arranged in the second zone Z2 to meet the driving of the light-emitting device in the first zone Z1. Specifically, the width-to-length ratio of the driving transistor Tm in the second zone Z2 can be set to be the same as the width-to-length ratio of the driving transistor Tm in the third zone Z3 to ensure that the driving performance of the pixel circuits 30 in different zones is consistent. The width-to-length ratio of a transistor refers to the ratio of the channel width to the channel length of the transistor.

[0054] Specifically, by setting the same width-to-length ratio of transistors with the same function in the pixel circuits 30 in the second zone Z2 and the third zone Z3, the driving performance of the pixel circuits 30 in the two zones can be made the same, thereby improving the display uniformity within the display panel.

[0055] In some embodiments, Fig.18 A schematic diagram of another display panel provided by an embodiment of the present invention, Fig.18 The distribution of each area in the display area is shown in Figure 2. Fig.18 As shown, the display panel includes a first edge Y1 extending along the second direction y, and the second direction y intersects the first direction x; the first zone Z1 and the second zone Z2 located on both sides thereof together form a first arrangement zone PP, and the first arrangement zone PP is located on one side of the third zone Z3 close to the first edge Y1. That is, the first arrangement zone PP is set at a position close to the edge of the display panel, such as Fig.18 In the figure, the first arrangement area PP is set on the left and right sides of the display panel. On the one hand, when the shift register unit 10 drives the pixel row in the display panel, the driving signal is transmitted from the left and right ends to the middle, which can improve the uniformity of the driving signal transmission. On the other hand, the second area Z2 where the pixel circuits 30 are closely arranged is set near the edge, which is used in transparent display to ensure high and uniform transmittance in the central area, thereby ensuring the transparent display effect.

[0056] In the embodiment of the present invention, the shift register unit 10 includes a light emitting shift register unit and a scanning shift register unit; a plurality of light emitting shift register units are cascaded, and a plurality of scanning shift register units are cascaded; the light emitting shift register unit is used to provide Fig.15 In the embodiment, the light emitting control signal Emit, the scanning shift register unit is used to provide Fig.15 The scanning signal S1 and / or the scanning signal S2 in the embodiment. The light emitting shift register unit and the scanning shift register unit may be arranged in one first zone Z1 or in different first zones Z1.

[0057] In some embodiments, Fig.19 A partial schematic diagram of another display panel provided by an embodiment of the present invention, such as Fig.19As shown, the shift register unit 10 includes a light-emitting shift register unit 11 and a scanning shift register unit 12; a plurality of light-emitting shift register units 11 are cascaded, and a plurality of scanning shift register units 12 are cascaded. In the first zone Z1, the light-emitting shift register unit 11 and the scanning shift register unit 12 are adjacent in the first direction x. The light-emitting shift register unit 11 and the scanning shift register unit 12 overlap with the circuit row 30H in the second zone Z2 in the first direction x. Among them, the output end of the light-emitting shift register unit 11 is connected to the control end of the first light-emitting control transistor T5 and the control end of the second light-emitting control transistor T6 in the circuit row 30H through a signal line. The output end of the scanning shift register unit 12 is connected to the control end of the data writing transistor T1 and the control end of the threshold compensation transistor T4 in one circuit row 30H through a signal line, and is connected to the control end of the gate reset transistor T3 in the next circuit row 30H through another signal line.

[0058] Fig.19 In the embodiment, the light emitting shift register unit 11 and the scanning shift register unit 12 are arranged in the same first zone Z1, and the first electrode 21 in the first zone Z1 is connected to the pixel circuits 30 located on both sides by arranging connecting lines 40 extending to the left and right respectively, so that the number of connecting lines 40 arranged on one side can be reduced, and the area occupied by the connecting lines 40 on one side is also reduced. The application in transparent display can improve the display effect of transparent display.

[0059] In some other embodiments, the light emitting shift register unit 11 and the scanning shift register unit 12 are located in different first zones Z1. Fig. 20 A partial schematic diagram of another display panel provided by an embodiment of the present invention, such as Fig. 20 As shown, the shift register unit 10 includes a light-emitting shift register unit 11 and a scanning shift register unit 12; a plurality of light-emitting shift register units 11 are cascaded, and a plurality of scanning shift register units 12 are cascaded; the light-emitting shift register unit 11 and the scanning shift register unit 12 are located in different first zones Z1. A plurality of first electrodes 21 in the first zone Z1 where the light-emitting shift register unit 11 is located are connected to corresponding pixel circuits 30 in two second zones Z2 on both sides through connection lines 40 extending to the left and right, respectively; a plurality of first electrodes 21 in the first zone Z1 where the scanning shift register unit 12 is located are connected to corresponding pixel circuits 30 in two second zones Z2 on both sides through connection lines 40 extending to the left and right, respectively. When the PPI of the display panel is determined, the light-emitting shift register unit 11 and the scanning shift register unit 12 are arranged in different first zones Z1, which can reduce the number of first electrodes 21 arranged in each first zone Z1, and correspondingly reduce the number of connecting wires 40 pulled left and right in the first zone Z1, thereby further reducing the space occupied by the connecting wires 40 arranged in the second zone Z2.

[0060] like Fig. 20 As shown, the number of first electrodes 21 in the first zone Z1 where the light emitting shift register unit 11 is located is different from the number of first electrodes 21 in the first zone Z1 where the scanning shift register unit 12 is located. The circuit structures of the light emitting shift register unit 11 and the scanning shift register unit 12 may be different to some extent. Figure 3 The illustrated shift register unit 10 may be a light emitting shift register unit 11, Figure 5 The illustrated shift register unit 10 may be a scanning shift register unit 12, so that the lengths of the light-emitting shift register unit 11 and the scanning shift register unit 12 in the first direction x are different. When the light-emitting shift register unit 11 and the scanning shift register unit 12 are respectively arranged in two first zones Z1, and the first electrodes 21 in the display zone are arranged regularly, the number of the first electrodes 21 in the two first zones Z1 will be different.

[0061] Combination Fig.18 According to the embodiment, two first zones Z1 can be respectively set on the left and right sides of the first direction x of the display panel, that is, a total of four first zones Z1 are included. A light-emitting shift register unit 11 and a scanning shift register unit 12 are respectively set in the two first zones Z1 on one side of the display panel, wherein the first zone Z1 where the light-emitting shift register unit 11 is located is located on the side of the first zone Z1 where the scanning shift register unit 12 is located close to the edge of the display panel. That is, the scanning shift register unit 12 is set closer to the inside of the display panel than the light-emitting shift register unit 11. Such a setting is conducive to the transmission of the scanning signal output by the scanning shift register unit 12, and is conducive to the uniformity of the scanning signal in a row of pixels connected to the scanning shift register unit 12, thereby helping to improve the display uniformity.

[0062] In some embodiments, Fig. 20 As shown, a second zone Z2 is arranged between the first zone Z1 where the light emitting shift register unit 11 is located and the first zone Z1 where the scanning shift register unit 12 is located. That is, when the light emitting shift register unit 11 and the scanning shift register unit 12 are arranged in different first zones Z1, the two second zones Z2 corresponding to the light emitting shift register unit 11 and the scanning shift register unit 12 are arranged continuously, that is, the areas where the pixel circuits 30 are closely arranged are arranged continuously. Figure 7 It can be understood from the embodiment that the display panel is also provided with a third zone Z3 where pixel circuits 30 are conventionally arranged, while the arrangement of pixel circuits 30 in the second zone Z2 is different from that in the third zone Z3. The better the regularity of the metal pattern in the metal patterning process of the display panel, the better the uniformity of the overall pattern, and the better the consistency of the transistor characteristics and performance. Fig. 20The design of the embodiment can avoid multiple mutations of the metal pattern in the metal patterning process, improve the performance consistency of the pixel circuit transistors in the second zone Z2 and the third zone Z3, and help improve display uniformity.

[0063] In some embodiments, Fig.21 A partial schematic diagram of another display panel provided by an embodiment of the present invention. Fig.21 As shown, the scanning register unit 12 also includes a first scanning shift register unit 121 and a second scanning shift register unit 122, a plurality of first scanning shift register units 121 are cascaded, and a plurality of second scanning shift register units 122 are cascaded; the first scanning shift register unit 121 and the second scanning shift register unit 122 are located in different first zones Z1. For example, the output end of the first scanning shift register unit 121 is connected to the control end of the gate reset transistor T3 in the circuit row 30H through a signal line, and the output end of the second scanning shift register unit 122 is connected to the control end of the data write transistor T1 and the threshold compensation transistor T4 in the circuit row 30H through a signal line. When the size of the display panel in the first direction x is relatively large, two groups of scanning shift register units are set to drive the gate reset transistor T3 and the data write transistor T1 (i.e., the threshold compensation transistor T4) respectively, which can improve the driving ability of the scanning signal and meet the driving requirements of large size. In addition, when two groups of scanning shift register units are arranged in the display area, the shift register units occupy more positions in the display area, and the number of misalignments between the first electrode 21 and the pixel circuit 30 increases. However, by arranging the first scanning shift register unit 121 and the second scanning shift register unit 122 in different first zones Z1, the number of first electrodes 21 arranged in each first zone Z1 can be reduced, and the number of connecting wires 40 extending to the left and right in the first zone Z1 can be correspondingly reduced, thereby further reducing the space occupied by the connecting wires 40 arranged in the second zone Z2.

[0064] Combination Fig.18 To understand from the embodiment, three first zones Z1 can be respectively set on the left and right sides of the first direction x of the display panel, that is, a total of six first zones Z1 are included. The three first zones Z1 on one side of the display panel are respectively provided with a light-emitting shift register unit 11, a first scanning shift register unit 121, and a second scanning shift register unit 122. Among them, the first zone Z1 where the light-emitting shift register unit 11 is located is located on the side of the first zone Z1 where the two groups of scanning shift register units are located, close to the edge of the display panel. That is, the first scanning shift register unit 121 and the second scanning shift register unit 122 are arranged closer to the inside of the display panel than the light-emitting shift register unit 11. Such a setting is conducive to the transmission of the scanning signal output by the scanning shift register unit 12, and is conducive to the uniformity of the scanning signal in a row of pixels connected to the scanning shift register unit 12, and is further conducive to improving the display uniformity.

[0065] like Fig.21 As shown, a second zone Z2 is arranged between the first zone Z1 where the first scanning shift register unit 121 is located and the first zone Z1 where the second scanning shift register unit 122 is located. That is, the two second zones Z2 corresponding to the first scanning shift register unit 121 and the second scanning shift register unit 122 are arranged continuously, that is, the areas where the pixel circuits 30 are closely arranged are arranged continuously. In this way, multiple mutations of the metal pattern can be avoided in the metal patterning process, and the performance consistency of the pixel circuit transistors in the second zone Z2 and the third zone Z3 can be improved, which is conducive to improving display uniformity.

[0066] like Fig.16 and Fig.17 As shown in the figure, in order to drive the pixel circuit 30, the display panel needs to be provided with a reset signal line Vref, a scan signal line S1, a scan signal line S2, and a light emission control signal line Emit extending along the first direction x. In the area where the pixel circuit 20 is located, the reset signal line Vref is located in the second metal layer 04, and the scan signal line S1, the scan signal line S2, and the light emission control signal line Emit are located in the first metal layer 03.

[0067] In the embodiment of the present invention, the shift register unit 10 is disposed in the first zone Z1 in the display area, and the shift register unit 10 overlaps with the pixel circuit 30 in the first direction x, which is equivalent to disposing the shift register unit 10 between the pixel circuits 30 arranged along the first direction x. Figure 8 From the perspective of the film layer structure, when manufacturing the pixel circuit 30, at least the semiconductor layer 02, the first metal layer 03, the second metal layer 04, and the third metal layer 05 in the display panel are required. Figure 3 or Figure 5 As shown, the shift register unit 10 includes a plurality of transistors, and the shift register unit 10 at least needs to use the semiconductor layer 02, the first metal layer 03, the second metal layer 04, and the third metal layer 05 in the display panel during manufacturing. In order to meet the wiring requirements of the signal line for driving the pixel circuit 30 while setting the shift register unit 10 in the display area, the embodiment of the present invention further designs the signal line extending along the first direction x.

[0068] In some embodiments, Fig. 22 A partial schematic diagram of another display panel provided by an embodiment of the present invention. Fig. 22 The pixel circuit 30 and the shift register unit are simplified as shown in FIG. Fig. 22 The figure does not show the connection lines connecting the left and right pull lines of the first zone Z1 to the second zones Z2 on both sides. Fig. 22As shown, the display area includes a first area Z1 and a second area Z2, and the display area includes a first signal line 53 extending along a first direction x, and the first signal line 53 runs through the first area Z1 and the second area Z2 in the first direction x. The pixel circuit 30 is electrically connected to the first signal line 53. Among them, the first signal line 53 includes a first line segment 531 and a second line segment 532 arranged in different layers. The first line segment 531 and the second line segment 532 are connected to each other, the first line segment 531 is located in the first area Z1, and the second line segment 532 is at least partially located in the second area Z2. The first signal line 53 includes at least one of a reset signal line Vref, a scan signal line S1, a scan signal line S2, and a light emitting control signal line Emit.

[0069] In the embodiment of the present invention, the first signal line 53 extending along the first direction x is designed, and the line segments of the first signal line 53 in the pixel circuit 30 arrangement area and the shift register unit 10 area are located in different film layers. The first signal line 53 is designed to be changed when extending to the first zone Z1 where the shift register unit 10 is located. This can avoid the first signal line 53 being short-circuited with the structure of the shift register unit 10 when extending to the first zone Z1 using a single-layer routing design. The wiring requirements of the first signal line 53 and the wiring requirements of the shift register unit 10 are met through reasonable wiring.

[0070] like Fig. 22 As shown, the shift register unit 10 includes a light emitting shift register unit 11, a first scanning shift register unit 121 and a second scanning shift register unit 122. The light emitting control signal line Emit is connected to the output end of the light emitting shift register unit 11, the scanning signal line S1 is connected to the output end of the first scanning shift register unit 121, and the scanning signal line S2 is connected to the output end of the second scanning shift register unit 122.

[0071] In the embodiment of the present invention, the shift register unit 10 includes a first shift register unit 10a and a second shift register unit 10b. A plurality of first shift register units 10a are cascaded, and a plurality of second shift register units 10b are cascaded. The first signal line 53 includes a first selection line X1 and a second selection line X2. The first selection line X1 is connected to the output end of the first shift register unit 10a, and the second selection line X2 is connected to the output end of the second shift register unit 10b. Fig. 22 For example, the light-emitting shift register unit 11 is the first shift register unit 10a, and the first scanning shift register unit 121 is the second shift register unit 10b, then the light-emitting control signal line Emit is the first selection line X1, and the scanning signal line S1 is the second selection line X2. Fig. 22It can be seen from the top view that, along the direction perpendicular to the plane where the display panel is located, the first line segment 531 of the first selection line X1 is insulated and overlapped with the second shift register unit 10b, and the first line segment 531 of the second selection line X2 is insulated and overlapped with the first shift register unit 10a. The first shift register unit 10a and the second shift register unit 10b are two shift register units that provide different signals. The selection line connected to the output end of the first shift register unit 10a will overlap with the second shift register unit 10b when it extends to the position where the second shift register unit 10b is located, and the selection line connected to the output end of the second shift register unit 10b will overlap with the first shift register unit 10a when it extends to the position where the first shift register unit 10a is located. In the embodiment of the present invention, the first line segment 531 located in the first zone Z1 and the second line segment 532 at least partially located in the second zone Z2 are designed to be located in different film layers, which can ensure that the selection line and the shift register unit 10 not connected thereto can be insulated and overlapped to avoid short circuit.

[0072] In the embodiment of the present invention, the first signal line 53 is designed to be replaced, and the portion of the first signal line 53 located in the first zone Z1 is insulated and overlapped with the shift register unit 10 that is not connected thereto, rather than the first signal line 53 being wound at the position of the shift register unit 10 that is not connected thereto so that the two are not connected. This can reduce the space occupied by the wiring in the first zone Z1, and can improve the transmittance of the first zone Z1 when applied in transparent display.

[0073] In the above, the light-emitting shift register unit 11 is taken as the first shift register unit 10a, and the first scanning shift register unit 121 is taken as the second shift register unit 10b, to illustrate the overlap between the line segment of the first signal line 53 located in the first zone Z1 and the shift register unit 10. Fig. 22 It can be understood that the first signal line 53 includes a scanning signal line S1, the scanning signal line S1 includes a first line segment 531 and a second line segment 532, a first line segment 531 of the scanning signal line S1 overlaps with the light-emitting shift register unit 11, and a first line segment 531 of the scanning signal line S1 overlaps with the second scanning shift register unit 122.

[0074] The first signal line 53 includes a scan signal line S2. The scan signal line S2 includes a first line segment 531 and a second line segment 532. A first line segment 531 of the scan signal line S2 overlaps with the light emitting shift register unit 11. A first line segment 531 of the scan signal line S2 overlaps with the first scan shift register unit 121.

[0075] The first signal line 53 includes a light-emitting control signal line Emit, and the light-emitting control signal line Emit includes a first line segment 531 and a second line segment 532. A first line segment 531 of the light-emitting control signal line Emit overlaps with the first scan shift register unit 121, and a first line segment 531 of the light-emitting control signal line Emit overlaps with the second scan shift register unit 122.

[0076] Fig. 22 A group of shift register units 10 is provided in a first zone Z1 for illustration. Fig.19 In the embodiment, the light emitting shift register unit 11 and the scanning shift register unit 12 are located in the same first zone Z1. In this embodiment, the light emitting control signal line Emit and the scanning signal line S1 / S2 also need to adopt Fig. 22 The wiring design shown in the embodiment. When the light-emitting control signal line Emit extends to the position where the scanning shift register unit 12 is located, it is changed to the first line segment 531 for routing to avoid short-circuiting the light-emitting control signal line Emit and the scanning shift register unit 12. When the scanning signal line S1 or the scanning signal line S2 extends to the position where the light-emitting shift register unit 11 is located, it is changed to the first line segment 531 for routing to avoid short-circuiting the scanning signal line and the light-emitting shift register unit 11.

[0077] Fig.23 A partial schematic diagram of another display panel provided by an embodiment of the present invention, Fig.23 The wiring situation at the location of the light emitting shift register unit 11 is shown. Fig.23 The transistor structure of the shift register unit can refer to the above Figure 3 To understand, Fig.23 No longer marked. Fig.23 It can be seen that the output end of the light emitting shift register unit 11 is electrically connected to the light emitting control signal line Emit. The scanning signal line S1 includes a first line segment 531 and a second line segment 532, and the scanning signal line S2 includes a first line segment 531 and a second line segment 532. The first line segment 531 of the scanning signal line S1 located in the first zone Z1 overlaps with the light emitting shift register unit 11, and the first line segment 531 of the scanning signal line S2 located in the first zone Z1 overlaps with the light emitting shift register unit 11. Fig.23 As shown in FIG. 1 , for a first line segment 531 and a second line segment 532 on a signal line, the first line segment 531 and the second line segment 532 are electrically connected through a via V. As shown in FIG.

[0078] In some embodiments, Fig. 22 and Fig.23As shown, the first signal line 53 includes a reset signal line Vref, and the reset signal line Vref includes a first line segment 531 and a second line segment 532. In a direction perpendicular to the plane where the display panel is located, the first line segment 531 of the reset signal line Vref is insulated and overlapped with the shift register unit 10. Fig.23 It can be seen that when the reset signal line Vref extends along the first direction x to the first zone Z1 where the shift register unit 10 is located, the reset signal line Vref may be short-circuited with the via in the shift register unit 10 if the line-changing design is not adopted, and the winding design of the reset signal line Vref will increase the space occupied by the wiring. Therefore, in the embodiment of the present invention, the reset signal line Vref also adopts the line-changing design when extending to the first zone Z1, which can not only avoid the reset signal line Vref from being short-circuited with the shift register unit 10, but also save the wiring space of the first zone Z1, which is conducive to the application of transparent display.

[0079] Fig.24 A partial schematic diagram of another display panel provided by an embodiment of the present invention, Fig.24 FIG. 1 shows the wiring situation at the location of the scan shift register unit 12. Fig.24 The transistor structure of the shift register unit can refer to the above Figure 5 To understand, Fig.24 No longer marked. Fig.24 It can be seen that the output end of the scan shift register unit 12 is electrically connected to the scan signal line S2. The scan signal line S1 includes a first line segment 531 and a second line segment 532. The first line segment 531 of the scan signal line S1 located in the first zone Z1 overlaps with the scan shift register unit 12. The light-emitting control signal line Emit includes a first line segment 531 and a second line segment 532. The light-emitting control signal line Emit is located in the first line segment 531 of the first zone Z1 and overlaps with the scan shift register unit 12. The reset signal line Vref includes a first line segment 531 and a second line segment 532. The reset signal line Vref is located in the first line segment 531 of the first zone Z1 and overlaps with the scan shift register unit 12 insulated. Fig.24 As shown in FIG. 1 , for a first line segment 531 and a second line segment 532 on a signal line, the first line segment 531 and the second line segment 532 are electrically connected through a via V. As shown in FIG.

[0080] Combination Fig. 22 In terms of the embodiments, Fig.24 The equivalent of Fig. 22 The wiring situation at the location of the second scan shift register unit 122 in the embodiment. Fig. 22In the embodiment, the first scanning shift register unit 121 can adopt a similar structural design to the second scanning shift register unit 122. At the location of the first scanning shift register unit 121, the output end of the first scanning shift register unit 121 is electrically connected to the scanning signal line S1, and the scanning signal line S1, the light emitting control signal line Emit, and the reset signal line Vref respectively include a first line segment 531 and a second line segment 532, and the first line segment 531 of each signal line overlaps with the first scanning shift register unit 121.

[0081] Combination Figure 8 From the schematic film layer structure, the display panel includes a circuit layer 001, and the circuit layer 001 includes at least a semiconductor layer 02, a first metal layer 03, a second metal layer 04, and a third metal layer 05 located on the substrate 00. The pixel circuit 30 and the shift register unit 10 are made in the circuit layer 001. Among them, the film layer where the first line segment 531 is located is located between the circuit layer 001 and the film layer where the first electrode 21 is located. Optionally, the first line segment 531 is located in the fourth metal layer 06. Such a setting can ensure that the setting of the first line segment 531 does not affect the original layout of the pixel circuit 30 and the shift register unit 10, and a power supply structure is arranged in the fourth metal layer 06. The first line segment 531 and the power supply structure are made in the same process without adding a new process. In addition, the film layer where the first line segment 531 is located can be made of a material with a lower resistivity, so that the square resistance of the first line segment 531 is lower, thereby reducing the overall resistance of the first signal line 53 and reducing the voltage drop of the signal transmission.

[0082] In some embodiments, the first metal layer 03 and the second metal layer 04 are made of molybdenum, and the third metal layer 05 and the fourth metal layer 06 are made of aluminum and titanium. Optionally, the third metal layer 05 and the fourth metal layer 06 are a titanium / aluminum / titanium three-layer structure.

[0083] In some embodiments, the scanning signal line S1 includes a first line segment 531 and a second line segment 532 , wherein the film layer where the first line segment 531 is located is located between the circuit layer 001 and the film layer where the first electrode 21 is located, the first line segment 531 is located in the fourth metal layer 06 , and the second line segment 532 is located in the first metal layer 03 .

[0084] In some embodiments, the scan signal line S2 includes a first line segment 531 and a second line segment 532 , wherein the first line segment 531 is located in the fourth metal layer 06 , and the second line segment 532 is located in the first metal layer 03 .

[0085] In some embodiments, the light emitting control signal line Emit includes a first line segment 531 and a second line segment 532 , wherein the first line segment 531 is located in the fourth metal layer 06 , and the second line segment 532 is located in the first metal layer 03 .

[0086] In some embodiments, the reset signal line Vref includes a first line segment 531 and a second line segment 532 , wherein the first line segment 531 is located in the fourth metal layer 06 , and the second line segment 532 is located in the second metal layer 04 .

[0087] Based on the same inventive concept, an embodiment of the present invention further provides a display device, Fig.25 A schematic diagram of a display device provided by an embodiment of the present invention is shown in FIG. Fig.25 As shown, the display device includes a display panel 100 provided by any embodiment of the present invention. The structure of the display panel has been described in the above embodiments and will not be repeated here. The display device provided by the embodiment of the present invention can be, for example, a mobile phone, a tablet, a computer, a television, a smart wearable product, and other electronic devices with display functions. The display device provided by the embodiment of the present invention can also be a transparent display device, such as a transparent display window; it can also be a spliced ​​display device, such as a large screen in a conference room, a large screen in an exhibition hall, etc.

[0088] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that: The display area of ​​the display panel includes a shift register unit, a first electrode and a pixel circuit, and the first electrode is electrically connected to the pixel circuit; The display area includes at least one first area and at least two second areas, and the second areas are located on both sides of the first area along the first direction; the first area includes the shift register unit and the first electrode, and the second area includes the pixel circuit and the first electrode; The pixel circuits connected to n first electrodes in the first area are located in one second area, and the pixel circuits connected to m first electrodes in the first area are located in another second area, and both n and m are positive integers.

2. The display panel according to claim 1, characterized in that: In the second area, a plurality of the pixel circuits are arranged in a circuit row in the first direction; In the first direction, the shift register unit and the circuit row overlap.

3. The display panel according to claim 2, characterized in that: The shift register unit includes an output module and a driving module, and the output module and the driving module are arranged in the first direction.

4. The display panel according to claim 1, characterized in that: The display panel includes a plurality of connection lines, the connection lines include a first connection line and a second connection line, the first connection line extends from the first area to the second area, and the second connection line is located in the second area; The first connection line is connected between the first electrode located in the first area and the pixel circuit electrically connected thereto, and the second connection line is connected between at least part of the first electrode located in the second area and the pixel circuit.

5. The display panel according to claim 4, characterized in that: At least part of the connecting line includes at least one first sub-line segment and at least one second sub-line segment, the first sub-line segment and the second sub-line segment are connected to each other, the first sub-line segment extends along the first direction, the second sub-line segment extends along the second direction, and the second direction intersects the first direction.

6. The display panel according to claim 4, characterized in that: In the second area, a plurality of the pixel circuits are arranged in a circuit row in the first direction; Along a direction perpendicular to the plane where the display panel is located, the connection line located in the second area at least partially overlaps with the circuit row.

7. The display panel according to claim 4, characterized in that: The connecting line and the first electrode are located in the same layer.

8. The display panel according to claim 4, characterized in that: The pixel circuits in the second area include a first pixel circuit and a second pixel circuit; The connecting line is connected between the first pixel circuit and the first electrode connected thereto; Along a direction perpendicular to the plane where the display panel is located, the second pixel circuit overlaps with the first electrode connected thereto; A plurality of the first pixel circuits arranged in the first direction form a pixel circuit group, and at least one of the second pixel circuits is spaced between two adjacent pixel circuit groups.

9. The display panel according to claim 1, characterized in that: The display area further includes a second electrode and a light emitting device, wherein the first electrode and the second electrode form an electrode pair. The two electrodes of the light emitting device are electrically connected to the first electrode and the second electrode of one electrode pair respectively; The display area is divided into a plurality of electrode groups, and one electrode group includes N electrode pairs, where N is a positive integer and N≥2.

10. The display panel according to claim 9, characterized in that: In at least one of the electrode groups in the first area, the pixel circuits connected to n1 of the first electrodes are located in one of the second areas, and the pixel circuits connected to n2 of the first electrodes are located in another of the second areas, and n1 and n2 are both positive integers, and n1+n2=N.

11. The display panel according to claim 9, characterized in that: In at least one of the electrode groups, n3 of the first electrodes are located in the first area, and n4 of the first electrodes are located in the second area, and n3 and n4 are both positive integers, and n3+n4=N.

12. The display panel according to claim 9, characterized in that: The colors of the N light-emitting devices correspondingly connected to one electrode group are different from each other.

13. The display panel according to claim 1, characterized in that: The first region has a virtual line extending along a second direction, the second direction intersecting the first direction; the n first electrodes and the m first electrodes are respectively located on both sides of the virtual line.

14. The display panel according to claim 1, characterized in that: The display area includes a first transmission area and a second transmission area, the first transmission area is located in the first area, and the second transmission area is located in the second area; In the first direction, the first transmission area and the second transmission area at least partially overlap.

15. The display panel according to claim 1, characterized in that: The display area includes a driving signal line and a second signal line extending along a second direction, the second direction intersects the first direction, the shift register unit is electrically connected to the driving signal line, and the pixel circuit is electrically connected to the second signal line; wherein, Along a direction perpendicular to the plane of the display panel, at least one of the first electrodes overlaps with the drive signal line and the shift register unit at the same time, and / or at least one of the first electrodes overlaps with the drive signal line and the second signal line at the same time, and / or at least one of the first electrodes overlaps with the second signal line and the pixel circuit at the same time, and / or at least one of the first electrodes overlaps with the drive signal line and the pixel circuit at the same time.

16. The display panel according to claim 1, characterized in that: The display area includes a driving signal line and a second signal line extending along a second direction, the second direction intersects the first direction, the shift register unit is electrically connected to the driving signal line, and the pixel circuit is electrically connected to the second signal line; wherein, The display area further includes a redundant electrode, wherein the redundant electrode and one of the first electrodes are connected to the same pixel circuit, and at least one of the redundant electrodes is correspondingly arranged to one of the first electrodes; Along a direction perpendicular to the plane where the display panel is located, at least one of the redundant electrodes overlaps with the driving signal line, and / or at least one of the redundant electrodes overlaps with the second signal line.

17. The display panel according to claim 1, characterized in that: In the second direction, the distance between two adjacent first electrodes is greater than the distance between two adjacent shift register units.

18. The display panel according to claim 1, characterized in that: The display area further includes a third area, and the third area includes the pixel circuit and the first electrode; The arrangement density of the pixel circuits in the third area is smaller than the arrangement density of the pixel circuits in the second area.

19. The display panel according to claim 18, characterized in that: The length of the pixel circuit in the second zone in the first direction is smaller than the length of the pixel circuit in the third zone in the first direction, and / or the length of the pixel circuit in the second zone in the second direction is larger than the length of the pixel circuit in the third zone in the second direction, and the second direction intersects with the first direction.

20. The display panel according to claim 18, characterized in that: The pixel circuit includes a driving transistor; The length of the driving transistor in the second region in the first direction is smaller than the length of the driving transistor in the third region in the first direction, the length of the driving transistor in the second region in the second direction is larger than the length of the driving transistor in the third region in the second direction, and the second direction intersects the first direction.

21. The display panel according to claim 18, characterized in that: The display panel includes a first edge extending along a second direction, the second direction intersecting the first direction; The first area and the second areas located on both sides thereof together constitute a first arrangement area, and the first arrangement area is located on one side of the third area close to the first edge.

22. The display panel according to claim 1, characterized in that: The shift register unit includes a light emitting shift register unit and a scanning shift register unit; a plurality of the light emitting shift register units are cascaded, and a plurality of the scanning shift register units are cascaded; The light emitting shift register unit and the scanning shift register unit are adjacent to each other in the first direction in the first region.

23. The display panel according to claim 1, characterized in that: The shift register unit includes a light emitting shift register unit and a scanning shift register unit; a plurality of the light emitting shift register units are cascaded, and a plurality of the scanning shift register units are cascaded; The light emitting shift register unit and the scanning shift register unit are located in different first areas.

24. The display panel according to claim 23, characterized in that: The number of the first electrodes in the first area where the light emitting shift register unit is located is different from the number of the first electrodes in the first area where the scanning shift register unit is located.

25. The display panel according to claim 24, characterized in that: A second area is arranged between the first area where the light emitting shift register unit is located and the first area where the scanning shift register unit is located.

26. The display panel according to claim 25, characterized in that: The scanning shift register unit further includes a first scanning shift register unit and a second scanning shift register unit. A plurality of the first scanning shift register units are cascaded, and a plurality of the second scanning shift register units are cascaded. The first scanning shift register unit and the second scanning shift register unit are located in different first areas.

27. The display panel according to claim 26, characterized in that: A second area is arranged between the first area where the first scanning shift register unit is located and the first area where the second scanning shift register unit is located.

28. The display panel according to claim 1, characterized in that: The display area includes a first signal line extending along the first direction, the pixel circuit is electrically connected to the first signal line, and the first signal line includes a first line segment and a second line segment arranged in different layers; The first line segment and the second line segment are connected to each other, the first line segment is located in the first area, and the second line segment is at least partially located in the second area.

29. The display panel according to claim 28, characterized in that: The shift register unit comprises a first shift register unit and a second shift register unit, a plurality of the first shift register units are cascaded, and a plurality of the second shift register units are cascaded; The first signal line includes a first gate line and a second gate line, the first gate line is connected to the output end of the first shift register unit, and the second gate line is connected to the output end of the second shift register unit; Along a direction perpendicular to a plane where the display panel is located, the first line segment of the first gate line is insulated and overlapped with the second shift register unit, and the first line segment of the second gate line is insulated and overlapped with the first shift register unit.

30. The display panel according to claim 28, characterized in that The first signal line includes a reset signal line; Along a direction perpendicular to the plane where the display panel is located, the first line segment of the reset signal line is insulated and overlapped with the shift register unit.

31. The display panel according to claim 28, characterized in that: The display panel comprises a circuit layer, and the pixel circuit and the shift register unit are located in the circuit layer; wherein the film layer where the first line segment is located is located between the circuit layer and the film layer where the first electrode is located.

32. A display device, characterized in that: A display panel comprising any one of claims 1 to 31.

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