Display panel and preparation method thereof

Abstract

The embodiment of the invention discloses a display panel and a preparation method thereof, according to the display panel and the preparation method thereof, a photomask is adopted to form a patterned first pixel definition layer and a patterned second pixel definition layer, a photomask process is saved, the first pixel definition layer is an inorganic layer, a thermal process can be saved, and the production efficiency is improved. And the negative bias risk of the thin film transistor is reduced. Secondly, a first retaining wall is additionally arranged on the second pixel definition layer in the second direction, so that the second pixel definition layer is divided into a plurality of ink printing areas in the second direction, when the light-emitting layer is baked, the flowing path of solute along with solvent is blocked, the risk that the solute in the middle area is greatly transferred to the edge area in the whole panel is reduced, and the light-emitting efficiency is improved. Therefore, the film thickness uniformity of the light-emitting layer is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a method for preparing the same. Background Art

[0002] In existing OLED display panels, a pixel definition layer is usually set after the oxide thin film transistor is formed. As for the pixel definition structure layer, it includes two layers of organic pixel definition layers, one organic pixel definition layer includes a first retaining wall extending in the horizontal direction, and the other organic pixel definition layer includes a second retaining wall extending in the vertical direction. The first retaining wall and the second retaining wall intersect to form a pixel opening for printing ink materials. In addition, based on the structure of the linear pixel definition layer, one color of ink is usually printed in one row or one column at the same time to reduce the number of prints and reduce the printing accuracy.

[0003] In the process of research and practice of the prior art, the inventors of the present application found that a long-term high temperature environment will cause the oxide thin film transistor to have a negative bias. The formation of the first organic pixel definition layer and the second organic pixel definition layer requires two thermal processes, which easily lead to the risk of negative bias of the oxide thin film transistor. Secondly, during the ink baking process, based on the connection of the entire row or column of ink and the baking rate of the edge area of ​​the panel is greater than the baking rate of the middle area, the solute in the middle area flows to the edge area with the solvent, resulting in uneven thickness of the light-emitting layer. Summary of the invention

[0004] The embodiments of the present application provide a display panel and a method for manufacturing the same, which can reduce the risk of negative bias of a thin film transistor, save light masks, and improve the thickness uniformity of a light-emitting layer.

[0005] The present invention provides a method for manufacturing a display panel, which comprises the following steps:

[0006] A thin film transistor structure layer, a first electrode, a first pixel definition layer and a second pixel definition layer are sequentially formed on a substrate, wherein the first pixel definition layer is an inorganic layer and the second pixel definition layer is an organic photoresist layer;

[0007] Patterning the second pixel definition layer, the second pixel definition layer comprising a first light-resistance bar, a second light-resistance bar and a third light-resistance bar, the first light-resistance bar and the second light-resistance bar extending along a first direction and spaced apart in a second direction, the third light-resistance bar extending along the second direction, the first direction intersecting with the second direction, the first light-resistance bar and the second light-resistance bar respectively cross-connecting with the third light-resistance bar to form a plurality of openings, the thickness of the first light-resistance bar being less than the thickness of the second light-resistance bar, the thickness of the second light-resistance bar being less than the thickness of the third light-resistance bar, one of the openings corresponding to one of the first electrodes being arranged, and the pattern of the opening in a top view being within the region of the first electrode;

[0008] Using the second pixel definition layer as a mask, ashing the second pixel definition layer while etching the first pixel definition layer; wherein the first photoresist strip is removed, the second photoresist strip is thinned to form a first barrier wall, the third photoresist strip is thinned to form a second barrier wall, and the second pixel definition layer is etched to form a pixel opening exposing the first electrode;

[0009] A light emitting layer is formed in the pixel opening.

[0010] Optionally, in some embodiments of the present application, in the step of etching the first pixel definition layer while ashing the second pixel definition layer using the second pixel definition layer as a mask, the thickness of the first photoresist strip is less than or equal to the thickness of the first pixel definition layer, the etching rate of the first pixel definition layer is a first rate, and the etching rate of the second pixel definition layer is a second rate, and the second rate is less than the first rate.

[0011] Optionally, in some embodiments of the present application, the thickness of the first pixel definition layer is between 1500 angstroms and 5500 angstroms, the thickness of the first retaining wall is between 5500 angstroms and 10000 angstroms, and the thickness of the second retaining wall is between 6000 angstroms and 15000 angstroms.

[0012] Optionally, in some embodiments of the present application, in the step of etching the first pixel definition layer while ashing the second pixel definition layer using the second pixel definition layer as a mask, the first electrode is etched to form a groove connected to the pixel opening.

[0013] Optionally, in some embodiments of the present application, using the second pixel definition layer as a mask, ashing the second pixel definition layer and etching the first pixel definition layer at the same time, comprises the following steps:

[0014] The first pixel definition layer and the second pixel definition layer are simultaneously etched using a first gas, so that the second pixel definition layer is thinned as a whole, a concave groove is formed in the first pixel definition layer, and the distance from the bottom surface of the concave groove to the first electrode is between 10 nanometers and 80 nanometers;

[0015] The first pixel definition layer and the second pixel definition layer are simultaneously etched with a second gas to remove the first photoresist strip, thin the second photoresist strip to form a first retaining wall, thin the third photoresist strip to form a second retaining wall, and etch the second pixel definition layer to form a pixel opening exposing the first electrode; the second gas etches the first electrode at a rate lower than the first gas etches the first electrode.

[0016] Optionally, in some embodiments of the present application, in the step of ashing the second pixel definition layer and etching the first pixel definition layer simultaneously using the second pixel definition layer as a mask, the ashing temperature is between 10 degrees Celsius and 40 degrees Celsius.

[0017] Optionally, in some embodiments of the present application, in the second direction, a plurality of the first blocking walls are arranged at intervals, and at least two of the pixel openings are spaced between two adjacent first blocking walls;

[0018] In the step of forming a light-emitting layer in the pixel opening, an inkjet printing method is used to form the light-emitting layer in the pixel opening, wherein the light-emitting layer includes a plurality of light-emitting parts, and the light-emitting parts continuously cover at least two of the pixel openings, and in the second direction, two adjacent light-emitting parts are spaced apart by a first blocking wall, and in the first direction, two adjacent light-emitting parts are spaced apart by a second blocking wall.

[0019] Optionally, in some embodiments of the present application, the colors of any two adjacent light-emitting portions are different.

[0020] Accordingly, an embodiment of the present application further provides a display panel, which includes:

[0021] substrate;

[0022] A thin film transistor structure layer is disposed on the substrate;

[0023] A first electrode is arranged on a side of the thin film transistor structure layer away from the substrate;

[0024] A first pixel definition layer is disposed on a side of the thin film transistor structure layer away from the substrate, the first pixel definition layer is an inorganic layer, the first pixel definition layer includes a plurality of first pixel definition parts and a plurality of second pixel definition parts, the first pixel definition parts and the second pixel definition parts are cross-connected to form a plurality of pixel openings exposing the first electrode;

[0025] a second pixel definition layer, arranged on a side of the first pixel definition layer away from the substrate, the second pixel definition layer being an organic layer, the second pixel definition layer comprising a plurality of first retaining walls and a plurality of second retaining walls, the thickness of the first retaining walls being less than the thickness of the second retaining walls, the first retaining walls and the first pixel definition portion extending along a first direction, the second retaining walls and the second pixel definition portion extending along a second direction intersecting the first direction, and at least two pixel openings being spaced apart between two adjacent first retaining walls in the second direction;

[0026] The light-emitting layer covers the pixel opening.

[0027] Optionally, in some embodiments of the present application, the light-emitting layer includes a plurality of light-emitting portions, the light-emitting portions continuously cover at least two of the pixel openings, and in the second direction, a first blocking wall is disposed between two adjacent light-emitting portions, and in the first direction, a second blocking wall is disposed between two adjacent light-emitting portions;

[0028] In the second direction, the colors of any two adjacent light-emitting portions are the same or different.

[0029] Optionally, in some embodiments of the present application, the pixel opening includes a first opening and a second opening, the first opening is connected to a side of the second opening away from the substrate, the opening width of the first opening is greater than the opening width of the second opening, and the depth of the first opening is greater than the depth of the second opening.

[0030] The display panel and preparation method of the embodiment of the present application use a photomask to form a patterned first pixel definition layer and a second pixel definition layer, saving a photomask process, and the first pixel definition layer is an inorganic layer, which can save a thermal process and reduce the risk of negative bias of the thin film transistor. Secondly, the second pixel definition layer is provided with a first retaining wall in the second direction, so that it is divided into a plurality of ink printing areas in the second direction. When the light-emitting layer is baked, the flow path of the solute with the solvent is blocked, and in the entire panel, the risk of solute in the middle area transferring to the edge area in large quantities is reduced to improve the uniformity of the film thickness of the light-emitting layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1is a schematic diagram of a process for preparing a display panel provided in an embodiment of the present application;

[0032] Figure 2 is a schematic diagram of step B101 of the method for preparing a display panel provided in an embodiment of the present application;

[0033] Figure 3 is a schematic diagram of step B102 of the method for preparing a display panel provided in an embodiment of the present application;

[0034] Figure 4 is a schematic diagram of step B103 of the method for preparing a display panel provided in an embodiment of the present application;

[0035] Figure 5 is a schematic diagram of step B031 of the method for preparing a display panel provided in an embodiment of the present application;

[0036] Figure 6 yes Figure 5 A magnified view of part A1;

[0037] Figure 7 is a schematic diagram of step B032 of the method for preparing a display panel provided in an embodiment of the present application;

[0038] Figure 8 yes Figure 7 A magnified view of part A2;

[0039] Fig. 9 is a plan view of step B104 of the method for preparing a display panel provided in an embodiment of the present application;

[0040] Fig.10 yes Fig. 9 Schematic diagram of the cross section along line c1c1;

[0041] Fig.11 is a schematic diagram of a planar structure of a display panel provided in an embodiment of the present application;

[0042] Fig.12 yes Fig.11 Schematic diagram of the cross section along line c2c2. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, the various embodiments can be combined with each other but will not be repeated one by one, and in the absence of contrary instructions, the directional words used, such as "upper" and "lower", usually refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the drawings; while "inside" and "outside" refer to the outline of the device; the terms "first", "second", "third", etc. are used only as markings, and no numerical requirements are imposed or order is established.

[0044] The embodiments of the present application provide a display panel and a method for manufacturing the same, which are described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments.

[0045] Please refer to Figure 1 The present invention provides a method for manufacturing a display panel, which comprises the following steps:

[0046] Step B101, forming a thin film transistor structure layer, a first electrode, a first pixel definition layer and a second pixel definition layer in sequence on a substrate, wherein the first pixel definition layer is an inorganic layer and the second pixel definition layer is an organic photoresist layer;

[0047] Step B102, patterning the second pixel definition layer, the second pixel definition layer comprising a first photoresist bar, a second photoresist bar and a third photoresist bar, the first photoresist bar and the second photoresist bar extending along a first direction and spaced apart in a second direction, the third photoresist bar extending along the second direction, the first direction intersecting with the second direction, the first photoresist bar and the second photoresist bar respectively cross-connecting with the third photoresist bar to form a plurality of openings, the thickness of the first photoresist bar is less than the thickness of the second photoresist bar, the thickness of the second photoresist bar is less than the thickness of the third photoresist bar, one of the openings is arranged corresponding to one of the first electrodes, and the pattern of the opening in a top view is within the region of the first electrode;

[0048] Step B103, using the second pixel definition layer as a mask, ashing the second pixel definition layer while etching the first pixel definition layer; wherein the first photoresist strip is removed, the second photoresist strip is thinned to form a first barrier wall, the third photoresist strip is thinned to form a second barrier wall, and the second pixel definition layer is etched to form a pixel opening exposing the first electrode;

[0049] Step B104, forming a light-emitting layer in the pixel opening.

[0050] It should be noted that the method for preparing the display panel of the embodiment of the present application uses a photomask to form a patterned first pixel definition layer and a second pixel definition layer, which saves a photomask process, and the first pixel definition layer is an inorganic layer, which can save a thermal process and reduce the risk of negative bias of the thin film transistor. Secondly, the second pixel definition layer is provided with a first retaining wall in the second direction, so that it is divided into a plurality of ink printing areas in the second direction. When the light-emitting layer is baked, the flow path of the solute with the solvent is blocked, and in the entire panel, the risk of solute in the middle area transferring to the edge area in large quantities is reduced to improve the uniformity of the film thickness of the light-emitting layer.

[0051] The specific steps of the method for preparing the display panel according to the embodiment of the present application will be described below.

[0052] Please refer to Figure 2 In step B101, a thin film transistor structure layer 12, a first electrode 13, a first pixel definition layer 14 and a second pixel definition layer 15 are sequentially formed on a substrate 11. The first pixel definition layer 14 is an inorganic layer, and the second pixel definition layer 15 is an organic photoresist layer.

[0053] It should be noted that, compared with the prior art in which both pixel definition layers are organic layers, the method for preparing the display panel in the embodiment of the present application sets the material of the first pixel definition layer 14 to be an inorganic layer, thereby reducing a thermal process that affects the thin-film transistor device, thereby reducing the risk of stability degradation and negative bias of the thin-film transistor device.

[0054] Optionally, the substrate 11 may be a rigid substrate or a flexible substrate. The material of the substrate 11 includes one of glass, sapphire, silicon, silicon dioxide, polyethylene, polypropylene, polystyrene, polylactic acid, polyethylene diphthalate, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyether sulfone, aromatic fluorotoluene containing polyarylate, polycyclic olefin, polyimide or polyurethane.

[0055] Optionally, the thin film transistor structure layer 12 includes devices such as thin film transistors and capacitors.

[0056] Optionally, the channel material of the thin film transistor may be an oxide semiconductor. The oxide semiconductor may include an oxide based on titanium, hafnium, zirconium, aluminum, tantalum, germanium, zinc, gallium, tin or indium, and a composite oxide thereof (such as indium gallium zinc oxide, indium zinc oxide, zinc tin oxide, indium gallium oxide, indium tin oxide, indium zirconium oxide, indium zirconium zinc oxide, indium zirconium tin oxide, indium zirconium gallium oxide, indium aluminum oxide, indium zinc aluminum oxide, indium tin aluminum oxide, indium aluminum gallium oxide, indium tantalum oxide, indium tantalum zinc oxide, indium tantalum tin oxide, indium tantalum gallium oxide, indium germanium oxide, indium germanium zinc oxide, indium germanium tin oxide, indium germanium gallium oxide, titanium indium zinc oxide and hafnium indium zinc oxide).

[0057] Optionally, the first electrode 13 may be an anode or a cathode, and the embodiment of the present application is described by taking the first electrode 13 as an anode as an example. The first electrode 13 is connected to the driving thin film transistor.

[0058] Optionally, the first pixel definition layer 14 may be formed by vapor deposition. The thickness of the first pixel definition layer 14 is less than the thickness of the second pixel definition layer 15 .

[0059] Among them, the material of the second pixel definition layer 15 is organic photoresist. Compared with non-organic photoresist, the preparation method of the embodiment of the present application does not need to set an additional photoresist layer to pattern the second pixel definition layer 15, but can directly use the second pixel definition layer 15 as a photoresist mask layer.

[0060] Then go to step B102.

[0061] Please refer to Figure 3 , in step B102 , the second pixel definition layer 15 is patterned.

[0062] Wherein, the second pixel definition layer 15 includes a first photoresist bar 151, a second photoresist bar 152 and a third photoresist bar 153. The first photoresist bar 151 and the second photoresist bar 152 extend along the first direction x and are arranged at intervals in the second direction y. The third photoresist bar 153 extends along the second direction y and is arranged at intervals along the first direction x. The first direction x intersects with the second direction y. The first photoresist bar 151 and the second photoresist bar 152 are respectively cross-connected with the third photoresist bar 153 to form a plurality of openings k1. The thickness of the first photoresist bar 151 is less than the thickness of the second photoresist bar 152. The thickness of the second photoresist bar 152 is less than the thickness of the third photoresist bar 153. An opening k1 is arranged corresponding to a first electrode 13. The pattern of the opening k1 in a top view is within the region of the first electrode 13.

[0063] Optionally, the first direction x and the second direction y intersect vertically. Fig. 9 's hint.

[0064] It can be understood that a mask mk is used to directly expose and develop the second pixel definition layer 15 to form a patterned second pixel definition layer 15, and the patterned second pixel definition layer 15 is used as a mask to etch the first pixel definition layer 14, thereby saving the mask process.

[0065] Optionally, the light mask mk includes a first light-transmitting portion m1, a second light-transmitting portion m2, a third light-transmitting portion m3 and a light-shielding portion m4, and the light transmittances of the first light-transmitting portion m1, the second light-transmitting portion m2, the third light-transmitting portion m3 and the light-shielding portion m4 decrease, the light transmittance of the first light-transmitting portion m1 is 100%, and the light transmittance of the light-shielding portion m4 is 0%. The first light-transmitting portion m1 corresponds to the opening k1, the second light-transmitting portion m2 corresponds to the first light-blocking strip 151, the third light-transmitting portion m3 corresponds to the second light-blocking strip 152, and the light-shielding portion m4 corresponds to the third light-blocking strip 153.

[0066] Optionally, in some embodiments, another first light-blocking strip 151 is connected to one side of the third light-blocking strip 153 close to the opening k1, and the extension direction of the another first light-blocking strip 151 and the third light-blocking strip 153 is consistent, so that two first light-blocking strips 151 extending along the second direction y, one first light-blocking strip 151 extending along the first direction x, and one second light-blocking strip 152 extending along the first direction x define and form the opening k1. Since the opening k1 is formed by three first light-blocking strips 151 of equal thickness, the depth uniformity of the opening k1 can be better controlled, and then the depth uniformity of the subsequent pixel opening s1 can be controlled, thereby improving the thickness uniformity of the light-emitting layer 16.

[0067] Of course, in some embodiments, the opening k1 may be formed directly by using two third light-blocking strips 153 , one first light-blocking strip 151 and one second light-blocking strip 152 .

[0068] Then go to step B103.

[0069] Please refer to Figure 4 In step B103, the second pixel definition layer 15 is used as a mask to ashed the second pixel definition layer 15 while etching the first pixel definition layer 14.

[0070] In step B103 , the first photoresist strip 151 is removed, the second photoresist strip 152 is thinned to form a first barrier wall 15 a , the third photoresist strip 153 is thinned to form a second barrier wall 15 b , and the second pixel definition layer 15 is etched to form a pixel opening s1 exposing the first electrode 13 .

[0071] Optionally, in step B102, the thickness of the first photoresist strip 151 is less than or equal to the thickness of the first pixel definition layer 14. In step B103, the first pixel definition layer 14 is etched at a first rate, and the second pixel definition layer 15 is etched at a second rate, which is less than the first rate.

[0072] It can be understood that the same gas is used to etch the first pixel definition layer 14 and the second pixel definition layer 15, wherein the etching rate of the first pixel definition layer 14 is faster than the etching rate of the second pixel definition layer 15. Based on the fact that the second pixel definition layer 15 is a photoresist, the required thickness of the second pixel definition layer 15 can be thinned, thereby saving costs while maintaining the first retaining wall 15a and the second retaining wall 15b with a relatively thick thickness to separate the subsequent light-emitting layer 16.

[0073] Optionally, in some embodiments of the present application, the thickness of the first pixel definition layer 14 is between 1500 angstroms and 5500 angstroms, for example, 1500 angstroms, 2000 angstroms, 2500 angstroms, 3000 angstroms, 3500 angstroms, 4000 angstroms, 4500 angstroms, 5000 angstroms or 5500 angstroms.

[0074] The thickness of the first retaining wall 15a is between 5500 angstroms and 10000 angstroms, for example, 5500 angstroms, 6000 angstroms, 6500 angstroms, 7000 angstroms, 7500 angstroms, 8000 angstroms, 8500 angstroms, 9000 angstroms, 9500 angstroms or 10000 angstroms.

[0075] The thickness of the second retaining wall 15b is between 6000 angstroms and 15000 angstroms, for example, it can be 6000 angstroms, 6500 angstroms, 7000 angstroms, 7500 angstroms, 8000 angstroms, 8500 angstroms, 9000 angstroms, 9500 angstroms, 10000 angstroms, 10500 angstroms, 11000 angstroms, 11500 angstroms, 12000 angstroms, 12500 angstroms, 13000 angstroms, 13500 angstroms, 14000 angstroms, 14500 angstroms or 15000 angstroms.

[0076] It can be understood that the first retaining wall 15a and the second retaining wall 15b are used to prevent the ink materials of the light-emitting layer 16 from being connected to each other, so as to prevent the ink materials of the light-emitting layer 16 from being connected in a whole column or a whole row. The first retaining walls 15a are arranged at intervals along the second direction y, and the whole column of the light-emitting layer 16 is cut into a plurality of regions, thereby avoiding the risk of solute migration along the long path of the solvent, thereby improving the thickness uniformity of the light-emitting layer 16.

[0077] Optionally, in some embodiments, the thickness of the first retaining wall 15a is less than the thickness of the second retaining wall 15b. It is understandable that when the ink material of the light-emitting layer 16 is subsequently baked, the first retaining wall 15a is relatively thin, which allows part of the air pressure to be slowly released in the second direction y, reducing the risk of local high pressure. For example, in the early stage of baking, the solvent evaporates at a faster rate, and the thinner first retaining wall 15a can buffer the sudden increase in air pressure, reduce the risk of solutes being pushed to the edge by high pressure, and reduce the risk of sudden changes in film thickness; in addition, based on the thinness of the first retaining wall 15a, the moderate air pressure is released in the second direction y, reducing the pressure gradient difference between the central area and the two side areas of the panel, reducing the driving force for the migration of solutes to the edge, and thus providing uniformity of the baking atmosphere to improve the thickness uniformity of the subsequent light-emitting layer 16.

[0078] In addition, since the second retaining wall 15b is thicker, the second retaining wall 15b can provide stronger mechanical support, and the first retaining wall 15a is thinner, so that there is a height difference between the first retaining wall 15a and the second retaining wall 15b, and this height difference can buffer the impact of external force to better protect the panel. Secondly, the first retaining wall 15a is thinner, which can reduce the blocking of the edge of the pixel opening s1, improve the aperture ratio, and enhance the display brightness.

[0079] Optionally, in step B103 , the first electrode 13 is etched to form a groove 13 a connected to the pixel opening s1 .

[0080] It is understandable that the groove 13 a is formed on the first electrode 13 to ensure that the area of ​​the pixel opening s1 is free of the material of the first pixel definition layer 14 , thereby reducing the risk of the material of the first pixel definition layer 14 remaining in the pixel opening s1 .

[0081] Optionally, in some embodiments, in step B103 , the gas is controlled not to etch the first electrode 13 .

[0082] Optionally, in some embodiments of the present application, a single etching process may be used to form the pixel opening s1 in step B103 .

[0083] Optionally, in some embodiments of the present application, in step B103, two etching processes may be used to form the pixel opening s1. For example, step B103 includes the following steps:

[0084] Please refer to Figure 5 and Figure 6 In step B031, the first pixel definition layer 14 and the second pixel definition layer 15 are etched simultaneously with the first gas, so that the second pixel definition layer 15 is thinned as a whole, and the first pixel definition layer 14 forms a recessed groove 14a, and the distance d1 from the bottom surface of the recessed groove 14a to the first electrode 13 is between 10 nanometers and 80 nanometers.

[0085] Optionally, the distance d1 from the bottom surface of the concave groove 14 a to the first electrode 13 may be 10 nanometers, 20 nanometers, 30 nanometers, 40 nanometers, 50 nanometers, 60 nanometers, 70 nanometers or 80 nanometers.

[0086] Then go to step B032.

[0087] Please refer to Figure 7 and Figure 8 , step B032, using the second gas to simultaneously etch the first pixel definition layer 14 and the second pixel definition layer 15, removing the first photoresist strip 151, thinning the second photoresist strip 152 to form the first barrier 15a, thinning the third photoresist strip 153 to form the second barrier 15b, and etching the second pixel definition layer 15 to form a pixel opening s1 exposing the first electrode 13. The second gas etches the first electrode 13 at a rate lower than the first gas etches the first electrode 13.

[0088] It should be noted that the first gas and the second gas may be a single etching gas or a mixed gas of at least two gases.

[0089] It can be understood that the first pixel definition layer 14 and the second pixel definition layer 15 are etched twice using two gases to reduce the risk of over-etching the first electrode 13 .

[0090] Among them, the distance d1 from the bottom surface of the recessed groove 14a to the first electrode 13 is between 10 nanometers and 80 nanometers as the timing for switching the secondary etching, and based on the fact that the etching rate of the first electrode 13 by the second gas is lower than the etching rate of the first gas by the first electrode 13, the overall etching time can be avoided from being too long and the risk of over-etching the first electrode 13 can be reduced.

[0091] It can be understood that, in some embodiments, based on the use of two etching processes in step B103 , the pixel opening s1 is a stepped opening.

[0092] The pixel opening s1 includes a first opening s01 and a second opening s02. The first opening s01 is connected to the side of the second opening s02 away from the substrate 11, the opening width of the first opening s01 is greater than the opening width of the second opening s02, and the depth of the first opening s01 is greater than the depth of the second opening s02.

[0093] The pixel opening s1 is a stepped opening, which can improve the continuity of subsequent film coverage and reduce the risk of breakage. Secondly, the stepped pixel opening s1 can disperse the capillary force and reduce the risk of concentrated accumulation of liquid at the edge under a single slope.

[0094] Optionally, in some embodiments, the slope a2 of the second opening s02 is less than the slope a1 of the first opening s01. It is understandable that when the slope of the second opening s02 is gentler, the capillary flow of the ink at the bottom can be smoother, reducing the tendency of edge aggregation. The steeper slope of the first opening s01 may reduce the edge liquid film accumulation speed by limiting the lateral flow in the top area. In other words, by adjusting the slopes of the first opening s01 and the second opening s02, the risk of ink material accumulation at the edge of the pixel opening s1 can be reduced, thereby improving the thickness uniformity of the light-emitting layer 16.

[0095] Optionally, in some embodiments of the present application, in step B103, the ashing temperature is between 10 degrees Celsius and 40 degrees Celsius, for example, it may be 10 degrees Celsius, 15 degrees Celsius, 20 degrees Celsius, 25 degrees Celsius, 30 degrees Celsius, 35 degrees Celsius or 40 degrees Celsius.

[0096] It can be understood that the ambient temperature of step B103 is relatively low and will not affect the stability of the thin film transistor.

[0097] Then go to step B104.

[0098] Please refer to Fig. 9 and Fig.10 In step B104, a light emitting layer 16 is formed in the pixel opening s1.

[0099] Optionally, in some embodiments of the present application, in the second direction y, a plurality of first blocking walls 15 a are arranged at intervals, and at least two pixel openings s1 are spaced between two adjacent first blocking walls 15 a.

[0100] In step B104, a light-emitting layer 16 is formed in the pixel opening s1 by inkjet printing. The light-emitting layer 16 includes a plurality of light-emitting portions 161, and one light-emitting portion 161 continuously covers at least two pixel openings s1. In the second direction y, a first retaining wall 15a is disposed between two adjacent light-emitting portions 161, and in the first direction x, a second retaining wall 15b is disposed between two adjacent light-emitting portions 161.

[0101] It can be understood that one light emitting portion 161 at least continuously covers two pixel openings s1, and one nozzle is used to print at least two pixel openings s1, and multiple drops of ink can be printed at one time so that the ink flows between two adjacent pixel openings s1, but is blocked by the first retaining wall 15a and the second retaining wall 15b. Based on this, compared with the traditional method of one nozzle corresponding to one pixel opening, the embodiment of the present application can reduce the printing accuracy of the nozzle and improve the printing efficiency.

[0102] In addition, the ink does not flow between the two pixel openings s1 adjacent to the first barrier wall 15 a , and the ink does not flow between the two pixel openings s1 adjacent to the second barrier wall 15 b .

[0103] Based on this, optionally, in some embodiments of the present application, the colors of any two adjacent light-emitting portions 161 are different.

[0104] Compared with the colors of the two adjacent light emitting parts 161 in the second direction y, any two adjacent light emitting parts 161 in the embodiment of the present application have different colors, which can improve the light uniformity of the display panel.

[0105] Optionally, in some embodiments of the present application, in the second direction y, two adjacent light emitting units 161 have the same color. For example, the color of the entire row of light emitting units 161 is the same.

[0106] Optionally, in some embodiments, in addition to printing the light-emitting layer 16 , other light-emitting functional layers may also be printed, such as a hole injection layer and a hole transport layer, etc. Secondly, an electron transport layer and an electron injection layer may also be formed on the light-emitting layer 16 .

[0107] Subsequently, a cathode and an encapsulation layer may be formed on the light emitting layer 16 .

[0108] In this way, the method for manufacturing the display panel of the embodiment of the present application is completed.

[0109] Please refer to Fig.11 and Fig.12 Accordingly, an embodiment of the present application further provides a display panel 100 , which includes a substrate 11 , a thin film transistor structure layer 12 , a first electrode 13 , a first pixel definition layer 14 , a second pixel definition layer 15 and a light emitting layer 16 .

[0110] The thin film transistor structure layer 12 is disposed on the substrate 11. The first electrode 13 is disposed on a side of the thin film transistor structure layer 12 away from the substrate 11.

[0111] The first pixel definition layer 14 is disposed on a side of the thin film transistor structure layer 12 away from the substrate 11. The first pixel definition layer 14 is an inorganic layer. The first pixel definition layer 14 includes a plurality of first pixel definition portions 141 and a plurality of second pixel definition portions 142. The first pixel definition portions 141 and the second pixel definition portions 142 are cross-connected to form a plurality of pixel openings s1 exposing the first electrodes 13.

[0112] The second pixel definition layer 15 is arranged on a side of the first pixel definition layer 14 away from the substrate 11, and the second pixel definition layer 15 is an organic layer. The second pixel definition layer 15 includes a plurality of first retaining walls 15a and a plurality of second retaining walls 15b, and the thickness of the first retaining walls 15a is less than the thickness of the second retaining walls 15b. The first retaining walls 15a and the first pixel definition portion 141 are extended along the first direction x. The second retaining walls 15b and the second pixel definition portion 142 are extended along the second direction y intersecting with the first direction x. In the second direction y, at least two pixel openings s1 are spaced between two adjacent first retaining walls 15a.

[0113] The light emitting layer 16 covers the pixel opening s1.

[0114] It should be noted that the display panel 100 of the embodiment of the present application is prepared by any one of the above-mentioned methods for preparing a display panel.

[0115] It should be noted that, compared with the prior art in which both pixel definition layers are organic layers, the display panel 100 of the embodiment of the present application sets the material of the first pixel definition layer 14 to be an inorganic layer, thereby reducing a thermal process that affects the thin film transistor device, thereby reducing the risk of stability degradation and negative bias of the thin film transistor device.

[0116] Secondly, the first retaining wall 15a and the second retaining wall 15b are used to prevent the ink materials of the light-emitting layer 16 from being connected to each other, so as to prevent the ink materials of the light-emitting layer 16 from being connected in a whole column or a whole row. The first retaining walls 15a are arranged at intervals along the second direction y, and the whole column of the light-emitting layer 16 is cut into multiple areas to avoid the risk of solute migration along the long path of the solvent, thereby improving the thickness uniformity of the light-emitting layer 16.

[0117] Since the thickness of the first retaining wall 15a is smaller than that of the second retaining wall 15b, it is understandable that when the ink material of the light-emitting layer 16 is subsequently baked, the first retaining wall 15a is relatively thin, which allows part of the air pressure to be slowly released in the second direction y, thereby reducing the risk of local high pressure. For example, in the early stage of baking, the solvent evaporates at a faster rate, and the thinner first retaining wall 15a can buffer the sudden rise in air pressure, thereby reducing the risk of solutes being pushed to the edge by high pressure, and reducing the risk of sudden changes in film thickness. In addition, since the first retaining wall 15a is relatively thin, the moderate air pressure release in the second direction y reduces the pressure gradient difference between the central area and the two side areas of the panel, reduces the driving force for the migration of solutes to the edge, and thus provides uniformity of the baking atmosphere, thereby improving the thickness uniformity of the subsequent light-emitting layer 16.

[0118] In addition, since the second retaining wall 15b is thicker, the second retaining wall 15b can provide stronger mechanical support, and the first retaining wall 15a is thinner, so that there is a height difference between the first retaining wall 15a and the second retaining wall 15b, and this height difference can buffer the impact of external force to better protect the panel. Secondly, the first retaining wall 15a is thinner, which can reduce the blocking of the edge of the pixel opening s1, improve the aperture ratio, and enhance the display brightness.

[0119] Optionally, in some embodiments of the present application, the light-emitting layer 16 includes a plurality of light-emitting portions 161. The light-emitting portions 161 continuously cover at least two pixel openings s1. In the second direction y, a first retaining wall 15a is disposed between two adjacent light-emitting portions 161, and in the first direction x, a second retaining wall 15b is disposed between two adjacent light-emitting portions 161.

[0120] In the second direction y, the colors of any two adjacent light emitting portions 161 are the same or different.

[0121] It can be understood that, compared with the second direction y, the colors of two adjacent light emitting parts 161 are the same. In the embodiment of the present application, any two adjacent light emitting parts 161 have different colors, which can improve the light uniformity of the display panel.

[0122] Optional, see Figure 8 In some embodiments of the present application, the pixel opening s1 includes a first opening s01 and a second opening s02. The first opening s01 is connected to a side of the second opening s02 away from the substrate 11, the opening width of the first opening s01 is greater than the opening width of the second opening s02, and the depth of the first opening s01 is greater than the depth of the second opening s02.

[0123] The pixel opening s1 is a stepped opening, which can improve the continuity of subsequent film coverage and reduce the risk of breakage. Secondly, the stepped pixel opening s1 can disperse the capillary force and reduce the risk of concentrated accumulation of liquid at the edge under a single slope.

[0124] Optionally, in some embodiments, the slope a2 of the second opening s02 is less than the slope a1 of the first opening s01. It is understandable that when the slope of the second opening s02 is gentler, the capillary flow of the ink at the bottom may be smoother, reducing the tendency of edge aggregation. The steeper slope of the first opening s01 may reduce the edge liquid film accumulation speed by limiting the lateral flow in the top area. In other words, by adjusting the slopes of the first opening s01 and the second opening s02, the risk of ink material accumulation at the edge of the pixel opening s1 can be reduced, thereby improving the thickness uniformity of the light-emitting layer 16.

[0125] The display panel 100 of the embodiment of the present application uses a photomask to form a patterned first pixel definition layer 14 and a second pixel definition layer 15, which saves a photomask process, and the first pixel definition layer 14 is an inorganic layer, which can save a thermal process and reduce the risk of negative bias of the thin film transistor. Secondly, the second pixel definition layer 15 is provided with a first retaining wall 15a in the second direction y, so that it is divided into a plurality of ink printing areas in the second direction y. When the light-emitting layer 16 is baked, the flow path of the solute with the solvent is blocked, and in the entire panel, the risk of solute in the middle area transferring to the edge area in large quantities is reduced to improve the uniformity of the film thickness of the light-emitting layer.

[0126] The above is a detailed introduction to a display panel and a preparation method thereof provided in an embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for preparing a display panel, characterized in that: The following steps are involved: A thin film transistor structure layer, a first electrode, a first pixel definition layer and a second pixel definition layer are sequentially formed on a substrate, wherein the first pixel definition layer is an inorganic layer and the second pixel definition layer is an organic photoresist layer; Patterning the second pixel definition layer, the second pixel definition layer comprising a first light-resistance bar, a second light-resistance bar and a third light-resistance bar, the first light-resistance bar and the second light-resistance bar extending along a first direction and spaced apart in a second direction, the third light-resistance bar extending along the second direction, the first direction intersecting with the second direction, the first light-resistance bar and the second light-resistance bar respectively cross-connecting with the third light-resistance bar to form a plurality of openings, the thickness of the first light-resistance bar being less than the thickness of the second light-resistance bar, the thickness of the second light-resistance bar being less than the thickness of the third light-resistance bar, one of the openings corresponding to one of the first electrodes being arranged, and the pattern of the opening in a top view being within the region of the first electrode; Using the second pixel definition layer as a mask, ashing the second pixel definition layer while etching the first pixel definition layer; wherein the first photoresist strip is removed, the second photoresist strip is thinned to form a first barrier wall, the third photoresist strip is thinned to form a second barrier wall, and the second pixel definition layer is etched to form a pixel opening exposing the first electrode; A light emitting layer is formed in the pixel opening.

2. The method for preparing a display panel according to claim 1, characterized in that: In the step of using the second pixel definition layer as a mask to ashed the second pixel definition layer and simultaneously etching the first pixel definition layer, the thickness of the first photoresist strip is less than or equal to the thickness of the first pixel definition layer, the etching rate of the first pixel definition layer is a first rate, and the etching rate of the second pixel definition layer is a second rate, and the second rate is less than the first rate.

3. The method for preparing a display panel according to claim 2, characterized in that: The thickness of the first pixel definition layer is between 1500 angstroms and 5500 angstroms, the thickness of the first barrier wall is between 5500 angstroms and 10000 angstroms, and the thickness of the second barrier wall is between 6000 angstroms and 15000 angstroms.

4. The method for preparing a display panel according to any one of claims 1 to 3, characterized in that: In the step of using the second pixel definition layer as a mask to ashed the second pixel definition layer and simultaneously etching the first pixel definition layer, the first electrode is etched to form a groove communicating with the pixel opening.

5. The method for preparing a display panel according to any one of claims 1 to 3, characterized in that: Using the second pixel definition layer as a mask, ashing the second pixel definition layer and etching the first pixel definition layer at the same time, comprising the following steps: The first pixel definition layer and the second pixel definition layer are simultaneously etched using a first gas, so that the second pixel definition layer is thinned as a whole, a concave groove is formed in the first pixel definition layer, and the distance from the bottom surface of the concave groove to the first electrode is between 10 nanometers and 80 nanometers; The first pixel definition layer and the second pixel definition layer are simultaneously etched with a second gas to remove the first photoresist strip, thin the second photoresist strip to form a first retaining wall, thin the third photoresist strip to form a second retaining wall, and etch the second pixel definition layer to form a pixel opening exposing the first electrode; the second gas etches the first electrode at a rate lower than the first gas etches the first electrode.

6. The method for preparing a display panel according to any one of claims 1 to 3, characterized in that: In the step of using the second pixel definition layer as a mask to ashe the second pixel definition layer and simultaneously etching the first pixel definition layer, the ashing temperature is between 10 degrees Celsius and 40 degrees Celsius.

7. The method for preparing a display panel according to any one of claims 1 to 3, characterized in that: In the second direction, a plurality of the first blocking walls are arranged at intervals, and at least two pixel openings are spaced between two adjacent first blocking walls; In the step of forming a light-emitting layer in the pixel opening, an inkjet printing method is used to form the light-emitting layer in the pixel opening, wherein the light-emitting layer includes a plurality of light-emitting parts, and the light-emitting parts continuously cover at least two of the pixel openings, and in the second direction, two adjacent light-emitting parts are spaced apart by a first blocking wall, and in the first direction, two adjacent light-emitting parts are spaced apart by a second blocking wall.

8. The method for preparing a display panel according to claim 7, characterized in that: Any two adjacent light-emitting parts have different colors.

9. A display panel, characterized in that: include: substrate; A thin film transistor structure layer is disposed on the substrate; A first electrode is arranged on a side of the thin film transistor structure layer away from the substrate; A first pixel definition layer is disposed on a side of the thin film transistor structure layer away from the substrate, the first pixel definition layer is an inorganic layer, the first pixel definition layer includes a plurality of first pixel definition parts and a plurality of second pixel definition parts, the first pixel definition parts and the second pixel definition parts are cross-connected to form a plurality of pixel openings exposing the first electrode; a second pixel definition layer, arranged on a side of the first pixel definition layer away from the substrate, the second pixel definition layer being an organic layer, the second pixel definition layer comprising a plurality of first retaining walls and a plurality of second retaining walls, the thickness of the first retaining walls being less than the thickness of the second retaining walls, the first retaining walls and the first pixel definition portion extending along a first direction, the second retaining walls and the second pixel definition portion extending along a second direction intersecting the first direction, and at least two pixel openings being spaced apart between two adjacent first retaining walls in the second direction; The light-emitting layer covers the pixel opening.

10. The display panel according to claim 9, characterized in that: The light-emitting layer includes a plurality of light-emitting parts, wherein the light-emitting parts continuously cover at least two of the pixel openings, and in the second direction, a first blocking wall is disposed between two adjacent light-emitting parts, and in the first direction, a second blocking wall is disposed between two adjacent light-emitting parts; In the second direction, the colors of any two adjacent light-emitting portions are the same or different.

11. The display panel according to claim 10, characterized in that: The pixel opening includes a first opening and a second opening, the first opening is connected to a side of the second opening away from the substrate, the opening width of the first opening is greater than the opening width of the second opening, and the depth of the first opening is greater than the depth of the second opening.

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