Ultralow-noise LDO (Low Dropout Regulator) circuit

Abstract

The invention provides an LDO (Low Dropout Regulator) circuit with ultralow noise. The structure comprises a pre-voltage-stabilizing modulation circuit, a low-pass filter and a main loop circuit, the pre-voltage-stabilizing modulation circuit comprises an error amplifier and a resistance feedback network; the main loop circuit comprises an error amplifier, a buffer stage, a compensation network and a power tube; the band-gap reference output end is connected with the first-stage error amplifier, the output end of the first-stage error amplifier is connected with the low-pass filter, the output end of the low-pass filter is connected with the input end of the main loop circuit, and the drain end of the power tube MP is connected with a load current source; the load current source is an analog equivalent load current. According to the LDO structure designed by the invention, the noise of the band-gap reference and resistance feedback network is filtered by the pre-voltage-stabilizing modulation and low-pass filter, the power supply rejection ratio of the LDO is enhanced by the main loop circuit, and the system stability is improved.

Description

Technical Field

[0001] The invention belongs to the field of power management, in particular to an ultra-low noise LDO circuit. Background Art

[0002] LDO is an important power regulator in the field of power management. It has the characteristics of simple structure, small size, high stability and low price, and is widely used in portable electronic products. With the continuous increase of signal processing frequency and the decrease of power supply voltage of portable electronic devices, the influence of power supply noise on the equipment is getting bigger and bigger. In order to ensure the stable operation of the equipment, higher requirements are put forward for power supply noise. Therefore, ultra-low noise LDO circuit has become the current research hotspot and focus.

[0003] like Figure 2 As shown in the figure, in the traditional LDO circuit, there are three main paths for power supply noise to couple to the output of the LDO, namely, the power supply ripple noise of the bandgap reference source is coupled to the output, the power supply ripple noise of the error amplifier is coupled to the output, and the input is coupled to the output through the power tube. Methods to improve noise include introducing a filter circuit at the output of the bandgap reference, connecting a unit gain buffer, increasing the input pair of the op amp, and reducing the resistance of the feedback resistor network, but these methods have more or less problems with area or power consumption. Summary of the invention

[0004] The purpose of the present invention is to provide an ultra-low noise LDO circuit, which aims to effectively improve the noise performance of the LDO with a simple circuit structure on the basis of ensuring a stable voltage difference, and has a high power supply rejection ratio and stability.

[0005] The solution of the present invention is:

[0006] An ultra-low noise LDO circuit includes a pre-regulator circuit composed of an error amplifier EA1 and a resistor feedback network R, a low-pass RC filter, and a main loop circuit composed of an error amplifier EA2, a buffer stage, a compensation network, and a PMOS power tube; VREF provided by an external bandgap reference source is connected to the error amplifier EA1, the output end of the pre-regulator circuit is connected to the low-pass RC filter, and the output end of the low-pass RC filter is connected to the input end of the main loop circuit. The output end of the main loop is connected to a load current source.

[0007] Among them, the positive input terminal of the error amplifier EA1 is connected to the reference voltage VREF, and the negative input terminal is connected between the resistors R1 and R2 of the resistor voltage divider network; the output terminal of the error amplifier EA1 is connected to the filter circuit, and the error amplifier, the buffer stage BUFF, and the power supply terminal of the power tube are all connected to the input terminal VIN; the output of the low-pass filter circuit is connected to the positive input terminal of the error amplifier EA2 in the main loop circuit; the negative input terminal is connected to the input terminal of the buffer stage, and the output terminal of the buffer stage is connected to the PMOS power tube M P The gate end is connected to the compensation network between the input and output ends of the buffer stage BUFF, and the PMOS power tube M P The drain end is the output end.

[0008] Preferably, the low-pass filter is a low-cutoff frequency low-pass filter, the bias current of M1 is set very small, and the width-to-length ratio of M1 to M2 is very large, and the channel resistance of M2 can reach a GΩ level resistance.

[0009] Preferably, the main loop circuit comprises:

[0010] The error amplifier is composed of M1-M9, and the buffer stage is an improved super source follower, which is composed of M1-M9 and current source I1-I2. Its output impedance is very small and its ability to drive the gate end of the power tube is strong. Its input and output ends are connected to the compensation network, which is composed of a variable resistor and two capacitors. Zero points are generated in the system to play a compensation role. One of the capacitors is a negative equivalent Miller capacitor, which is composed of an inverting amplifier and a small capacitor.

[0011] The advantages of the above invention are:

[0012] An ultra-low noise and stable LDO circuit structure is proposed, which includes a pre-regulator circuit composed of an error amplifier EA1 and a resistor feedback network R, a low-pass filter, and a main loop circuit composed of an error amplifier EA2, a buffer stage, a compensation network, and a PMOS power tube. The pre-regulator circuit and the low-pass filter structure filter out the noise of the bandgap reference and the resistor feedback network, so that the main source of noise becomes the noise of the error amplifier in the main loop circuit and the noise coupled from the input to the output through the power tube. The compensation network expands the bandwidth of the loop, ensures stability, and eliminates the noise coupled to the output through the power tube. Therefore, the noise is well suppressed and the goal of ultra-low noise is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is an overall schematic diagram of the LDO circuit of the present invention;

[0014] Figure 2 It is a structural diagram of a low-pass filter circuit provided by the present invention;

[0015] Figure 3 It is a circuit structure diagram of the main loop part of the present invention; DETAILED DESCRIPTION

[0016] In order to clearly illustrate the technical features of the present invention, the technical solution of the present invention is described in more detail below through specific implementation methods and in conjunction with the accompanying drawings.

[0017] Example:

[0018] Figure 1 The figure shows the overall schematic diagram of the LDO circuit of the present invention, and its overall structure includes:

[0019] The first part is a pre-regulator circuit composed of an error amplifier EA1 and a resistor feedback network R1 and R2, the second part is a low-pass filter, and the third part is a main loop circuit composed of an error amplifier EA2, a buffer stage BUFF, a compensation network, and a PMOS power tube Mp; VREF provided by an external bandgap reference source is connected to the error amplifier EA1, the output of the pre-regulator circuit is connected to the low-pass filter, and the output of the low-pass filter is connected to the input of the main loop circuit. The output of the main loop is connected to the load current source.

[0020] The pre-voltage regulator circuit is characterized by a resistor divider circuit in the front, and then the output voltage is obtained in a voltage-following manner. Subsequently, the output noise from the reference source and the thermal noise generated by the resistor feedback network are filtered out by the filtering action of the low-pass filter. Therefore, only the noise of the subsequent main loop circuit needs to be considered.

[0021] For a low-pass filter, in order to filter out the noise from the previous stage, a very low cut-off frequency needs to be set, which requires the product of resistance and capacitance RC to be large enough. In order to avoid the problem of increasing the chip area due to excessive capacitance, a high-resistance resistor is selected, such as Figure 2 As shown. The source end of M101 is connected to the output end VIN of the pre-stabilization circuit, and the gate end and the drain end are short-circuited and connected to a 1nA small current source I101. The source end of M102 is connected to the source end of M101, the gate end of M102 is connected to the gate end of M101, and the drain end of M102 is connected to the upper plate of the capacitor. At the same time, it is connected to the input end of the subsequent main loop circuit as the output of the low-pass filter, and the lower plate of the capacitor is grounded. Since the current source is very small, the gate-source voltage of M101 and M102 is also very small, and the width-to-length ratio of M101 and M102 is set very large, so the source and drain end of M102 can be equivalent to a resistor, and its resistance can reach the order of G Ω. At this time, a low-pass filter with an extremely low cut-off frequency is obtained.

[0022] For the main loop circuit, the main loop circuit is composed of error amplifier EA2, buffer stage BUFF, compensation network, power tube Mp, such as Figure 3Detailed description of each part:

[0023] The error amplifier EA2 is a two-stage operational amplifier, consisting of M201-M213. The first stage is a folded common source and common gate structure, consisting of transistors M201-M211 and R201, of which M208-M211 and R201 form an adaptive Cascode, which saves the bias branch and improves the matching; the second stage is a common source amplifier, consisting of transistors M212-M213. The two-stage operational amplifier increases the gain of the error amplifier and can effectively improve the power supply voltage suppression capability of the LDO at low frequency. Increasing the transconductance of the input pair tubes M201 and M202 reduces the equivalent input noise of the error amplifier. Since the gain of the error amplifier is high, the equivalent impedance of each output end is large, which will cause the poles on each node to appear within the bandwidth, which may lead to insufficient stability. And as the load of the LDO changes, the output pole of the LDO will also change. Therefore, a buffer stage is added between the error amplifier and the power tube so that only the main pole at the output of the first-stage op amp and the secondary pole at the output of the LDO exist within the bandwidth, and the remaining poles are pushed to high frequency and outside the bandwidth.

[0024] The buffer stage is a super source follower, which is composed of transistors M214-M218, current sources I201 and I202, where I202 needs to be greater than I201. Since the output impedance of the super source follower is very small, the output drive capability is improved. On this basis, a compensation network, i.e., a zero-pole tracking circuit, is added to the output end of the first-stage amplifier of the error amplifier EA2 and the output end of the buffer stage. The zero-pole tracking circuit is composed of a transistor M220 and a compensation capacitor Cc. Since the gate end of the M220 tube is connected to the gate end of the power tube Mp, the change of the LDO output load will cause the resistance value of the M220 tube to change. At this time, the M220 tube is a small variable resistor, so the zero point generated by the M220 tube and the compensation capacitor CC is variable, tracking the changes of the main pole and the secondary point, and improving the stability of the circuit.

[0025] On the basis of the zero-pole tracking circuit, a negative equivalent Miller capacitor is connected to the gate of the power tube Mp, which is composed of an amplifier OP, resistors R202, R203, and capacitor Cm. The connection method is as follows: Figure 3 When such a negative capacitor is introduced, the absolute value of the capacitor is equal to the parasitic capacitance of the gate end of the power tube, and vg≈vdd is obtained, so that the power supply noise flowing through the power tube is offset, further improving the power supply voltage suppression capability of the LDO.

[0026] The ultra-low noise LDO circuit proposed by the present invention effectively suppresses the thermal noise of the reference source noise and the resistor feedback network. The filter circuit uses high impedance devices to greatly reduce the volume of the filter capacitor. The super source-follower structure reduces the output impedance and moves the pole to the high frequency. In addition, the zero-pole tracking circuit is added to generate a zero point, which improves the phase margin and increases the system stability. An equivalent capacitor with a negative capacitance reduces the power supply noise of the power tube and improves the power supply voltage suppression capability.

[0027] The above is only a preferred embodiment of the present invention. Those skilled in the art to which the present invention belongs can make some changes or modify the technical contents disclosed above into equivalent embodiments with equivalent changes without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent replacement and improvement made to the above embodiments without departing from the contents of the technical solution of the present invention, based on the technical essence of the present invention, within the spirit and principles of the present invention, shall still fall within the protection scope of the technical solution of the present invention.

Claims

1. An ultra-low noise LDO circuit, characterized in that: It includes a pre-regulator circuit composed of an error amplifier EA1 and a resistor feedback network R1, R2, a low-pass RC filter, an error amplifier EA2, a buffer stage, a compensation network and a PMOS power tube M P The main loop circuit is formed; VREF provided by an external bandgap reference source is connected to the error amplifier EA1, the output end of EA1 is connected to a low-pass RC filter, and the output end of the low-pass filter is connected to the input end of the main loop circuit.

2. The ultra-low noise LDO circuit according to claim 1, characterized in that: The positive phase terminal of the error amplifier EA1 in the pre-regulated voltage modulation circuit is connected to the reference voltage VREF, and the negative phase terminal is connected between the resistors R1 and R2 of the resistor feedback network, and the resistors R1 and R2 are in a series relationship. One end of the resistor R1 is connected to the output end of the error amplifier EA1, and the other end is connected to R2. One end of the resistor R2 is connected to R1, and the other end is grounded; the output end of the error amplifier EA1 is connected to a low-pass filter.

3. The ultra-low noise LDO circuit according to claim 1, characterized in that: The low-pass filter has a lower cut-off frequency. The low-pass filter includes a capacitor and a weak-conduction MOS tube acting as an active resistor; one end of the resistor is connected to the output end of the error amplifier EA1, and the other end is connected to the input end of the main loop; one end of the capacitor is connected to the resistor, and the other end is grounded, so as to form a low-pass filter with the resistor.

4. The ultra-low noise LDO circuit according to claim 1, characterized in that: The main loop circuit includes an error amplifier EA2, a buffer stage BUFF and a compensation network, a PMOS power tube M P The positive input of the error amplifier is connected to the output of the previous stage after the low-pass filter, the negative input is connected to the input of the buffer stage, and the output of the buffer stage is connected to the PMOS power tube M P The gate end of the PMOS power tube M P The drain end is the output end, which is connected to the negative input end of the first-stage error amplifier; The compensation network is connected between the error amplifier and the power tube Mp; the power tube M P The drain terminal is connected to the load current source I L ; Load current source I L To simulate the equivalent load current.

Images