SSD (Solid State Disk) interrupt vector verification method and device, computer equipment and storage medium
By configuring and executing interrupt test scripts, capturing and analyzing data packets related to SSD interrupt processing, and comparing them with preset metrics, the problem of insufficient dynamic response and flexibility of SSD interrupt processing verification methods in the prior art is solved, and more accurate and flexible interrupt verification is achieved, improving the stability and reliability of SSD.
Patent Information
- Application Number
- CN202510102150.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-22
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2045-01-22
AI Technical Summary
The existing SSD interrupt processing verification methods have shortcomings in dynamic response, flexibility and interrupt vector verification, and it is difficult to effectively support modern high-load and multi-tasking application requirements.
Provides a verification method for SSD interrupt vectors, configuring test parameters, writing interrupt test scripts, executing scripts, capturing data packets related to interrupt processing, processing and analyzing data packets, and comparing the results with preset metrics.
Improve the accuracy and flexibility of interrupt verification results, ensure that the test results truly reflect the performance of SSD in actual applications, and enhance the stability and reliability of SSD in high-load and multi-task environments.
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Figure CN120015103A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to solid state disk technology, and more specifically to a verification method, device, computer equipment and storage medium for an SSD interrupt vector. Background Art
[0002] With the rapid development of information technology, solid-state drives (SSDs) have been widely used in enterprise applications, data centers, cloud computing infrastructure, high-performance computing (HPC), embedded systems, automotive electronic systems, Internet of Things (IoT) devices, and industrial control systems. In these applications, the stability and reliability of SSDs are key to ensuring the normal operation of the system and data security. As an important means of evaluating the performance stability of SSDs under high-load environments, interrupt verification technology has received widespread attention from manufacturers and service providers.
[0003] However, current verification methods for SSD interrupt handling still have many limitations. Traditional interrupt testing frameworks are mostly based on static performance evaluation technology and use fixed test scenarios for verification. Although this method can verify the basic functions of the SSD to a certain extent, it lacks dynamic adaptability and cannot effectively cope with load changes and interrupt patterns that occur in actual applications. Therefore, the test results often have great limitations and are difficult to fully reflect the performance of the SSD in actual applications.
[0004] On the other hand, existing simulation-based interrupt verification methods also have obvious shortcomings. Although simulation tools can simulate interrupt behavior and predict the system's response to a certain extent, due to the difference between the simulation environment and the actual operating environment, and the fact that simulation methods often rely on fixed parameters and assumptions, they cannot accurately reflect the interrupt handling performance of SSDs under real conditions. Especially in high-load, multi-tasking application scenarios, the limitations of simulation methods are more prominent, and they cannot effectively evaluate the performance bottleneck of SSDs.
[0005] In addition, existing technologies also have great difficulties in verifying interrupt vectors. Since most existing technologies can only be observed in a black box manner, testers cannot go deep into the system to effectively and accurately verify the actual performance of interrupt vectors. This makes it difficult to effectively evaluate the system's responsiveness under special circumstances, which may cause unstable performance of SSDs in actual applications.
[0006] In summary, the current verification methods for SSD interrupt processing have obvious deficiencies in dynamic response, flexibility, and interrupt vector verification. These limitations make it difficult for existing technologies to effectively support modern high-load, multi-tasking application requirements, limiting the application scope of SSDs in various fields. Therefore, a new interrupt verification technology is urgently needed to improve the stability and reliability of SSDs in high-load environments and meet the needs of modern applications. Summary of the invention
[0007] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a method, device, equipment and medium for verifying an SSD interrupt vector.
[0008] In order to solve the above technical problems, the present invention adopts the following technical solutions:
[0009] In a first aspect, a verification method for an SSD interrupt vector is provided, including:
[0010] Configure the parameters required for the test to obtain verification parameters;
[0011] Write interrupt test scripts based on verification parameters;
[0012] Execute the interrupt test script and initiate an interrupt request to the SSD to trigger the corresponding interrupt;
[0013] Capture packets related to interrupt handling;
[0014] Process and analyze data packets to obtain processing and analysis results;
[0015] The processing and analysis results are compared with the preset indicators to obtain comparative results.
[0016] In a second aspect, a verification device for an SSD interrupt vector is provided, including:
[0017] A configuration unit, used to configure parameters required for the test to obtain verification parameters;
[0018] A writing unit for writing interruption test scripts according to verification parameters;
[0019] An execution initiation unit, used for executing an interruption test script and initiating an interruption request to the SSD to trigger a corresponding interruption;
[0020] A capture unit, used to capture data packets related to interrupt processing;
[0021] A processing and analysis unit, used for processing and analyzing data packets to obtain processing and analysis results;
[0022] The comparison unit is used to compare the processing and analysis results with the preset indicators to obtain a comparison result.
[0023] In a third aspect, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned SSD interrupt vector verification method when executing the computer program.
[0024] In a fourth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the above-mentioned SSD interrupt vector verification method are implemented.
[0025] In terms of verification accuracy, the above-mentioned SSD interrupt vector verification method can capture and analyze the calling status of the interrupt vector in real time by dynamically recording the interrupt response, thereby avoiding the information omission caused by the traditional static test. This real-time performance not only greatly improves the accuracy of the interrupt verification result, but also ensures that the test result can truly reflect the performance of the SSD in actual applications. This improvement is of great significance for ensuring the stability and reliability of the SSD in a high-load, multi-task environment. In addition, in terms of flexibility and adaptability, the interrupt script can be automatically generated and adjusted for different workloads and task scenarios. This flexibility enables the test process to adapt to a variety of dynamic conditions, thereby more effectively evaluating the performance of the SSD under different pressures. This highly adaptable test method ensures the stability of the SSD in actual use and provides users with a more reliable storage solution. In addition, in terms of test efficiency, through the automated interrupt script generation and dynamic analysis process, the time and workload of manual configuration are significantly reduced. This automated testing method not only improves the test efficiency, but also reduces the risk of test errors caused by human intervention. This enables users to obtain reliable results more quickly and easily when evaluating the SSD interrupt performance, thereby accelerating the product development and optimization process.
[0026] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.
[0028] Figure 1 A schematic diagram of a flow chart of a method for verifying an SSD interrupt vector provided by an embodiment of the present invention;
[0029] Figure 2 A schematic block diagram of a verification device for an SSD interrupt vector provided by an embodiment of the present invention;
[0030] Figure 3 It is a schematic diagram of the structure of a computer device in an embodiment of the present invention. DETAILED DESCRIPTION
[0031] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0032] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.
[0033] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.
[0034] It should be further understood that the term "and / or" used in the present description and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
[0035] See also Figure 1 In the specific embodiment shown, the present invention discloses a method for verifying an SSD interrupt vector, comprising the following steps:
[0036] S110, configuring parameters required for the test to obtain verification parameters;
[0037] Specifically, during the verification process of the SSD interrupt vector, a series of parameters required for the test need to be configured first. These parameters include but are not limited to the SSD model, capacity, interface type, read / write speed, workload mode, interrupt trigger condition, interrupt processing time threshold, etc. The configuration of these parameters is intended to simulate various scenarios and conditions that the SSD may encounter in the actual application environment to ensure the comprehensiveness and accuracy of the verification. In specific implementation, these parameters can be configured through professional testing software or tools. First, according to the model and specifications of the SSD, select the corresponding test template or configuration file. Then, according to the test requirements, adjust the parameters such as workload mode and interrupt trigger condition. For example, you can set a specific read / write speed, data block size, I / O request type, etc. to simulate different application scenarios. At the same time, you can also set the interrupt processing time threshold to evaluate the performance of the SSD in interrupt processing. After the parameters are configured, these parameters will be converted into verification parameters for subsequent interrupt test script writing and execution. The exact value of the verification parameter will directly affect the accuracy and reliability of the test results.
[0038] The technical feature of obtaining the verification parameters by implementing the parameters required for the above configuration test brings the following technical effects:
[0039] Improve the pertinence and accuracy of the test: By accurately configuring the parameters required for the test, you can simulate various scenarios and conditions that the SSD may encounter in the actual application environment. This helps ensure the pertinence and accuracy of the test results, thereby more accurately evaluating the performance of the SSD in interrupt handling.
[0040] Enhanced test flexibility: The process of configuring test parameters allows testers to adjust and optimize according to actual needs. This enhances the flexibility of the test and enables the test to adapt to different SSD models, specifications and application scenarios.
[0041] Reduce test costs: By accurately configuring test parameters, unnecessary waste of test resources can be avoided. For example, invalid tests under inappropriate test conditions can be avoided, thereby reducing test costs and time costs.
[0042] Providing data support for optimization: The process of configuring test parameters can also provide data support for SSD optimization. By comparing the test results under different parameter configurations, the bottlenecks and problems of SSD interrupt processing can be found, thus providing targeted suggestions and guidance for subsequent optimization work.
[0043] In one embodiment, the parameters required for the test are set through the instrument control panel and the configuration file, including link establishment configuration, packet capture rules, etc. In addition, the corresponding control module and driver are loaded according to the test requirements to ensure that the SSD and the analyzer can work normally.
[0044] Among them, the chain configuration: a .peg file that can only be recognized and used by the trainer software. You can write your own scripts in it to configure the SSD to chain to GEN1-GEN5, x1-x4, using full EQ mode or Bypass mode, etc.
[0045] Packet capture rules: A large number of TS streams will be captured during the link building process. Many messages are not necessary in the analysis process. It is also necessary to set a packet capture trigger event to ensure that the required messages can be accurately captured.
[0046] The control module and driver program refer to opening the Host memory mapping space, and writing the space address into the BAR register by writing the CfgWr0 command to ensure that the memory read and write can be mapped to the Host memory space.
[0047] That is, the tester manually inputs or selects the parameters required for the test through the instrument's physical or virtual control panel, including but not limited to test mode, data transfer rate, test time, etc. In addition to manually setting parameters, you can also quickly set test parameters by loading pre-written configuration files, which usually contain a set of verified parameter settings suitable for specific test scenarios or SSD models. In addition, by setting parameters through the instrument control panel and configuration files, you can quickly and accurately configure the test environment, thereby improving test efficiency. At the same time, accurate parameter settings also help improve test accuracy.
[0048] Testers use the .peg file format that can be recognized by the trainer software to write scripts to configure the link parameters of the SSD. These parameters include but are not limited to link rate (GEN1-GEN5), link width (x1-x4), and equalization mode (full EQ mode or Bypass mode). Load the written .peg script into the test system and execute the script through the trainer software to complete the link configuration between the SSD and the analyzer. In addition, using .peg files to write link configuration scripts allows testers to flexibly adjust test parameters according to different SSD models and test requirements. In addition, by loading different configuration files, it can also be easily expanded to other test scenarios or SSD models.
[0049] During the link building process, the test system will capture a large number of TS streams. In order to accurately capture the required packets, testers need to set packet capture trigger events, which can be specific packet types, packet sizes, or the time when packets appear. By setting packet capture rules, the test system can automatically filter out non-essential packets captured during the link building process, so that only key packets related to the test are retained. In addition, by setting packet capture rules and trigger events, the required packets can be accurately captured, thereby optimizing the data capture and analysis process, which helps reduce unnecessary data processing and analysis work and improve test efficiency.
[0050] In order to ensure that the SSD and analyzer can work properly, the Host memory mapping space needs to be enabled. This usually involves the configuration and operation of hardware registers. The tester writes the CfgWr0 command, which is used to write the address of the Host memory mapping space to the BAR (BaseAddress Register) register. In this way, the test system can map memory read and write operations to the Host memory space, thereby realizing data transmission and control between the SSD and the analyzer. In addition, loading the corresponding control module and driver can ensure normal communication and data transmission between the SSD and the analyzer, which is crucial for the smooth progress of the test and the accuracy of the results. At the same time, by enabling the Host memory mapping space and writing the CfgWr0 command, the data transmission and control process can be further optimized, and the performance and stability of the test system can be improved.
[0051] S120, writing an interruption test script according to the verification parameters;
[0052] Specifically, according to the test requirements and verification parameters, select a suitable test framework or tool to write an interruption test script. These frameworks or tools usually provide a rich API and function library for simulating interruptions, sending I / O requests, monitoring SSD responses, etc. After understanding the verification parameters and selecting a suitable test framework or tool, start writing an interruption test script. The script needs to include the following key parts:
[0053] Initialization part: Setting up the test environment, including loading necessary drivers, configuring SSD parameters, etc.
[0054] Interrupt simulation part: According to the interrupt trigger conditions in the verification parameters, simulate the interrupt conditions that the SSD may encounter. This can be achieved by sending specific I / O requests, triggering hardware interrupts, etc.
[0055] Response monitoring: monitors the SSD's response to interrupts, including response time, processing, error handling, etc. This part usually requires the use of monitoring and logging functions provided by the test framework or tool.
[0056] Result judgment part: Based on the expected interrupt response time and other verification indicators, determine whether the SSD's interrupt handling capability meets the requirements. This part may require writing complex logic to parse the monitoring data and make judgments.
[0057] After writing the test script, debugging and optimization are required, which includes verifying the correctness of the script, adjusting the interrupt trigger conditions to cover more scenarios, and optimizing monitoring and logging functions.
[0058] The implementation of the above-mentioned technical feature of writing interruption test scripts according to verification parameters brings the following technical effects:
[0059] Improve the degree of test automation: By writing interrupt test scripts, you can achieve automated test execution and reduce the possibility of manual intervention and errors. This helps improve test efficiency and accuracy.
[0060] Enhanced testing targeting and flexibility: Test scripts written based on verification parameters can test specific SSD models, specifications, and workload patterns, thereby enhancing testing targeting and flexibility. At the same time, by adjusting interrupt trigger conditions and expected response indicators, different test scenarios and requirements can be easily covered.
[0061] Optimize the test process and result analysis: Test scripts usually include detailed monitoring and logging functions, which helps optimize the test process and simplify result analysis. By monitoring and recording the SSD's response to interrupts, it is easier to identify potential problems and optimize them.
[0062] Improve the verification accuracy of SSD interrupt handling capability: By writing precise interrupt test scripts and strictly following the verification parameters for testing, the interrupt handling capability of the SSD can be evaluated more accurately. This helps ensure that the SSD can handle interrupt requests stably and efficiently in actual applications.
[0063] In one embodiment, an interrupt test script is written in a programming language (special language) on a trainer, and main functions of the interrupt test script include: defining an interrupt vector to be triggered, defining an NVMe initialization process, and defining multiple test scenarios to simulate different working environments.
[0064] Specifically, the software programming language provided by the trainer vendor, such as Summit Exerciser TM Scripting Language.
[0065] Define the interrupt vector to be triggered: Write the interrupt vector entry into the memory space through the configured memory mapping space so that it can be called when the interrupt is triggered.
[0066] Define the NVMe initialization process: configure MSI-X space, BAR0-BAR1-BAR2 address, DeviceID and RequesterID, disable NVM Controller, configure ACQS and ASQS, configure ASQ, ACQB and Admin queues, and then enable NVM Controller to take effect and complete the initialization.
[0067] Define multiple test scenarios to simulate different working environments: When configuring interrupts, you can configure 64-bit and 32-bit MSI-X and MSI modes, as well as configure INTx mode.
[0068] That is, define the interrupt vector to be triggered: Select the dedicated programming language provided by the exerciser vendor, such as Summit Exerciser TM Scripting Language, as the basis for script writing. Using the syntax and function library of this language, start writing interrupt test scripts. In the script, the entry of the interrupt vector (that is, the address of the interrupt handling function) is written to the specified memory location through the configured memory mapping space. When an interrupt occurs, the trainer will call the corresponding interrupt handling function according to the configuration. In addition, by writing interrupt test scripts, the test is automatically executed, reducing the possibility of manual intervention and errors. The script defines the interrupt vector, NVMe initialization process and test scenarios in detail to ensure the accuracy and repeatability of the test. The dedicated programming language provides rich syntax and function libraries, making test scripts easy to write and modify. By adjusting the parameters and configurations in the script, different test scenarios and requirements can be easily covered, enhancing the flexibility and scalability of the test.
[0069] Define the NVMe initialization process: In the script, first configure the MSI-X space, including setting the address of BAR0-BAR2, DeviceID, RequesterID and other parameters. Then, disable the NVM controller (Disable NVM Controller) and configure ACQS (Admin Command Queue Submission Queue) and ASQS (Admin Command Queue Completion Queue). Next, configure ASQ (Submission Queue), ACQB (Submission QueueBaseAddress) and Admin queue. Finally, enable the NVM controller (Enable NVM Controller) to make it effective and complete the NVMe initialization process. In addition, the NVMe initialization process defined in the script ensures that the NVMe device is correctly configured and initialized before testing. By simulating multiple test scenarios, the performance and stability of NVMe devices in different working environments can be fully evaluated.
[0070] Define multiple test scenarios to simulate different working environments: In the script, different test scenarios can be simulated by configuring interrupt parameters. You can configure 64-bit and 32-bit MSI-X and MSI modes to test the response and processing capabilities of the SSD in different interrupt modes. At the same time, you can also configure the INTx mode to cover a wider range of interrupt processing scenarios. For each test scenario, you can set different parameters such as I / O load and latency requirements to simulate the working environment that the SSD may encounter in actual applications. In addition, by configuring different interrupt modes and parameters in the script, you can efficiently verify the interrupt processing capabilities of the SSD. This helps ensure that the SSD can stably and efficiently handle interrupt requests in actual applications, improving the overall performance and reliability of the system.
[0071] S130, executing the interruption test script and initiating an interruption request to the SSD to trigger a corresponding interruption;
[0072] Specifically, ensure that the SSD is properly installed and connected to the test system. Check that the drivers and firmware on the test system have been updated to the latest versions to ensure compatibility with the SSD. Load and run the interrupt test script, which should contain the code that defines the interrupt vector to be triggered, the NVMe initialization process, and the simulation test scenario. Start the interrupt test script on the test system. The script will automatically perform the NVMe initialization process, including configuring parameters such as MSI-X space, BAR address, DeviceID and RequesterID, and disabling and enabling the NVM controller. The script will configure and prepare interrupt vectors, which will be used to call the corresponding interrupt handling function when the interrupt is triggered. In the script, an interrupt request is initiated to the SSD through a specific function call or instruction. The interrupt request can be an MSI-X interrupt, an MSI interrupt, or an INTx interrupt sent over the PCIe bus, depending on the test scenario and the support of the SSD. The interrupt request contains the interrupt vector number or other necessary parameters so that the SSD can recognize and handle the interrupt. After receiving the interrupt request, the SSD will trigger the corresponding interrupt handling process. The SSD interrupt handling function will perform corresponding interrupt handling operations according to the interrupt vector number or other parameters, such as reading or writing data, updating status information, etc. The interrupt test script on the test system will monitor the SSD interrupt handling process and record relevant performance indicators and log information.
[0073] By implementing the above-mentioned execution interrupt test script and initiating an interrupt request to the SSD to trigger the corresponding interrupt, this technical feature brings the following technical effects:
[0074] Verify the interrupt handling capability of the SSD: By executing the interrupt test script and initiating an interrupt request to the SSD, you can verify the SSD's processing capability and response speed in different interrupt modes. This helps ensure that the SSD can handle interrupt requests stably and efficiently in actual applications, improving the overall performance and reliability of the system.
[0075] Optimize the SSD driver and firmware: During the test process, if you find problems with the SSD's interrupt handling or performance bottlenecks, you can optimize and improve the driver and firmware. This helps improve the compatibility and performance of the SSD and make it better suited to different application scenarios and needs.
[0076] Improve test efficiency and accuracy: By automating the execution of interrupt test scripts, test efficiency and accuracy can be significantly improved. The automated testing and monitoring functions in the scripts can ensure the consistency and repeatability of the test process, reducing the possibility of human intervention and errors.
[0077] Support for multiple test scenarios: The interruption test script can be configured with multiple test scenarios and parameters to simulate different working environments and load conditions. This helps to comprehensively evaluate the interruption handling capability and performance of the SSD under different conditions, providing strong support for subsequent optimization and improvement.
[0078] Preferably, the interruption script written by the automated testing framework is called regularly, and can be called through a command line tool, an API call or a graphical user interface.
[0079] The automated testing framework refers to the company's internal framework, which captures the software through Python's win32 and the handles provided by the trainer vendor, and operates the execution and verification of the software in a coded way. Timing is to create tasks and execute scripts within a specific time range. If the time is exceeded, a timeout judgment is made, or a specific time is specified to execute the script.
[0080] Specifically, build an automated testing framework: Use the company's internal resources to build or improve an automated testing framework. The framework should support multiple calling methods, including command line tools, API calls, and graphical user interfaces. Integrate Python's win32 library into the framework to interact with the Windows system. Introduce the handle capture software provided by the trainer vendor to monitor and control the execution of the test software.
[0081] Write interrupt script: Write an interrupt test script according to the test requirements. The script should contain the code that defines the interrupt vector, NVMe initialization process, and test scenarios. Ensure that the script can be correctly called and executed within the automated test framework.
[0082] Set up scheduled tasks: Create scheduled tasks within the automated testing framework. Set tasks to execute within a specific time range, or specify a specific time point to execute a script. Configure timeout judgment logic. If the script execution exceeds the scheduled time, it will be judged as a timeout.
[0083] Call and execute scripts: According to the setting of scheduled tasks, the automated testing framework will call the interrupt script at the specified time. The calling method can be a command line tool, API call or graphical user interface. Use Python's win32 library and handle capture software to operate the execution and verification of the software in a coded way.
[0084] Monitoring and reporting: The automated testing framework should monitor the execution status of the script in real time. If the script is executed successfully, the test results and performance indicators should be recorded. If the script fails or times out, the error information should be recorded and handled accordingly.
[0085] In other words, the automated testing framework and scheduled tasks can significantly improve testing efficiency, reduce manual intervention and waiting time, and quickly and accurately complete testing tasks by operating the execution and verification of software in a coded manner. In addition, the automated testing framework can ensure the consistency and repeatability of the testing process, and the scheduled tasks and timeout judgment logic can avoid test failures or omissions caused by human factors. In addition, the automated testing framework supports multiple calling methods to meet the testing requirements in different scenarios. Command line tools, API calls, and graphical user interfaces can all be used to call and execute interrupt scripts. In addition, by introducing the handle capture software provided by the trainer vendor, the execution of the test software can be more accurately monitored and controlled, which helps to optimize the testing process and improve the accuracy and effectiveness of the test. In addition, the automated testing framework and scheduled tasks can reduce testing costs, reduce the workload and time cost of testers, and through automated testing, problems can be identified and fixed more efficiently, improving product quality and user experience.
[0086] Preferably, after the script is executed, a specific interrupt request will be sent to the SSD, such as simulating a device I / O, read or write operation, to trigger a corresponding interrupt.
[0087] Specifically, when verifying the interrupt vector, the interrupt vector to be triggered can be specified in the request to trigger it, so as to achieve the purpose of accurate verification. That is, define the type of interrupt request to be sent in the script, such as simulating device I / O operations, read or write operations, etc. According to the test requirements, specify the interrupt vector to be triggered in the request. The interrupt vector is an identifier used by the SSD to identify and handle different types of interrupts. Use the appropriate interface or command to send the interrupt request to the SSD, which usually involves the communication protocol with the SSD, such as PCIe, NVMe, etc. After receiving the interrupt request, the SSD calls the corresponding interrupt processing function according to the interrupt vector in the request. In the interrupt processing function, perform the operation corresponding to the request, such as processing I / O requests, reading or writing data, etc. The script should contain verification logic to check whether the SSD correctly handles the interrupt request and returns the expected result. This can be achieved by comparing the actual result with the expected result. During the script execution, record relevant log information, including the sending time, receiving time, processing results, etc. of the interrupt request. Generate a report based on the test results to summarize the test process, results, and any potential problems.
[0088] More specifically, by specifying the interrupt vector to be triggered in the interrupt request, the SSD interrupt handling capability can be accurately verified, which helps ensure that the SSD can correctly respond to and handle interrupt requests under different conditions. In addition, automated test scripts can significantly improve test efficiency, reduce manual intervention and waiting time, and quickly trigger interrupts on the SSD and verify its processing capabilities by simulating device I / O operations, read or write operations, etc. In addition, by regularly testing the SSD's interrupt handling capabilities, potential performance issues can be discovered and resolved in a timely manner, which helps optimize the performance of the SSD and improve its stability and reliability.
[0089] S140, capturing data packets related to interrupt processing;
[0090] Specifically, packet capture first requires selecting a network interface as the source of the data packet. This can be an Ethernet interface, a wireless network interface, etc. Use professional packet capture tools (such as Wireshark, Tcpdump, etc.) to capture data packets. These tools usually provide a graphical or command line interface, allowing users to set filtering conditions, select capture interfaces, etc. After the configuration is complete, start the capture tool to start capturing data packets. During the capture process, the tool will record the data packets passing through the network interface in real time and store them in memory or disk for subsequent analysis. Packet capture technology allows users to monitor network traffic in real time and detect abnormal behavior in the network in a timely manner. The captured data packets can be used to deeply analyze the details of network communication, including information such as source address, destination address, port number, protocol type, etc., which helps to discover network failures, performance bottlenecks or security threats. Through the captured data packets, users can understand the working principles and functions of different network protocols, so as to better understand the mechanism of network communication.
[0091] When an external event (such as a data packet arriving at the network card) occurs, the hardware sends an interrupt signal to the processor. After receiving the interrupt signal, the processor will suspend the currently executing task and execute the interrupt handler instead. In the interrupt handler, the operating system will read the data packet from the network card and pass it to the upper-level application for processing as needed. After the interrupt handler is executed, the processor will resume the execution state before the interrupt and continue to execute the suspended task. Interrupt handling technology allows the operating system to respond to external events in real time, ensuring that critical information such as data packets can be processed in a timely manner. Through interrupt handlers, the operating system can process data packets efficiently, reducing processing delays and resource usage. Modern operating systems and hardware support parallel processing of interrupts, which means that multiple interrupts can be processed at the same time, thereby improving the overall performance of the system.
[0092] Preferably, relevant parameters are configured on the analyzer to facilitate the capture of data packets of interruption events. During the script execution, the analyzer records all relevant data of the interruption event in real time, including timestamps, transmitted data packets, system status and other information. Among them, the relevant parameters include the above packet capture rules, and the link polarity and signal parameters are configured to ensure the integrity and correctness of the captured data packets.
[0093] Specifically, packet capture rules are set on the analyzer, which define which packets should be captured. For example, filtering conditions can be set based on specific IP addresses, port numbers, protocol types, etc. to ensure that only packets related to the interrupt event are captured. In addition to the packet capture rules, the link polarity and signal parameters of the analyzer need to be configured. Link polarity involves the transmission direction of the signal (such as forward or reverse), while signal parameters include the frequency, amplitude, phase, etc. of the signal. The configuration of these parameters is crucial to ensure the integrity and correctness of the captured packets. During the script execution, the analyzer records all relevant data of the interrupt event in real time. This includes timestamps (used to record the time when the packet arrives), transmitted packets (including information such as the content, length, checksum, etc. of the packet), system status (such as CPU usage, memory usage, etc.). The integrity of the packet is verified by comparing the captured packet with the expected packet content. This can include checking whether the packet length, checksum, etc. are consistent. Based on the configured link polarity and signal parameters, verify whether the captured packet meets the expectations. For example, you can check whether the signal frequency, amplitude, etc. of the packet match the configured values.
[0094] More specifically, by configuring the packet capture rules and link polarity and signal parameters, the analyzer can efficiently capture data packets related to the interruption event, avoid interference from irrelevant data packets, and improve the efficiency of data capture. In addition, by recording all relevant data of the interruption event in real time and verifying the integrity and correctness of the data packet, the integrity and correctness of the captured data packet are ensured, which is helpful for subsequent data analysis and troubleshooting. In addition, by writing an automated script, the triggering of the interruption event and the automation of data capture are realized, and the analyzer can monitor the data packets of the interruption event in real time, improving the efficiency and accuracy of the test. In addition, this implementation method has good scalability and reusability. By adjusting the configurations such as packet capture rules, link polarity and signal parameters, it can adapt to different test requirements and improve the flexibility and applicability of the test.
[0095] S150, processing and analyzing the data packet to obtain a processing and analysis result;
[0096] Specifically, the captured data packets are preprocessed, including deduplication, denoising, formatting, etc., to improve the accuracy and efficiency of subsequent analysis. Extract key information of the data packet, such as source address, destination address, protocol type, port number, data content, etc. Parse the content of the data packet according to the network protocol (such as TCP / IP, HTTP, HTTPS, DNS, etc.), and extract the information of the communicating parties, request and response content, etc. Use a protocol parser or parsing library to convert the data packet into a readable form for subsequent analysis. Perform statistical analysis on the parsed data packets, such as traffic analysis, session analysis, protocol distribution analysis, etc., and use data mining technology to discover abnormal patterns, potential threats or performance bottlenecks in network traffic. Combined with business scenarios, perform business-level analysis on the data packet, such as user behavior analysis, business traffic trend prediction, etc. Present the analysis results in the form of charts, reports, etc. to facilitate user understanding and decision-making, and provide visualization tools to allow users to interactively explore and analyze data packets.
[0097] By implementing the above-mentioned processing and analysis data packets to obtain the processing and analysis results, this technical feature brings the following technical effects:
[0098] Improve analysis accuracy: Through data packet preprocessing and parsing, key information in data packets can be accurately extracted and analyzed to reduce false positives and false negatives. Data analysis combined with business scenarios can more accurately identify problems and potential threats in the network.
[0099] Improve analysis efficiency: Using automated tools and algorithms for packet capture, parsing, and analysis can greatly improve analysis efficiency. Providing visualization tools and interactive interfaces enables users to understand and process analysis results more quickly.
[0100] Discover potential problems: Through data mining and statistical analysis, abnormal patterns and potential threats in network traffic can be discovered, such as DDoS attacks, malware propagation, etc. Analyzing in combination with business scenarios can discover business-level problems and bottlenecks, such as abnormal user behavior and business traffic fluctuations.
[0101] Optimize network performance: By analyzing network traffic and protocol distribution, we can identify bottlenecks and performance issues in the network, such as network delays, packet loss, etc. According to the analysis results, we can take corresponding optimization measures, such as adjusting network configuration, optimizing routing strategies, etc., to improve network performance.
[0102] Support business decisions: By analyzing business traffic and user behavior, it can provide support for business decisions, such as optimizing business processes and improving user experience. It provides real-time or regular analysis reports to help users understand network status and business development trends.
[0103] Preferably, the captured data is processed and analyzed in real time to extract key indicators such as interrupt processing time, packet loss, and processing results. After the software is automatically executed, the captured trace information is finally read for analysis to observe whether the link establishment status is normal, whether NVMe initialization is successful, whether NVMe messages are sent normally, and whether the SSD returns a success message.
[0104] Specifically, the pre-processed data packets are processed and analyzed in real time to extract key indicators, such as interrupt processing time, packet loss, and processing results. The interrupt processing time can be calculated by recording the time difference from interrupt triggering to processing completion. Packet loss can be evaluated by comparing the number of packets sent and received. The processing result can be judged based on the content or status code of the data packet. Write automated scripts or programs to control the test process, trigger interrupt events, record trace information, etc. After the software is automatically executed, read the captured trace information, which usually contains detailed communication records, system status, error logs, etc. Observe whether the link establishment status is normal, including whether the TCP / IP connection establishment, SSL / TLS handshake and other processes are successful. Check whether NVMe initialization is successful, including steps such as NVMe driver loading, device identification, and configuration settings. Observe whether NVMe messages are sent normally, including command sending, response reception, status code checking, etc. Confirm whether the SSD returns a success message, including whether data read and write operations, status queries, etc. are successfully completed. Comprehensively analyze the extracted key indicators and the observed status and messages to determine whether the system performance, stability, reliability, etc. meet the requirements. Generate detailed test reports, including test environment, test steps, test results, problem records, etc., to facilitate subsequent analysis and improvement.
[0105] More specifically, by capturing and processing data packets in real time, abnormal behaviors in the network can be discovered and recorded in a timely manner, improving the real-time and accuracy of the test. The extracted key indicators and observed states and messages can truly reflect the performance and stability of the system. In addition, the execution of automated scripts or programs can reduce manual intervention and improve test efficiency. Real-time processing and analysis can reduce data backlog and delay and improve the response speed of the test. In addition, observing key steps such as link establishment status, NVMe initialization, NVMe message delivery, and SSD return success messages can fully cover the key functions and performance of the system. In-depth analysis of trace information can discover potential problems and bottlenecks, providing a basis for system optimization and improvement. In addition, the automated test process can ensure that the conditions and environment of each test are consistent, improve the repeatability and verifiability of the test, and the detailed test report can record the results and problems of each test, which is convenient for subsequent verification and improvement. In addition, the extracted key indicators and observed states and messages can provide decision support for system optimization, performance tuning, troubleshooting, etc. By analyzing the test results, bottlenecks and problems in the system can be discovered, and corresponding optimization measures can be taken to improve the performance and stability of the system.
[0106] In summary, by processing and analyzing the captured data in real time, extracting key indicators, and observing key states and messages, we can comprehensively and deeply evaluate the performance and stability of the system, providing strong support for system optimization and improvement.
[0107] S160, comparing the processing and analysis result with a preset indicator to obtain a comparison result.
[0108] Specifically, after completing data processing and analysis, obtain the processing and analysis results, which may include performance indicators (such as response time, throughput, error rate, etc.), security indicators (such as attack detection, vulnerability scanning results, etc.), or business indicators (such as user activity, conversion rate, etc.). Set a series of preset indicators based on business needs, industry standards or historical data. These indicators should be clear, quantifiable, and reflect the key aspects of the system or business. Preset indicators may include performance indicator thresholds (such as response time not exceeding 200 milliseconds), security standards (such as no high-risk vulnerabilities), or business goals (such as the number of daily active users reaches 1 million). Compare the processing and analysis results with the preset indicators one by one. This can be achieved by writing scripts, using data analysis tools, or integrating into existing monitoring systems. The comparison process may involve numerical comparison (such as whether the actual response time is lower than the threshold), status judgment (such as whether the system detects a security vulnerability), or trend analysis (such as whether user activity is on an upward trend). Generate a detailed comparison report or alert based on the comparison results. The report should include the processing and analysis results, preset indicators, comparison results, and possible explanations or suggestions. If the processing and analysis results do not meet the preset indicators, the alarm mechanism should be triggered so that timely measures can be taken. According to the comparison results, necessary follow-up actions should be taken, such as optimizing system performance, fixing security vulnerabilities, adjusting business strategies, etc. Regularly review the comparison results, evaluate the effectiveness of improvement measures, and adjust the preset indicators as needed.
[0109] By implementing the above-mentioned technical feature of comparing the processing and analysis results with the preset indicators to obtain the comparison results, the following technical effects are brought about:
[0110] Improve decision accuracy: By comparing the processing and analysis results with preset indicators, you can more accurately evaluate the performance, security, and achievement of business goals of the system or business, thereby making more informed decisions.
[0111] Enhanced monitoring and early warning capabilities: Real-time or regular comparison of analysis results with preset indicators can promptly detect anomalies or potential problems in the system or business, trigger an alarm mechanism, and improve monitoring and early warning capabilities.
[0112] Optimize resource allocation: Based on the comparison results, resources can be allocated more reasonably, such as optimizing system performance, strengthening security protection, adjusting business strategies, etc., thereby improving resource utilization efficiency.
[0113] Promote continuous improvement: Regularly reviewing comparison results, evaluating the effectiveness of improvement measures, and adjusting preset indicators as needed can promote continuous improvement and optimization of systems or businesses.
[0114] Preferably, the preset indicators are compared to confirm whether the SSD interrupt processing is within an acceptable range; if it does not meet the requirements, the failure reason is recorded. For example, if the currently issued request is vector=0 or vector=max, verify whether the Vector carried in the interrupt message returned by the SSD is specified by the request.
[0115] Specifically, a series of preset indicators for interrupt processing are defined according to the specifications, business requirements or industry standards of the SSD. These indicators may include the upper limit of the interrupt processing time, the correctness of the interrupt response (such as whether the returned Vector value is consistent with the request), the success rate of interrupt processing, etc. An interrupt processing request is sent to the SSD through a specific test tool or software. These requests may include different Vector values, such as vector=0 (usually indicating the lowest priority or a specific function interrupt) or vector=max (indicating the highest priority or another specific function interrupt). The interrupt processing response returned by the SSD is received and the content, especially the Vector value, is parsed to ensure that the parsing process is accurate and the Vector value can be correctly extracted. The parsed Vector value is compared with the Vector value specified in the request to verify whether the interrupt message returned by the SSD carries the correct Vector value. At the same time, according to the preset indicators, it is evaluated whether the interrupt processing time is within an acceptable range and whether the interrupt processing is successful (that is, no error or exception occurs). If the interrupt processing of the SSD does not meet the preset indicators (such as the returned Vector value is inconsistent with the request, or the interrupt processing time exceeds the upper limit), the failure reason is recorded. This may include detailed error information, timestamps, the complete content of the request and response, etc. Further analyze the recorded data to determine the root cause of the problem and develop appropriate repair measures. Feedback the analysis results to the SSD manufacturer or developer so that they can understand the problem and take appropriate improvement measures. Based on the analysis results, adjust the test strategy or preset indicators to ensure that future tests are more accurate and effective.
[0116] More specifically, by comparing the preset indicators with the actual interrupt handling results of the SSD, the interrupt handling capability of the SSD can be evaluated more accurately to ensure that it can work properly under various circumstances. In addition, timely discovery and recording of failures in SSD interrupt handling can help quickly locate problems and take repair measures, thereby improving the stability and reliability of the system. In addition, based on the test results and analysis results, the test process is continuously optimized to improve test efficiency and reduce test costs. In addition, by feeding back the test results to the manufacturer or developer of the SSD, the continuous improvement and optimization of SSD products can be promoted to improve product quality and performance. In addition, ensuring that the SSD's interrupt handling is within an acceptable range can help improve the response speed and stability of the entire system, thereby improving user experience and business efficiency.
[0117] In one embodiment, after the step of comparing the processing and analysis results with the preset indicators to obtain the comparison results, the step further includes: displaying the comparison results in a visual manner.
[0118] Specifically, a detailed performance report is generated based on the analysis results, including indicators such as interrupt vector trigger accuracy, interrupt response time, and processing accuracy. The test results are displayed through the user interface in the form of charts, tables, etc., which is convenient for users to understand and make decisions.
[0119] That is, use data analysis tools or write scripts to process and analyze the collected data to generate a detailed performance report. The report should contain the calculation results of all key indicators, statistical charts, and possible explanations or suggestions. Design the user interface based on the content of the performance report and user needs. The interface should be concise, easy to navigate, and contain all necessary charts, tables, and information display areas. The chart type can be selected according to the characteristics of the data, such as a bar chart to show the accuracy of interrupt vector triggering, a line chart to show the changing trend of interrupt response time, and a pie chart to show the distribution of processing accuracy. Import the data in the performance report into the user interface to achieve a visual display of the data. Ensure that the data in the charts and tables are accurate and can be updated in real time (if necessary). Add necessary interactive functions to the user interface, such as data filtering, chart zooming, data export, etc., so that users can customize the view as needed and obtain more detailed information. Test the user interface to ensure that it works properly on various devices and browsers and that the data display is accurate. Optimize the interface based on user feedback and test results to improve user experience.
[0120] The implementation of the above-mentioned technical feature of visually displaying the comparison results brings the following technical effects:
[0121] Improve data readability: intuitively present performance data in the form of charts, tables, etc., making it easier for users to understand and analyze test results.
[0122] Enhanced decision support: Detailed performance reports and intuitive data visualization provide users with comprehensive information support, helping them make more informed decisions.
[0123] Improve user experience: The user interface is concise and clear, easy to navigate and operate, which improves user experience and satisfaction.
[0124] Promote data sharing and communication: Through the data export function, users can easily share performance reports with other team members or stakeholders to promote data sharing and communication.
[0125] Optimize the test process: Intuitive data display and interactive functions enable testers to identify problems more quickly and take appropriate measures, thereby optimizing the test process and improving test efficiency.
[0126] Support continuous improvement: Performance reports and data visualization provide strong support for the continuous improvement of the system. By regularly analyzing and comparing test results, potential problems can be discovered and corresponding improvement measures can be formulated.
[0127] In terms of verification accuracy, the present invention can capture and analyze the calling of interrupt vectors in real time by dynamically recording interrupt responses, thereby avoiding information omissions caused by traditional static testing. This real-time performance not only greatly improves the accuracy of interrupt verification results, but also ensures that the test results can truly reflect the performance of SSDs in actual applications. This improvement is of great significance for ensuring the stability and reliability of SSDs in high-load, multi-task environments. In terms of flexibility and adaptability, interrupt scripts can be automatically generated and adjusted for different workloads and task scenarios. This flexibility enables the test process to adapt to a variety of dynamic conditions, thereby more effectively evaluating the performance of SSDs under different pressures. This highly adaptable test method ensures the stability of SSDs in actual use and provides users with a more reliable storage solution. In addition, in terms of test efficiency, through the automated interrupt script generation and dynamic analysis process, the time and workload of manual configuration are significantly reduced. This automated testing method not only improves test efficiency, but also reduces the risk of test errors caused by human intervention, which enables users to obtain reliable results more quickly and easily when evaluating SSD interrupt performance, thereby accelerating product development and optimization processes. In terms of performance analysis, it not only verifies the calling of interrupt vectors, but also deeply analyzes each link in the interrupt processing process. This in-depth performance analysis provides comprehensive information support for SSD optimization, which helps engineers optimize the system for specific problems, thereby improving the overall performance of SSD. This comprehensive performance analysis method is of great significance to promoting the sustainable development of SSD technology.
[0128] In summary, the SSD interrupt vector verification method proposed in the present invention realizes a systematic and accurate evaluation of SSD interrupt performance through a unique structure and working principle. This method not only solves many defects of the prior art, but also significantly improves the verification accuracy, flexibility and adaptability, test efficiency and performance analysis capabilities. These technical effects make the method of the present invention have broad application prospects and market value under the modern high-load, multi-tasking application requirements, and greatly promote the development and application of SSD technology and related fields.
[0129] Figure 2 FIG. 3 is a schematic block diagram of a verification device 300 for an SSD interrupt vector provided by an embodiment of the present invention. Figure 2 As shown, corresponding to the above SSD interrupt vector verification method, the present invention also provides a SSD interrupt vector verification device 300. The SSD interrupt vector verification device 300 includes a unit for executing the above SSD interrupt vector verification method, and the device can be configured in a server. Specifically, please refer to Figure 2, the SSD interrupt vector verification device 300 includes a configuration unit 301, a writing unit 302, an execution initiation unit 303, a capture unit 304, a processing and analysis unit 305 and a comparison unit 306;
[0130] The configuration unit 301 is used to configure the parameters required for the test to obtain the verification parameters;
[0131] A writing unit 302, used for writing an interruption test script according to the verification parameters;
[0132] An execution initiating unit 303 is used to execute an interruption test script and initiate an interruption request to the SSD to trigger a corresponding interruption;
[0133] A capture unit 304, used to capture data packets related to interrupt processing;
[0134] The processing and analysis unit 305 is used to process and analyze the data packet to obtain a processing and analysis result;
[0135] The comparison unit 306 is used to compare the processing and analysis result with a preset indicator to obtain a comparison result.
[0136] In one embodiment, the parameters required for the configuration test include link building configuration and packet capture rules.
[0137] In one embodiment, the main functions of the interrupt test script include: defining the interrupt vector to be triggered, defining the NVMe initialization process, and defining multiple test scenarios to simulate different working environments.
[0138] In one embodiment, the device further comprises: a visualization unit, configured to display the comparison result in a visual manner.
[0139] It should be noted that those skilled in the art can clearly understand that the specific implementation process of the verification device 300 and each unit of the above-mentioned SSD interrupt vector can refer to the corresponding description in the aforementioned method embodiment, and for the convenience and brevity of description, it will not be repeated here.
[0140] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Figure 3As shown. The computer device includes a processor, a memory, a network interface and a database connected via a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile and / or volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external client via a network connection. When the computer program is executed by the processor, it implements the functions or steps of the server side of a method for verifying an SSD interrupt vector.
[0141] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program:
[0142] Configure the parameters required for the test to obtain verification parameters; write an interrupt test script based on the verification parameters; execute the interrupt test script and initiate an interrupt request to the SSD to trigger the corresponding interrupt; capture data packets related to interrupt processing; process and analyze the data packets to obtain processing and analysis results; compare the processing and analysis results with preset indicators to obtain comparison results.
[0143] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:
[0144] Configure the parameters required for the test to obtain verification parameters; write an interrupt test script based on the verification parameters; execute the interrupt test script and initiate an interrupt request to the SSD to trigger the corresponding interrupt; capture data packets related to interrupt processing; process and analyze the data packets to obtain processing and analysis results; compare the processing and analysis results with preset indicators to obtain comparison results.
[0145] It should be noted that the above functions or steps that can be implemented by the computer-readable storage medium or computer device can refer to the relevant descriptions on the server side and the client side in the aforementioned method embodiment. To avoid repetition, they will not be described one by one here.
[0146] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
[0147] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.
[0148] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.
Claims
1. The verification method of SSD interrupt vector is characterized by: include: Configure the parameters required for the test to obtain verification parameters; Write interrupt test scripts based on verification parameters; Execute the interrupt test script and initiate an interrupt request to the SSD to trigger the corresponding interrupt; Capture packets related to interrupt handling; Process and analyze data packets to obtain processing and analysis results; The processing and analysis results are compared with the preset indicators to obtain comparative results.
2. The SSD interrupt vector verification method according to claim 1, characterized in that: The parameters required for the configuration test include link building configuration and packet capture rules.
3. The SSD interrupt vector verification method according to claim 1, characterized in that: The main functions of the interrupt test script include: defining the interrupt vector to be triggered, defining the NVMe initialization process, and defining multiple test scenarios to simulate different working environments.
4. The SSD interrupt vector verification method according to claim 1, characterized in that: After the step of comparing the processing and analysis results with the preset indicators to obtain the comparison results, the method further includes: displaying the comparison results in a visual manner.
5. The verification device of SSD interrupt vector is characterized in that: include: A configuration unit, used to configure parameters required for the test to obtain verification parameters; A writing unit for writing interruption test scripts according to verification parameters; An execution initiation unit, used for executing an interruption test script and initiating an interruption request to the SSD to trigger a corresponding interruption; A capture unit, used to capture data packets related to interrupt processing; A processing and analysis unit, used for processing and analyzing data packets to obtain processing and analysis results; The comparison unit is used to compare the processing and analysis results with the preset indicators to obtain a comparison result.
6. The SSD interrupt vector verification device according to claim 5, characterized in that: The parameters required for the configuration test include link building configuration and packet capture rules.
7. The SSD interrupt vector verification device according to claim 5, characterized in that: The main functions of the interrupt test script include: defining the interrupt vector to be triggered, defining the NVMe initialization process, and defining multiple test scenarios to simulate different working environments.
8. The SSD interrupt vector verification device according to claim 5, characterized in that: The device also includes: a visualization unit, which is used to display the comparison result in a visual manner.
9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the SSD interrupt vector verification method according to any one of claims 1 to 4 are implemented.
10. A storage medium, wherein the computer-readable storage medium stores a computer program, characterized in that: When the computer program is executed by a processor, the steps of the SSD interrupt vector verification method according to any one of claims 1 to 4 are implemented.
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