Display substrate and display device

Abstract

The invention discloses a display substrate and a display device. The display substrate includes a first power signal line and a pixel defining layer. The first power supply signal line comprises a first sub power supply signal line extending along a first direction and a second sub power supply signal line extending along a second direction; the pixel defining layer comprises a plurality of openings to define effective light-emitting areas of the plurality of sub-pixels, the plurality of sub-pixels comprise a sub-pixel pair composed of two sub-pixels arranged in the second direction, and the sub-pixel pair comprises two sub effective light-emitting areas spaced from each other. In a planar graph, the first sub-power signal line penetrates through the interval between the two sub-effective light-emitting areas, the at least one second sub-power signal line comprises a fracture, and the two sub-effective light-emitting areas are located at the fracture, so that a virtual straight line connecting two end points of the fracture of the second sub-power signal line penetrates through the two sub-effective light-emitting areas. The fracture arranged on the second sub power supply signal line can reduce overlapping of the two sub effective light-emitting areas and the first power supply signal line, and color cast of the sub pixel pair is reduced.

Description

[0001] This application is a divisional of Chinese patent application No. 202080000606.9, whose invention name is “Display substrate and display device” and entered the Chinese national stage on April 27, 2020. Chinese patent application No. 202080000606.9 is a patent application for PCT application No. PCT / CN2020 / 086997 filed on April 26, 2020, which entered the Chinese national stage. Technical Field

[0002] At least one embodiment of the present disclosure relates to a display substrate and a display device. Background Art

[0003] Organic light-emitting diodes have the advantages of self-luminescence, high efficiency, bright colors, light weight and power saving, and have been gradually applied to large-area display, lighting, and vehicle-mounted display. In order to improve the uniformity of the organic light-emitting diode display device, a two-layer power signal line structure can be adopted, and the power signal line close to the light-emitting layer of the organic light-emitting diode forms a grid pattern to reduce the voltage drop of the power signal line. Summary of the invention

[0004] At least one embodiment of the present disclosure provides a display substrate and a display device.

[0005] At least one embodiment of the present disclosure provides a display substrate, comprising: a base substrate; a first power signal line, located on the base substrate, the first power signal line comprising a plurality of first sub-power signal lines extending in a first direction and a plurality of second sub-power signal lines extending in a second direction, the first sub-power signal line being connected to the second sub-power signal line; a pixel defining layer, located on a side of the first power signal line away from the base substrate, the pixel defining layer comprising a plurality of openings to define effective light-emitting areas of a plurality of sub-pixels, the plurality of sub-pixels comprising a sub-pixel pair consisting of two sub-pixels arranged in the second direction, the sub-pixel pair comprising two sub-effective light-emitting areas spaced apart from each other. In a plan view, the first sub-power signal line passes through the space between the two sub-effective light-emitting areas, at least one of the second sub-power signal lines comprises at least one break, the two sub-effective light-emitting areas and the space between the two sub-effective light-emitting areas are both located at the break, so that a virtual straight line extending in the second direction connecting the two end points of the same break of the second sub-power signal line passes through the two sub-effective light-emitting areas and the space.

[0006] For example, in an embodiment of the present disclosure, along a direction perpendicular to the base substrate, the second sub-power signal line having the break does not overlap with the two sub-effective light-emitting areas and the interval.

[0007] For example, in an embodiment of the present disclosure, the display substrate further includes: a plurality of second power signal lines extending along the second direction, located between the first power signal line and the base substrate, and the second power signal line is electrically connected to the second sub-power signal line through a via hole in the insulating layer between the second sub-power signal line and the second power line. The orthographic projection of the second sub-power signal line on the base substrate at least partially overlaps with the orthographic projection of the second power signal line on the base substrate, and the orthographic projection of the two sub-effective light-emitting areas on the base substrate overlaps with the orthographic projection of the second power signal line on the base substrate.

[0008] For example, in an embodiment of the present disclosure, the ratio of the distance between the orthographic projection of the first sub-power signal line on the base substrate and the two centers of the two orthographic projections of the two sub-effective light-emitting areas on the base substrate is 0.9-1.1.

[0009] For example, in an embodiment of the present disclosure, two centers of two orthographic projections of the two sub-effective light-emitting areas on the base substrate are located within the orthographic projection of the second power signal line on the base substrate.

[0010] For example, in an embodiment of the present disclosure, the display substrate includes a plurality of repeating units located on the base substrate, each of the plurality of repeating units includes a first color sub-pixel, a second color sub-pixel pair, and a third color sub-pixel arranged in sequence along the first direction, the second color sub-pixel pair includes two second color sub-pixels of the same color, and the sub-pixel pair composed of the two sub-pixels arranged along the second direction is the second color sub-pixel pair; the first color sub-pixel includes a first effective light-emitting area, the two sub-effective light-emitting areas are two second effective light-emitting areas, and the third color sub-pixel includes a third effective light-emitting area.

[0011] For example, in an embodiment of the present disclosure, along the second direction, the size of the interval is smaller than the size of the first effective light-emitting area, and the size of the interval is smaller than the size of the third effective light-emitting area.

[0012] For example, in an embodiment of the present disclosure, in a direction perpendicular to the base substrate, the first effective light emitting area does not overlap with the second sub-power signal line and the second power signal line.

[0013] For example, in an embodiment of the present disclosure, the first effective light-emitting area is located between adjacent second sub-power signal lines, and the first effective light-emitting area is located between adjacent second sub-power signal lines.

[0014] For example, in an embodiment of the present disclosure, the center of the orthographic projection of the first effective light emitting area on the base substrate is located within the orthographic projection of the first sub-power signal line on the base substrate.

[0015] For example, in an embodiment of the present disclosure, the display substrate further comprises: a plurality of pads extending along the second direction and arranged in the same layer as the first power signal line. Two second sub-power signal lines located on both sides of the first effective light-emitting area and adjacent to the first effective light-emitting area are unequally distant from a center line of the first effective light-emitting area extending along the second direction, and the first effective light-emitting area is located between the pads and the second sub-power signal lines that are closer to the center line of the first effective light-emitting area.

[0016] For example, in an embodiment of the present disclosure, in the first direction, the ratio of the distance between the center line of the first effective light-emitting area and the pads and the second sub-power signal line located on both sides of the first effective light-emitting area is 0.9-1.1.

[0017] For example, in an embodiment of the present disclosure, along a direction perpendicular to the base substrate, the pad overlaps with the first sub-power signal line and is electrically connected to each other.

[0018] For example, in an embodiment of the present disclosure, the shape of the cushion block is substantially a long strip, and the center of the orthographic projection of the cushion block on the base substrate is located within the orthographic projection of the first sub-power signal line on the base substrate.

[0019] For example, in an embodiment of the present disclosure, the spacer is arranged between the first color sub-pixel and the third color sub-pixel which are arranged along the first direction and adjacent to each other, and the spacer is electrically connected to the second sub-power signal line located between the first color sub-pixel and the third color sub-pixel.

[0020] For example, in an embodiment of the present disclosure, the display substrate further comprises: a connection portion, which is provided in the same layer as the pad and is located between the second sub-power signal line and the pad. The pad is connected to the second sub-power signal line through the connection portion.

[0021] For example, in an embodiment of the present disclosure, there is a gap between the pad and the second sub-power signal line connected thereto, the connecting portion is located between the pad and the second sub-power signal line, and the connecting portion, the pad and the second sub-power signal line form a ring structure.

[0022] For example, in an embodiment of the present disclosure, the plurality of second sub-power signal lines include first sub-signal lines and second sub-signal lines alternately arranged along the first direction, the first sub-signal lines are continuous signal lines, and the second sub-signal lines are signal lines having the break.

[0023] For example, in an embodiment of the present disclosure, the pad is connected to the second sub-signal line through the connecting portion, and the orthographic projection of the pad on another second sub-signal line adjacent to the second sub-signal line connected to the pad is located within the break of the other second sub-signal line.

[0024] For example, in an embodiment of the present disclosure, along the second direction, the size of the spacer is smaller than the size of the first effective light-emitting area.

[0025] For example, in an embodiment of the present disclosure, in a direction perpendicular to the base substrate, the third effective light emitting area does not overlap with the second sub-power signal line and the second power signal line.

[0026] For example, in an embodiment of the present disclosure, the third effective light emitting area is located between adjacent second sub-power signal lines, and the third effective light emitting area is located between adjacent second sub-power signal lines.

[0027] For example, in an embodiment of the present disclosure, the center of the orthographic projection of the third effective light emitting area on the base substrate is located within the orthographic projection of the first sub-power signal line on the base substrate.

[0028] For example, in an embodiment of the present disclosure, the ratio of the distance between the orthographic projections of two second sub-power signal lines located on both sides of the third color sub-pixel and adjacent to the third color sub-pixel on the substrate and the center of the orthographic projection of the third effective light-emitting area on the substrate is 0.9 to 1.1.

[0029] For example, in an embodiment of the present disclosure, each of the sub-pixels includes an organic light-emitting element, and the organic light-emitting element includes a first electrode, a light-emitting layer and a second electrode which are stacked in sequence, at least a portion of the light-emitting layer is located in the opening, and the second electrode is located on the side of the pixel defining layer facing the base substrate, and in the first color sub-pixel, the area ratio of the first effective light-emitting area to the second electrode is 53% to 55%; in the second color sub-pixel pair, the area ratio of the two second effective light-emitting areas to the two second electrodes is 43.5% to 48%; in the third color sub-pixel, the area ratio of the third effective light-emitting area to the second electrode is 67.5% to 69%.

[0030] For example, in an embodiment of the present disclosure, the shapes of the first effective light-emitting area and the third effective light-emitting area include a hexagon or an ellipse, and the shape of each of the second effective light-emitting areas included in the second color sub-pixel pair includes a pentagon, a circle or a water drop shape.

[0031] For example, in an embodiment of the present disclosure, the second electrode of each color sub-pixel includes a main electrode and a connecting electrode connected to each other, and the shape of the main electrode is substantially the same as the shape of the effective light-emitting area of ​​the corresponding sub-pixel; in each of the sub-pixels, a portion where the connecting electrode is connected to the main electrode is provided with a notch, and along a direction perpendicular to the base substrate, the display substrate is a transparent area in an area corresponding to at least a portion of the notch.

[0032] For example, in an embodiment of the present disclosure, the display substrate also includes: a plurality of data lines extending along the second direction and arranged in the same layer as the second power signal lines; a plurality of scanning signal lines extending along the first direction and located on the side of the film layer where the data lines are located facing the base substrate; a plurality of reset power signal lines extending along the first direction and located between the film layer where the scanning signal lines are located and the film layer where the data lines are located; a plurality of reset control signal lines extending along the first direction and arranged in the same layer as the scanning signal lines; and a plurality of light-emitting control signal lines extending along the first direction and arranged in the same layer as the scanning signal lines. Each of the sub-pixels also includes a pixel circuit for driving the organic light-emitting element, and the pixel circuit includes a driving transistor, a data writing transistor, a storage capacitor, a threshold compensation transistor, a first light-emitting control transistor, a second light-control transistor, a first reset transistor, and a second reset transistor; a first electrode of the data writing transistor is electrically connected to a first electrode of the driving transistor, a second electrode of the data writing transistor is electrically connected to the data line to receive a data signal, and a gate of the data writing transistor is electrically connected to the scanning signal line to receive a scanning signal; a first electrode of the storage capacitor is electrically connected to the second power signal line, and a second electrode of the storage capacitor is electrically connected to the gate of the driving transistor; a first electrode of the threshold compensation transistor is electrically connected to a second electrode of the driving transistor, a second electrode of the threshold compensation transistor is electrically connected to the gate of the driving transistor, and the gate of the threshold compensation transistor is electrically connected to the scanning signal line to receive a compensation control signal; a first electrode of the first reset transistor is electrically connected to the reset power signal line to receive a first reset signal, and the first reset The second electrode of the transistor is electrically connected to the gate of the driving transistor, and the gate of the first reset transistor is electrically connected to the reset control signal line to receive a first sub-reset control signal; the first electrode of the second reset transistor is electrically connected to the reset power signal line to receive a second reset signal, the second electrode of the second reset transistor is electrically connected to the first electrode of the organic light-emitting element, and the gate of the second reset transistor is electrically connected to the reset control signal line to receive a second sub-reset control signal; the first electrode of the first light-emitting control transistor is electrically connected to the second power signal line, the second electrode of the first light-emitting control transistor is electrically connected to the first electrode of the driving transistor, and the gate of the first light-emitting control transistor is electrically connected to the light-emitting control signal line to receive the first light-emitting control signal; the first electrode of the second light-emitting control transistor is electrically connected to the second electrode of the driving transistor, the second electrode of the second light-emitting control transistor is electrically connected to the second electrode of the organic light-emitting element, and the gate of the second light-emitting control transistor is electrically connected to the light-emitting control signal line to receive the second light-emitting control signal.The display substrate also includes a first connection portion, a second connection portion and a third connection portion arranged on the same layer as the data line, and a fourth connection portion arranged on the same layer as the first power signal line, the first connection portion is configured to connect the second electrode of the threshold compensation transistor and the gate of the driving transistor, the second connection portion is configured to connect the reset power signal line and the first electrode of the second reset transistor, the third connection portion is configured to connect the second electrode of the second light-emitting control transistor and the fourth connection portion, and the fourth connection portion is configured to connect the third connection portion and the connection electrode of the second electrode of the organic light-emitting element.

[0033] For example, in an embodiment of the present disclosure, the transparent area includes an area where the pixel circuit, the first power signal line, the second power signal line, the data line, the scanning signal line, the reset power signal line, the reset control signal line and the light emitting control signal line are not set.

[0034] For example, in an embodiment of the present disclosure, along a direction perpendicular to the substrate, the light emitting control signal line of the pixel circuit of the first color sub-pixel, the second power supply signal line, the active semiconductor layer including the channel region and the source-drain doping region of each transistor of each sub-pixel, and the area surrounded by the first electrode of the storage capacitor overlap with the recess of the second electrode of the first color sub-pixel.

[0035] For example, in an embodiment of the present disclosure, along a direction perpendicular to the base substrate, a partial area close to the light emitting control signal line in an area surrounded by the light emitting control signal line of the pixel circuit of the first sub-pixel of the second color sub-pixel pair, the second power supply signal line, and the first electrode of the storage capacitor overlaps with a recess of the second electrode of the first sub-pixel.

[0036] For example, in an embodiment of the present disclosure, in the second sub-pixel of the second color sub-pixel pair, the connecting electrode includes a first portion extending along the second direction and a bent second portion, the first portion is located on a side of the second portion away from the main electrode, the second portion is connected to the main electrode, and the maximum dimension of the first portion along the first direction is greater than the maximum dimension of the second portion along the first direction.

[0037] For example, in an embodiment of the present disclosure, in the second sub-pixel, the connection electrode does not overlap with the source and drain doping regions of the first light emitting control transistor.

[0038] For example, in an embodiment of the present disclosure, along a direction perpendicular to the base substrate, the light emitting control signal line of the pixel circuit connected to the second sub-pixel, the second power signal line, and a partial area surrounded by the third connection portion close to the second power signal line and the light emitting control signal line overlap with the recess of the second electrode of the second sub-pixel.

[0039] For example, in an embodiment of the present disclosure, along a direction perpendicular to the base substrate, a partial area of ​​an area surrounded by a film layer where the data line of the pixel circuit connected to the second sub-pixel, the active semiconductor layer, and the first electrode of the storage capacitor are located, and away from the light-emitting control signal line, overlaps with a recess of the second electrode of the third color sub-pixel.

[0040] For example, in an embodiment of the present disclosure, the first color sub-pixel is a red sub-pixel, the second color sub-pixel is a green sub-pixel, and the third color sub-pixel is a blue sub-pixel.

[0041] At least one embodiment of the present disclosure provides a display device including the above-mentioned display substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0043] Figure 1A A plan view showing the positional relationship between a first power signal line and an effective light emitting area in a display substrate provided according to an embodiment of the present disclosure;

[0044] Figure 1B for Figure 1A A plan view showing the positional relationship between the first power signal line, the second power signal line and the effective light emitting area in the display substrate shown;

[0045] Figure 2 For along Figure 1A and Figure 1B A schematic diagram of a local cross-sectional structure taken along line AA' shown;

[0046] Figure 3A For along Figure 1A and Figure 1B A schematic diagram of the local cross-sectional structure taken along line BB' is shown;

[0047] Figure 3B For along Figure 1B A schematic diagram of the local cross-sectional structure taken along CC' shown;

[0048] Figure 3CIn another example of the present disclosure, Figure 1B A cross-sectional view taken along line BB' shown;

[0049] Figure 4 A schematic diagram of a pixel circuit connected to an organic light-emitting element included in each sub-pixel;

[0050] Figure 5-Figure 11 A schematic diagram of stacking layers of a pixel circuit and signal lines provided in some embodiments of the present disclosure;

[0051] Fig.12 For Fig.11 A schematic plan view of an organic light emitting element in which each pixel circuit structure corresponds to another pixel circuit structure;

[0052] Fig.13 is a schematic diagram of a planar shape of a second electrode of each sub-pixel; and

[0053] Fig.14 The diagram is a schematic plan view of the second electrode of each sub-pixel in a display substrate. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0055] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The words "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. The words "include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0056] The organic light emitting diode display device includes a pixel defining layer, which includes an opening for defining a light emitting area of ​​a sub-pixel, and the opening exposes the anode of the organic light emitting element. When a light emitting layer of a subsequent organic light emitting element is formed in the opening of the pixel defining layer, the light emitting layer contacts the anode, so that this part can drive the light emitting layer to emit light to form a light emitting area.

[0057] During the research, the inventors of the present application found that in an organic light emitting diode display, when a power signal line close to a light emitting layer of the organic light emitting diode overlaps with an opening, the power signal line located in the light emitting area is prone to cause color deviation.

[0058] The embodiment of the present disclosure provides a display substrate and a display device. The display substrate includes: a substrate substrate, a first power signal line located on the substrate substrate, and a pixel defining layer located on a side of the first power signal line away from the substrate substrate. The first power signal line includes a plurality of first sub-power signal lines extending along a first direction and a plurality of second sub-power signal lines extending along a second direction, and the first sub-power signal line is connected to the second sub-power signal line; the pixel defining layer includes a plurality of openings to define effective light-emitting areas of a plurality of sub-pixels, and the plurality of sub-pixels include a sub-pixel pair consisting of two sub-pixels arranged along the second direction, and the sub-pixel pair includes two sub-effective light-emitting areas with a gap between them. In a plan view, the first sub-power signal line passes through the gap between the two sub-effective light-emitting areas, at least one second sub-power signal line includes a break, and the two sub-effective light-emitting areas and the gap between the two sub-effective light-emitting areas are all located at the break, so that a virtual straight line extending along the second direction connecting the two end points of the same break of the second sub-power signal line passes through the two sub-effective light-emitting areas and the gap. In the embodiment of the present disclosure, a break is provided in the second sub-power signal line to reduce the overlapping area between the two sub-effective light-emitting areas and the first power signal line, thereby avoiding color deviation of the sub-pixel pair during display.

[0059] The display substrate and the display device provided by the embodiments of the present disclosure are described below with reference to the accompanying drawings.

[0060] Figure 1A is a plan view showing the positional relationship between a first power signal line and an effective light emitting area in a display substrate provided according to an embodiment of the present disclosure, Figure 1B for Figure 1A A plan view showing the positional relationship between the first power signal line, the second power signal line and the effective light emitting area in the display substrate shown in FIG. Figure 2 For along Figure 1A and Figure 1B The schematic diagram of the local cross-section structure cut by the AA' line shown in FIG. Figure 1A-Figure 2As shown, the display substrate includes a base substrate 100 and a plurality of repeating units 200 located on the base substrate 100. Each repeating unit 200 includes a first color sub-pixel 210, a second color sub-pixel pair 220 and a third color sub-pixel 230 arranged along a first direction (the X direction shown in the figure), and two second color sub-pixels included in the second color sub-pixel pair 220 are arranged along a second direction (the Z direction shown in the figure, which is different from the direction of the first direction). A plurality of repeating units 200 are arranged along a first direction to form a plurality of repeating unit groups, a plurality of repeating unit groups are arranged along a second direction, and adjacent repeating unit groups in the plurality of repeating unit groups are staggered from each other along the first direction, that is, adjacent repeating unit groups have a certain offset along the first direction. Therefore, sub-pixels of the same color in adjacent repeating unit groups are not aligned in the second direction. The pixel arrangement mode is the same in the odd-numbered row repeating unit groups, and the pixel arrangement mode is the same in the even-numbered row repeating unit groups.

[0061] For example, the offset of adjacent repeating unit groups in the first direction is approximately half of the size of the repeating unit 200 in the first direction. For example, the size of the repeating unit 200 in the first direction is the pitch of the repeating unit 200 in the first direction. The pitch here refers to the distance between the centers of the light-emitting areas of two first color sub-pixels 210 in two adjacent repeating units 200 along the first direction, and the center of the light-emitting area here refers to the geometric center of the plane shape of the light-emitting area.

[0062] The first direction and the second direction are two directions perpendicular to each other in the same plane. For example, the plane is the plane where the pixels are arranged. The repeating unit here refers only to the repetition of sub-pixels, and other structures may be different or the same. In addition, the above repetition refers to the approximate position, shape, and size. In some cases, for the needs of wiring or opening, the shape may be slightly different, such as openings in different positions.

[0063] For example, in an example of the embodiment of the present disclosure, the first color sub-pixel 210 may be a red sub-pixel, the second color sub-pixel pair 220 may be a green sub-pixel pair, and the third color sub-pixel 230 may be a blue sub-pixel. However, this is not limited thereto, and each color sub-pixel may be interchangeable.

[0064] like Figure 1A-Figure 2 As shown, the display substrate also includes a first power signal line 400 located on the base substrate 100, the first power signal line 400 includes a plurality of first sub-power signal lines 410 extending along a first direction and a plurality of second sub-power signal lines 420 extending along a second direction, and the first sub-power signal lines 410 are connected to the second sub-power signal lines 420.

[0065] like Figure 1A-Figure 2As shown, the display substrate further includes a pixel defining layer 130 located on the side of the first power signal line 400 away from the substrate 100, and the pixel defining layer 130 includes a plurality of openings to define the effective light-emitting area of ​​each sub-pixel. Here, the "effective light-emitting area" may refer to a two-dimensional plane area, which is parallel to the substrate. It should be noted that due to process reasons, the size of the opening of the pixel defining layer away from the substrate substrate is slightly larger than the size of the part close to the substrate substrate, or the size gradually increases from the side close to the substrate substrate to the side away from the substrate substrate. Therefore, the size of the effective light-emitting area may be slightly different from the size of the opening of the pixel defining layer at different positions, but the overall area shape and size are basically the same. For example, the projection of the effective light-emitting area on the substrate substrate roughly coincides with the projection of the corresponding opening of the pixel defining layer on the substrate substrate. For example, the projection of the effective light-emitting area on the substrate substrate completely falls within the projection of the corresponding opening of the pixel defining layer on the substrate substrate, and the two are similar in shape, and the projection area of ​​the effective light-emitting area on the substrate substrate is slightly smaller than the projection of the corresponding opening of the pixel defining layer on the substrate substrate.

[0066] For example, each sub-pixel includes an organic light-emitting element, which includes a first electrode, a light-emitting layer, and a second electrode stacked in sequence, at least a portion of the light-emitting layer is located in the opening, and the second electrode is located on a side of the pixel defining layer facing the base substrate. Figure 2 As shown, taking a second color sub-pixel included in the second color sub-pixel pair as an example, the second color sub-pixel includes an organic light-emitting element, and the organic light-emitting element includes a first electrode 221, a second electrode 222, and a light-emitting layer 223 located between the first electrode 221 and the second electrode 222. The opening of the pixel defining layer 130 exposes a portion of the second electrode 222. When the light-emitting layer 223 is formed in the opening of the pixel defining layer 130, the light-emitting layer 223 contacts the second electrode 222, so that this portion can drive the light-emitting layer to emit light to form a second effective light-emitting area 2200. The second color sub-pixel pair 220 includes two second effective light-emitting areas 2201 and 2202.

[0067] The disclosed embodiment is described by taking the example that the light-emitting layers of the two second color sub-pixels included in the second color sub-pixel pair are integrated, for example, the light-emitting layers of the two second color sub-pixels of the second color sub-pixel pair are connected as a whole film layer, that is, the light-emitting layers of the two second color sub-pixels are a continuous and complete pattern, or the projection of the light-emitting layers of the two second color sub-pixels on the substrate is continuous and complete, and the light-emitting layers of the two second color sub-pixels can be made through an opening. However, it is not limited to this, for example, the light-emitting layers of the two second color sub-pixels included in the second color sub-pixel pair can also be separated.

[0068] like Figure 1A-Figure 2As shown, the first color sub-pixel 210 includes a first effective light-emitting area 2100, the second color sub-pixel pair includes two second effective light-emitting areas 2200 (including a first sub-effective light-emitting area 2201 and a second sub-effective light-emitting area 2202) with a gap between each other, and the third color sub-pixel 230 includes a third effective light-emitting area 2300. In the figure, the portion where the light-emitting layer in the opening of the pixel defining layer contacts the second electrode is used as an effective light-emitting area. The "gap" in the above "the second color sub-pixel pair includes two second effective light-emitting areas 2200 with a gap between each other" refers to the physical portion of the pixel defining layer between the two openings defined by the pixel defining layer. Figure 1A The orthographic projection of the interval S on the straight line extending in the X direction can substantially coincide with the orthographic projection of the second color subpixel pair on the straight line extending in the X direction, and the orthographic projection of the interval S on the straight line extending in the Z direction is located between the two orthographic projections of the second color subpixel pair on the straight line extending in the Z direction.

[0069] like Figure 1A-Figure 2 As shown, in a plan view, for example, a plane parallel to the base substrate 100 (or the orthographic projection of subsequent structures on the plane), the first sub-power signal line 410 passes through the interval between the two second effective light-emitting areas 2200, at least one second sub-power signal line 420 includes a break 421, and the two second effective light-emitting areas 2200 and the above-mentioned interval are located at the break 421, so that the second sub-power signal line 420 does not pass through the two second effective light-emitting areas 2200 and the above-mentioned interval. That is, a virtual straight line 4210 connecting the two end points of the break 421 and extending along the Z direction passes through the two second effective light-emitting areas 2200 and the interval S located between the two second effective light-emitting areas 2200. The above-mentioned "break" means that the second sub-power signal line 420 is not a continuous signal line, and the signal line includes a plurality of signal line segments disconnected from each other, and the interval between two adjacent signal line segments is the above-mentioned break 421.

[0070] For example, along a direction perpendicular to the base substrate 100 , the second sub power signal line 420 having the break 421 does not overlap with the two second effective light emitting areas 2200 and the interval S.

[0071] For example, along the direction perpendicular to the base substrate 100, the two second effective light-emitting areas 2200 do not overlap with the first power signal line 400. That is, in the direction perpendicular to the base substrate 100, the two second effective light-emitting areas 2200 overlap with the break 421, but do not overlap with the second sub-power signal line 420, and the two second effective light-emitting areas 2200 do not overlap with the first sub-power signal line 410. Thus, along the direction perpendicular to the base substrate, the two second effective light-emitting areas included in the second color sub-pixel pair do not overlap with the first power signal line, so as to improve the flatness of the film layer on the side of the second electrode away from the light-emitting layer in the two second effective light-emitting areas, and to avoid color deviation of the second color sub-pixel pair during display.

[0072] For example, Figure 1A and Figure 1B As shown, the interval between the two second effective light-emitting areas 2200 along the second direction is smaller than the size of the first effective light-emitting area 2100 along the second direction, and the interval between the two second effective light-emitting areas 2200 along the second direction is smaller than the size of the third effective light-emitting area 2300 along the second direction.

[0073] For example, along the second direction, the size of the first effective light-emitting area 2100 is larger than that of the third effective light-emitting area 2300. For example, the size of the first effective light-emitting area 2100 can be 45 to 49 microns, for example, 47 microns; the size of the third effective light-emitting area 2300 can be 38 to 42 microns, for example, 40 microns.

[0074] For example, Figure 1A and Figure 1B As shown, the ratio of the distance between the orthographic projection of the first sub-power signal line 410 on the substrate 100 and the two centers of the two orthographic projections of the two second effective light-emitting areas 2200 on the substrate 100 is 0.9 to 1.1. For example, the distance between the orthographic projection of the first sub-power signal line 410 on the substrate 100 and the two centers of the two orthographic projections of the two second effective light-emitting areas 2200 on the substrate 100 is substantially equal. Thus, the two second effective light-emitting areas included in the second color sub-pixel pair are symmetrically distributed relative to the first sub-power signal line, which is conducive to ensuring the environmental consistency of the two second color sub-pixels included in the second color sub-pixel pair. For example, the orthographic projection of the first sub-power signal line 410 on the substrate 100 can also be closer to one of the second color sub-pixel pair. For example, the orthographic projection of the first sub-power signal line 410 on the substrate 100 does not overlap with the second electrode projections of the two second color sub-pixels in the second color sub-pixel pair.

[0075] The center of the above-mentioned orthographic projection refers to the geometric center of the shape of the orthographic projection. The shape of the orthographic projection of the effective light-emitting area on the substrate is determined by the shape of the effective light-emitting area, and the shape of the effective light-emitting area is roughly the same as the shape of the opening of the corresponding pixel defining layer.

[0076] For example, Figure 1A and Figure 1B As shown, the shape of each second effective light emitting area 2200 included in the second color sub-pixel pair 220 includes a pentagon, a circle or a water drop shape. Figure 1A and Figure 1B It is schematically shown that the shape of each second effective light-emitting area 2200 is a pentagon, which includes a set of parallel opposite sides (parallel to the second direction) and a vertical side (parallel to the first direction), the vertical side is perpendicular to the set of parallel opposite sides, and the two vertical sides of the two second effective light-emitting areas 2200 in each second color sub-pixel pair 220 are adjacently arranged. For example, the first sub-power signal line 410 is located between the two vertical sides and passes through the midpoint of the shortest line between the two vertical sides.

[0077] In addition, although Figure 1A and Figure 1B The shape of the second effective light-emitting area of ​​the second color sub-pixel in the embodiment includes an angle strictly formed by two line segments, but in some embodiments, the shape of the second effective light-emitting area of ​​the second color sub-pixel can be a rounded shape, such as a circle or a teardrop shape. That is, on the basis of the above-mentioned pentagonal shape, the corners of the second effective light-emitting area of ​​the second color sub-pixel are rounded. For example, when forming an opening of the pixel defining layer, the corners of the opening may form a rounded shape, so that the shape of the light-emitting area formed may be a rounded shape.

[0078] For example, Figure 1A-Figure 2As shown, the display substrate further includes: a second power signal line 500 located between the first power signal line 400 and the base substrate 100, and the second power signal line 500 extends along the second direction. The orthographic projection of the second sub-power signal line 420 on the base substrate 100 overlaps with the orthographic projection of the second power signal line 500 on the base substrate 100 at least partially, and the orthographic projections of the two second effective light-emitting areas 2200 on the base substrate 100 overlap with the orthographic projections of the second power signal line 500 on the base substrate 100. That is, along the direction perpendicular to the base substrate 100, the break 421 overlaps with the second power signal line 500. For example, the orthographic projection of the second sub-power signal line 420 on the base substrate 100 is located within the orthographic projection of the second power signal line 500 on the base substrate 100. For example, the second power signal line may substantially overlap with the second sub-power signal line except for the break, but the line width of the second sub-power signal line is partially adjusted and does not completely overlap with the second power signal line. For example, the area of ​​the overlapping portion between the second power signal line and the second sub-power signal line accounts for more than 70% of the area of ​​the second power signal line.

[0079] For example, at different positions of the second sub-power signal line 420 in the extending direction, the width of the second sub-power signal line 420 in the first direction is slightly different, for example, the width of the second sub-power signal line 420 at the position corresponding to certain color sub-pixels is reduced. Similarly, the width of the second power signal line 500 in the first direction at different positions of the second power signal line 500 in the extending direction is slightly different.

[0080] For example, Figure 1A-1BAs shown, two repeating units 200 located in the same repeating unit group and adjacent to each other include a first repeating unit 201 and a second repeating unit 202, the third color sub-pixel 230 of the first repeating unit 201 is adjacent to the first color sub-pixel 210 of the second repeating unit 202, and the repeating unit 200 adjacent to both the first repeating unit 201 and the second repeating unit 202 and located in the adjacent repeating unit group is the third repeating unit 203. A continuous second sub-power signal line 420, i.e., a first sub-signal line 4201, is arranged between the first color sub-pixel 210 in the third repeating unit 203 and the third color sub-pixel 230 in the first repeating unit 201, and the orthographic projections of a column of first color sub-pixels 210 and a column of third color sub-pixels 230 located on both sides of the continuous second sub-power signal line 420 and adjacent to the second sub-power signal line 420 on the second sub-power signal line 420 are alternately arranged along the second direction. The width of the second sub-power signal line 420 at the orthogonal projection position of the first color sub-pixel 210 on the continuous second sub-power signal line 420 is the first width, the width of the second sub-power signal line 420 at the interval position between two adjacent orthogonal projections of the first color sub-pixel 210 and the third color sub-pixel 230 on the second sub-power signal line 420 is the second width, and the width of the second sub-power signal line 420 at the orthogonal projection position of the third color sub-pixel 230 on the continuous second sub-power signal line 420 is the third width, the first width is smaller than the second width, and the third width is smaller than the second width. The first width and the third width may be the same or different, for example, the third width is smaller than the first width. The continuous second sub-power signal line 420 includes a first segment and a second segment corresponding to the first color sub-pixel 210 and the third color sub-pixel 230, respectively, and a connecting segment connecting the first segment and the second segment. Along the second direction, the first segment and the second segment of the continuous second sub-power signal line 420 are alternately arranged. The edge of the first segment away from the first center line of the corresponding first color sub-pixel 210 and the edge of the connecting segment away from the first center line are located on the same straight line extending along the second direction, and the edge of the first segment close to the first center line of the corresponding first color sub-pixel 201 is farther from the first center line than the distance between the edge of the connecting segment close to the first center line and the first center line. Similarly, the edge of the second segment away from the third center line of the corresponding third color sub-pixel and the edge of the connecting segment away from the third center line are located on the same straight line extending along the second direction, and the edge of the second segment close to the third center line of the corresponding third color sub-pixel is farther from the third center line than the distance between the edge of the connecting segment close to the third center line and the third center line.That is, the first segment and the connecting segments on both sides of the first segment form a first recessed portion recessed toward the first color sub-pixel, and the second segment and the connecting segments on both sides of the second segment form a second recessed portion recessed toward the third color sub-pixel. The arrangement of the first recessed portion and the second recessed portion can prevent the first effective light-emitting area from overlapping with the third effective light-emitting area and the second sub-power supply signal line, thereby reducing color deviation.

[0081] For example, a second sub-power signal line 420 including a break is provided between the third color sub-pixel 230 in the first repeating unit 201 and the first color sub-pixel 210 in the third repeating unit 203, that is, the second sub-signal line 4202. For example, the first sub-signal line 4201 and the second sub-signal line 4202 are alternately arranged along the first direction, and the number is substantially equal. For example, the second sub-signal line 4202 includes a plurality of signal line segments disconnected from each other, and each signal line segment can be electrically connected to the second power signal line through a via in the insulating layer between the second power signal line and the second sub-signal line.

[0082] For example, the second sub-power signal line 420 (signal line segment) between two adjacent breaks arranged along the second direction includes a third segment, a fourth segment, and a fifth segment sequentially connected along the second direction. Along the first direction, the width of the third segment can be approximately equal to the width of the fifth segment, and the width of the third segment and the width of the fifth segment are both greater than the width of the fourth segment. Thus, the third segment, the fourth segment, and the fifth segment form a third recessed portion that is recessed toward the first color sub-pixel 210 in the second repeating unit 202. The orthographic projection of the fourth segment on the substrate falls within the orthographic projection of the second power signal line on the substrate to prevent affecting the transmittance of the display substrate. The fourth segment of the second sub-power signal line is electrically connected to the first sub-power signal line.

[0083] Similarly, the second power signal line 500 also has the same features as the second sub-power signal line, which will not be described in detail here.

[0084] For example, the orthographic projection of the first effective light-emitting area 2100 of the first color sub-pixel 210 on the second sub-signal line 4202 does not overlap with the break 421, that is, the orthographic projection of the first effective light-emitting area 2100 of the first color sub-pixel 210 on the second sub-signal line 4202 is located within the signal line segment. For example, the orthographic projection of the third effective light-emitting area 2300 of the third color sub-pixel 230 on the second sub-signal line 4202 does not overlap with the break 421, that is, the orthographic projection of the third effective light-emitting area 2300 of the third color sub-pixel 230 on the second sub-signal line 4202 is located within the signal line segment.

[0085] For example, the width of the first section of the second sub power signal line 420 along the first direction may be 2.5-3.7 microns, and the width of the connecting section of the second sub power signal line 420 along the first direction may be 5.8-7 microns. For example, the distance between the connecting section of one of the two second sub power lines 420 located on both sides of the third color sub-pixel 230 and adjacent to it and the edges of the third section of the other second sub power lines 420 close to each other is approximately 23.4-26 microns.

[0086] For example, the width of each of the second sub-power signal line 420 and the second power signal line 500 in the first direction is approximately equal and substantially completely overlapped. For example, the positions of the two edges of the break are both located in the substantially completely overlapped area of ​​the second sub-power signal line 420 and the second power signal line 500. For example, the distance between the edges of two adjacent breaks arranged along the second direction (i.e., the length of a signal line segment) is greater than the size of a pixel circuit in the second direction. For example, the size of each break along the second direction is smaller than the size of a pixel circuit in the second direction. For example, the distance between the edges of two adjacent breaks arranged along the second direction (i.e., the length of a signal line segment) is approximately 69 to 75 microns. For example, the size of the pixel circuit along the second direction is approximately 63 to 65 microns. For example, the size of the break along the second direction is approximately 52 to 57 microns. For example, the ratio of the size of the break along the second direction to the size of a pixel circuit in the second direction is 0.8 to 0.9. For example, the ratio of the distance between the edges of two adjacent breaks arranged along the second direction (ie, the length of a signal line segment) to the size of a pixel circuit in the second direction is 1.1-1.2.

[0087] For example, Figure 1A-1B As shown, half D1 of the difference between the dimension D3 of the break 421 along the second direction and the sum D2 of the dimensions of the two second effective light-emitting areas 2200 and the interval S in the break 421 along the second direction may be 1.8 to 6.5 microns. For example, the ratio of the dimension D3 of the break 421 along the second direction to the sum D2 of the dimensions of the two second effective light-emitting areas 2200 and the interval S in the break 421 along the second direction may be 1.07 to 1.25.

[0088] For example, Figure 1A-Figure 2 As shown, a first flat layer 121 is disposed between the first power signal line 400 and the second electrode of each sub-pixel to play a flattening role. A second flat layer 122 and a passivation layer 123 are disposed between the first power signal line 400 and the second power signal line 500 to play a flattening role. The embodiment of the present disclosure is not limited to the second flat layer 122 and the passivation layer 123 being disposed between the first power signal line 400 and the second power signal line 500. It is also possible to only provide the second flat layer 122 without providing the passivation layer 123.

[0089] For example, Figure 1A-Figure 2 As shown, the two centers of the two orthographic projections of the two second effective light-emitting areas 2200 on the base substrate 100 are located within the orthographic projection of the second power signal line 500 on the base substrate 100. In the direction perpendicular to the base substrate 100, although the second effective light-emitting area 2200 overlaps with the second power signal line 500, the second power signal line 500 passes through the centers of the two second effective light-emitting areas, which can ensure that the second effective light-emitting area 2200 has good symmetry along the first direction to improve color deviation.

[0090] For example, Figure 1A and Figure 1B As shown, the distance between adjacent second sub-power signal lines 420 along the first direction is greater than the size of the first effective light-emitting area 2100 along the first direction, and the first effective light-emitting area 2100 is located between adjacent second sub-power signal lines 420. Similarly, the first effective light-emitting area 2100 is located between adjacent second power signal lines 500. In the embodiment of the present disclosure, the size of the first effective light-emitting area of ​​the first color sub-pixel is smaller than the distance between two adjacent second sub-power signal lines. By arranging the first effective light-emitting area between adjacent second sub-power signal lines, the first effective light-emitting area can be prevented from overlapping with the second sub-power signal line and the second power line, the flatness of the film layer in the first effective light-emitting area can be improved, and the symmetry of the first effective light-emitting area in the first direction can be improved, which is conducive to improving color deviation.

[0091] For example, Figure 1A and Figure 1B As shown, the distance between adjacent second sub-power signal lines 420 along the first direction is greater than the size of the third effective light-emitting area 2300 along the first direction, and the third effective light-emitting area 2300 is located between adjacent second sub-power signal lines 420. For example, the width of the second sub-power signal line 420 at the position corresponding to the third color sub-pixel 230 is reduced, so that the distance between the edges of the adjacent second sub-power signal lines 420 that are close to each other (corresponding to the two edges at the position of the third effective light-emitting area) along the first direction is greater than the size of the third effective light-emitting area 2300 along the first direction. Similarly, the third effective light-emitting area 2300 is located between adjacent second power signal lines 500. In the embodiment of the present disclosure, the size of the third effective light-emitting area of ​​the third color sub-pixel is smaller than the distance between two adjacent second sub-power signal lines. By arranging the third effective light-emitting area between adjacent second sub-power signal lines, the third effective light-emitting area can be prevented from overlapping with the second sub-power signal line and the second power line, the flatness of the film layer in the third effective light-emitting area can be improved, and the symmetry of the third effective light-emitting area in the first direction can be improved, which is conducive to improving color deviation.

[0092] For example, the orthographic projection of the second electrode of the third color sub-pixel 230 on the base substrate 100 does not substantially overlap with the second sub-power signal line 420. For example, the width of the second sub-power signal line 420 at the position corresponding to the third color sub-pixel 230 is reduced so that the distance along the first direction between the edges of the adjacent second sub-power signal lines 420 (corresponding to the two edges at the position of the second electrode of the third color sub-pixel) close to each other is greater than the size of the second electrode of the third color sub-pixel 230 along the first direction.

[0093] For example, Figure 1A and Figure 1B As shown, a second sub-power signal line 420 is arranged between the effective light-emitting areas of two adjacent sub-pixels arranged along the first direction, that is, a second sub-power signal line 420 is arranged between the first effective light-emitting area 2100 and the second effective light-emitting area 2200, a second sub-power signal line 420 is arranged between the second effective light-emitting area 2200 and the third effective light-emitting area 2300, and a second sub-power signal line 420 is arranged between the third effective light-emitting area 2300 and the first effective light-emitting area 2100.

[0094] For example, Figure 1A and Figure 1B As shown, the plurality of second sub power signal lines 420 are evenly distributed in the first direction, that is, the intervals between the plurality of second sub power signal lines 420 are substantially equal.

[0095] For example, Figure 1A and Figure 1BAs shown, in the first direction, the distance between the edges of the two second sub-power signal lines 420 located on both sides of the first effective light-emitting area 2100 and adjacent to the first effective light-emitting area 2100 is the first distance d1. Here, the distance between the edges of the first segment of the second sub-power signal line 420 located on one side of the first effective light-emitting area 2100 and the third segment of the second sub-power signal line 420 located on the other side of the first effective light-emitting area 2100 is taken as the first distance as an example. The distance between the two second sub-power signal lines 420 located on both sides of the second effective light-emitting area 2200 and adjacent to the second effective light-emitting area 2200 is the second distance d2. Here, the distance between the edges of the first segment of the second sub-power signal line 420 located on one side of the second effective light-emitting area 2200 and the second segment of the second sub-power signal line 420 located on the other side of the second effective light-emitting area 220 is taken as the second distance as an example. The distance between the two second sub-power signal lines 420 located on both sides of the third effective light-emitting area 2300 and adjacent to the third effective light-emitting area 2300 is the third distance d3. Here, the distance between the edges of the second segment of the second sub-power signal line 420 located on one side of the third effective light-emitting area 2300 and the third segment of the second sub-power signal line 420 located on the other side of the third effective light-emitting area 2300 is taken as an example as the third distance. The ratio of the first distance to the third distance is 0.9 to 1.1, for example, the first distance is substantially equal to the third distance, and the second distance is substantially twice the first distance. The second sub-power signal lines located on both sides of the effective light-emitting area and adjacent to the effective light-emitting area are along the first direction, and there is no other second sub-power signal line between the second sub-power signal line and the effective light-emitting area.

[0096] For example, Figure 1A and Figure 1B As shown, the ratio of the distances between the two second sub-power signal lines 420 located on both sides of the second color sub-pixel pair 220 and adjacent to the second color sub-pixel pair 220 and the second center line extending along the second direction of the second effective light-emitting area 2200 of the second color sub-pixel pair 220 is 0.9-1.1, for example, the distances between the two second sub-power signal lines 420 located on both sides of the second color sub-pixel pair 220 and adjacent to the second color sub-pixel pair 220 and the second center line extending along the second direction of the second effective light-emitting area 2200 of the second color sub-pixel pair 220 are substantially equal. Thus, the two second sub-power signal lines 420 located on both sides of the second effective light-emitting area 2200 and adjacent to the second effective light-emitting area 2200 are substantially symmetrically distributed relative to the second center line, thereby ensuring the symmetry of the second electrode of the second color sub-pixel pair in the first direction to improve color deviation.

[0097] For example, Figure 1A and Figure 1BAs shown, the ratio of the distances between the two second sub-power signal lines 420 located on both sides of the third color sub-pixel 230 and adjacent to the third color sub-pixel 230 and the third center line of the third effective light-emitting area 2300 of the third color sub-pixel 230 extending along the second direction is 0.9 to 1.1. For example, the distances between the two second sub-power signal lines 420 located on both sides of the third color sub-pixel 230 and adjacent to the third color sub-pixel 230 and the third center line of the third effective light-emitting area 2300 of the third color sub-pixel 230 extending along the second direction are approximately equal. Here, the distance between the second sub-power signal line 420 located on both sides of the third color sub-pixel 230 and the third center line may refer to the distance between the edge of the second sub-power signal line 420 close to the third center line and the third center line. The second sub-power signal line 420 located on one side of the third color sub-pixel 230 is narrower at the position corresponding to the third color sub-pixel 230, which is the second section of the second sub-power signal line 420. The second section forms a second recess with the connecting section so that the distance between the edges of the two second sub-power signal lines 420 located on both sides of the third color sub-pixel 230 and adjacent to the third color sub-pixel 230 and the third center line extending along the second direction of the third effective light-emitting area 2300 of the third color sub-pixel 230 is approximately equal. The two second sub-power signal lines 420 located on both sides of the third effective light-emitting area 2300 and adjacent to the third effective light-emitting area 2300 are approximately symmetrically distributed relative to the third center line, thereby ensuring the symmetry of the second electrode of the third color sub-pixel in the first direction, so as to improve color deviation.

[0098] For example, Figure 1A and Figure 1BAs shown, the distances between the two second sub-power signal lines 420 located on both sides of the first color sub-pixel 210 and adjacent to the first color sub-pixel 210 and the first center line extending along the second direction of the first effective light-emitting area 2100 of the first color sub-pixel 210 are not equal. That is, the two second sub-power signal lines 420 located on both sides of the first effective light-emitting area 2100 and adjacent to the first effective light-emitting area 2100 are not symmetrically distributed relative to the first center line. For example, the distance between the edge of the second sub-power signal line 420 located between the first effective light-emitting area 2100 and the second effective light-emitting area 2200 and the first center line is the fourth distance. Here, the distance between the edge of the first section of the second sub-power signal line 420 located between the first effective light-emitting area 2100 and the second effective light-emitting area 2200 in the first repeating unit 201 and the first center line is taken as an example. The distance between the second sub-power signal line 420 located between the first effective light-emitting area 2100 and the third effective light-emitting area 2300 and the first center line is the fifth distance, and the fifth distance is greater than the fourth distance. Here, the distance between the edge of the third section of the second sub-power signal line 420 located between the third effective light-emitting area 2300 in the first repeating unit 201 and the first effective light-emitting area 2100 in the second repeating unit 202 close to the first center line and the first center line is taken as an example.

[0099] For example, Figure 1A and Figure 1B As shown, the distance between the second effective light emitting area 2200 and the adjacent second sub power signal line 420 facing each other is greater than the distance between the first effective light emitting area 2100 and the adjacent second sub power signal line 420 facing each other.

[0100] For example, Figure 1A and Figure 1B As shown, the distances between the boundaries of the light-emitting areas of the sub-pixels of different colors (PDL gap) are substantially consistent, that is, in the sub-pixels arranged along the first direction, the ratio of the distance between the edges of the first effective light-emitting area 2100 and the second effective light-emitting area 2200 close to each other to the distance between the edges of the second effective light-emitting area 2200 and the third effective light-emitting area 2300 close to each other is, for example, 0.9 to 1.1. For example, the distance between the edges of the first effective light-emitting area 2100 and the second effective light-emitting area 2200 close to each other is substantially equal to the distance between the edges of the second effective light-emitting area 2200 and the third effective light-emitting area 2300 close to each other. Thus, the distance between the second sub-power signal line located between the first effective light-emitting area and the second effective light-emitting area and the first center line is smaller than the distance between the second sub-power signal line located between the first effective light-emitting area and the third effective light-emitting area and the first center line.

[0101] For example, Figure 1A and Figure 1B As shown, the display substrate further includes a plurality of pads 430 disposed in the same layer as the first power signal line 400, the pads 430 extending along the second direction, and the first effective light-emitting area 2100 is located between the pads 430 and the second sub-power signal line 420 that is closer to the first center line (in the second sub-power signal line 420 that is adjacent to the first effective light-emitting area 2100). For example, the distance between the edge of the pad 430 close to the first center line and the first center line of the first effective light-emitting area 2100 is the sixth distance, and the sixth distance is less than the fifth distance. In the embodiment of the present disclosure, by disposing the pads on one side of the first effective light-emitting area, it is beneficial to improve the symmetry of the second electrode of the first color sub-pixel in the first direction to improve the color shift.

[0102] For example, the ratio of the sixth distance to the fourth distance may be 0.9-1.1, so as to further improve the symmetry of the second electrode of the first color sub-pixel in the first direction.

[0103] For example, along a direction perpendicular to the base substrate, the spacer 430 does not overlap with the first effective light emitting area 2100 to prevent the display of the first color sub-pixel from being affected.

[0104] For example, along a direction perpendicular to the base substrate, the spacer 430 does not overlap with the second sub-power signal line 420 on a side of the first effective light-emitting area 2100 away from the spacer 430 .

[0105] For example, along a direction perpendicular to the base substrate, the spacer 430 does not overlap with the second electrode of the first color sub-pixel, or the overlapping area between the two is very small, which is beneficial to reducing color deviation.

[0106] For example, Figure 1A and Figure 1BAs shown, the pad 430 is located on the side of the second sub-power signal line 420 disposed between the first color sub-pixel 210 and the third color sub-pixel 230 close to the first color sub-pixel 410. The pad in the embodiment of the present disclosure can reduce the distance from the first center line to the film pattern where the first power signal line is located on the side of the first effective light-emitting area away from the second effective light-emitting area, which is beneficial to improve the symmetry of the second electrode of the first color sub-pixel in the first direction to improve the color deviation. For example, the pad 430 can be integrated with the first power signal line disposed on the side of the first effective light-emitting area away from the second effective light-emitting area, which is equivalent to widening the first power signal line in the first direction in the area where the first power signal line is close to the first color sub-pixel 210, so that the distance between the two side edges of the first effective light-emitting area of ​​the first color sub-pixel 210 and the film pattern where the first power signal line is located is equivalent to reduce the color deviation. For example, the part where the first pad 430 is connected to the middle of the first power signal line can be a solid structure. For example, the portion between the first pad 430 and the first power signal line can be set as a hollow structure, that is, a portion of the pattern is removed between the first pad 430 and the first power signal line to reduce the parasitic capacitance or transistor load of the portion of the pattern overlapping with the area, or to improve the transmittance. For example, the line width of the portion of the first pad 430 close to the first color sub-pixel is not greater than the line width of the portion of the first power signal line close to the first color sub-pixel.

[0107] For example, the length of the first effective light-emitting area of ​​the first color sub-pixel along the second direction is greater than its width along the first direction, and the length direction of the first effective light-emitting area is consistent with the extension direction of the second sub-power signal line, thus, a pad extending along the second direction is provided on one side of the first effective light-emitting area along the first direction. For example, the length of the third effective light-emitting area of ​​the third color sub-pixel along the second direction is greater than its width along the first direction, and the length-to-width ratio of the first effective light-emitting area is greater than the length-to-width ratio of the third effective light-emitting area. Thus, the first effective light-emitting area may have a large difference in distance between its first center line and two second sub-power signal lines located on both sides of the first effective light-emitting area and adjacent to each other. By providing the above-mentioned pad on one side of the first effective light-emitting area, the color deviation can be reduced.

[0108] For example, Figure 1A and Figure 1B As shown, in the first direction, the center line of the first effective light-emitting area 2100 is approximately equal to the pads 430 and the second sub-power signal line 420 located on both sides of the first effective light-emitting area 2100. That is, the pads 430 and the second sub-power signal line located on both sides of the first center line are approximately equal to the distance from the first center line, so that the symmetry of the second electrode of the first color sub-pixel in the first direction can be further improved, which is conducive to improving color deviation.

[0109] For example, Figure 1A and Figure 1B As shown, the pad 430 is electrically connected to the first power signal line 400 to prevent the pad from being in a floating state, thereby affecting the normal operation of the organic light emitting element.

[0110] For example, Figure 1A and Figure 1B As shown, along the direction perpendicular to the base substrate 100, the pad 430 overlaps with the first sub-power signal line 410 and is electrically connected to each other, and the first sub-power signal line 410 provides an electrical signal to the pad 430. For example, the first sub-power signal line 410 can be integrally formed with the pad 430 to save process.

[0111] For example, the shape of the spacer block 430 is substantially a long strip, and the center of the orthographic projection of the spacer block 430 on the base substrate 100 is located within the orthographic projection of the first sub-power signal line 410 on the base substrate 100 .

[0112] For example, Figure 1A and Figure 1B As shown, the size of the pad 430 along the second direction is greater than its size along the first direction. Along the second direction, the size of the pad 430 is smaller than the size of the first effective light-emitting area 2100. When the display substrate in the embodiment of the present disclosure is used for under-screen fingerprint detection, the size of the pad along the second direction is designed to be smaller than the size of the first effective light-emitting area. For example, the pad is not overlapped with the light-transmitting area (described later) as much as possible, which is beneficial to improve the light transmittance of the display substrate.

[0113] For example, Figure 1A and Figure 1B As shown, the display substrate further includes a connection portion 440 disposed in the same layer as the pad 430. There is a gap between the pad 430 and the second sub-signal line 4202, and the connection portion 440 is located between the second sub-power signal line 420 (i.e., the second sub-signal line 4202) and the pad 430, and the pad 430 is connected to the second sub-power signal line 420 through the connection portion 440.

[0114] For example, the size of the connection portion 440 along the second direction may be 36-40 micrometers, for example, 38 micrometers. For example, along the second direction, the size of the connection portion 440 is smaller than the size of the first effective light emitting area 2100 and the third effective light emitting area 2300.

[0115] For example, the orthographic projection of the connection portion 440 on the straight line extending along the second direction may be located within the orthographic projection of the third effective light emitting area 2300 on the straight line.

[0116] For example, the orthographic projections of the cushion block 430 and the connecting portion 440 on the straight line extending along the second direction are both located within the orthographic projection of the third effective light emitting area 2300 on the straight line.

[0117] For example, the size of the spacer 430 in the second direction is smaller than the size of the third effective light emitting area 2300 in the second direction.

[0118] For example, the distance between the second sub power signal line 420 and the edges of the spacer 430 that are close to each other and are located between the connection portion 440 and the third color sub-pixel 230 may be 11-13 micrometers, for example, 12 micrometers.

[0119] For example, the connection portion 440 , the spacer 430 , and the second sub-power signal line 420 form a ring structure.

[0120] For example, Figure 1A and Figure 1B As shown, the connection part 440 includes two sub-connection parts, and the two ends of the pad 430 are electrically connected to the second sub-power signal line 420 through the two sub-connection parts. The connection part, the pad and the second sub-power signal line connected to the connection part provided in the embodiment of the present disclosure form a ring loop, which is beneficial to the uniformity of the first color sub-pixel.

[0121] For example, the size of each sub-connection portion along the second direction may be 2.5-3.5 micrometers, for example, 3 micrometers. The distance between the edges of two sub-connection portions close to each other may be 32 micrometers.

[0122] For example, the connecting portion 440 , the pad 430 , and the second sub-power signal line 420 are integrally provided to save process steps.

[0123] For example, the pad 430 is connected to the second sub-signal line 4202 through the connection portion 440 , and the orthographic projection of the pad 430 on another second sub-signal line 4202 adjacent to the second sub-signal line 4202 connected to the pad 430 is located within the break 421 of the other second sub-signal line 4202 .

[0124] For example, when the display substrate in the embodiment of the present disclosure is applied to under-screen fingerprint detection, the connecting portion and the transparent area (described later) do not overlap, which can ensure that the transmittance of the display substrate is not affected.

[0125] For example, Figure 3A For along Figure 1A and Figure 1B The schematic diagram of the local cross-sectional structure cut by BB' is shown in FIG. Figure 3B For along Figure 1B The schematic diagram of the local cross-section structure cut by CC' is shown in FIG. Figure 1A-Figure 3BAs shown, in the direction perpendicular to the base substrate 100, the first effective light-emitting area 2100 does not overlap with the second sub-power signal line 420 and the second power signal line 500, thereby ensuring that the first effective light-emitting area has good symmetry along the first direction to improve color deviation. Similarly, in the direction perpendicular to the base substrate 100, the third effective light-emitting area 2300 does not overlap with the second sub-power signal line 420 and the second power signal line 500, thereby ensuring that the third effective light-emitting area has good symmetry along the first direction.

[0126] For example, Figure 1A-Figure 3B As shown, the first center line of the first effective light-emitting area 2100 overlaps with the data line Vd (described later), thereby ensuring that the first effective light-emitting area has good symmetry along the first direction. For example, the data line Vd runs through the first effective light-emitting area 2100 along the second direction, so that the first effective light-emitting area 2100 has a certain uniformity along the second direction. The "running through" in the embodiment of the present disclosure refers to the positional relationship between the data line, the first power signal line and the effective light-emitting area on the plane.

[0127] For example, Figure 1A and Figure 1B As shown, the shapes of the first effective light-emitting area 2100 of the first color sub-pixel 210 and the third effective light-emitting area 2300 of the third color sub-pixel 230 both include a hexagon or an ellipse. For example, the shapes of the first effective light-emitting area 2100 and the third effective light-emitting area 2300 are both hexagonal, and the three groups of opposite sides in the hexagon are all parallel, and the hexagon also includes a side parallel to the second direction. The hexagon includes a symmetry axis extending along the first direction and a symmetry axis extending along the second direction.

[0128] Although Figure 1A The shapes of the first effective light-emitting area and the third effective light-emitting area shown include an angle strictly formed by two line segments, but in some embodiments, the shapes of the first effective light-emitting area and the third effective light-emitting area may both be rounded shapes, such as ellipses. That is, on the basis of the above hexagon, the corners of the first effective light-emitting area and the third effective light-emitting area are rounded. For example, when forming an opening of the pixel defining layer, the corners of the opening may form a rounded shape, so that the shapes of the first effective light-emitting area and the third effective light-emitting area may be rounded shapes.

[0129] For example, Figure 1A-Figure 3BAs shown, the center of the orthographic projection of the first effective light-emitting area 2100 on the base substrate 100 is located within the orthographic projection of the first sub-power signal line 410 on the base substrate 100. For example, the orthographic projection of the first sub-power signal line 410 on the base substrate 100 passes through the center of the orthographic projection of the first effective light-emitting area 2100 on the base substrate 100. That is, in a plan view, the first effective light-emitting area 2100 is symmetrically distributed relative to the first sub-power signal line 410, that is, the first sub-power signal line 410 coincides with the symmetry axis of the first effective light-emitting area 2100 extending along the first direction, which can ensure that the first effective light-emitting area 2100 has good symmetry along the second direction to improve color shift.

[0130] For example, Figure 1A-Figure 3B As shown, the center of the orthographic projection of the third effective light-emitting area 2300 on the substrate 100 is located within the orthographic projection of the first sub-power signal line 410 on the substrate 100. For example, the orthographic projection of the first sub-power signal line 410 on the substrate 100 passes through the center of the orthographic projection of the third effective light-emitting area 2300 on the substrate 100. That is, in a plan view, the third effective light-emitting area 2300 is roughly symmetrically distributed relative to the first sub-power signal line 410, that is, the symmetry axis of the third effective light-emitting area 2300 extending along the first direction falls within the first sub-power signal line 410, which can ensure that the third effective light-emitting area 2300 has good symmetry along the second direction to improve color shift.

[0131] For example, Figure 4 Schematic diagram of a pixel circuit connected to an organic light-emitting element included in each sub-pixel. Figure 4 As shown, each sub-pixel further includes a pixel circuit 0221 for driving the organic light emitting element to emit light, and the pixel circuit 0221 may include a driving circuit 0222, a first light emitting control circuit 0223, a second light emitting control circuit 0224, a data writing circuit 0226, a storage circuit 0227, a threshold compensation circuit 0228, and a reset circuit 0229. The driving circuit 0222 includes a control terminal, a first terminal, and a second terminal, and is configured to provide a driving current to the organic light emitting element 0220 to drive the organic light emitting element 0220 to emit light.

[0132] For example, the first light emitting control circuit 0223 is electrically connected to the first voltage terminal VDD and the first terminal of the driving circuit 0222, and is configured to realize the connection between the driving circuit 0222 and the first voltage terminal VDD is turned on or off; the second light emitting control circuit 0224 is electrically connected to the second terminal of the driving circuit 0222 and the first electrode of the organic light emitting element 0220, and is configured to realize the connection between the driving circuit 0222 and the organic light emitting element 0220 is turned on or off. The data writing circuit 0226 is electrically connected to the first terminal of the driving circuit 0222, and is configured to write the data signal into the storage circuit 0227 under the control of the scanning signal. The storage circuit 0227 is electrically connected to the control terminal of the driving circuit 0222 and the first voltage terminal VDD, and is configured to store the data signal. The threshold compensation circuit 0228 is electrically connected to the control terminal and the second terminal of the driving circuit 0222, and is configured to perform threshold compensation on the driving circuit 0222. The reset circuit 0229 is electrically connected to the control end of the driving circuit 0222 and the first electrode of the organic light emitting element 0220 , and is configured to reset the control end of the driving circuit 0222 and the first electrode of the organic light emitting element 0220 under the control of a reset control signal.

[0133] For example, Figure 4 As shown, the driving circuit 0222 includes a driving transistor T1, the control end of the driving circuit 0222 includes a gate of the driving transistor T1, the first end of the driving circuit 0222 includes a first electrode of the driving transistor T1, and the second end of the driving circuit 0222 includes a second electrode of the driving transistor T1. The data writing circuit 0226 includes a data writing transistor T2, the storage circuit 0227 includes a capacitor C, the threshold compensation circuit 0228 includes a threshold compensation transistor T3, the first light emission control circuit 0223 includes a first light emission control transistor T4, the second light emission control circuit 0224 includes a second light emission control transistor T5, the reset circuit 0229 includes a first reset transistor T6 and a second reset transistor T7, and the reset control signal may include a first sub-reset control signal and a second sub-reset control signal.

[0134] For example, Figure 4As shown, the first electrode of the data writing transistor T2 is electrically connected to the first electrode of the driving transistor T1, the second electrode of the data writing transistor T2 is configured to be electrically connected to the data line Vd to receive the data signal, and the gate of the data writing transistor T2 is configured to be electrically connected to the first scanning signal line Ga1 to receive the scanning signal; the first electrode of the capacitor C is electrically connected to the first power supply terminal VDD, and the second electrode of the capacitor C is electrically connected to the gate of the driving transistor T1; the first electrode of the threshold compensation transistor T3 is electrically connected to the second electrode of the driving transistor T1, the second electrode of the threshold compensation transistor T3 is electrically connected to the gate of the driving transistor T1, and the gate of the threshold compensation transistor T3 is configured to be electrically connected to the second scanning signal line Ga2 to receive the compensation control signal; the first electrode of the first reset transistor T6 is configured to be electrically connected to the first reset power supply terminal Vinit1 to receive the first reset signal, the second electrode of the first reset transistor T6 is electrically connected to the gate of the driving transistor T1, and the gate of the first reset transistor T6 is configured to be electrically connected to the first reset control signal line Rst1 to receive the first sub-reset control signal; the second reset transistor T6 is electrically connected to the gate of the driving transistor T1, and the gate of the first reset transistor T6 is configured to be electrically connected to the first reset control signal line Rst1 to receive the first sub-reset control signal; The first electrode of the second reset transistor T7 is configured to be electrically connected to the second reset power supply terminal Vinit2 to receive the second reset signal, the second electrode of the second reset transistor T7 is electrically connected to the first electrode of the organic light emitting element 0220, and the gate of the second reset transistor T7 is configured to be electrically connected to the second reset control signal line Rst2 to receive the second sub-reset control signal; the first electrode of the first light emitting control transistor T4 is electrically connected to the first power supply terminal VDD, the second electrode of the first light emitting control transistor T4 is electrically connected to the first electrode of the driving transistor T1, and the gate of the first light emitting control transistor T4 is configured to be electrically connected to the first light emitting control signal line EM1 to receive the first light emitting control signal; the first electrode of the second light emitting control transistor T5 is electrically connected to the second electrode of the driving transistor T1, the second electrode of the second light emitting control transistor T5 is electrically connected to the second electrode of the organic light emitting element 0220, and the gate of the second light emitting control transistor T5 is configured to be electrically connected to the second light emitting control signal line EM2 to receive the second light emitting control signal; the first electrode of the organic light emitting element 0220 is electrically connected to the second power supply terminal VSS.

[0135] For example, one of the first power supply terminal VDD and the second power supply terminal VSS is a high voltage terminal, and the other is a low voltage terminal. Figure 4 In the illustrated embodiment, the first power supply terminal VDD is a voltage source to output a constant first voltage, the first voltage being a positive voltage, and the second power supply terminal VSS is a voltage source to output a constant second voltage, the second voltage being a negative voltage, etc. For example, in some examples, the second power supply terminal VSS may be grounded.

[0136] For example, Figure 4As shown, the scanning signal and the compensation control signal can be the same, that is, the gate of the data writing transistor T2 and the gate of the threshold compensation transistor T3 can be electrically connected to the same signal line, such as the first scanning signal line Ga1, to receive the same signal (for example, scanning signal). In this case, the display substrate may not be provided with the second scanning signal line Ga2 to reduce the number of signal lines. For another example, the gate of the data writing transistor T2 and the gate of the threshold compensation transistor T3 can also be electrically connected to different signal lines, that is, the gate of the data writing transistor T2 is electrically connected to the first scanning signal line Ga1, and the gate of the threshold compensation transistor T3 is electrically connected to the second scanning signal line Ga2, and the signals transmitted by the first scanning signal line Ga1 and the second scanning signal line Ga2 are the same.

[0137] It should be noted that the scanning signal and the compensation control signal may also be different, so that the gate of the data writing transistor T2 and the threshold compensation transistor T3 can be controlled separately and independently, thereby increasing the flexibility of controlling the pixel circuit.

[0138] For example, Figure 4 As shown, the first light-emitting control signal and the second light-emitting control signal may be the same, that is, the gate of the first light-emitting control transistor T4 and the gate of the second light-emitting control transistor T5 may be electrically connected to the same signal line, such as the first light-emitting control signal line EM1, to receive the same signal (for example, the first light-emitting control signal). In this case, the display substrate may not be provided with the second light-emitting control signal line EM2, thereby reducing the number of signal lines. For another example, the gate of the first light-emitting control transistor T4 and the gate of the second light-emitting control transistor T5 may also be electrically connected to different signal lines, respectively, that is, the gate of the first light-emitting control transistor T4 is electrically connected to the first light-emitting control signal line EM1, and the gate of the second light-emitting control transistor T5 is electrically connected to the second light-emitting control signal line EM2, and the signals transmitted by the first light-emitting control signal line EM1 and the second light-emitting control signal line EM2 are the same.

[0139] It should be noted that when the first light-emitting control transistor T4 and the second light-emitting control transistor T5 are transistors of different types, for example, the first light-emitting control transistor T4 is a P-type transistor and the second light-emitting control transistor T5 is an N-type transistor, the first light-emitting control signal and the second light-emitting control signal may also be different, and the embodiments of the present disclosure are not limited to this.

[0140] For example, the first sub-reset control signal and the second sub-reset control signal may be the same, that is, the gate of the first reset transistor T6 and the gate of the second reset transistor T7 may be electrically connected to the same signal line, such as the first reset control signal line Rst1, to receive the same signal (for example, the first sub-reset control signal). In this case, the display substrate may not be provided with the second reset control signal line Rst2 to reduce the number of signal lines. For another example, the gate of the first reset transistor T6 and the gate of the second reset transistor T7 may also be electrically connected to different signal lines, that is, the gate of the first reset transistor T6 is electrically connected to the first reset control signal line Rst1, and the gate of the second reset transistor T7 is electrically connected to the second reset control signal line Rst2, and the signals transmitted by the first reset control signal line Rst1 and the second reset control signal line Rst2 are the same. It should be noted that the first sub-reset control signal and the second sub-reset control signal may also be different.

[0141] For example, in some examples, the second sub-reset control signal may be the same as the scan signal, that is, the gate of the second reset transistor T7 may be electrically connected to the scan signal line Ga to receive the scan signal as the second sub-reset control signal.

[0142] For example, the source of the first reset transistor T6 and the source of the second reset transistor T7 are connected to the first reset power supply terminal Vinit1 and the second reset power supply terminal Vinit2 respectively, and the first reset power supply terminal Vinit1 and the second reset power supply terminal Vinit2 can be DC reference voltage terminals to output a constant DC reference voltage. The first reset power supply terminal Vinit1 and the second reset power supply terminal Vinit2 can be the same, for example, the source of the first reset transistor T6 and the source of the second reset transistor T7 are connected to the same reset power supply terminal. The first reset power supply terminal Vinit1 and the second reset power supply terminal Vinit2 can be high voltage terminals or low voltage terminals, as long as they can provide the first reset signal and the second reset signal to reset the gate of the driving transistor T1 and the first electrode of the light emitting element 0220, and the present disclosure does not limit this. For example, the gate of the first reset transistor T6 and the source of the second reset transistor T7 can both be connected to the reset power supply signal line Init.

[0143] It should be noted that Figure 4 The driving circuit 0222, data writing circuit 0226, storage circuit 0227, threshold compensation circuit 0228 and reset circuit 0229 in the pixel circuit shown are only for illustration. The specific structures of the driving circuit 0222, data writing circuit 0226, storage circuit 0227, threshold compensation circuit 0228 and reset circuit 0229 can be set according to actual application requirements, and the embodiments of the present disclosure do not specifically limit this.

[0144] For example, according to the characteristics of transistors, transistors can be divided into N-type transistors and P-type transistors. For the sake of clarity, the embodiments of the present disclosure take the transistor as a P-type transistor (for example, a P-type MOS transistor) as an example to elaborate on the technical solution of the present disclosure. That is to say, in the description of the present disclosure, the driving transistor T1, the data writing transistor T2, the threshold compensation transistor T3, the first light emission control transistor T4, the second light emission control transistor T5, the first reset transistor T6, and the second reset transistor T7 can all be P-type transistors. However, the transistors of the embodiments of the present disclosure are not limited to P-type transistors. Those skilled in the art can also use N-type transistors (for example, N-type MOS transistors) according to actual needs to implement the functions of one or more transistors in the embodiments of the present disclosure.

[0145] It should be noted that the transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other switching devices with the same characteristics, and the thin film transistors may include oxide semiconductor thin film transistors, amorphous silicon thin film transistors or polycrystalline silicon thin film transistors, etc. The source and drain of the transistor may be symmetrical in structure, so the source and drain may be indistinguishable in physical structure. In the embodiments of the present disclosure, in order to distinguish transistors, except for the gate as the control electrode, one of the electrodes is directly described as the first electrode and the other electrode is directly described as the second electrode, so the first electrode and the second electrode of all or part of the transistors in the embodiments of the present disclosure can be interchangeable as needed.

[0146] It should be noted that, in the embodiment of the present disclosure, the pixel circuit of the sub-pixel can be Figure 4 In addition to the 7T1C structure (ie, seven transistors and one capacitor) shown, a structure including other numbers of transistors may also be used, such as a 7T2C structure, a 6T1C structure, a 6T2C structure, or a 9T2C structure, which is not limited in the embodiments of the present disclosure.

[0147] Figure 5-Figure 11 A schematic diagram of a pixel circuit and stacking of signal lines provided in some embodiments of the present disclosure. Figure 5-Figure 11 Describe the positional relationship between each circuit in the pixel circuit and each signal line on the backplane, Figure 5-Figure 11 The example shown takes four adjacent pixel circuits 0221 included in four sub-pixels as an example, and illustrates the positions of the transistors in the pixel circuit included in one sub-pixel, and the positions of the components included in the pixel circuits in other sub-pixels are roughly the same as the positions of the transistors included in the sub-pixel. Figure 5 As shown, the pixel circuit 0221 of the sub-pixel includes Figure 4The driving transistor T1, the data writing transistor T2, the threshold compensation transistor T3, the first light emission control transistor T4, the second light emission control transistor T5, the first reset transistor T6 and the second reset transistor T7, and the capacitor C are shown.

[0148] For example, Figure 5 The active semiconductor layer 310 of the pixel circuit in the display substrate is shown. The active semiconductor layer 310 can be formed by patterning a semiconductor material. The active semiconductor layer 310 can be used to make the active layer of the above-mentioned driving transistor T1, the data writing transistor T2, the threshold compensation transistor T3, the first light emission control transistor T4, the second light emission control transistor T5, the first reset transistor T6 and the second reset transistor T7. The active semiconductor layer 310 includes an active layer pattern (channel region) and a doping region pattern (source-drain doping region) of each transistor of each sub-pixel, and the active layer pattern and the doping region pattern of each transistor in the same pixel circuit are integrally arranged.

[0149] It should be noted that the active layer may include an integrally formed low-temperature polysilicon layer, and the source region and the drain region may be conductively connected by doping, etc. to achieve electrical connection of various structures. That is, the active semiconductor layer of each transistor of each sub-pixel is an overall pattern formed of p-silicon, and each transistor in the same pixel circuit includes a doping region pattern (i.e., a source region and a drain region) and an active layer pattern, and the active layers of different transistors are separated by doping structures.

[0150] For example, the active semiconductor layer 310 may be made of amorphous silicon, polycrystalline silicon, oxide semiconductor materials, etc. It should be noted that the above-mentioned source region and drain region may be regions doped with n-type impurities or p-type impurities.

[0151] For example, the active semiconductor layers in the pixel circuits of sub-pixels of different colors arranged along the first direction have no connection and are disconnected from each other. The active semiconductor layers in the pixel circuits of sub-pixels arranged along the second direction can be integrated or disconnected from each other.

[0152] Figure 5-Figure 11Also shown are scan signal lines Ga (including a first scan signal line Ga1 and a second scan signal line Ga2) electrically connected to the pixel circuit 0121 of each color sub-pixel, reset control signal lines Rst (including a first reset control signal line Rst1 and a second reset control signal line Rst2), reset power signal lines Init (including a first reset power signal line Init1 of a first reset power terminal Vinit1 and a second reset power signal line Init2 of a second reset power terminal Vinit2), light emission control signal lines EM (including a first light emission control signal line EM1 and a second light emission control signal line EM2), data lines Vd, and first power signal lines 400 and second power signal lines 500. The first power signal lines 400 and the second power signal lines 500 are electrically connected to each other.

[0153] It should be noted that in Figures 5 to 11 In the example shown, the first scanning signal line Ga1 and the second scanning signal line Ga2 are the same signal line Ga, the first reset power signal line Init1 and the second reset power signal line Init2 are the same signal line Init, the first reset control signal line Rst1 and the second reset control signal line Rst2 are the same signal line Rst, and the first light-emitting control signal line EM1 and the second light-emitting control signal line EM2 are the same signal line EM, but are not limited to this.

[0154] For example, the gate metal layer of the pixel circuit may include a first conductive layer and a second conductive layer. A gate insulating layer ( Figure 2 The gate insulating layer 160 shown in FIG. 1 is used to insulate the active semiconductor layer 310 from a gate metal layer formed subsequently. Figure 6 The display substrate includes a first conductive layer 320, which is disposed on the gate insulating layer to be insulated from the active semiconductor layer 310. The first conductive layer 320 may include a second electrode CC2 of the capacitor C, a scanning signal line Ga, a reset control signal line Rst, a light emitting control signal line EM, and gates of a driving transistor T1, a data writing transistor T2, a threshold compensation transistor T3, a first light emitting control transistor T4, a second light emitting control transistor T5, a first reset transistor T6, and a second reset transistor T7.

[0155] For example, Figure 6As shown, the gate of the data writing transistor T2 may be the portion where the scanning signal line Ga overlaps with the active semiconductor layer 310; the gate of the first light emission control transistor T4 may be the first portion where the light emission control signal line EM overlaps with the active semiconductor layer 310, and the gate of the second light emission control transistor T5 may be the second portion where the light emission control signal line EM overlaps with the active semiconductor layer 310; the gate of the first reset transistor T6 may be the first portion where the reset control signal line Rst overlaps with the active semiconductor layer 310, and the gate of the second reset transistor T7 may be the second portion where the reset control signal line Rst overlaps with the active semiconductor layer 310; the threshold compensation transistor T3 may be a thin film transistor with a dual-gate structure, the first gate of the threshold compensation transistor T3 may be the portion where the scanning signal line Ga overlaps with the active semiconductor layer 310, and the second gate of the threshold compensation transistor T3 may be the portion where the protruding structure P protruding from the scanning signal line Ga overlaps with the active semiconductor layer 310. Figure 4 and 6 As shown, the gate of the driving transistor T1 may be the second electrode CC2 of the capacitor C.

[0156] It should be noted that Figure 5 and Figure 6 The dashed rectangular boxes in the figure show the overlapping parts of the first conductive layer 320 and the active semiconductor layer 310. As the channel region of each transistor, the active semiconductor layers on both sides of each channel region are conductively connected as the first electrode and the second electrode of each transistor through ion doping and other processes.

[0157] For example, Figure 6 As shown, the scanning signal line Ga, the reset control signal line Rst and the light emission control signal line EM are arranged along the second direction (direction Z). The scanning signal line Ga is located between the reset control signal line Rst and the light emission control signal line EM.

[0158] For example, in the second direction, the second electrode CC2 of the capacitor C (i.e., the gate of the driving transistor T1) is located between the scanning signal line Ga and the emission control signal line EM. The protruding structure P protruding from the scanning signal line Ga is located on the side of the scanning signal line Ga away from the emission control signal line EM.

[0159] For example, Figure 6 As shown, in the second direction, the gate of the data writing transistor T2, the gate of the threshold compensation transistor T3 and the gate of the first reset transistor T6 are all located on the first side of the gate of the driving transistor T1, and the gate of the first light emission control transistor T4, the gate of the second light emission control transistor T5 and the gate of the second reset transistor T7 are all located on the second side of the gate of the driving transistor T1. For example, Figure 6In the example shown, the first side and the second side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel are two sides of the gate of the driving transistor T1 that are opposite to each other in the second direction. Figure 6 As shown, in the XZ plane, the first side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel may be the upper side of the gate of the driving transistor T1, and the second side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel may be the lower side of the gate of the driving transistor T1. The lower side, for example, the side of the display substrate used for binding the IC is the lower side of the display substrate, and the lower side of the gate of the driving transistor T1 is the side of the gate of the driving transistor T1 that is closer to the IC. The upper side is the opposite side of the lower side, for example, the side of the gate of the driving transistor T1 that is farther away from the IC.

[0160] For example, in some embodiments, Figure 6 As shown, in the first direction (X direction), the gate of the data writing transistor T2 and the gate of the first light emission control transistor T4 are both located on the third side of the gate of the driving transistor T1, and the first gate of the threshold compensation transistor T3, the gate of the second light emission control transistor T5 and the gate of the second reset transistor T7 are all located on the fourth side of the gate of the driving transistor T1. For example, Figure 6 In the example shown, the third side and the fourth side of the gate of the driving transistor T1 of the pixel circuit of the sub-pixel are two sides of the gate of the driving transistor T1 that are opposite to each other in the first direction X. For example, the third side of the gate of the driving transistor T1 of the pixel circuit may be the left side of the gate of the driving transistor T1 of the pixel circuit, and the fourth side of the gate of the driving transistor T1 of the pixel circuit may be the right side of the gate of the driving transistor T1 of the pixel circuit. The left side and the right side, for example, in the data line Vd and the second power signal line 500 connected to the same pixel circuit, the data line Vd is on the left side of the second power signal line 500, and the second power signal line 500 is on the right side of the data line Vd.

[0161] It should be noted that the structure of each pixel circuit can be Figure 6 The mirror structure shown, that is, each layer structure of each pixel circuit is based on the channel region of the driving transistor T1, and the structures on the left and right sides are flipped, so the relationship between the left and right sides mentioned above can be opposite.

[0162] For example, a first insulating layer (such as Figure 2 The first insulating layer 150 shown in the figure is used to insulate the first conductive layer 320 from the second conductive layer 330 formed subsequently. Figure 7The second conductive layer 330 of the pixel circuit is shown, and the second conductive layer 330 includes a first electrode CC1 of the capacitor C, a reset power signal line Init, and a light shielding portion S. The first electrode CC1 of the capacitor C at least partially overlaps with the second electrode CC2 of the capacitor C to form the capacitor C.

[0163] For example, Figure 7 As shown, the active semiconductor layer between the two channels of the dual-gate threshold compensation transistor T3 is in a floating state when the threshold compensation transistor T3 is turned off, and is susceptible to the influence of the surrounding line voltage and jumps, thereby affecting the leakage current of the threshold compensation transistor T3, and further affecting the luminous brightness. In order to keep the voltage of the active semiconductor layer between the two channels of the threshold compensation transistor T3 stable, the light shielding portion S is designed to form a capacitor with the active semiconductor layer between the two channels of the threshold compensation transistor T3, and the light shielding portion S can be connected to the second power supply signal line to obtain a constant voltage, so that the voltage of the active semiconductor layer in the floating state can be kept stable. The light shielding portion S overlaps with the active semiconductor layer between the two channels of the dual-gate threshold compensation transistor T3, and can also prevent the active semiconductor layer between the two gates from being illuminated and changing its characteristics, such as preventing the voltage of this part of the active semiconductor layer from changing, so as to prevent crosstalk.

[0164] For example, a second insulating layer (such as Figure 2 The second insulating layer 140 shown in the figure is used to insulate the second conductive layer 330 from the subsequently formed source and drain metal layer 340. Figure 8 It is shown that a via hole in the second insulating layer is formed on the second conductive layer 330. Fig. 9 FIG. 3 shows the source and drain metal layer 340 of the pixel circuit. Figure 8 and Fig. 9 As shown, the source-drain metal layer 340 includes a data line Vd and a second power signal line 500. The data line Vd and the second power signal line 500 are both extended along the Z direction.

[0165] For example, the source-drain metal layer 340 further includes a first connection portion 341 , a second connection portion 342 , and a third connection portion 343 . Figure 8 and Fig. 9 Exemplary positions of a plurality of vias are shown, and the source-drain metal layer 340 is connected to the active semiconductor layer 310 , the first conductive layer 320 , and the second conductive layer 330 through the plurality of vias shown.

[0166] For example, Figure 8 and Fig. 9As shown, the data line Vd is electrically connected to the second electrode of the data writing transistor T2 through the via hole 381 penetrating the gate insulating layer, the first insulating layer and the second insulating layer. The second power signal line 500 is electrically connected to the first electrode of the first light emission control transistor T4 through the via hole 382 penetrating the gate insulating layer 160, the first insulating layer 150 and the second insulating layer 140. The second power signal line 500 and the data line Vd are alternately arranged along the first direction. The second power signal line 500 is electrically connected to the first electrode CC1 of the capacitor C through the via hole 3832 penetrating the second insulating layer 140. The second power signal line 500 is electrically connected to the light shielding portion S through the via hole 3833 penetrating the second insulating layer to provide a constant voltage to the light shielding portion S. One end of the first connection portion 341 is electrically connected to the second electrode of the threshold compensation transistor T3 through a via hole 384 penetrating through the gate insulation layer 160, the first insulation layer 150, and the second insulation layer 140, and the other end of the first connection portion 341 is electrically connected to the gate of the driving transistor T1 (i.e., the second electrode CC2 of the capacitor C) through a via hole 385 penetrating through the first insulation layer 150 and the second insulation layer 140. One end of the second connection portion 342 is electrically connected to the reset power signal line Init through a via hole 386 penetrating through the second insulation layer 140, and the other end of the second connection portion 342 is electrically connected to the first electrode of the second reset transistor T7 through a via hole 387 penetrating through the gate insulation layer 160, the first insulation layer 150, and the second insulation layer 140. The third connection portion 343 is electrically connected to the second electrode of the second light emission control transistor T5 through a via hole 352 penetrating through the gate insulation layer 160, the first insulation layer 150, and the second insulation layer 140.

[0167] For example, a passivation layer 123 and a second planarization layer 122 (such as Figure 2-3B As shown) is used to protect the above-mentioned source and drain metal layer 340. Fig.10 As shown, the passivation layer 123 and the second planar layer 122 include a via hole 351 and a via hole 354 .

[0168] The embodiment of the present disclosure is not limited to the passivation layer 123 and the second planarization layer 122 formed on the source-drain metal layer 340 . Figure 3C In another example of the present disclosure, Figure 1B The cross-sectional view taken along the BB' line shown in FIG. Figure 3C As shown, only the second planarization layer 122 may be formed on the source-drain metal layer 340 without forming the passivation layer 123 .

[0169] For example, Fig.11 The third conductive layer 350 of the pixel circuit is shown. The third conductive layer 350 includes a fourth connecting portion 450 and first power signal lines 400 that are cross-distributed along the X direction and the Y direction. Fig.11The exemplary positions of the plurality of vias 351 and 354 are also shown, and the third conductive layer 350 is connected to the source-drain metal layer 340 through the plurality of vias 351 and 354 shown. A first planar layer 121 is provided on a side of the third conductive layer 350 away from the base substrate 100, and the second electrode of the organic light-emitting element of each sub-pixel can be provided on a side of the first planar layer 121 away from the base substrate 100, and the second electrode of the organic light-emitting diode is electrically connected to the fourth connecting portion 450 through a via 1210 provided in the first planar layer 121, so as to realize electrical connection with the second electrode of the second light-emitting control transistor T5.

[0170] For example, Figure 1A-1B as well as Fig.11 As shown, the third conductive layer 350 includes a plurality of fourth connection portions 450, and a row of fourth connection portions 450 is disposed between two adjacent second sub-power signal lines 420. For example, a pixel circuit of each sub-pixel includes a fourth connection portion 450, and the plurality of fourth connection portions 450 included in the plurality of sub-pixels are arranged in an array along the first direction and the second direction. For example, the plurality of fourth connection portions 450 are arranged at equal intervals along the first direction, and the plurality of fourth connection portions 450 are also arranged at equal intervals along the second direction.

[0171] For example, along the direction perpendicular to the base substrate 100, each effective light-emitting area does not overlap with the fourth connection portion 450. For example, the center line of the orthographic projection of the third effective light-emitting area 2300 on the base substrate 100 passes through the orthographic projection of a column of fourth connection portions 450 on the base substrate 100. For example, the straight line extending along the second direction where the pad 430 is located passes through a column of fourth connection portions 450. For example, the distance between the edges of two adjacent fourth connection portions 450 arranged along the first direction that are close to each other is greater than the size of the second effective light-emitting area 2200 along the first direction. For example, the distance between the edges of two adjacent fourth connection portions 450 arranged along the second direction that are close to each other is greater than the size of each effective light-emitting area along the second direction. For example, the distance between the edges of two adjacent fourth connection portions 450 arranged along the second direction that are close to each other is less than the size of the break 421 along the second direction.

[0172] For example, a first planar layer 121 ( Figure 2 As shown), the second electrode is connected to the fourth connection portion 450 through a via hole provided in the first planar layer to achieve connection with the second electrode of the second light emitting control transistor T5.

[0173] Fig.12 For Fig.11 A schematic plan view of an organic light emitting element in which each pixel circuit structure corresponds to another pixel circuit structure. Fig.13 is a schematic diagram of the planar shape of the second electrode of each sub-pixel.

[0174] For example, Figure 1B and Fig.12 As shown, along a direction perpendicular to the base substrate 100 , the first effective light emitting area 2100 overlaps with the data line Vd connected to the second electrode of the data writing transistor T2 of the first color sub-pixel 210 .

[0175] For example, Figure 1B and Fig.12 As shown, along the direction perpendicular to the base substrate 100, the second effective light-emitting area 2201 overlaps with the second power signal line 500 connected to the first electrode of the first light-emitting control transistor T4 of the second color sub-pixel 220, the second connection portion 342 of the second color sub-pixel 220, and the data line Vd connected to the second electrode of the data writing transistor T2 of the second color sub-pixel 220, and the second center line overlaps with the second power signal line 500, and the second connection portion 342 and the data line Vd are located on both sides of the second center line; along the direction perpendicular to the base substrate 100, the second effective light-emitting area 2202 overlaps with the data line Vd, the second power signal line 500, and the first connection portion 341, and the second center line overlaps with the second power signal line 500, and the first connection portion 341 and the data line Vd are located on both sides of the second center line.

[0176] For example, Figure 1B and Fig.12 As shown, along the direction perpendicular to the base substrate 100, the third effective light-emitting area 2300 overlaps with the data line Vd connected to the second electrode of the data writing transistor T2 of the adjacent second color sub-pixel 220, the first connection portion 341 and the second connection portion 342 of the third color sub-pixel 230, and the data line Vd is located on one side of the third center line, and the first connection portion 341 and the second connection portion 342 are located on the other side of the third center line.

[0177] For example, Fig.12 As shown, along the direction perpendicular to the base substrate 100, the portion of the second connection portion 342 electrically connected to the first electrode of the second reset transistor T7 through the via 387 overlaps with the break. For example, along the direction perpendicular to the base substrate 100, the portion of the light shielding portion S extending along the Z direction overlaps with the break, and the via 3833 overlaps with the break. For example, along the direction perpendicular to the base substrate 100, the portion of the first electrode CC1 of the capacitor C connected to the second power signal line through the via 3832 overlaps with the break.

[0178] For example, Figure 5-Figure 13As shown, the second electrode 212 of the first color sub-pixel 210 includes a first main electrode 2121 and a first connection electrode 2122. The first main electrode 2121 and the first connection electrode 2122 may be an integral structure, and the first connection electrode 2122 is connected to the fourth connection portion 450 through a via 1210 to achieve connection with the second electrode of the second light emitting control transistor T5 of the first color sub-pixel 210.

[0179] For example, the second electrode 222 of each second color sub-pixel in the second color sub-pixel pair 220 includes a second main electrode 2221 and a second connection electrode 2222. The second electrode of the first sub-pixel in the second color sub-pixel pair 220 includes a second main portion 2221-1 and a second connection portion 2222-1, and the second electrode of the second sub-pixel in the second color sub-pixel pair 220 includes a second main portion 2221-2 and a second connection portion 2222-2. For example, the second main electrode 2221 and the second connection electrode 2222 of each second color sub-pixel may be an integral structure, and the second connection electrode 2222 of the second color sub-pixel is connected to the fourth connection portion 450 through the via 1210 to achieve connection with the second electrode of the second light emitting control transistor T5 of the second color sub-pixel.

[0180] For example, the second electrode 232 of the third color sub-pixel 230 includes a third main electrode 2321 and a third connection electrode 2322. For example, the third main electrode 2321 and the third connection electrode 2322 may be an integral structure, and the third connection electrode 2322 is connected to the fourth connection portion 450 through the via 1210 to achieve connection with the second electrode of the second light emission control transistor T5 of the third color sub-pixel 130.

[0181] For example, the first connecting electrode 2122 of the first color sub-pixel 210 is located on a side of the first main electrode 2121 close to the second color sub-pixel pair 220, the second connecting electrode 2222 of the second color sub-pixel pair 220 is located on a side of the second main electrode 2221 away from the first color sub-pixel 210, and the third center line of the third effective light-emitting area 2300 of the third color sub-pixel 230 passes through the third main electrode 2321 and the third connecting electrode 2322.

[0182] For example, Figure 1A , Figure 1B , Fig.12 as well as Fig.13As shown, the shape of the main electrode of each sub-pixel is substantially the same as the shape of the light-emitting area, and the area of ​​the main electrode of each sub-pixel is larger than the area of ​​the effective light-emitting area. For example, the geometric center of the main electrode of each sub-pixel is substantially coincident with the geometric center of the effective light-emitting area. For example, the shape of the first main electrode 2121 of the first color sub-pixel 210 and the third main electrode 2321 of the third color sub-pixel 230 is substantially hexagonal or elliptical, and the shape of the second main electrode 2221 of each second color sub-pixel in the second color sub-pixel pair 220 is substantially pentagonal, circular or teardrop-shaped.

[0183] For example, Fig.14 The diagram is a schematic plan view of the second electrode of each sub-pixel in a display substrate. Fig.14 The display substrate shown in FIG. 1- Fig.13 The display substrate shown differs in that Fig.14 The shape of the connecting electrode of the second electrode of the organic light emitting element shown in FIG. 1 is different from that of the embodiment of the present disclosure. Fig.13 The shape of the connecting electrode of the second electrode of the organic light emitting element is shown. Fig.14 As shown, the second electrode of the organic light-emitting element of the first color sub-pixel includes a main electrode 11 whose shape and the shape of its light-emitting area 1 are both hexagonal; the second electrode of the organic light-emitting element of the third color sub-pixel includes a main electrode 31 whose shape and the shape of its light-emitting area 3 are both hexagonal; the second electrode of the organic light-emitting element of the second color sub-pixel includes a main electrode 21 whose shape and the shape of its light-emitting area 2 are both pentagonal. The second electrode of a second color sub-pixel includes a main electrode 21-1 and a connecting electrode 22-1, and the second electrode of another second color sub-pixel includes a main electrode 21-2 and a connecting electrode 22-2. The main electrode and the connecting electrode in the second electrode of each sub-pixel can be an integrated structure, in which case the boundary between the main electrode and the connecting electrode is Fig.14 The dotted line in the figure shows the boundary. Fig.14 It can be seen that the shape of the main electrode of each sub-pixel can be a regular polygon, and the shape of the connecting electrode can be an irregular shape.

[0184] exist Fig.14 When the display substrate shown is applied to fingerprint detection, optical under-screen fingerprint detection technology can be used. Optical under-screen fingerprint detection technology relies on light reflection to detect the fingerprint circuit, and compares the obtained fingerprint image with the image in the database to achieve the purpose of detecting the fingerprint. Optical under-screen fingerprint detection technology is particularly widely used in organic light-emitting diode display devices.

[0185] Optical under-screen fingerprint detection technology usually uses light emitted by the display substrate as the light source. The fingerprint sensor is usually arranged on the non-display side of the display substrate. For example, it can be located on the side of the organic light-emitting element close to the base substrate to realize the under-screen fingerprint detection function.

[0186] For example, the light emitted by each sub-pixel can be used for display and as light for fingerprint detection under the screen, and a top film layer can be provided on the side of the sub-pixel away from the substrate to place the finger; the fingerprint sensor for collecting the fingerprint image can be provided on the same side of the display substrate as each sub-pixel, and the fingerprint sensor is provided on the side of the organic light-emitting element of each sub-pixel close to the substrate, for detecting the reflected light reflected from the fingerprint on the surface of the top film layer. The fingerprint sensor may include a plurality of detection units arranged in an array. In order to realize the fingerprint detection function under the screen, at least part of the film layers such as the top film and the substrate are transparent, and a transparent area is provided between adjacent sub-pixels (the transparent area is the transparent area of ​​the display substrate) so that the reflected light of the fingerprint on the surface of the top film can be incident on the fingerprint sensor to obtain the fingerprint image. Since the anode (second electrode) of the organic light-emitting element of each sub-pixel is formed of an opaque material, the light-shielding area of ​​the anode of each sub-pixel will affect the light transmittance, and thus affect the sensitivity of fingerprint detection.

[0187] like Fig.14 As shown, in the first color sub-pixel, the area ratio of the effective light-emitting area 1 to the second electrode is approximately 52.85%; in the second color sub-pixel, the area ratio of the effective light-emitting area 2 to the second electrode is approximately 42.31%; in the third color sub-pixel, the area ratio of the effective light-emitting area 3 to the second electrode is approximately 66.99%. The area ratio of the second electrode of the first color sub-pixel, the two second electrodes in the second color sub-pixel pair, and the second electrode in the third color sub-pixel is 1:1.58:1.16.

[0188] While ensuring that the area of ​​the light-emitting area of ​​each sub-pixel remains unchanged, the shading area can be reduced by changing the area where the second electrode is located outside the effective light-emitting area, such as the shape of the connecting electrode, thereby increasing the area of ​​the transparent area of ​​the display substrate and improving the sensitivity of fingerprint detection.

[0189] When the effective light-emitting area of ​​each sub-pixel remains unchanged, compared with Fig.14 The shape of the second electrode of each sub-pixel in the display substrate is shown. The display substrate provided by the embodiment of the present disclosure can reduce the light blocking area of ​​the second electrode and improve the light transmittance of the display substrate by reducing the area of ​​each sub-pixel located outside the effective light-emitting area, such as the area of ​​the connecting electrode.

[0190] For example, Figure 1A , Figure 12-13As shown, in the first color sub-pixel 210, the area ratio of the first effective light-emitting area 2100 to the second electrode 212 is 53% to 55%, in the second color sub-pixel pair 220, the area ratio of the two second effective light-emitting areas 2200 to the two second electrodes 222 is 43.5% to 48%, and in the third color sub-pixel 230, the area ratio of the third effective light-emitting area 2300 to the second electrode 232 is 67.5% to 69%. The first color sub-pixel, the second color sub-pixel, and the third color sub-pixel in the disclosed embodiment can be Fig.14 The first color sub-pixel, the second color sub-pixel, and the third color sub-pixel in the display have a one-to-one correspondence. For example, in the first color sub-pixel 210, the area ratio of the first effective light-emitting area 2100 to the second electrode 212 is 54.9%, in the second color sub-pixel pair 220, the area ratio of the two second effective light-emitting areas 2200 to the two second electrodes 222 is 47%, and in the third color sub-pixel 230, the area ratio of the third effective light-emitting area 2300 to the second electrode 232 is 68.3%, thereby increasing the overall transmittance of the display substrate by approximately 0.23%. Compared to Fig.14 The display substrate shown in the figure, the embodiment of the present disclosure can improve the overall transmittance of the display substrate by increasing the area ratio of the effective light-emitting area of ​​each sub-pixel to the second electrode, thereby improving the sensitivity of fingerprint detection.

[0191] For example, the area ratio of the first effective light-emitting area 2100, the two second effective light-emitting areas 2200 in the second color sub-pixel pair 220, and the third effective light-emitting area 2300 is approximately 1:1.27:1.47; the area ratio of the second electrode 212 of the first color sub-pixel 210, the two second electrodes 222 in the second color sub-pixel pair 220, and the second electrode 232 in the third color sub-pixel 230 is approximately 1:1.48:1.18.

[0192] For example, Figure 1A-Figure 13As shown, in each sub-pixel, at least one notch is provided at the portion where the connection electrode is connected to the main electrode, and along the direction perpendicular to the base substrate 100, the area of ​​the display substrate corresponding to at least a portion of the notch is a transparent area. The transparent area 10 here includes an area where the pixel circuit 0221, the first power signal line 400, the second power signal line 500, the data line Vd, the scanning signal line Ga, the reset power signal line Init, the reset control signal line Rst and the light control signal line EM are not provided. That is, the transparent area 10 refers to an area where light can be incident on the fingerprint sensor from the light-transmitting area on the base substrate 100 that is not covered by the light-shielding film layer, and the light-shielding film layer includes the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, the third conductive layer 350, and the film layer where the second electrode of each sub-pixel is located. For example, in the region corresponding to at least a portion of the notch, no projection of the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350 falls within the region. For example, in the region corresponding to at least a portion of the notch, no projection of the via, the connection portion, or the pad falls within the region. For example, in the region corresponding to at least a portion of the notch, one or more insulating layers are provided, such as one or more of the gate insulating layer 160, the first insulating layer 150, the second insulating layer 140, the passivation layer 123, the first flat layer 121, and the second flat layer 122, and the transmittance of the one or more insulating layers is greater than any one of the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350. For example, in the region corresponding to at least a portion of the notch, one or more insulating layers are provided, such as one or more layers of the gate insulating layer 160, the first insulating layer 150, the second insulating layer 140, the passivation layer 123, the first flat layer 121, and the second flat layer 122, and the multiple insulating layers are sequentially formed on the display substrate, and in the transparent region, the multiple insulating layers are closely adjacent to each other, that is, from the direction away from the display substrate, the second insulating layer is in direct contact with the first insulating layer, and the third insulating layer is in direct contact with the second insulating layer. For example, the one or more insulating layers may be organic layers or inorganic layers. For example, in an area corresponding to at least a portion of the recess, a transparent area is set, in which a gate insulating layer is formed on the surface of the substrate, a first insulating layer is located on the surface of the gate insulating layer away from the substrate, a second insulating layer is located on the surface of the first insulating layer away from the substrate, a passivation layer is located on the surface of the second insulating layer away from the substrate, a second flat layer is located on the surface of the passivation layer away from the substrate, a first flat layer is located on the surface of the second flat layer away from the substrate, and a second electrode, such as an anode, is a recess at this position, that is, the first flat layer is on the surface away from the substrate and is in direct contact with a pixel defining layer formed after the second electrode.For example, a transparent area is set in an area corresponding to at least a portion of the notch, in which a gate insulating layer is formed on the surface of the substrate, a first insulating layer is located on the surface of the gate insulating layer away from the substrate, a second insulating layer is located on the surface of the first insulating layer away from the substrate, a second flat layer is located on the surface of the second insulating layer away from the substrate, a first flat layer is located on the surface of the second flat layer away from the substrate, and a second electrode, such as an anode, is notched at this position, that is, the first flat layer is directly in contact with a pixel defining layer formed after the second electrode on the surface away from the substrate. For example, such as. Figure 12-13 As shown, in the first color sub-pixel 210, the connection portion between the first connection electrode 2122 and the first main electrode 2121 is provided with a first notch 2123, and the display substrate is a transparent region 10 in an area corresponding to at least a portion of the first notch 2123. That is, the first notch 2123 does not overlap with the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350, and the area of ​​the first notch 2123 that does not overlap with the above-mentioned film layers forms a transparent region of the display substrate. Figure 13-14 As shown, the first notch 2123 is the first connection electrode 2122 in the embodiment of the present disclosure relative to Fig.14 The inwardly recessed portion of the connecting electrode 12 shown in the figure overlaps with the light shielding film layers such as the active semiconductor layer 310, the first conductive layer 320, and the source-drain metal layer 340, and the other portion of the recess overlaps only with the base substrate 100 and the multiple transparent insulating layers. That is, the selection of the position of the first recess needs to consider its positional relationship with the light-transmitting area exposed by the light-shielding film layer except the film layer where the second electrode is located, and at least part of the first recess and the light-transmitting area together form a transparent area of ​​the display substrate.

[0193] For example, Fig.14 The side of the connecting electrode 12 shown in the figure that is connected to the main electrode 11 is roughly a straight side. Fig.13 The first notch 2123 shown is a notch formed by bending the straight edge toward the side close to the first main electrode 2121. Fig.14 In the display substrate shown in the figure, the embodiment of the present disclosure can improve the light transmittance of the display substrate and further improve the sensitivity of fingerprint detection by setting a notch at the place where the first connecting electrode and the transparent area are opposite.

[0194] For example, Figure 12-13As shown, along the direction perpendicular to the substrate 100, the light emitting control signal line EM of the pixel circuit of the first color sub-pixel 210, the second power signal line 500, the active semiconductor layer 310 including the channel region and the source-drain doping region of each transistor of each sub-pixel, and the area 101 surrounded by the first electrode CC1 of the storage capacitor C overlap with the first notch 2123 of the second electrode 212 of the first color sub-pixel 210. Fig.14 The connecting electrode 12 described above, in the embodiment of the present disclosure, by providing a first notch 2123 at a position of the first connecting electrode 2122 corresponding to the region 101 , the light transmittance of the display substrate can be increased.

[0195] For example, Figure 12-13 As shown, in the first color sub-pixel 210, the first connection electrode 2122 is connected to the fourth connection portion 450 through the first connection via 1211, and the first notch 2123 is located on the side of the first connection via 1211 away from the second color sub-pixel 220 located in the same repeating unit as the first color sub-pixel 210. The degree of depression of the first notch 2123 depends on the distance between the edge of the first connection electrode 2122 and the first connection via 1211. The first notch 2123 needs to avoid the first connection via 1211 to prevent affecting the electrical connection between the first connection electrode 2122 and the fourth connection portion 450. For example, the first notch 2123 is a notch formed by the edge of the first connection electrode 2122 facing the first connection via 1211 and away from the second color sub-pixel 220, and the edge of the notch extends to the edge of the first main electrode 2121.

[0196] For example, Fig.14 As shown, the width of the portion of the connecting electrode 12 close to the main electrode 11 along the X direction is wider, that is, the width of the portion between the connecting via connected to the connecting electrode 12 and the main electrode 11 along the X direction is wider, thereby Fig.14 The connecting electrode 12 is formed Fig.13 After the first notch 2123 is formed, it can be ensured that the first connection electrode 2122 can still maintain a reliable connection with the fourth connection portion 450 through the first connection via 1211 .

[0197] For example, Figure 12-13As shown, in the second electrode 222-1 of the first sub-pixel of the second color sub-pixel pair 220, the connecting portion of the first connection electrode 2222-1 and the first main electrode 2221-1 is provided with a second notch 2223-1, and the display substrate is transparent in an area corresponding to at least a portion of the second notch 2223-1. That is, the portion of the second notch 2223-1 does not overlap with the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350, and the area of ​​the second notch 2223-1 that does not overlap with the above-mentioned film layers forms a transparent area of ​​the display substrate. Figure 13-14 As shown, the second notch 2223-1 is the second connection electrode 2222-1 relative to the embodiment of the present disclosure. Fig.14 The recessed portion of the connecting electrode 22-1 shown in the figure, a part of the recessed portion overlaps with the light-shielding film layers such as the active semiconductor layer 310, the first conductive layer 320 and the source-drain metal layer 340, and another part of the recessed portion only overlaps with the base substrate 100 and the multiple transparent insulating layers. That is, the selection of the position of the second recess needs to consider its positional relationship with the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located, and at least a part of the second recess and the above-mentioned light-transmitting area together form a transparent area of ​​the display substrate.

[0198] For example, Fig.14 The side of the connecting electrode 22-1 shown in the figure that is connected to the main electrode 21-1 is substantially a straight side. Fig.13 The second notch 2223-1 shown is a notch formed by bending the straight edge toward the side close to the second main electrode 2221-1. Fig.14 In the display substrate shown in the figure, the embodiment of the present disclosure can improve the light transmittance of the display substrate and further improve the sensitivity of fingerprint detection by setting a notch at the place where the second connecting electrode is opposite to the transparent area.

[0199] For example, Figure 12-13 As shown, along the direction perpendicular to the base substrate 100, a partial area 102 near the light emitting control signal line EM in the area surrounded by the light emitting control signal line EM of the pixel circuit of the first sub-pixel of the second color sub-pixel pair 220, the second power signal line 500, and the first electrode CC1 of the storage capacitor C overlaps with the second notch 2223-1 of the second electrode 222-1 of the first sub-pixel. Fig.14 Regarding the connecting electrode 22 - 1 , in the embodiment of the present disclosure, by providing a second notch 2223 - 1 at a position of the second connecting electrode 2222 - 1 corresponding to the region 102 , the light transmittance of the display substrate can be increased.

[0200] For example, Figure 12-13As shown, in the second electrode 222-2 of the second sub-pixel of the second color sub-pixel pair 220, the connection portion between the second connection electrode 2222-2 and the second main electrode 2221-2 is provided with a third notch 2223-2, and the display substrate is a transparent region in the region corresponding to at least a portion of the third notch 2223-2. That is, the portion of the third notch 2223-2 does not overlap with the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350, and the region of the third notch 2223-2 that does not overlap with the above-mentioned film layers forms a transparent region of the display substrate. Figure 13-14 As shown, the third notch 2223-2 is the second connection electrode 2222-2 relative to the embodiment of the present disclosure. Fig.14 The recessed portion of the connecting electrode 22-2 shown in the figure, a part of the recessed portion overlaps with the light-shielding film layers such as the active semiconductor layer 310, the first conductive layer 320 and the source-drain metal layer 340, and another part of the recessed portion only overlaps with the base substrate 100 and the multiple transparent insulating layers. That is, the selection of the position of the third recess needs to consider its positional relationship with the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located, and at least a part of the third recess and the above-mentioned light-transmitting area together form a transparent area of ​​the display substrate.

[0201] For example, Fig.14 The side of the connecting electrode 22-2 shown as being connected to the main electrode 21-2 is substantially a straight side. Fig.13 The second notch 2223-2 shown is a notch formed by bending the straight edge toward a side away from the first color sub-pixel. Fig.14 In the display substrate shown in the figure, the embodiment of the present disclosure can improve the light transmittance of the display substrate and further improve the sensitivity of fingerprint detection by setting a notch at the place where the second connecting electrode is opposite to the transparent area.

[0202] For example, Figure 12-13 As shown, in the second sub-pixel of the second color sub-pixel pair 220, the second connecting electrode 2222-2 includes a first portion 2-1 extending along the second direction and a bent second portion 2-2, the first portion 2-1 is located on a side of the second portion 2-2 away from the second main electrode 2221-2, the second portion 2-2 is connected to the main electrode 2221-2, and the maximum dimension of the first portion 2-1 along the first direction is greater than the maximum dimension of the second portion 2-2 along the first direction.

[0203] For example, Figure 12-13As shown, along a direction perpendicular to the substrate 100, a partial area 103 close to the second power signal line 500 and the light-emitting control signal line EM in an area surrounded by the third connection portion 343 and connected to the pixel circuit of the second sub-pixel overlaps with the third recess 2223-2 of the second electrode 222-2 of the second sub-pixel.

[0204] Relative to Fig.14 As shown in the connecting electrode 22 - 2 , in the embodiment of the present disclosure, a third notch 2223 - 2 is provided at a position of the second connecting electrode 2222 - 2 corresponding to the region 103 , thereby increasing the light transmittance of the display substrate.

[0205] Fig.14 The first portion 22-21 of the connecting electrode 22-2 shown in the figure is substantially the same in shape and size as the first portion 2-1 of the second connecting electrode 222-2 described in the embodiment of the present disclosure. Fig.14 The connecting electrode 22-2 shown in the figure includes a second portion 22-22 whose size along the first direction is larger than that of the first portion 22-21 along the first direction, and the second portion 22-22 covers a portion of the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located. Therefore, by reducing the area of ​​the portion where the second portion 22-22 overlaps with the above-mentioned light-transmitting area, for example, by removing the portion close to the first effective light-emitting area of ​​the first color sub-pixel and covering the above-mentioned light-transmitting area to form a third recess 2223-2, the light transmittance of the display substrate can be improved.

[0206] For example, Fig.14 The second part 22-22 of the connecting electrode 22-2 shown is connected to both the first side of the main electrode 21-2 close to the first color sub-pixel and the second side away from the first color sub-pixel, while the second part 2-2 of the second connecting electrode 2222-2 in the embodiment of the present disclosure is only connected to the second side of the second main electrode 2221-2 away from the first color sub-pixel, so that the light-transmitting area near the first side of the second main electrode is not covered by the second connecting electrode.

[0207] For example, Figure 12-13 As shown, in the second sub-pixel, the second connection electrode 2222-2 does not overlap with the source-drain doping region of the first light emission control transistor T4. Fig.14 The second portion 22-22 of the connecting electrode 22-2 shown in the figure is close to the first effective light emitting area 1 of the first color sub-pixel and covers the source and drain doping areas of the first light emitting control transistor T4. Fig.14The second part 22-22 of the connecting electrode 22-2 shown near the first color sub-pixel is removed, so that the second part 2-2 of the second connecting electrode 2222-2 does not overlap with the source-drain doping region of the first light-emitting control transistor T4, thereby making the second part 2-2 not overlap with the light-transmitting area near the source-drain doping region of the first light-emitting control transistor T4, thereby improving the light transmittance of the display substrate.

[0208] For example, Figure 12-13 As shown, in the second color sub-pixel 220, the first connection electrode 2222-1 is connected to the fourth connection portion 450 through the second connection via 1212-1, and the second notch 2223-1 is located on the side of the second connection via 1212-1 close to the first color sub-pixel 210 located in the same repeating unit as the second color sub-pixel 220, and the degree of depression of the second notch 2223-1 depends on the distance between the edge of the first connection electrode 2222-1 and the second connection via 1212-1, and the second notch 2223-1 needs to avoid the second connection via 1212-1 to prevent affecting the electrical connection between the first connection electrode 2222-1 and the fourth connection portion 450. For example, the second notch 2223-1 is a notch formed by the edge of the first connection electrode 2222-1 facing the second connection via 1212-1, which is close to the first color sub-pixel 210, and the edge of the notch extends to the edge of the first main electrode 2221-1.

[0209] For example, Fig.14 As shown, the width of the portion of the connecting electrode 22-1 close to the main electrode 21-1 along the X direction is wider, that is, the width of the portion between the connecting via connected to the connecting electrode 22-1 and the main electrode 21-1 along the X direction is wider, thereby Fig.14 The connecting electrode 22-1 is formed Fig.13 After the second notch 2223 - 1 is formed, it can be ensured that the first connection electrode 2222 - 1 can still maintain a reliable connection with the fourth connection portion 450 through the second connection via 1212 - 1.

[0210] For example, Figure 12-13As shown, in the second color sub-pixel 220, the first connection electrode 2222-2 is connected to the fourth connection portion 450 through the third connection via 1212-2, and the third notch 2223-2 is located at the side of the third connection via 1212-2 close to the first color sub-pixel 210 located in the same repeating unit as the second color sub-pixel 220, and the degree of depression of the third notch 2223-2 depends on the distance between the edge of the first connection electrode 2222-2 and the third connection via 1212-2, and the third notch 2223-2 needs to avoid the third connection via 1212-2 to prevent affecting the electrical connection between the first connection electrode 2222-2 and the fourth connection portion 450. For example, the third notch 2223-2 is a notch formed by the edge of the first connection electrode 2222-2 facing the third connection via 1212-2 close to the first color sub-pixel 210, and the edge of the notch extends to the edge of the first main electrode 2221-2.

[0211] For example, Fig.14 As shown, the width of the portion of the connecting electrode 22-2 close to the main electrode 21-2 along the X direction is wider, that is, the width of the portion between the connecting via connected to the connecting electrode 22-2 and the main electrode 21-2 along the X direction is wider, thereby Fig.14 The connecting electrode 22-2 is formed Fig.13 After the third notch 2223 - 2 is formed, it can be ensured that the first connection electrode 2222 - 2 can still maintain a reliable connection with the fourth connection portion 450 through the third connection via 1212 - 2.

[0212] For example, Figure 12-13 As shown, in the second electrode 232 of the third color sub-pixel pair 230, the connecting portion of the third connection electrode 2322 and the third main electrode 2321 is provided with a fourth notch 2323, and the display substrate is a transparent region 10 in an area corresponding to at least a portion of the fourth notch 2323. That is, the portion of the fourth notch 2323 does not overlap with the active semiconductor layer 310, the first conductive layer 320, the second conductive layer 330, the source-drain metal layer 340, and the third conductive layer 350, and the area of ​​the fourth notch 2323 that does not overlap with the above-mentioned film layers forms a transparent region of the display substrate. Figure 13-14 As shown, the fourth notch 2323 is the second connection electrode 232 relative to the embodiment of the present disclosure. Fig.14The recessed portion of the connecting electrode 2322 shown in the figure, a part of the recessed portion overlaps with the light-shielding film layers such as the active semiconductor layer 310, the first conductive layer 320 and the source-drain metal layer 340, and another part of the recessed portion only overlaps with the base substrate 100 and the multiple transparent insulating layers. That is, the selection of the position of the fourth recess needs to consider its positional relationship with the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located, and at least a part of the fourth recess and the above-mentioned light-transmitting area together form a transparent area of ​​the display substrate.

[0213] For example, Fig.14 The side of the connecting electrode 32 shown in the figure connected to the main electrode 31 is roughly a straight side. Fig.13 The fourth notch 2323 shown is a notch formed by bending the straight edge toward the side close to the third main electrode 2321. Fig.14 The display substrate shown in the embodiment of the present disclosure can improve the light transmittance of the display substrate and thus improve the sensitivity of fingerprint detection by setting a recess at the place where the second connecting electrode is opposite to the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located.

[0214] For example, Figure 12-13 As shown, along the direction perpendicular to the base substrate 100, the data line Vd of the pixel circuit of the second sub-pixel of the second color pixel pair, the active semiconductor layer 310, and the partial area 104 of the film layer where the first electrode CC1 of the storage capacitor C is located, away from the light-emitting control signal line EM, overlaps with the fourth notch 2323 of the second electrode 2322 of the third color sub-pixel 230. Fig.14 As shown in the connecting electrode 32 , in the embodiment of the present disclosure, a fourth recess 2323 is provided in a portion of the third connecting electrode 2322 corresponding to the region 104 , thereby increasing light transmittance of the display substrate.

[0215] Fig.14 The portion of the connecting electrode 32 shown near the first color sub-pixel overlaps with the light-transmitting area exposed by the light-shielding film layer other than the film layer where the second electrode is located. The embodiment of the present disclosure forms a fourth recess 2323 by partially removing the portion of the third connecting electrode 2322 near the first color sub-pixel and covering the above-mentioned light-transmitting area, thereby improving the light transmittance of the display substrate.

[0216] For example, Figure 12-13As shown, in the third color sub-pixel 230, the first connection electrode 2322 is connected to the fourth connection portion 450 through the fourth connection via 1213, and the fourth recess 2323 is located on the side of the fourth connection via 1213 close to the first color sub-pixel 210 adjacent to the third color sub-pixel 230. The degree of depression of the fourth recess 2323 depends on the distance between the edge of the first connection electrode 2322 and the fourth connection via 1213. The fourth recess 2323 needs to avoid the fourth connection via 1213 to prevent affecting the electrical connection between the first connection electrode 2223 and the fourth connection portion 450. For example, the fourth recess 2323 is a recess formed by the edge of the first connection electrode 2223 facing the fourth connection via 1213, which is close to the first color sub-pixel 210, and the edge of the recess extends to the edge of the first main electrode 2321.

[0217] For example, Fig.14 As shown, the width of the portion of the connecting electrode 32 close to the main electrode 31 along the X direction is wider, that is, the width of the portion between the connecting via connected to the connecting electrode 32 and the main electrode 31 along the X direction is wider, thereby Fig.14 The connecting electrode 32 is formed Fig.13 After the fourth notch 2323 is formed, it can be ensured that the first connection electrode 2223 can still maintain a reliable connection with the fourth connection portion 450 through the fourth connection via 1213 .

[0218] Another embodiment of the present disclosure provides a display device, comprising any of the above display substrates. The display device comprising the above display substrate can avoid the occurrence of color shift as much as possible.

[0219] The display device provided by the embodiment of the present disclosure can apply fingerprint detection technology, and the display substrate included in the display device has high fingerprint detection sensitivity.

[0220] There are a few points to note:

[0221] (1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures can refer to the general design.

[0222] (2) In the absence of conflict, features in the same embodiment or in different embodiments of the present disclosure may be combined with each other.

[0223] The above description is merely an exemplary embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure. The protection scope of the present disclosure is determined by the appended claims.

Claims

1. A display substrate, comprising: substrate substrate; A first power signal line, located on the base substrate, the first power signal line includes a plurality of first sub-power signal lines extending along a first direction and a plurality of second sub-power signal lines extending along a second direction, the first sub-power signal lines are connected to the second sub-power signal lines; a pixel defining layer, located on a side of the first power signal line away from the base substrate, the pixel defining layer comprising a plurality of openings to define effective light-emitting areas of a plurality of sub-pixels, the plurality of sub-pixels comprising sub-pixels of multiple colors, wherein the plurality of first sub-power signal lines and the plurality of second sub-power signal lines include a first sub-power signal line and a second sub-power signal line adjacent to a specific color sub-pixel among the plurality of color sub-pixels; The first sub-power signal line adjacent to the specific color sub-pixel corresponds to a first straight line extending along the first direction, and at least a portion of an orthographic projection of the first straight line on the substrate falls within the orthographic projection of the first sub-power signal line on the substrate; the second sub-power signal line adjacent to the specific color sub-pixel corresponds to a second straight line extending along the second direction, and at least a portion of an orthographic projection of the second straight line on the substrate falls within the projection of the second sub-power signal line on the substrate; In a plan view, a straight line corresponding to one of the first sub-power signal line and the second sub-power signal line passes through the center of an effective light-emitting area of ​​the specific color sub-pixel, and the other of the first sub-power signal line and the second sub-power signal line bypasses the effective light-emitting area of ​​the specific color sub-pixel, and the specific color sub-pixel includes at least one color sub-pixel.

2. The display substrate according to claim 1, wherein: The specific color sub-pixel includes at least one of a blue sub-pixel, a green sub-pixel, and a red sub-pixel.

3. The display substrate according to claim 1, wherein: The specific color sub-pixels include a blue sub-pixel, a green sub-pixel, and a red sub-pixel.

4. The display substrate according to claim 1, wherein: The length of a portion of the orthographic projection of the first straight line on the substrate that falls within the orthographic projection of the first sub-power signal line on the substrate is greater than the length of the specific color sub-pixel in the first direction, and / or the length of a portion of the orthographic projection of the second straight line on the substrate that falls within the orthographic projection of the second sub-power signal line on the substrate is greater than the length of the specific color sub-pixel in the second direction.

5. The display substrate according to claim 1, wherein: Each sub-pixel includes an organic light-emitting element, the organic light-emitting element includes a first electrode, a light-emitting layer and a second electrode which are stacked in sequence, at least a portion of the light-emitting layer is located in the opening, and the second electrode is located on a side of the pixel defining layer facing the base substrate; The orthographic projection of the effective light-emitting area of ​​at least one color sub-pixel on the base substrate does not overlap with the orthographic projection of the first power signal line on the base substrate, and the orthographic projection of the second electrode on the base substrate overlaps with the orthographic projection of the first power signal line on the base substrate.

6. The display substrate according to claim 5, wherein: Along a direction perpendicular to the base substrate, the second electrode of the at least one color sub-pixel overlaps with the second sub-power signal line.

7. The display substrate according to claim 5, wherein: The second electrode of each color sub-pixel includes a main electrode and a connecting electrode connected to each other, and the shape of the main electrode is substantially the same as the shape of the effective light-emitting area of ​​the corresponding sub-pixel; Along a direction perpendicular to the base substrate, the connecting electrodes of the second electrodes of at least some sub-pixels overlap with the second sub-power signal line.

8. The display substrate according to claim 1, wherein: The sub-pixel includes an organic light-emitting element, and the organic light-emitting element includes a first electrode, a light-emitting layer, and a second electrode which are sequentially stacked, at least a portion of the light-emitting layer is located in the opening, and the second electrode is located on a side of the pixel defining layer facing the base substrate; The plurality of sub-pixels include a sub-pixel pair consisting of two sub-pixels arranged along the second direction, the sub-pixel pair includes two sub-effective light-emitting areas with a gap between them, the specific color sub-pixel includes the sub-pixel pair, and a gap is provided between two second electrodes in the sub-pixel pair; The orthographic projection of the first sub-power signal line on the base substrate passes through the space between the orthographic projections of the two second electrodes on the base substrate, and the distance between the orthographic projection of the first sub-power signal line on the base substrate and the orthographic projection of the two second electrodes on the base substrate is equal.

9. The display substrate according to claim 1, wherein: The display substrate includes a plurality of repeating units located on the base substrate, the plurality of repeating units include a plurality of repeating unit rows arranged along the second direction, each repeating unit row includes repeating units arranged along the first direction, and adjacent repeating unit rows in the plurality of repeating unit rows are staggered with each other along the first direction, Each repeating unit includes a first color sub-pixel, a second color sub-pixel pair, and a third color sub-pixel arranged in sequence along the first direction, the second color sub-pixel pair includes two second color sub-pixels arranged along the second direction, and the specific color sub-pixel includes the second color sub-pixel pair; The sub-pixel includes an organic light-emitting element, and the organic light-emitting element includes a first electrode, a light-emitting layer, and a second electrode which are sequentially stacked, at least a portion of the light-emitting layer is located in the opening, and the second electrode is located on a side of the pixel defining layer facing the base substrate; The second electrode of at least one second color subpixel in the second color subpixel pair overlaps with an orthographic projection of the second electrodes of the first color subpixel and the third color subpixel in an adjacent row on a straight line extending along the second direction.

10. The display substrate according to claim 9, wherein: The second electrode of only one second color subpixel in the second color subpixel pair overlaps with the orthographic projection of the second electrodes of the first color subpixel and the third color subpixel in the adjacent row on a straight line extending along the second direction.

11. The display substrate according to claim 10, wherein: The connection electrode of the second electrode of the one second color sub-pixel extends between the second electrodes of the first color sub-pixel and the third color sub-pixel in the adjacent repeating unit row.

12. The display substrate according to claim 11, wherein: The connection electrode extending between the second electrodes of the first color sub-pixel and the third color sub-pixel in the adjacent row is a specific connection electrode, and along a direction perpendicular to the base substrate, the specific connection electrode overlaps the second sub-power signal line.

13. The display substrate according to claim 1, further comprising: a plurality of second power signal lines extending along the second direction and located between the first power signal line and the substrate, and the second power signal line and the second sub-power signal line are electrically connected through a via hole in the insulating layer between the second sub-power signal line and the second power signal line, The plurality of second sub-power signal lines include first sub-signal lines and second sub-signal lines alternately arranged along the first direction, and in the first direction, the maximum size of the second sub-signal line is greater than the maximum size of the first sub-signal line.

14. The display substrate according to claim 13, wherein: The second sub-power signal line includes a main body and a pad extending along the second direction, and a connecting portion configured to connect the main body and the pad, wherein the main body, the pad and the connecting portion form a ring structure; A maximum dimension of the second sub-power signal line in the first direction is a distance between edges of the main body and the spacer that are away from each other.

15. The display substrate according to claim 13, wherein: In the first direction, the maximum size of the second sub-power signal line is larger than the size of the effective light emitting area of ​​at least one sub-pixel; At least one second sub-power signal line includes a plurality of signal line segments arranged along the second direction and spaced apart from each other. In the second direction, the size of the signal line segment is larger than the size of the effective light emitting area of ​​at least one sub-pixel.

16. The display substrate according to claim 8, wherein: In the plan view, the first sub-power signal line passes through the gap between the two sub-effective light-emitting areas, at least one of the second sub-power signal lines includes at least one break, and the two sub-effective light-emitting areas and the gap between the two sub-effective light-emitting areas are located at the break, so that a virtual straight line extending along the second direction connecting the two end points of the same break of the second sub-power signal line passes through the two sub-effective light-emitting areas and the gap.

17. The display substrate according to claim 16, wherein: Along a direction perpendicular to the base substrate, the second sub-power signal line having the break does not overlap with the two sub-effective light-emitting areas and the interval.

18. The display substrate according to claim 16, further comprising: a plurality of second power signal lines extending along the second direction and located between the first power signal line and the substrate, and the second power signal line and the second sub-power signal line are electrically connected through a via hole in the insulating layer between the second sub-power signal line and the second power signal line, Among them, the orthographic projection of the second sub-power signal line on the base substrate at least partially overlaps with the orthographic projection of the second power signal line on the base substrate, and the orthographic projection of the two sub-effective light-emitting areas on the base substrate overlaps with the orthographic projection of the second power signal line on the base substrate.

19. The display substrate according to claim 18, wherein: Two centers of two orthographic projections of the two sub-effective light-emitting areas on the base substrate are located within the orthographic projection of the second power signal line on the base substrate.

20. A display device comprising the display substrate according to any one of claims 1 to 19.

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