Display panel and display device

By setting an isolation structure on the array layer of the display panel and stacking signal lines up and down in the border area, the problem of restricted border design in the prior art is solved, and the balance between narrow border design and signal transmission is achieved.

CN120035221APending Publication Date: 2025-05-23KUNSHAN GO VISIONOX OPTO ELECTRONICS CO LTD +1
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Patent Information

Application Number
CN202510096358.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-21
Publication Date
2025-05-23

AI Technical Summary

Technical Problem

The frame design of the existing display panel is limited by the centralized arrangement of traces, especially the trace positions of the cathode potential line and the touch signal line are prone to conflict, affecting the narrow frame design.

Method used

By providing an isolation structure on the array layer and stacking the first signal line and the second signal line up and down in the border area, these signal lines are laminated in the thickness direction, thereby reducing the occupied area.

Benefits of technology

The border area of ​​the display panel is effectively reduced, saving space in the border area, which is conducive to the narrow border design, and ensuring the forming and signal transmission of electrodes.

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Abstract

The invention relates to a display panel and a display device.The display panel comprises a substrate, an array layer, an isolation structure and a functional layer, the array layer is arranged on one side of the substrate, a first signal line and a second signal line are arranged in the array layer, and the first signal line and the second signal line are located in a frame area and extend around at least part of a display area; the isolation structure is arranged on the side, away from the substrate, of the array layer and comprises a plurality of isolation parts, at least part of the isolation parts are arranged at intervals and define a light-emitting area, and a light-emitting unit is arranged in the light-emitting area; the functional layer comprises a first electrode and a second electrode which are mutually insulated and arranged at intervals; wherein the first signal line and at least part of the second signal line are stacked in the thickness direction, and the orthographic projection of the first signal line in the thickness direction is at least partially overlapped with the orthographic projection of the second signal line. The frame area of the whole display panel can be reduced, and the narrow frame design of the panel can be improved.
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Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In current display technology, the cathode layer of the display is usually extended to the edge of the display screen and connected to a common metal trace to input the cathode potential; at the same time, the touch electrode also needs to extend from the display area to the frame area to input the touch signal using multiple metal traces.

[0003] However, in current designs, the wiring is concentrated in the border area of ​​the display panel, where the wiring positions of the touch signal lines and the cathode potential lines may conflict, thereby affecting the narrow border design of the display panel. Summary of the invention

[0004] Embodiments of the present invention provide a display panel and a display device, which can reduce the overall frame area of ​​the display panel and are beneficial to improving the narrow frame design of the panel.

[0005] On the one hand, according to an embodiment of the present invention, a display panel is proposed, including a display area and a border area arranged around at least part of the display area, the display panel including a substrate, an array layer, an isolation structure and a functional layer, the array layer is arranged on one side of the substrate, a first signal line and a second signal line are arranged in the array layer, the first signal line and the second signal line are located in the border area and extend around at least part of the display area; the isolation structure is arranged on the side of the array layer away from the substrate, the isolation structure includes a plurality of isolation parts, and a light-emitting unit is arranged in the light-emitting area; the functional layer includes a first electrode and a second electrode arranged with an insulated interval from each other, the first electrode is arranged in the light-emitting area and located on the side of the light-emitting unit away from the substrate, and the second electrode is located on the side of the isolation part away from the substrate; wherein the first signal line and at least part of the second signal line are stacked in the thickness direction, and the orthographic projection of the first signal line in the thickness direction at least partially overlaps with the orthographic projection of the second signal line.

[0006] According to one aspect of an embodiment of the present invention, the array layer includes a first conductor layer and a second conductor layer stacked in a thickness direction, the first conductor layer includes a second signal line, the second conductor layer includes a first signal line, and the resistance value of the second signal line is greater than the resistance value of the first signal line.

[0007] According to one aspect of an embodiment of the present invention, the orthographic projection of the second signal line in the thickness direction is located within the orthographic projection of the first signal line, so that the cross-sectional area of ​​the second signal line is smaller than the cross-sectional area of ​​the first signal line, and the resistance value of the second signal line is greater than the resistance value of the first signal line.

[0008] According to one aspect of the present invention, the second conductor layer is disposed on a side of the first conductor layer away from the substrate, the second conductor layer includes a data line disposed in the display area, and the first signal line is located in the frame area and disposed in the same layer as the data line.

[0009] According to one aspect of the embodiments of the present invention, the first signal line and the data line include the same material;

[0010] Preferably, the first signal line and the data line include a titanium-aluminum-titanium composite metal layer.

[0011] According to one aspect of the embodiment of the present invention, the first conductor layer further includes a scanning signal line located in the display area, and the second signal line is arranged in the same layer as the scanning signal line;

[0012] Preferably, the second signal line and the scanning signal line comprise the same material;

[0013] Preferably, the second signal line and the scanning signal line include metal molybdenum.

[0014] According to one aspect of the embodiment of the present invention, the first conductor layer includes a third electrode disposed in the display area, the third electrode is disposed on a side of the light-emitting unit away from the first electrode, and the second signal line is disposed in the same layer as the third electrode;

[0015] Preferably, the second signal line and the third electrode comprise the same material;

[0016] Preferably, the second signal line and the third electrode include an ITO / Ag / ITO composite metal layer.

[0017] According to one aspect of an embodiment of the present invention, the first conductor layer includes a first sublayer and a second sublayer stacked along the thickness direction, the second conductor layer includes a third sublayer and a fourth sublayer stacked along the thickness direction, the second signal line is arranged in at least one of the first sublayer and the second sublayer, and the first signal line is arranged in at least one of the third sublayer and the fourth sublayer.

[0018] According to one aspect of the embodiments of the present invention, the first electrode extends from the display area to the frame area and is connected to the first signal line through the first via hole, and the second electrode extends from the display area to the frame area and is connected to the second signal line through the second via hole;

[0019] Preferably, there are multiple second via holes, and the multiple second electrodes are respectively connected to the corresponding second signal lines through the multiple second via holes.

[0020] In another aspect, a display device is provided according to an embodiment of the present invention, comprising the display panel as described above.

[0021] An embodiment of the present invention provides a display panel and a display device, wherein an isolation structure is provided on an array layer and a light-emitting area is defined. Under the action of the isolation structure, a first electrode and a second electrode are provided on the same layer, and at the same time, a first signal line and a second signal line at a border area of ​​the display panel are stacked up and down. While ensuring that the first electrode and the second electrode are integrally formed, an area occupied by the first signal line and the second signal line at the border area is reduced, thereby effectively reducing the area of ​​the border area of ​​the display panel, saving space at the border area, and being conducive to a narrow border design of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Features, advantages, and technical effects of exemplary embodiments of the present invention will be described below with reference to the accompanying drawings.

[0023] Figure 1 is a schematic plan view of a display panel according to an embodiment of the present invention;

[0024] Figure 2 is a partial enlarged schematic diagram of a border area of ​​an embodiment of the present invention;

[0025] Figure 3 is a schematic cross-sectional view of a display area of ​​an embodiment of the present invention;

[0026] Figure 4 is a schematic cross-sectional view of a border region of an embodiment of the present invention;

[0027] Figure 5 It is a cross-sectional schematic diagram of another border area of ​​an embodiment of the present invention.

[0028] Reference numerals:

[0029] 100-display panel; AA-display area; NA-frame area; Z-thickness direction;

[0030] 10-substrate; 20-array layer; 21-first conductor layer; 22-second conductor layer;

[0031] 1-first signal line; 2-second signal line; 3-first via hole; 4-second via hole;

[0032] 30 - isolation portion; 40 - first electrode; 50 - second electrode; 60 - light emitting unit; 70 - third electrode.

[0033] In the drawings, the same reference numerals are used for the same components. The drawings are not drawn to scale. DETAILED DESCRIPTION

[0034] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the detailed description below, many specific details are proposed in order to provide a comprehensive understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without some of these specific details. The following description of the embodiments is only to provide a better understanding of the present invention by illustrating examples of the present invention. In the drawings and the following description, at least part of the known structures and technologies are not shown in order to avoid unnecessary ambiguity of the present invention; and, for clarity, the size of some structures may be exaggerated. In addition, the features, structures or characteristics described below may be combined in one or more embodiments in any suitable manner.

[0035] The directional words appearing in the following description are all directions shown in the figures, and do not limit the specific structure of the display panel and display device of the present invention. In the description of the present invention, it should also be noted that, unless otherwise clearly specified and limited, the terms "installation" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0036] In order to better understand the present invention, Figures 1 to 5 The display panel and the display device according to the embodiments of the present invention are described in detail.

[0037] See also Figures 1 to 5 According to an embodiment of the present invention, a display panel 100 is provided, comprising a display area AA and a frame area NA arranged around at least a portion of the display area AA, the display panel 100 comprises a substrate 10, an array layer 20, an isolation structure and a functional layer, the array layer 20 is arranged on one side of the substrate 10, a first signal line 1 and a second signal line 2 are arranged in the array layer 20, the first signal line 1 and the second signal line 2 are located in the frame area NA and extend around at least a portion of the display area AA; the isolation structure is arranged on a side of the array layer 20 away from the substrate 10, and the isolation structure comprises a plurality of isolation portions 30 , at least part of the isolation part 30 is arranged at intervals and surrounds a light-emitting area, and a light-emitting unit 60 is arranged in the light-emitting area; the functional layer includes a first electrode 40 and a second electrode 50 which are insulated and spaced from each other, the first electrode 40 is arranged in the light-emitting area and is located on the side of the light-emitting unit 60 away from the substrate 10, and the second electrode 50 is located on the side of the isolation part 30 away from the substrate 10; wherein, the first signal line 1 and at least part of the second signal line 2 are stacked in the thickness direction Z, and the orthographic projection of the first signal line 1 in the thickness direction Z at least partially overlaps with the orthographic projection of the second signal line 2.

[0038] The array layer 20 in this embodiment is provided with a first electrode 40 and a second electrode 50. Under the action of the first electrode 40, the light-emitting unit 60 at the display area AA can emit light. Optionally, the first electrode 40 can be a cathode, and the second electrode 50 can form a touch signal to meet the user's touch needs.

[0039] Optionally, the first electrodes 40 of the plurality of light-emitting units 60 arranged in an array are connected in common. For example, the first electrodes 40 of the light-emitting units 60 in each row need to extend from the display area AA to the border area NA and be commonly connected to the first signal line 1 in the border area NA, so that the first signal line 1 can be used to provide a driving potential to the first electrode 40. The first signal line 1 can be a cathode potential line.

[0040] Optionally, each second electrode 50 needs to extend from the display area AA to the frame area NA and be connected to the second signal line 2 in the frame area NA, so as to provide a touch signal to the second electrode 50. The second signal line 2 and the first signal line 1 are jointly arranged in the frame area NA.

[0041] An isolation structure is provided on the array layer 20 in the display area AA, and a plurality of isolation parts 30 arranged at intervals are used to achieve spacing of the plurality of light-emitting units 60. During the deposition and forming process of the functional layer, due to the isolation effect of the plurality of isolation parts 30, different parts of the functional layer are located at different heights, that is, the first electrode 40 and the second electrode 50 are formed.

[0042] The first electrode 40 is deposited on the light-emitting unit 60 and can provide electrons to the light-emitting unit 60. The isolation portion 30 isolates the entire functional layer so that the second electrode 50 is deposited on the isolation portion 30. The first electrode 40 and the second electrode 50 can be understood as being arranged in the same layer and formed in the same process step.

[0043] In the above context, in order to achieve a narrow bezel design for the display panel 100, the first signal line 1 and the second signal line 2 at the bezel area NA can be staggered, that is, the two are located at different layers in the thickness direction Z, thereby reducing the space for parallel expansion of the wiring, making full use of the space in the thickness direction Z, and reducing the range of the bezel area NA.

[0044] Optionally, the first signal line 1 and the second signal line 2 may form a complete cover in the thickness direction Z, or may form a partial cover, which is not limited in the present application, and the size of the border area NA may be reduced by stacking the two.

[0045] An embodiment of the present invention provides a display panel 100, in which an isolation structure is provided on an array layer 20 and a light-emitting area is defined. Under the action of the isolation structure, a first electrode 40 and a second electrode 50 are provided on the same layer, and at the same time, a first signal line 1 and a second signal line 2 at a border area NA of the display panel 100 are stacked up and down. On the basis of ensuring that the first electrode 40 and the second electrode 50 are integrally formed, the occupied area of ​​the first signal line 1 and the second signal line 2 at the border area NA is reduced, thereby effectively reducing the area of ​​the border area NA of the display panel 100, saving space at the border area NA, and being conducive to a narrow border design of the display panel 100.

[0046] As an alternative embodiment, see Figures 2 to 4 The array layer 20 includes a first conductor layer 21 and a second conductor layer 22 stacked along a thickness direction Z. The first conductor layer 21 includes a second signal line 2. The second conductor layer 22 includes a first signal line 1. The resistance value of the second signal line 2 is greater than the resistance value of the first signal line 1.

[0047] Optionally, the first conductor layer 21 may be a first metal layer, the second conductor layer 22 may be a second metal layer, the second signal line 2 is located at the frame area NA of the first conductor layer 21 , and the first signal line 1 is located at the frame area NA of the second conductor layer 22 .

[0048] In this embodiment, the main consideration is that the first signal line 1 has a relatively high requirement for resistance. Compared with the second signal line 2, the first signal line 1 needs to be connected to a smaller resistor to ensure smooth conduction of the signal potential. Therefore, the resistance value of the first signal line 1 needs to be smaller than the resistance value of the second signal line 2.

[0049] Optionally, the first signal line 1 and the second signal line 2 may be selectively arranged according to actual resistance values ​​of different conductor layers, so as to satisfy the above-mentioned relationship between the resistance values.

[0050] An embodiment of the present invention provides a display panel 100, in which the access resistance of the first signal line 1 is made smaller than the access resistance of the second signal line 2, so that the routing meets the respective resistance requirements, a larger transmission current is formed in the first signal line 1, the potential transmission capability is improved, and the signal transmission requirements of multiple light-emitting units 60 are met. On the basis of realizing a narrow frame design, the design requirements of the actual current are met.

[0051] As an alternative embodiment, see Figure 2 , the orthographic projection of the second signal line 2 in the thickness direction Z is located within the orthographic projection of the first signal line 1 , so that the cross-sectional area of ​​the second signal line 2 is smaller than the cross-sectional area of ​​the first signal line 1 , and the resistance value of the second signal line 2 is greater than the resistance value of the first signal line 1 .

[0052] In this embodiment, on the basis of stacking the first signal line 1 and the second signal line 2, the cross-sectional areas of the two routing lines are further adjusted. By controlling the size of the cross-sectional area, the resistance value of the routing line is determined, thereby meeting the resistance value design requirements of different routing lines.

[0053] The cross-sectional area of ​​the first signal line 1 is made larger than the cross-sectional area of ​​the second signal line 2. From the variables that determine the resistance, it can be seen that when the cross-sectional area is larger, the obtained resistance value is smaller. According to the above calculation, the cross-sectional area of ​​the first signal line 1 can be adaptively reduced. When the two lines are stacked up and down, the orthographic projection of the second signal line 2 is located within the orthographic projection of the first signal line 1.

[0054] The present application does not impose any special restrictions on the actual size of the two traces, which can be determined based on the actual frame size requirements as long as the above-mentioned relationship between the resistance values ​​is satisfied.

[0055] An embodiment of the present invention provides a display panel 100, which further improves the resistance values ​​of the first signal line 1 and the second signal line 2 by differentially designing the cross-sectional areas thereof, so that they can better meet the design requirements of the above-mentioned resistance values. At the same time, an upper and lower stacking arrangement of the two lines is formed, which conforms to the narrow frame design of the display panel 100.

[0056] As an alternative embodiment, see Figure 4 The second conductor layer 22 is arranged on the side of the first conductor layer 21 away from the substrate 10. The second conductor layer 22 includes a data line arranged in the display area AA. The first signal line 1 is located in the frame area NA of the second conductor layer 22 and is arranged in the same layer as the data line.

[0057] Optionally, the second conductor layer 22 can be arranged on the upper layer of the first conductor layer 21, that is, the first signal line 1 is arranged on the upper layer of the first conductor layer 21. At this time, the data line is arranged in the display area AA of the second conductor layer 22, and the first signal line 1 is arranged in the border area NA of the second conductor layer 22, that is, the data line and the first signal line 1 are arranged on the same layer.

[0058] Compared with other conductor layers, the resistance value of the layer where the data line is located is smaller, which meets the resistance value design requirement of the first signal line 1. Therefore, the first signal line 1 can be set to the same layer as the data line. Specifically, it can be prepared by the same process to achieve integrated molding of the data line and the first signal line 1.

[0059] An embodiment of the present invention provides a display panel 100, which facilitates the molding of the data line and the first signal line 1 by setting the first signal line 1 to be in the same layer as the data line, while meeting the resistance value design requirements, thereby saving process steps and reducing process costs.

[0060] As an optional embodiment, the first signal line 1 and the data line include the same material.

[0061] Optionally, the first signal line 1 and the data line include a titanium-aluminum-titanium composite metal layer. The present application does not specifically limit the specific material of the routing lines, and it is sufficient to ensure that the two routing lines are in the same layer and made of the same material. The titanium-aluminum-titanium composite metal layer can better meet the resistance value requirements of the routing lines.

[0062] An embodiment of the present invention provides a display panel 100, which can further realize the overall forming of the two lines by setting the first signal line 1 to the same layer and the same material as the data line. After the overall deposition, the display area AA and the border area NA are patterned and etched respectively to obtain the data line and the first signal line 1, further saving the process and reducing the process cost.

[0063] As an optional embodiment, the first conductor layer 21 further includes a scanning signal line located in the display area AA, and the second signal line 2 is disposed in the same layer as the scanning signal line.

[0064] Since the data line and the scanning signal line are located in different layers of the display area AA, the first signal line 1 and the second signal line 2 can be respectively arranged in the frame area NA of the corresponding film layer. At this time, the scanning signal line is arranged in the display area AA of the first conductor layer 21, and the second signal line 2 is arranged in the frame area NA, and the two are arranged in the same layer.

[0065] The resistance value of the layer where the scanning signal line is located is greater than the resistance value of the layer where the data line is located. Therefore, setting the second signal line 2 and the scanning signal line on the same layer, and setting the first signal line 1 and the data line on the same layer meet the above-mentioned resistance value size relationship requirements.

[0066] Optionally, the second signal line 2 and the scanning signal line include the same material, for example, metal molybdenum, so that in the process of forming the second signal line 2 and the scanning signal line, the metal layer can be deposited as a whole first, and then the display area AA and the border area NA are etched in different patterns to obtain the scanning signal line and the second signal line 2, thereby reducing the process forming steps.

[0067] An embodiment of the present invention provides a display panel 100, which arranges the second signal line 2 at the border area NA and the scanning signal line at the display area AA in the same layer. On the basis of forming the second signal line 2 and the first signal line 1 into an upper and lower stacking relationship to reduce the border, the second signal line 2 and the scanning signal line can also be integrally formed in the same layer, which also meets the design requirements of the resistance value, thereby saving process steps and reducing process costs.

[0068] As an alternative embodiment, see Figure 3 and Figure 5The first conductor layer 21 includes a third electrode 70 disposed in the display area AA. The third electrode 70 is disposed on a side of the light emitting unit 60 away from the first electrode 40 . The second signal line 2 and the third electrode 70 are disposed in the same layer.

[0069] Optionally, the third electrode 70 can be an anode, in which the first electrode 40, the light-emitting unit 60 and the third electrode 70 can jointly form a sub-pixel, so that the display area AA can emit light normally. In this embodiment, the second signal line 2 can be set on the same layer as the third electrode 70, that is, located on the upper layer of the first signal line 1, forming an upper and lower stack of the two.

[0070] Optionally, the second signal line 2 and the third electrode 70 include the same material, which may be an ITO / Ag / ITO composite metal layer, so that in the process of forming the third electrode 70 and the second signal line 2, metal deposition can be performed as a whole, and then the display area AA and the border area NA are patterned and etched respectively to obtain the third electrode 70 corresponding to each sub-pixel and the second signal line 2 extending in the border area NA.

[0071] An embodiment of the present invention provides a display panel 100, which arranges the second signal line 2 and the third electrode 70 in the same layer. On the basis of making the second signal line 2 and the first signal line 1 stacked up and down, the second signal line 2 and the third electrode 70 can also be formed in the same process step, thereby saving process steps and reducing process costs.

[0072] As an optional embodiment, the first conductor layer 21 includes a first sublayer and a second sublayer stacked along the thickness direction Z, the second conductor layer 22 includes a third sublayer and a fourth sublayer stacked along the thickness direction Z, the second signal line 2 is arranged in the border area NA of at least one of the first sublayer and the second sublayer, and the first signal line 1 is arranged in the border area NA of at least one of the third sublayer and the fourth sublayer.

[0073] Optionally, due to the driving array requirements of the display area AA, the first conductor layer 21 can be specifically divided into a first sub-layer and a second sub-layer. The first sub-layer and the second sub-layer can be metal layers, for example, they can be M1 layer and M2 layer. The layer at the display area AA can usually be used to set the scanning signal line, and the second signal line 2 can be set in the border area NA of the layer, so as to be set on the same layer as the scanning signal line.

[0074] Optionally, the second conductor layer 22 can be specifically divided into a third sublayer and a fourth sublayer, the third sublayer and the fourth sublayer can be metal layers, for example, they can be M3 layer and M4 layer, the layer at the display area AA can usually be used to set the data line, and the first signal line 1 can be set at the border area NA of the layer, so as to be set on the same layer as the data line.

[0075] As for the specific positions of the second signal line 2 and the first signal line 1, according to actual design requirements, the second signal line 2 can be selectively set in the above-mentioned first sublayer or second sublayer, and the first signal line 1 can be selectively set in the above-mentioned third sublayer or fourth sublayer, as long as the upper and lower stacking relationship between the two is satisfied. This application is not limited to this.

[0076] An embodiment of the present invention provides a display panel 100, which provides more possibilities for wiring arrangement by setting the second signal line 2 in the first sublayer or the second sublayer, and setting the electrode signal line in the third sublayer or the fourth sublayer, thereby increasing the range of wiring arrangement to make it have structural diversity and thus have more selectivity.

[0077] As an alternative embodiment, see Figure 4 and Figure 5 The array layer 20 has a plurality of second signal lines 2 , which are spaced apart from each other, and the orthographic projection of the first signal line 1 in the thickness direction Z overlaps with the orthographic projection of the plurality of second signal lines 2 .

[0078] Optionally, multiple second signal lines 2 are arranged at intervals in the border area NA. Since they are stacked up and down with the first signal line 1, the first signal line 1 can cover multiple second signal lines 2 at the same time, or cover part of the second signal line 2, as long as the stacking setting of the two lines can be maintained, and the present application is not limited to this.

[0079] Since the first electrode 40 at the display area AA is located on the array layer 20, after the first electrode 40 extends from the display area AA to the frame area NA, it needs to be connected to the first signal line 1 of the lower layer through the first via hole 3. The first via hole 3 extends to the layer where the first signal line 1 is located in the thickness direction Z, so that the first electrode 40 is deposited to the first via hole 3 and then connected to the first signal line 1.

[0080] Similarly, since the second electrode 50 at the display area AA is also located on the array layer 20, after the second electrode 50 extends from the display area AA to the frame area NA, it needs to be connected to the second signal line 2 of the lower layer through the second via 4. The second via 4 extends in the thickness direction Z to the layer where the second signal line 2 is located, so that the second electrode 50 is deposited in the second via 4 and then connected to the second signal line 2.

[0081] Optionally, when there are multiple second electrodes 50 , each second electrode 50 corresponds to a second signal line 2 , so multiple second via holes 4 are provided, and the multiple second electrodes 50 are connected to the corresponding second signal lines 2 through the multiple second via holes 4 .

[0082] When the second signal line 2 is arranged in the lower layer of the first signal line 1, for example, the second signal line 2 is arranged in the metal layer M1 or M2, and the first signal line 1 is arranged in the metal layer M3 or M4, it is also necessary to make the second via 4 at the border area NA pass through the first signal line 1 and connect with the second signal line 2 to ensure mutual insulation at the perforation position.

[0083] An embodiment of the present invention provides a display panel 100, which meets the requirement of arranging multiple second electrodes 50 by setting multiple second signal lines 2 and connecting them through multiple second vias 4, better adapts to the structure of independent transmission of the second electrodes 50, and realizes independent signal transmission of multiple second electrodes 50.

[0084] According to an embodiment of the present invention, a display device is provided, including the display panel 100 as described above.

[0085] An embodiment of the present invention provides a display panel and a display device, wherein an isolation structure is provided on an array layer and a light-emitting area is defined. Under the action of the isolation structure, a first electrode and a second electrode are provided on the same layer, and at the same time, a first signal line and a second signal line at a border area of ​​the display panel are stacked up and down. While ensuring that the first electrode and the second electrode are integrally formed, an area occupied by the first signal line and the second signal line at the border area is reduced, thereby effectively reducing the area of ​​the border area of ​​the display panel, saving space at the border area, and being conducive to a narrow border design of the display panel.

[0086] Although the present invention has been described with reference to preferred embodiments, various modifications may be made thereto and parts thereof may be replaced by equivalents without departing from the scope of the present invention. In particular, the various technical features mentioned in the various embodiments may be combined in any manner as long as there are no structural conflicts. The present invention is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A display panel, comprising a display area and a frame area arranged around at least a portion of the display area, characterized in that: The display panel comprises: substrate; An array layer, disposed on one side of the substrate, wherein a first signal line and a second signal line are disposed in the array layer, wherein the first signal line and the second signal line are located in the frame area and extend around at least a portion of the display area; An isolation structure, disposed on a side of the array layer away from the substrate, the isolation structure comprising a plurality of isolation parts; A light-emitting unit is arranged in the light-emitting area; The functional layer includes a first electrode and a second electrode which are insulated from each other, wherein the first electrode is disposed in the light-emitting region and located on a side of the light-emitting unit away from the substrate, and the second electrode is located on a side of the isolation portion away from the substrate; The first signal line and at least a portion of the second signal line are stacked in a thickness direction, and an orthographic projection of the first signal line in the thickness direction at least partially overlaps with an orthographic projection of the second signal line.

2. The display panel according to claim 1, characterized in that: The array layer includes a first conductor layer and a second conductor layer stacked along the thickness direction, the first conductor layer includes the second signal line, the second conductor layer includes the first signal line, and the resistance value of the second signal line is greater than the resistance value of the first signal line.

3. The display panel according to claim 2, characterized in that: The orthographic projection of the second signal line in the thickness direction is located within the orthographic projection of the first signal line, so that the cross-sectional area of ​​the second signal line is smaller than that of the first signal line, and the resistance value of the second signal line is greater than that of the first signal line.

4. The display panel according to claim 2, characterized in that: The second conductor layer is arranged on a side of the first conductor layer away from the substrate, the second conductor layer includes a data line arranged in the display area, and the first signal line is located in the frame area and arranged in the same layer as the data line.

5. The display panel according to claim 4, characterized in that: The first signal line and the data line include the same material; Preferably, the first signal line and the data line include a titanium-aluminum-titanium composite metal layer.

6. The display panel according to claim 2, characterized in that: The first conductor layer further comprises a scanning signal line located in the display area, and the second signal line is arranged in the same layer as the scanning signal line; Preferably, the second signal line and the scanning signal line comprise the same material; Preferably, the second signal line and the scanning signal line include metal molybdenum.

7. The display panel according to claim 2, characterized in that: The first conductor layer includes a third electrode disposed in the display area, the third electrode is disposed on a side of the light emitting unit away from the first electrode, and the second signal line is disposed in the same layer as the third electrode; Preferably, the second signal line and the third electrode comprise the same material; Preferably, the second signal line and the third electrode include an ITO / Ag / ITO composite metal layer.

8. The display panel according to claim 2, characterized in that: The first conductor layer includes a first sublayer and a second sublayer stacked along the thickness direction, the second conductor layer includes a third sublayer and a fourth sublayer stacked along the thickness direction, the second signal line is set in at least one of the first sublayer and the second sublayer, and the first signal line is set in at least one of the third sublayer and the fourth sublayer.

9. The display panel according to claim 1, characterized in that: The first electrode extends from the display area to the frame area and is connected to the first signal line through a first via hole, and the second electrode extends from the display area to the frame area and is connected to the second signal line through a second via hole; Preferably, there are a plurality of the second via holes, and a plurality of the second electrodes are respectively connected to corresponding second signal lines through the plurality of the second via holes.

10. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 1 to 9.