Memory, electronic equipment and startup acceleration method of electronic equipment

Abstract

The invention provides a memory, electronic equipment and a startup acceleration method of the electronic equipment, and the memory comprises a flash memory unit which is used for storing a system mirror image file; the flash memory unit stores a system mirror image file in a partition mode, and physical addresses of data stored in the same partition are continuous; and the main control unit is used for reading the starting physical address and the ending physical address of the data stored in each partition from a preset data mapping table according to the starting instruction, and reading the corresponding data from the flash memory unit to the memory of the electronic equipment according to each starting physical address and the corresponding ending physical address. Through the memory, the electronic equipment and the startup acceleration method of the electronic equipment provided by the invention, the startup speed can be increased.

Description

Technical Field

[0001] The present invention relates to the field of storage, and in particular to a memory, an electronic device and a startup acceleration method of the electronic device. Background Art

[0002] Currently, the optimization of the system boot speed of electronic devices mainly depends on the hardware performance of the memory (eMMC) and the amount of data loaded in the boot image. Specifically, the read and write rate of the eMMC directly affects the efficiency of data loading during the boot process, and the loading range of the boot image includes the necessary components for system startup (such as the kernel, drivers, basic services, etc.), so its capacity is difficult to significantly reduce through software streamlining or deletion.

[0003] However, as electronic devices such as TVs and set-top boxes list boot time as a key performance indicator, the limitations of existing technical solutions have gradually become apparent. Improving eMMC performance requires the use of higher-specification chips, which leads to a significant increase in hardware costs. Therefore, how to achieve boot acceleration while controlling costs is a technical problem that needs to be solved urgently. Summary of the invention

[0004] The purpose of the present invention is to provide a memory, an electronic device and a startup acceleration method of the electronic device, which can improve the startup speed.

[0005] To solve the above technical problems, the present invention is achieved through the following technical solutions: The present invention provides a memory, comprising: A flash memory unit, used for storing a system image file; the flash memory unit stores the system image file in the form of partitions, and the physical addresses of data stored in the same partition are continuous; The main control unit is used to read the starting physical address and the ending physical address of the data stored in each partition from a preset data mapping table according to the power-on instruction, and read the corresponding data from the flash memory unit to the memory of the electronic device according to each starting physical address and the corresponding ending physical address.

[0006] In one embodiment of the present invention, the flash memory unit stores the system image file according to the following steps: The main control unit controls the flash memory unit to enter a single-level storage mode; The main control unit receives the system image file and writes the system image file into the flash memory unit in a sequential write mode; The main control unit determines the storage capacity of the flash memory unit in the single-level storage mode: When the amount of data of the system image file written into the flash memory unit does not reach the storage capacity, controlling the flash memory unit to maintain a single-level storage mode until the storage capacity is reached or the writing is completed; When the amount of data of the system image file written into the flash memory cell reaches the storage capacity, control the flash memory cell to release the single-level storage mode, and continue to write the remaining system image file into the flash memory cell until the writing is completed.

[0007] In an embodiment of the present invention, the host controller creates a data mapping table according to the following steps: According to the writing order of the system image file written into each partition, sequentially obtain and judge the amount of data written in each partition: When the amount of data written in the partition is less than or equal to the threshold, update the starting physical address and the ending physical address of the data written in the partition to a preset data mapping table; When the amount of data written in the partition is greater than the threshold, split the data written in the partition according to the threshold to obtain a plurality of sub-partitions; update the starting physical address and the ending physical address of the data written in the sub-partitions to the data mapping table; wherein, the amount of data written in each sub-partition is less than or equal to the threshold, and the physical addresses of the data written in each sub-partition are consecutive.

[0008] In an embodiment of the present invention, the host controller reads the data of the flash memory cell to the memory of the electronic device according to the following steps: According to the starting physical address and the ending physical address recorded in the data mapping table, sequentially read the corresponding data from the flash memory cell in order and form corresponding data packets for transmission to the cache unit of the memory; When the cache unit receives a data packet, send the data packet to the memory, and during the sending process, simultaneously receive the next data packet transmitted by the flash memory cell until all data packets are read from the flash memory cell to the memory.

[0009] In an embodiment of the present invention, the host controller is further configured to obtain a system update file, update the system image file stored in the flash memory cell according to the system update file, and update the data mapping table according to the starting physical address and the ending physical address of the data written in each partition in the flash memory cell after the update.

[0010] In an embodiment of the present invention, the host controller updates the data mapping table according to the following steps: According to the writing order of the updated system image file written into each partition, sequentially obtain and judge the amount of data written in each updated partition: When the amount of data written in the updated partition is less than or equal to the threshold, update the starting physical address and the ending physical address of the data written in the partition to a preset data comparison table; When the amount of data written in the updated partition is greater than the threshold, the data written in the partition is split according to the threshold to obtain a plurality of updated sub - partitions; update the starting physical address and the ending physical address of the data written in the updated sub - partitions to the data comparison table; wherein, the amount of data written in each updated sub - partition is less than or equal to the threshold, and the physical addresses of the data written in each updated sub - partition are continuous; Update the data in the data comparison table to the data mapping table.

[0011] In an embodiment of the present invention, the main control unit updates the data in the data comparison table to the data mapping table according to the following steps: Update the data in the data comparison table to a preset backup mapping table, and clear the data in the data comparison table; After the memory is restarted, according to the writing order of the updated system image file written to each partition, repeatedly obtain the starting physical address and the ending physical address of the data written in the updated partition and the data written in the updated sub - partitions, and update them to the data comparison table; Update the data mapping table according to the comparison result of the data in the data comparison table and the data in the backup mapping table.

[0012] In an embodiment of the present invention, the main control unit updates the data mapping table according to the following steps: Judge whether the data in the data comparison table is the same as the data in the backup mapping table: If they are the same, update the data mapping table according to the data in the backup mapping table, and clear the data in the data comparison table and the backup mapping table after the update is completed; If they are not the same, update the data in the data comparison table to the backup mapping table, and clear the data in the data comparison table; and after the next restart of the memory, repeat the judgment until the data in the data comparison table is the same as the data in the backup mapping table.

[0013] The present invention also provides an electronic device, which includes the memory described above.

[0014] The present invention also provides a method for accelerating the startup of an electronic device. The electronic device includes a processor, a memory, and a memory; the flash memory unit of the memory stores the system image file in the form of partitions, and the physical addresses of the data stored in the same partition are continuous; the startup acceleration method includes: Generate and send a startup instruction through the processor; The master control unit of the memory reads the start physical address and end physical address of the data stored in each of the partitions from a preset data mapping table according to the power-on instruction; The master control unit of the memory reads the corresponding data from the flash memory cells to the memory according to each of the start physical addresses and the corresponding end physical addresses.

[0015] As described above, the present invention provides a memory, an electronic device, and a method for accelerating the startup of an electronic device. By optimizing the eMMC control strategy, without replacing hardware or compressing the image file, the read and write efficiency can be improved, and the startup time can be shortened. By adopting the cooperation mechanism of the dual mapping table backup and the data comparison table, the consistency of the mapping table update can be ensured.

[0016] Of course, it is not necessary for any product implementing the present invention to achieve all the above advantages simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for describing the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0018] Figure 1 Schematic diagram of an electronic device in an embodiment of the present invention; Figure 2 Flowchart of a method for accelerating the startup of an electronic device in an embodiment of the present invention.

[0019] In the figure: 10, processor; 20, memory; 30, memory; 31, master control unit; 32, cache unit; 33, flash memory cells. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0021] Please refer to Figure 1, the present invention discloses an electronic device, which may include a processor 10, a memory 20, a storage 30, etc. The processor 10 may be a central computing unit (CPU). The memory 20 may be a Static Random-Access Memory (SRAM), and the memory 20 may directly interact with the processor 10. The storage 30 may be an Embedded MultiMediaCard (eMMC), and the storage 30 may be used to store system image files. Among them, the processor 10 may load the system image file from the storage 30 into the memory 20 to start the electronic device.

[0022] Please refer to Figure 1 , in some embodiments, the storage 30 may include a main control unit 31, a cache unit 32, and a flash memory unit 33. The main control unit 31 may be a Microcontroller Unit (MCU). The main control unit 31 may be used to perform specific control tasks, such as reading data, processing instructions from the electronic device, etc. The core of the main control unit 31 may be designed based on the RISC-V architecture to execute various control and computing tasks.

[0023] In some embodiments, the cache unit 32 may include a write buffer and a read buffer. The write buffer and the read buffer may serve as a high-speed temporary storage area between the main control unit 31 and the flash memory unit 33, and are used to store data and instructions frequently accessed by the main control unit 31. The write buffer is mainly to improve the efficiency of data writing and optimize the performance of the write operation. The read buffer is mainly to increase the speed of data reading and reduce the access to the flash memory unit.

[0024] In some embodiments, the flash memory unit 33 may be a physical unit (nand) in the storage for storing data. The flash memory unit 33 may be composed of multiple storage blocks. Each storage block may contain multiple pages. Each page is the smallest unit of read / write operation, while a block is the smallest unit of erase operation. Data is usually read and written in units of pages, while the entire block needs to be erased during erasure.

[0025] In some embodiments, as the computing core of the electronic device, when the processor 10 detects that a system image file needs to be installed, it may generate a specific installation instruction (such as CMD56 + arg 0x00000001). After receiving the installation instruction, the main control unit 31 may configure the working mode of the flash memory unit 33 through a hardware interface (such as the ONFI protocol). After the flash memory unit 33 enters the single-level storage mode, all read and write operations are performed at 1 bit / unit to improve the write / read speed.

[0026] In some embodiments, when the system image file is installed into the flash memory unit 33 of the memory 30, the main control unit 31 of the memory 30 can control the flash memory unit 33 to enter the single-level storage mode according to the installation instruction. Among them, the flash memory unit 33 may be in a two-level storage mode or a three-level storage mode. The single-level storage mode (Single-Level Cell, SLC) means that each storage cell stores only 1 bit of data. The two-level storage mode (Multi-Level Cell, MLC) means that each storage cell stores 2 bits of data. The three-level storage mode (Triple-Level Cell, TLC) means that each storage cell stores 3 bits of data. Since the read and write speed of the flash memory unit 33 in the SLC mode is significantly higher than that in the MLC\TLC mode, in order to improve the read and write speed, the flash memory unit 33 can be forced to enter the SLC mode.

[0027] In some embodiments, the main control unit 31 receives the system image file transmitted by the processor 10, and writes the system image file into the flash memory unit 33 in a sequential write mode. Specifically, the sequential write mode refers to the data being written sequentially in the order of the physical address, rather than being written randomly. By continuously writing data, the addressing overhead can be reduced, and the writing speed and reading speed can be increased. The system image file is usually a large file (such as an operating system image), and sequential writing can reduce the addressing time (no need to frequently jump to the physical address), and use cache and pipeline optimization to improve throughput.

[0028] In some embodiments, when the flash memory unit 33 is in MLC mode and its storage capacity is 8G, after it is forced into SLC mode, it can only store 4G of data. When the data exceeds 4G, the flash memory unit 33 will release the SLC mode and restore to MLC mode to continue storing data. When the flash memory unit 33 is in TLC mode and its storage capacity is 32G, after it is forced into SLC mode, it can only store 8G of data. When the data exceeds 8G, the flash memory unit 33 will release the SLC mode and restore to TLC mode to continue storing data. Therefore, in the process of writing the system image file, the main control unit 31 needs to determine the storage capacity of the flash memory unit 33 in the single-level storage mode. The main control unit 31 can monitor the amount of written data in real time to dynamically determine whether the mode needs to be switched. For example, in SLC mode, when the storage capacity of the flash memory unit 33 is exhausted, it can automatically fall back to MLC mode or TLC mode.

[0029] In some embodiments, when the amount of data of the system image file written into the flash memory cell 33 does not reach the storage capacity, the flash memory cell 33 can be controlled to maintain the single-level storage mode until the storage capacity is reached or the writing is completed. For example, the amount of data of the system image file is 3.5G and the storage capacity is 4G. At this time, after the system image file is completely loaded into the flash memory cell 33, the flash memory cell 33 can still maintain the single-level storage mode to achieve high-speed writing / reading operations.

[0030] In some embodiments, when the amount of data of the system image file written into the flash memory cell 33 reaches the storage capacity, the flash memory cell 33 can be controlled to release the single-level storage mode and continue to write the remaining system image file into the flash memory cell 33 until the writing is completed. For example, the amount of data of the system image file is 5G and the storage capacity is 4G. At this time, after 4G of data of the system image file is loaded into the flash memory cell 33, there is no free storage capacity in the flash memory cell 33 in the single-level storage mode. At this time, in order to be able to completely load the system image file, it is necessary to control the flash memory cell 33 to release the single-level storage mode.

[0031] In some embodiments, when the system image file is loaded into the flash memory cell 33, the flash memory cell 33 can store the system image file in the form of a partition (Partition), and the physical addresses of the data stored in the same partition are continuous. Among them, the space sizes of different partitions are different. For example, the size of a certain partition is only 4M, and the size of another partition is 1G. Each partition stores data with specific functions (such as kernels, drivers, user applications). For example, the Android system may include more than 20 partitions ("bootloader", "boot", "vendor", "odm", etc.). Corresponding spaces are reserved for each partition, but the actual data is usually not full (for example, the size of a certain partition is 1GB and the actual data is only 500MB). When burning the system image file, it is necessary to fill the remaining space of each partition with all 0 data (for example, the partition is 1GB and the actual data is 500MB, and the latter 500MB is filled with 0). At this time, the main control unit 31 can consider that the data between different partitions is continuous (such as the logical addresses 0x0000~0xFFFF are all valid data).

[0032] In some embodiments, the main control unit 31 may, according to the power-on instruction generated by the processor of the electronic device, read the start physical address and the end physical address of the data written in each partition from a preset data mapping table, and according to each start physical address and the corresponding end physical address, read the corresponding data from the flash memory unit 33 to the memory 20 of the electronic device. Specifically, the data mapping table can be used to record the start physical address (StartLBA) and the end physical address (End LBA) of the data written in each partition. The data mapping table can be stored in the read-only memory (ROM) of the memory 30. After the electronic device is powered on, the processor 10 can send a start instruction to the main control unit 31. The main control unit 31 can load the data mapping table from the read-only memory into the internal cache, and according to the start physical address and the end physical address of the data written in each partition in the table, sequentially read the data from the flash memory unit 33 into the memory 20.

[0033] In some embodiments, the main control unit 31 may create a data mapping table when the electronic device is started for the first time. Among them, the main control unit 31 may sequentially obtain and judge the data volume written in each partition according to the writing order of the system image file written to each partition. The main control unit 31 may sequentially check the data volume written in each partition (such as partitions A, B, C, etc.), and adopt different strategies according to whether the written data volume exceeds the threshold.

[0034] In some embodiments, when the data volume written in the partition is less than or equal to the threshold (such as 4MB), the start physical address and the end physical address of the data written in the partition can be directly updated to the preset data mapping table. The specific size of the threshold may not be set. For example, it can match the erasure block size of the flash memory unit 33 (such as 4MB) to avoid performance degradation caused by cross-block reading and writing.

[0035] In some embodiments, when the data volume written in the partition is greater than the threshold, the data written in the partition is split according to the threshold to obtain multiple sub-partitions; the start physical address and the end physical address of the data written in the sub-partitions are updated to the data mapping table; among them, the data volume written in each sub-partition is less than or equal to the threshold, and the physical addresses of the data written in each sub-partition are continuous. When the physical addresses of the data are continuous, the main control unit 31 can read the entire sub-partition through a single command, reducing the addressing time.

[0036] In some embodiments, the main control unit 31 may read the data of the flash memory unit 33 into the memory 20 of the electronic device. The main control unit 31 may sequentially read the corresponding data from the flash memory unit 33 according to the starting physical address and the ending physical address recorded in the data mapping table, and form corresponding data packets for transmission to the cache unit 32 of the memory 30. Among them, the data packet may include all the data of a partition or a sub - partition.

[0037] In some embodiments, when the cache unit 32 receives a data packet, it sends the data packet to the memory 20, and during the sending process, it simultaneously receives the next data packet transmitted by the flash memory unit 33 until all the data packets are read from the flash memory unit into the memory. Among them, when the cache unit 32 sends a data packet to the memory 20, the flash memory unit 33 can simultaneously prepare the next data packet to mask the flash read latency.

[0038] In some embodiments, for example, data packets such as A1, A2, A3, A4, A5, and A6 are stored in the flash memory unit 33. The flash memory unit 33 can first read A1 into the cache unit 32. When the cache unit 32 receives all of A1, it can transmit A1 to the memory 20. At the same time, during the transmission process, the flash memory unit 33 can read A2 into the cache unit 32. And so on, until all the data packets are transmitted to the memory 20.

[0039] In some embodiments, during the operation of the electronic device, its system image file will inevitably be upgraded and optimized. The main control unit 31 is also used to receive the system update file through the processor 10, update the system image file stored in the flash memory unit 33 according to the system update file, and update the data mapping table according to the starting physical address and the ending physical address of the data written in each partition in the updated system image file. Specifically, the main control unit 31 can query the data mapping table to find the physical addresses of the data written in all partitions / sub - partitions in the flash memory unit 33. Subsequently, the data in the partition / sub - partition can be updated by in - place update or out - of - place update. In - place update means directly overwriting the original partition data (the flash block needs to be erased first). Out - of - place update means writing the new data into the free area of the flash memory unit 33 and then updating the mapping table to point to the new address.

[0040] In some embodiments, after the main control unit 31 finishes updating the system image file, it is necessary to update the data mapping table. Specifically, after the electronic device restarts, the main control unit 31 can sequentially obtain and judge the amount of data written in each updated partition according to the writing order of the updated system image file in each partition. The main control unit 31 can sequentially check the amount of data written in each partition (such as partitions A, B, C, etc.), and adopt different strategies according to whether the amount of data exceeds the threshold.

[0041] In some embodiments, when the amount of data written in the updated partition is less than or equal to the threshold, the starting physical address and the ending physical address of the data written in this partition are updated to a preset data comparison table.

[0042] In some embodiments, when the amount of data written in the updated partition is greater than the threshold, the data in this partition is split according to the threshold to obtain multiple updated sub-partitions; the starting physical address and the ending physical address of the data written in the updated sub-partitions are updated to the data comparison table; wherein, the amount of data in each updated sub-partition is less than or equal to the threshold, and the physical addresses of the data in each updated sub-partition are continuous.

[0043] In some embodiments, the main control unit 31 can update the data in the data comparison table to the data mapping table. Among them, the main control unit 31 can update the data in the data comparison table to a preset backup mapping table, and clear the data in the data comparison table. By clearing the data comparison table, residual data interference with subsequent operations can be avoided.

[0044] In some embodiments, after the memory 30 restarts, the main control unit 31 can repeatably obtain the starting physical address and the ending physical address of the updated partition and the updated sub-partition according to the writing order of the updated system image file in each partition, and update them to the data comparison table. Among them, the splitting process of the partition and the sub-partition can be similar to that in the above embodiments, and will not be elaborated here.

[0045] In some embodiments, the main control unit 31 can update the data mapping table according to the comparison result of the data in the data comparison table and the data in the backup mapping table. Among them, the main control unit 31 can check whether the start and end addresses of each partition / sub-partition in the two tables are the same to judge whether the data in the data comparison table is the same as the data in the backup mapping table.

[0046] In some embodiments, when the data in the data comparison table is the same as the data in the backup mapping table, the main control unit 31 can update the data mapping table according to the data in the backup mapping table, and clear the data in the data comparison table and the backup mapping table after the update is completed. By clearing the data comparison table and the backup mapping table, storage resources can be released, and residual data interference with subsequent operations can be avoided through cleaning.

[0047] In some embodiments, when the data in the data comparison table is different from the data in the backup mapping table, the main control unit 31 can update the data in the data comparison table to the backup mapping table and clear the data in the data comparison table; and after the memory is restarted next time, the judgment is repeated until the data in the data comparison table is the same as the data in the backup mapping table. Among them, when the data in the data comparison table is different from the data in the backup mapping table, it may be caused by an update interruption or a hardware error, and it is necessary to regenerate the data comparison table for verification. By overwriting the backup mapping table, the latest state can be retained as the retry benchmark.

[0048] It can be seen that in the above solution, by optimizing the eMMC control strategy, without replacing the hardware or compressing the image file, the read and write efficiency can be improved and the boot time can be shortened. By adopting the cooperation mechanism of dual mapping table backup and data comparison table, the consistency of mapping table update can be ensured.

[0049] Please refer to Figure 2 , the present invention also provides a method for accelerating the boot of an electronic device. The electronic device includes a processor, a memory, and a storage; the flash memory unit of the storage is used to store system image files in a partitioned form, and the physical addresses of the data stored in the same partition are continuous; the method for accelerating the boot includes: Step S10, generating and sending a boot instruction through the processor; Step S20, the main control unit of the storage reads the starting physical address and the ending physical address of the data stored in each partition from a preset data mapping table according to the boot instruction; Step S30, the main control unit of the storage reads the corresponding data from the flash memory unit to the memory according to each starting physical address and the corresponding ending physical address.

[0050] The embodiments of the present invention disclosed above are only used to help explain the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made according to the content of this specification. These embodiments are selected and specifically described in this specification to better explain the principle and practical application of the present invention, so that those skilled in the art in the technical field can well understand and utilize the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A memory, characterized in that: include: A flash memory unit, used for storing a system image file; the flash memory unit stores the system image file in the form of partitions, and the physical addresses of data stored in the same partition are continuous; The main control unit is used to read the starting physical address and the ending physical address of the data stored in each partition from a preset data mapping table according to the power-on instruction, and read the corresponding data from the flash memory unit to the memory of the electronic device according to each starting physical address and the corresponding ending physical address.

2. The memory according to claim 1, characterized in that: The flash memory unit stores the system image file according to the following steps: The main control unit controls the flash memory unit to enter a single-level storage mode; The main control unit receives the system image file and writes the system image file into the flash memory unit in a sequential write mode; The main control unit determines the storage capacity of the flash memory unit in the single-level storage mode: When the amount of data of the system image file written into the flash memory unit does not reach the storage capacity, controlling the flash memory unit to maintain a single-level storage mode until the storage capacity is reached or the writing is completed; When the amount of data of the system image file written into the flash memory unit reaches the storage capacity, the flash memory unit is controlled to release the single-level storage mode, and the remaining system image files continue to be written into the flash memory unit until the writing is completed.

3. The memory according to claim 1, characterized in that: The main control unit creates a data mapping table according to the following steps: According to the writing order of the system image file to each partition, the amount of data written in each partition is obtained and determined in turn: When the amount of data written in the partition is less than or equal to a threshold, updating the starting physical address and the ending physical address of the data written in the partition to a preset data mapping table; When the amount of data written in the partition is greater than a threshold, the data written in the partition is split according to the threshold to obtain multiple sub-partitions; the starting physical address and the ending physical address of the data written in the sub-partition are updated to the data mapping table; wherein the amount of data written in each of the sub-partitions is less than or equal to the threshold, and the physical addresses of the data written in each of the sub-partitions are continuous.

4. The memory according to claim 1, characterized in that: The main control unit reads the data of the flash memory unit into the memory of the electronic device according to the following steps: According to the starting physical address and the ending physical address recorded in the data mapping table, corresponding data are read out from the flash memory unit in sequence, and corresponding data packets are formed to be transmitted to the cache unit of the memory; When the cache unit receives a data packet, it sends the data packet to the memory, and during the sending process, simultaneously receives the next data packet transmitted by the flash memory unit until all data packets are read out from the flash memory unit to the memory.

5. The memory according to claim 1, characterized in that: The main control unit is also used to obtain a system update file, and update the system image file stored in the flash memory unit according to the system update file, and update the data mapping table according to the starting physical address and ending physical address of the data written in each partition in the flash memory unit by the updated system image file.

6. The memory according to claim 5, characterized in that: The main control unit updates the data mapping table according to the following steps: According to the order in which the updated system image file is written to each partition, the amount of data written to each updated partition is obtained and determined in turn: When the amount of data written in the updated partition is less than or equal to a threshold, updating the starting physical address and the ending physical address of the data written in the partition to a preset data comparison table; When the amount of data written in the updated partition is greater than a threshold, the data written in the partition is split according to the threshold to obtain a plurality of updated sub-partitions; the starting physical address and the ending physical address of the data written in the updated sub-partition are updated to the data comparison table; wherein the amount of data written in each of the updated sub-partitions is less than or equal to the threshold, and the physical addresses of the data written in each of the updated sub-partitions are continuous; The data in the data comparison table is updated into the data mapping table.

7. The memory according to claim 6, characterized in that: The main control unit updates the data in the data comparison table into the data mapping table according to the following steps: Updating the data in the data comparison table to a preset backup mapping table, and clearing the data in the data comparison table; After the memory is restarted, according to the writing order of the updated system image file to each partition, the starting physical address and the ending physical address of the data written in the updated partition and the data written in the updated sub-partition are repeatedly obtained, and updated into the data comparison table; The data mapping table is updated according to the comparison result between the data in the data comparison table and the data in the backup mapping table.

8. The memory according to claim 7, characterized in that: The main control unit updates the data mapping table according to the following steps: Determine whether the data in the data comparison table is the same as the data in the backup mapping table: If they are the same, the data mapping table is updated according to the data of the backup mapping table, and the data of the data comparison table and the backup mapping table are cleared after the update is completed; If they are not the same, the data in the data comparison table is updated to the backup mapping table, and the data in the data comparison table is cleared; After the memory is restarted next time, the judgment is repeated until the data in the data comparison table is the same as the data in the backup mapping table.

9. An electronic device, characterized in that: Comprising a memory as described in any one of claims 1 to 8.

10. A method for accelerating the startup of an electronic device, characterized in that: The electronic device includes a processor, a memory, and a storage; The flash memory unit of the memory stores the system image file in the form of partitions, and the physical addresses of the data stored in the same partition are continuous; the boot acceleration method includes: Generate and send a power-on instruction by the processor; The main control unit of the memory reads the starting physical address and the ending physical address of the data stored in each partition from the preset data mapping table according to the power-on instruction; The main control unit of the memory reads the corresponding data from the flash memory unit to the internal memory according to each of the starting physical addresses and the corresponding ending physical addresses.

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