Display device

Abstract

The display device includes: a pixel unit divided into a plurality of blocks including at least one scan line, the pixel unit including pixels connected to the scan line and a data line in each of the blocks; a gamma voltage supplier configured to generate a gamma voltage based on the gamma value; a data driver configured to generate a data signal to be provided to the data line using the gamma voltage; and a timing controller configured to provide different gamma values to at least two of the blocks, each of the different gamma values corresponding to a same gray level.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0166859 filed in the Korean Intellectual Property Office on November 27, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to a display device and a method of driving the display device. Background Art

[0004] As information technology advances, the importance of display devices that serve as a medium between users and information is increasing. Therefore, the use of display devices including liquid crystal display devices and organic light emitting display devices is growing.

[0005] The display device receives data from the host, converts the data into a data signal, and then sends the data signal to the pixel, so that a predetermined image can be displayed on the pixel unit. The display device can use a gamma voltage corresponding to the gamma value to generate a data signal. However, applying the same gamma value (or gamma voltage) to all areas of the display panel may cause the pixel to produce a varying brightness in response to the same data signal. This variation is usually caused by factors such as the load on the data line, the pixel load, and changes in the manufacturing process. Summary of the invention

[0006] Embodiments of the present disclosure provide a display device and a driving method thereof, wherein different gamma values ​​are applied to regions of a display panel (or pixel unit), which ensures that pixels generate light with the same brightness in response to the same data signal.

[0007] According to an embodiment of the present disclosure, a display device is provided, including: a pixel unit divided into a plurality of blocks including at least one scan line, the pixel unit including pixels connected to the scan line and a data line in each of the blocks; a gamma voltage supplier configured to generate a gamma voltage based on a gamma value; a data driver configured to generate a data signal to be provided to the data line using the gamma voltage; and a timing controller configured to provide different gamma values ​​to at least two of the blocks, each of the different gamma values ​​corresponding to the same gray level.

[0008] The gamma voltage supplier generates different gamma voltages corresponding to the same gray scale based on different gamma values.

[0009] The data driver generates data signals having different voltages to be supplied to at least two blocks, each of the data signals corresponding to the same gray scale.

[0010] The timing controller provides different gamma values ​​to at least two blocks to compensate for a load of the data line.

[0011] The blocks include odd-numbered blocks and even-numbered blocks, the odd-numbered blocks include odd-numbered scan lines, and the even-numbered blocks include even-numbered scan lines.

[0012] The timing controller provides odd gamma values ​​corresponding to odd-numbered blocks, and provides even gamma values ​​different from the odd gamma values ​​corresponding to even-numbered blocks.

[0013] The pixel unit includes a plurality of regions including at least one odd-numbered block and at least one even-numbered block.

[0014] The timing controller provides different even gamma values ​​and different odd gamma values ​​to their corresponding regions.

[0015] The pixel units have at least partially different widths, and at least two of the blocks have different areas.

[0016] The timing controller provides different gamma values ​​to at least two blocks having different areas.

[0017] The timing controller includes: a lookup table configured to store a gamma value; and a gamma value supplier configured to provide the gamma voltage supplier with a gamma value corresponding to a position of a block to which a data signal is supplied.

[0018] The gamma value supplier determines a position of a block to which a data signal is provided using at least one of a data enable signal and a horizontal synchronization signal.

[0019] When the gamma value corresponding to the first part of the block is stored in the lookup table, the gamma value supplier generates the gamma value corresponding to the second part of the block through interpolation.

[0020] According to an embodiment of the present disclosure, a method for driving a display device is provided, the method comprising: generating a first block of gamma voltages based on a first block of gamma values; generating a first data signal corresponding to the first block of gamma voltages; providing the first data signal to a first pixel included in the first block; generating a second block of gamma voltages based on a second block of gamma values ​​different from the first block of gamma values; generating a second data signal corresponding to the second block of gamma voltages; and providing the second data signal to a second pixel included in a second block, wherein the first pixel is provided with a first data signal having a first voltage, and the second pixel is provided with a second data signal having a second voltage different from the first voltage, and the first data signal and the second data signal correspond to the same grayscale level.

[0021] Each of the first block and the second block includes at least one scan line.

[0022] The first block includes odd-numbered scan lines, and the second block includes even-numbered scan lines.

[0023] The area of ​​the first block and the area of ​​the second block are different from each other.

[0024] The first block gamma value and the second block gamma value are set so that light having the same brightness is generated in the first pixel and the second pixel.

[0025] The method also includes determining whether the first data signal or the second data signal has been provided using at least one of a data enable signal and a horizontal synchronization signal.

[0026] The method also includes storing the first block of gamma values ​​and the second block of gamma values ​​in a lookup table. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0028] Figure 2 is a diagram illustrating a pixel unit according to an embodiment of the present disclosure.

[0029] Figure 3 is a diagram showing a timing controller according to an embodiment of the present disclosure.

[0030] Figure 4 is a diagram illustrating a method of driving a display device according to an embodiment of the present disclosure.

[0031] Figure 5A and Figure 5B is shown with Figure 4 Figure 2. Gamma values ​​corresponding to the method shown in Figure 2.

[0032] Fig. 6A and Figure 6B is a diagram illustrating a scan driver and an emission driver according to an embodiment of the present disclosure.

[0033] Figure 7 is a diagram illustrating a method of driving a display device according to an embodiment of the present disclosure.

[0034] Fig. 8A and Figure 8B is shown with Figure 7 Figure 2. Gamma values ​​corresponding to the method shown in Figure 2.

[0035] Fig. 9 is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0036] Fig.10 It is shown Fig. 9 A diagram of an embodiment of a pixel unit shown in FIG.

[0037] Fig.11A and Fig. 11B Shown by Fig. 9 The gamma values ​​provided by the timing controller are shown in .

[0038] Fig.12 is a diagram showing a pixel according to an embodiment of the present disclosure.

[0039] Fig.13 Is shown driving Fig.12 FIG. 1 is a diagram of an exemplary method for a pixel shown in FIG. DETAILED DESCRIPTION

[0040] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The present disclosure can be implemented in various forms and is not limited to the embodiments set forth herein.

[0041] In the accompanying drawings, dimensions may be exaggerated for clarity of illustration. Throughout the specification, the same reference numerals may refer to the same elements. It will also be understood that when an element is referred to as being "between" two elements, it may be the only element between the two elements, or one or more intervening elements may also be present.

[0042] Herein, the expression “equal” may mean “substantially equal.” For example, this may mean equal to the extent that a person skilled in the art may assume that they are equal.

[0043] Some embodiments are described in the accompanying drawings about functional blocks, units and / or modules. It will be appreciated by those skilled in the art that these blocks, units and / or modules are physically implemented by logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, line connectors and other electrical circuits. These can be formed by using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case of blocks, units and / or modules implemented by microprocessors or other similar hardware, units and / or modules can be programmed and controlled by using software to perform various functions discussed in the present disclosure, and are selectively driven by firmware and / or software. In addition, each block, each unit and / or each module can be implemented by a combination of dedicated hardware or dedicated hardware for performing some functions of blocks, units and / or modules and processors (e.g., one or more programmed microprocessors and associated circuits) for performing other functions of blocks, units and / or modules. In some embodiments, blocks, units and / or modules can be physically separated into two or more discrete blocks, two or more discrete units and / or two or more discrete modules. Furthermore, in some embodiments, blocks, units and / or modules may be physically combined into more complex blocks, more complex units and / or more complex modules.

[0044] The term "connection" between two components may include both electrical connection and physical connection, but the present disclosure is not necessarily limited thereto. For example, the term "connection" used based on a circuit diagram may mean electrical connection, and the term "connection" used based on a cross-sectional view and a plan view may mean physical connection.

[0045] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, the "first" element discussed below may also be referred to as the "second" element.

[0046] Furthermore, each embodiment disclosed below may be implemented independently or combined with at least one other embodiment.

[0047] Figure 1 is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0048] refer to Figure 1 , the display device 100 according to an embodiment of the present disclosure may include a pixel unit 110 (or a display panel), a driving circuit unit 200, a scan driver 130, an emission driver 140, and a power supply 170. The driving circuit unit 200 may include a timing controller 120, a data driver 150, and a gamma voltage supplier 160. In an embodiment, the timing controller 120, the data driver 150, and the gamma voltage supplier 160 may be configured as one integrated circuit (IC). In an embodiment, at least some functions of the timing controller 120, the data driver 150, and the gamma voltage supplier 160 may be included in one IC.

[0049] The pixel unit 110 may display an image. The pixel unit 110 may be any one of an organic light emitting display panel, a liquid crystal display panel, an electrophoretic display panel, and an inorganic light emitting display panel. The pixel unit 110 may include pixels PX connected to scan lines SL1 to SLn, data lines DL1 to DLm, emission control lines EL1 to ELn, and power lines PL1, PL2, and PL3 (n and m are natural numbers of 2 or more).

[0050] The pixels PX may be disposed in regions separated by the scan lines SL1 to SLn and the data lines DL1 to DLm. Each of the pixels PX may be connected to at least one of the scan lines SL1 to SLn, any one of the data lines DL1 to DLm, and any one of the emission control lines EL1 to ELn. In an example, as Fig.12As shown in , the pixel PXij located on the i-th horizontal line and the j-th vertical line may be connected to the (i-1)-th scan line SLi-1, the i-th scan line SLi, the j-th data line DLj, and the i-th emission control line ELi. The pixel PXij may receive power via power lines PL1, PL2, and PL3.

[0051] Each of the pixels PX may be electrically connected between a first power line PL1 and a second power line PL2. A first driving power source VDD may be applied to the first power line PL1, and a second driving power source VSS may be applied to the second power line PL2. The first driving power source VDD may be a power source that provides a driving current to the pixel PX, and the second driving power source VSS may be a power source that is provided with the driving current. The first driving power source VDD may be set to a voltage higher than a voltage of the second driving power source VSS during an emission period of the pixel PX.

[0052] Each of the pixels PX may be provided with a data signal from a data line connected to the pixel PX when a scan signal (or enable scan signal) is provided to a scan line connected to the pixel PX. When provided with a data signal, the pixel PX may emit light having a brightness corresponding to the data signal to the outside (or external). Each of the pixels PX may emit light of any one of a first color, a second color, and a third color to the outside. Therefore, the pixel PX may include a pixel of a first color, a pixel of a second color, and a pixel of a third color. The first color, the second color, and the third color may be different colors. As an example, the first color, the second color, and the third color may be red, green, and blue, respectively. In another embodiment, the first color, the second color, and the third color may be magenta, cyan, and yellow, respectively.

[0053] Furthermore, signal lines (eg, scan lines, data lines, and emission control lines) connected to each of the pixels PX and a driving method may vary based on the structure of the pixels PX.

[0054] The scan driver 130 may generate a scan signal corresponding to a scan drive signal SCS from the timing controller 120, and sequentially provide the scan signal to the scan lines SL1 to SLn. As an example, the timing controller 120 may provide the scan driver 130 with the scan drive signal SCS including a scan start signal, a clock signal, etc. The scan driver 130 may be implemented as a shift register that sequentially generates and outputs a scan signal while shifting the scan start signal corresponding to the clock signal.

[0055] The emission driver 140 may generate an emission control signal corresponding to the emission drive signal ECS from the timing controller 120, and sequentially provide the emission control signal to the emission control lines EL1 to ELn. As an example, the timing controller 120 may provide the emission drive signal ECS including an emission start signal, a clock signal, etc. to the emission driver 140. The emission driver 140 may be implemented as a shift register that sequentially generates and outputs the emission control signal while shifting the emission start signal corresponding to the clock signal.

[0056] The scan driver 130 and the emission driver 140 may be formed together with the pixel PX on the pixel unit 110. However, the present disclosure is not limited thereto. For example, the scan driver 130 and / or the emission driver 140 may be mounted on a circuit film and connected to the timing controller 120 via at least one circuit film and a printed circuit board.

[0057] The data driver 150 may be provided with a data driving signal DCS and output data Dout from the timing controller 120. The data driving signal DCS may include a sampling signal and / or a timing signal for driving the data driver 150. In addition, the data driver 150 may be provided with a gamma voltage VG from a gamma voltage supplier 160.

[0058] The data driver 150 may generate a data signal by selecting a gamma voltage VG corresponding to a grayscale of the output data Dout. The data driver 150 may provide a data signal by using a horizontal line as a unit. The term "horizontal line" may refer to a row in which pixels connected to the same scan line are arranged.

[0059] The gamma voltage VG may include a first gamma voltage VGR, a second gamma voltage VGG, and a third gamma voltage VGB. The first gamma voltage VGR may correspond to a pixel of a first color, and the data driver 150 may generate a data signal to be provided to the pixel of the first color using the first gamma voltage VGR. The second gamma voltage VGG may correspond to a pixel of a second color, and the data driver 150 may generate a data signal to be provided to the pixel of the second color using the second gamma voltage VGG. The third gamma voltage VGB may correspond to a pixel of a third color, and the data driver 150 may generate a data signal to be provided to the pixel of the third color using the third gamma voltage VGB. Each of the first gamma voltage VGR, the second gamma voltage VGG, and the third gamma voltage VGB may include a gamma voltage corresponding to a grayscale (e.g., 256 grayscales) displayed in the pixel PX, respectively.

[0060] The gamma voltage supplier 160 may be provided with the gamma value GM from the timing controller 120 and generate the gamma voltage VG corresponding to the gamma value GM. In an embodiment, the gamma voltage supplier 160 may change the voltage value of the gamma voltage VG corresponding to the gamma value GM. The gamma value GM may include a first gamma value GMR, a second gamma value GMG, and a third gamma value GMB.

[0061] The first gamma value GMR may correspond to a pixel of a first color, and the gamma voltage supplier 160 may generate a first gamma voltage VGR based on the first gamma value GMR. The second gamma value GMG may correspond to a pixel of a second color, and the gamma voltage supplier 160 may generate a second gamma voltage VGG based on the second gamma value GMG. The third gamma value GMB may correspond to a pixel of a third color, and the gamma voltage supplier 160 may generate a third gamma voltage VGB based on the third gamma value GMB.

[0062] The timing controller 120 may receive input data Din and a control signal CS from a host system through an interface. In an example, the timing controller 120 may receive input data Din and a control signal CS from at least one of a graphics processing unit (GPU), a central processing unit (CPU), and an application processor (AP) included in the host system. Various signals including a clock signal may be included in the control signal CS.

[0063] The timing controller 120 may generate a scan driving signal SCS, a data driving signal DCS, and an emission driving signal ECS based on the control signal CS. The scan driving signal SCS, the data driving signal DCS, and the emission driving signal ECS may be provided to the scan driver 130, the data driver 150, and the emission driver 140, respectively.

[0064] The timing controller 120 may readjust the input data Din to a specification suitable for the display device 100. In addition, the timing controller 120 may generate output data Dout by correcting the input data Din, and provide the output data Dout to the data driver 150. In an embodiment, the timing controller 120 may correct the input data Din corresponding to an optical measurement result obtained by measuring in a manufacturing process.

[0065] The power supply 170 may generate various power supplies required for the operation of the display device 100. In an example, the power supply 170 may generate a first driving power supply VDD and a second driving power supply VSS. The power supply 170 may also generate various power supplies, for example, an initialization power supply VINT customized for the structure of the pixel PX.

[0066] The first driving power VDD generated by the power supply 170 may be supplied to the first power line PL1, the second driving power VSS generated by the power supply 170 may be supplied to the second power line PL2, and the initialization power VINT generated by the power supply 170 may be supplied to the third power line PL3. The first power line PL1, the second power line PL2, and the third power line PL3 may be commonly connected to the pixel PX, but the embodiments of the present disclosure are not limited thereto.

[0067] In an embodiment, the first power line PL1 may be configured with a plurality of power lines, and the plurality of power lines may be connected to different pixels PX. In an embodiment, the second power line PL2 may be configured with a plurality of power lines, and the plurality of power lines may be connected to different pixels PX. In an embodiment, the third power line PL3 may be configured with a plurality of power lines, and the plurality of power lines may be connected to different pixels PX.

[0068] Figure 2 is a diagram showing a pixel unit according to an embodiment of the present disclosure. Figure 2 One data line DLj is shown in FIG.

[0069] refer to Figure 2 In an embodiment of the present disclosure, the pixel unit 110 may include a plurality of blocks BL1, BL2, ... and BLk (k is a natural number of 3 or more). Each of the blocks BL1 to BLk may include at least one horizontal line. In an example, each of the blocks BL1 to BLk may include at least one scan line (at least one of the scan lines SL1 to SLn). For this purpose, the blocks BL1 to BLk may be divided along a horizontal line direction (e.g., a first direction DR1). The number of pixels PX included in each block BL1 to BLk may be equal to or different from each other.

[0070] The blocks BL1 to BLk may be separated based on a distance from the data driver 150. As an example, the first block BL1 may be adjacent to (e.g., adjacent to) the data driver 150, and the kth block BLk may be spaced apart from the data driver 150. The second block BL2 may be disposed between the first block BL1 and the kth block BLk.

[0071] The first block BL1 may include at least one scan line (at least one of the scan lines SL1 to SLn), and include a first pixel PX1. The second block BL2 may include at least one scan line (at least one of the scan lines SL1 to SLn), and include a second pixel PX2. The k-th block BLk (k is a natural number of 3 or greater) may include at least one scan line (at least one of the scan lines SL1 to SLn), and include a k-th pixel PXk. The designation of the first pixel PX1, the second pixel PX2, and the k-th pixel PXk emphasizes that the first pixel PX1, the second pixel PX2, and the k-th pixel PXk are located in different blocks. The first pixel PX1, the second pixel PX2, and the k-th pixel PXk may be Figure 1 The pixels PX shown in FIG. 1 are substantially the same.

[0072] The data line DLj may be arranged in a vertical line direction (e.g., a second direction DR2) in the pixel unit 110. As an example, the second direction DR2 may be a direction different from the first direction DR1. The second direction DR2 may be a direction orthogonal to the first direction DR1. As an example, the first direction DR1 may be a horizontal direction, and the second direction DR2 may be a vertical direction.

[0073] The data line DLj may be electrically connected to the first pixel PX1, the second pixel PX2, and the kth pixel PXk when the data line DLj is disposed in the second direction DR2. The data driver 150 may provide a data signal Vdata to each of the first pixel PX1, the second pixel PX2, and the kth pixel PXk via the data line DLj.

[0074] The first pixel PX1 to the k-th pixel PXk may be located at different distances from the data driver 150. As an example, the distance between the first pixel PX1 and the data driver 150 may be closer than the distance between the k-th pixel PXk and the data driver 150. As an example, the distance from the second pixel PX2 to the data driver 150 may be greater than the distance from the first pixel PX1 to the data driver 150. In addition, the distance from the second pixel PX2 to the data driver 150 may be closer than the distance from the k-th pixel PXk to the data driver 150.

[0075] The loads (or resistances) of the data line DLj in the first pixel PX1, the second pixel PX2, and the k-th pixel PXk may be different from each other. As an example, the data signal Vdata provided to the first pixel PX1 may be provided with a first load, and the data signal Vdata provided to the second pixel PX2 may be provided with a second load greater than the first load. As an example, the data signal Vdata provided to the k-th pixel PXk may be provided with a k-th load greater than the second load. In other words, the loads on the data lines DLj connected to the pixels PX1, PX2, and PXk may vary according to their distances from the data driver 150.

[0076] Therefore, when the data signal Vdata provided to each of the pixels PX1, PX2, and PXk is provided with a different load, light of different brightness can be generated in the pixels PX1, PX2, and PXk even when the same data signal Vdata is provided. In an embodiment of the present disclosure, a method for compensating for a load variation of a data line DLj is disclosed.

[0077] Figure 3 is a diagram showing a timing controller according to an embodiment of the present disclosure.

[0078] refer to Figure 3 , the timing controller 120 according to an embodiment of the present disclosure may include a gamma value supplier 122 and a lookup table (LUT) 124 .

[0079] The gamma value GM may be stored in the LUT 124. In an embodiment, various gamma values ​​GM may be stored in the LUT 124 so that voltages of different data signals may be generated corresponding to the same grayscale. In other words, different gamma values ​​GM may be stored in the LUT 124 so that voltages for varying data signals corresponding to the same grayscale may be generated. In an embodiment, different first gamma values ​​GMR, second gamma values ​​GMG, and third gamma values ​​GMB may be stored in the LUT 124. This allows voltages for different data signals to be generated within pixels of the first color, the second color, and the third color, ensuring that they correspond to the same grayscale.

[0080] refer to Figure 2 and Figure 3, the gamma value supplier 122 may determine a horizontal line (or any one of the blocks BL1 to BLk) to which a current data signal is supplied by using the data enable signal DE (and / or the horizontal synchronization signal Hsync), and supply a gamma value GM corresponding to the determined block (any one of the blocks BL1 to BLk) to the gamma voltage supplier 160. The gamma value supplier 122 may control the gamma value GM so that light having the same brightness may be generated in the pixels PX1 to PXk regardless of the load on the data lines DL1 to DLm.

[0081] The gamma voltage supplier 160 may provide the gamma voltage VG to the data driver 150 based on the gamma value GM. The gamma voltage supplier 160 may generate the gamma voltage VG so that voltages for different data signals can be provided to the respective blocks BL1 to BLk. This ensures that each block BL1 to BLk receives a voltage corresponding to the same grayscale based on the gamma value GM. In an embodiment, the gamma voltage supplier 160 may generate a first gamma voltage VGR, a second gamma voltage VGG, and a third gamma voltage VGB based on the gamma value GM so that voltages for different data signals can be provided to the respective blocks BL1 to BLk, ensuring that each block BL1 to BLk receives a voltage corresponding to the same grayscale.

[0082] Figure 4 is a diagram illustrating a method of driving a display device according to an embodiment of the present disclosure. Figure 5A and Figure 5B is shown with Figure 4 Figure 2. Gamma values ​​corresponding to the method shown in Figure 2.

[0083] refer to Figures 1 to 5B When an image is displayed in the display device 100, the gamma value supplier 122 may provide the gamma value GM to the gamma voltage supplier 160 (S402). As an example, the gamma value supplier 122 may provide the gamma value GM corresponding to the first block BL1 to the gamma voltage supplier 160 at the beginning of a frame.

[0084] The gamma voltage supplier 160 supplied with the gamma value GM may generate a gamma voltage VG corresponding to the gamma value GM and supply the gamma voltage VG to the data driver 150. The data driver 150 may supply a data signal Vdata to the first pixel PX1 located in the first block BL1 corresponding to the gamma value GM.

[0085] Next, the gamma value supplier 122 may determine a block (any one of the blocks BL1 to BLk) to which the current data signal is provided by using the data enable signal DE (and / or the horizontal synchronization signal Hsync) (S404). When the block (any one of the blocks BL1 to BLk) to which the data signal Vdata is provided does not change in step S404, the gamma value supplier 122 may maintain the gamma value GM (S406).

[0086] When the block (any one of the blocks BL1 to BLk) to which the data signal Vdata is supplied in step S404 changes, the gamma value supplier 122 may change the gamma value GM and supply the changed gamma value GM to the gamma voltage supplier 160 (S408). Thereafter, the gamma value supplier 122 may change the gamma value GM in units corresponding to each of the blocks BL1 to BLk and repeat steps S402 to S408.

[0087] Meanwhile, the gamma value supplier 122 may control the gamma value GM to generate light of the same brightness (or light of similar brightness) in the blocks BL1 to BLk (or the first pixel PX1 , the second pixel PX2 , and the kth pixel PXk) in response to the same data signal Vdata.

[0088] As an example, when a block (any one of the blocks BL1 to BLk) is as follows in step S404: Figure 5A When the gamma value supplier 122 changes as shown in FIG. 1 , the gamma value supplier 122 may increase the gamma value GM. As an example, when a block (any one of the blocks BL1 to BLk) is changed as shown in step S404, Figure 5B When the gamma value GM is changed as shown in FIG.

[0089] More specifically, the voltage of the data signal may be controlled according to the type of the driving transistor included in each of the pixels PX. As an example, when an N-type driving transistor is provided, as the voltage of the data signal increases, light with higher brightness may be generated. Figure 5A When the gamma value GM is changed as shown in , the gamma value supplier 122 may control the gamma value GM to increase, thereby providing a higher voltage of the data signal for the same gray level.

[0090] As an example, when a P-type driving transistor is set, as the voltage of the data signal decreases, light with higher brightness can be generated. Figure 5B When the gamma value GM is changed as shown in FIG. 1 , the gamma value supplier 122 may control the gamma value GM to decrease, thereby providing a lower voltage of the data signal for the same gray level.

[0091] As described above, in the present disclosure, different gamma values ​​GM are provided in the units of the blocks BL1 to BLk, so that the loads of the data lines DL1 to DLm can be compensated. Therefore, an image with uniform brightness can be displayed on the pixel unit 110.

[0092] Fig. 6A and Figure 6B 1 is a diagram showing a scan driver and an emission driver according to an embodiment of the present disclosure. Figure 1 ) can be used in small wearable devices including watches (e.g., smart glasses, smart bracelets, Internet of Things (IoT) devices). When the display panel is applied to a small wearable device, the frame of the display panel should be set to be thin. Therefore, if Fig. 6A and Figure 6B As shown in , the scan driver 130 and / or the emission driver 140 may be disposed at both sides of the pixel unit 110 , and the pixel unit 110 is interposed between the scan drivers 130 and / or between the emission drivers 140 .

[0093] refer to Fig. 6A , the scan driver 130 according to an embodiment of the present disclosure may be disposed at both sides of the pixel unit 110, and the pixel unit 110 is interposed between the scan drivers 130. As an example, the first scan driver 132 may be located at the left side of the pixel unit 110, and provide scan signals to the odd-numbered scan lines SL1, SL3, ..., and SLn-1. As an example, the second scan driver 134 may be located at the right side of the pixel unit 110, and provide scan signals to the even-numbered scan lines SL2, SL4, ..., and SLn.

[0094] refer to Figure 6B , the emission driver 140 according to an embodiment of the present disclosure may be disposed at both sides of the pixel unit 110, and the pixel unit 110 is interposed between the emission drivers 140. As an example, the first emission driver 142 may be located at the left side of the pixel unit 110, and provide emission control signals to the odd-numbered emission control lines EL1, EL3, ..., and ELn-1. As an example, the second emission driver 144 may be located at the right side of the pixel unit 110, and provide emission control signals to the even-numbered emission control lines EL2, EL4, ..., and ELn.

[0095] When the odd-numbered horizontal lines and the even-numbered horizontal lines are composed of Fig. 6A and Figure 6B When driven by different drivers 132, 134, 142 and 144 shown in FIG, a brightness difference may occur between odd-numbered horizontal lines and even-numbered horizontal lines. As an example, although the same data signal is provided, the pixels PX located on the odd-numbered horizontal lines (see FIG. Figure 1 ) and the brightness of the light emitted from the pixels PX located on the even-numbered horizontal lines (see Figure 1 )The brightness of the light emitted can be different from each other.

[0096] Figure 7 is a diagram illustrating a method of driving a display device according to an embodiment of the present disclosure. Fig. 8A and Figure 8B is shown with Figure 7 Figure 2. Gamma values ​​corresponding to the method shown in Figure 2.

[0097] refer to Figure 1 , Figure 3 as well as Figures 7 to 8B When an image is displayed in the display device 100, the gamma value supplier 122 in the timing controller 120 may provide the gamma value GM to the gamma voltage supplier 160. The gamma value supplier 122 may determine whether the data signal has been provided to the odd-numbered horizontal lines by using the data enable signal DE (and / or the horizontal synchronization signal Hsync) (S702).

[0098] When the data signal is supplied to the odd-numbered horizontal line in step S702, the gamma value supplier 122 may supply the gamma voltage supplier 160 with an odd gamma value corresponding to the odd-numbered horizontal line (S704). When the data signal is not supplied to the odd-numbered horizontal line in step S702 (for example, when the data signal is supplied to the even-numbered horizontal line), the gamma value supplier 122 may supply the gamma voltage supplier 160 with an even gamma value corresponding to the even-numbered horizontal line (S706).

[0099] The gamma voltage supplier 160 provided with the odd gamma value may generate a gamma voltage VG corresponding to the odd gamma value, and provide the gamma voltage VG to the data driver 150. The data driver 150 may generate a data signal to be provided to the pixel PX located on the odd-numbered horizontal line by using the gamma voltage VG. The gamma voltage supplier 160 provided with the even gamma value may generate a gamma voltage VG corresponding to the even gamma value, and provide the gamma voltage VG to the data driver 150. The data driver 150 may generate a data signal to be provided to the pixel PX located on the even-numbered horizontal line by using the gamma voltage VG.

[0100] The gamma value supplier 122 has the ability to control both odd gamma values ​​and even gamma values. This ensures that light with the same brightness (or light with similar brightness) is generated in response to the same data signal in both the pixels PX located on the odd-numbered horizontal lines and in the pixels PX located on the even-numbered horizontal lines. As an example, the odd gamma value and the even gamma value may have different values ​​and be pre-stored in the LUT 124. As an example, Fig. 8A As shown in , odd gamma values ​​can be smaller than even gamma values. Fig. 8A In , odd gamma values ​​may correspond to a logic low and even gamma values ​​may correspond to a logic high. As an example, Figure 8B As shown in , odd gamma values ​​can be larger than even gamma values. Figure 8B , odd gamma values ​​may correspond to a logic high and even gamma values ​​may correspond to a logic low.

[0101] In the embodiments of the present disclosure, reference Figure 2 The method of controlling the gamma value in the block unit described can be applied to reference FIG. 6A to FIG. 8B Describes the method for controlling gamma.

[0102] The pixel unit 110 may be separated in units of blocks BL1 to BLk. In addition, the gamma value supplier 122 may provide an odd gamma value corresponding to a pixel PX located on an odd-numbered horizontal line in the same block (any one of the blocks BL1 to BLk), and provide an even gamma value corresponding to a pixel PX located on an even-numbered horizontal line in the same block (any one of the blocks BL1 to BLk). The odd gamma value and the even gamma value may be set to different values, and may be determined so that light having the same brightness (or light having similar brightness) is generated in the pixel PX located on the odd-numbered horizontal line and the pixel PX located on the even-numbered horizontal line corresponding to the same data signal Vdata.

[0103] In addition, the gamma value supplier 122 may provide different odd gamma values ​​and different even gamma values ​​corresponding to the respective blocks BL1 to BLk. As an example, the gamma value supplier 122 may provide different odd gamma values ​​and different even gamma values ​​in units of blocks BL1 to BLk, thereby generating light having the same brightness in the blocks BL1 to BLk.

[0104] In addition, odd-numbered horizontal lines (or odd-numbered scan lines) may be referred to as odd-numbered blocks, and even-numbered horizontal lines (or even-numbered scan lines) may be referred to as even-numbered blocks. The pixel unit 110 may be partitioned into a plurality of regions including at least one odd-numbered block and at least one even-numbered block. The regions may correspond to Figure 2Different odd gamma values ​​and different even gamma values ​​may be provided to each of the blocks BL1 to BLk shown in FIG.

[0105] Fig. 9 is a diagram showing a display device according to an embodiment of the present disclosure. Fig. 9 In the Figure 1 Components that are identical to those shown in the overlapping descriptions.

[0106] refer to Fig. 9 The display device 100 according to an embodiment of the present disclosure may include a pixel unit 110a (or a display panel), a driving circuit unit 200, a scan driver 130, an emission driver 140, and a power supply 170. The driving circuit unit 200 may include a timing controller 120, a data driver 150, and a gamma voltage supplier 160.

[0107] The pixel unit 110a may display a predetermined image. To achieve this, the pixel unit 110a may include a pixel PX. The pixel unit 110a may be any one of an organic light emitting display panel, a liquid crystal display panel, an electrophoretic display panel, and an inorganic light emitting display panel. The pixel unit 110a may include a pixel PX connected to scan lines SL1 to SLn, data lines DL1 to DLm, emission control lines EL1 to ELn, and power lines PL1, PL2, and PL3 (n and m are natural numbers of 2 or more).

[0108] The width of the pixel unit 110a can be configured to vary according to its position. The width of the pixel unit 110a can be determined based on the number of pixels PX located on the horizontal line. As an example, when the number of pixels PX located on the horizontal line is different from each other, the width of the pixel unit 110a is different from each other.

[0109] The pixel unit 110a may have a circular shape, and thus, the widths of the pixel units 110a may be different from each other. However, the embodiments of the present disclosure are not limited thereto, and the pixel unit 110a may have different shapes, for example, various shapes such as polygons, triangles, and rhombuses.

[0110] Fig.10 It is shown Fig. 9 For ease of description, the following is a diagram of an embodiment of a pixel unit shown in FIG. Fig.10 One data line DLj is shown in FIG.

[0111] refer to Fig.10, the pixel unit 110a according to an embodiment of the present disclosure may include a plurality of blocks BL1a, BL2a, BL3a, BL4a, ... and BLka (k is a natural number of 3 or greater). Each of the blocks BL1a to BLka may include one horizontal line (or scan line). As an example, each of the blocks BL1a to BLka may include at least one scan line (at least one of the scan lines SL1 to SLn). The blocks BL1a to BLka may be separated in a horizontal line direction (e.g., a first direction DR1). The number of pixels PX included in each block BL1a to BLka may be equal to or different from each other.

[0112] Since the pixel unit 110a has different widths according to its position, each of the blocks BL1a to BLka has a different area compared to at least another block. As an example, the first block BL1a may have an area smaller than that of the second block BL2a, the second block BL2a may have an area smaller than that of the third block BL3a, and the third block BL3a may have an area smaller than that of the fourth block BL4a. In addition, the kth block BLka may have the same area as the first block BL1a.

[0113] Therefore, when each of the blocks BL1a to BLka has a different area compared to at least another block, light with different brightness may be generated in at least one of the pixels PX1a, PX2a, PX3a, PX4a, ..., and PXka corresponding to the same data signal Vdata. As an example, when the blocks BL1a to BLka have different areas, the pixels PX1a, PX2a, PX3a, PX4a, ..., and PXka included in the respective blocks BL1a to BLka may have different loads applied thereto, and therefore, light with different brightness may be generated in response to the same data signal Vdata.

[0114] As an example, the load of the scan line connected to the first pixel PX1a may be different from the load of the scan line connected to each of the pixels PX2a, PX3a and PX4a included in the blocks BL2a, BL3a and BL4a having different areas. In addition, the load of the data line DLj connected to the first pixel PX1a may be different from the load of the data line DLj connected to each of the pixels PX2a, PX3a, PX4a, ... and PXka. In addition, when the blocks BL1a to BLka have different areas, the voltages of the driving power supplies VDD and VSS and the initialization power supply VINT provided to the pixels PX1a to PXka may be different from each other. Therefore, in an embodiment of the present disclosure, the gamma value GM is controlled so that no brightness change occurs in each of the blocks BL1a to BLka.

[0115] Fig.11A and Fig. 11B Shown by Fig. 9 The gamma values ​​provided by the timing controller are shown in .

[0116] refer to Figure 3 as well as Figures 9 to 11B , when an image is displayed in the display device 100, the gamma value supplier 122 may provide the gamma value GM to the gamma voltage supplier 160. As an example, the gamma value supplier 122 may provide the gamma value GM corresponding to the first block BL1a to the gamma voltage supplier 160 at the start of a frame.

[0117] The gamma voltage supplier 160 may generate a gamma voltage VG corresponding to the gamma value GM and provide the gamma voltage VG to the data driver 150. The data driver 150 may provide a data signal Vdata to the first pixel PX1a located in the first block BL1a corresponding to the gamma value GM.

[0118] The gamma value supplier 122 may determine a block (any one of the blocks BL1a to BLka) to which a current data signal is provided using the data enable signal DE (and / or the horizontal synchronization signal Hsync). When the block to which the data signal Vdata is provided is changed to the second block BL2a, the gamma value supplier 122 may change the gamma value GM and provide the changed gamma value GM to the gamma voltage supplier 160. The changed gamma value GM may be predetermined so that light of the same brightness or light of similar brightness may be generated in the first pixel PX1a and the second pixel PX2a in response to the same data signal Vdata.

[0119] The gamma value supplier 122 may set a different gamma value GM for each block ranging from the third block BL3a to the kth block BLka. The gamma value GM corresponding to each of the blocks BL1a to BLka may be set so that light of the same brightness or light of similar brightness may be generated in the pixels PX1a to PXka included in the respective blocks BL1a to BLka.

[0120] As an example, Fig.11A As shown in , the gamma value GM may increase while moving from the first block BL1a to the fourth block BL4a, and decrease while moving from the fourth block BL4a to the kth block BLka. Such a change in the gamma value GM may correspond to the area of ​​each of the blocks BL1a to BLka.

[0121] As an example, Fig. 11BAs shown in , the gamma value GM may decrease while moving from the first block BL1a to the fourth block BL4a, and increase while moving from the fourth block BL4a to the kth block BLka. Such a change in the gamma value GM may correspond to the area of ​​each of the blocks BL1a to BLka.

[0122] The gamma values ​​GM corresponding to some blocks may be stored in the LUT 124, and the gamma values ​​GM corresponding to other blocks may be generated by interpolation in the gamma value supplier 122. As an example, the gamma values ​​GM corresponding to the first block BL1a, the fourth block BL4a, and the kth block BLka may be stored in the LUT 124, and the gamma values ​​GM corresponding to the other blocks BL2a, BL3a, ... may be generated by interpolation in the gamma value supplier 122.

[0123] Fig.12 is a diagram showing a pixel according to an embodiment of the present disclosure.

[0124] refer to Fig.12 , the pixel PXij according to an embodiment of the present disclosure may include transistors T11 , T12 , T13 , T14 , T15 , T16 , and T17 , a storage capacitor Cst, and a light emitting element LD.

[0125] In the following, a circuit implemented with a P-type transistor is described as an example. However, those skilled in the art can design a circuit implemented with an N-type transistor by changing the polarity of the voltage applied to the gate terminal. Similarly, those skilled in the art can design a circuit implemented with a combination of a P-type transistor and an N-type transistor. The transistor can be configured in various forms including a thin film transistor (TFT), a field effect transistor (FET), a bipolar junction transistor (BJT), etc.

[0126] A gate electrode of the eleventh transistor T11 may be connected to the first node N1, a first electrode of the eleventh transistor T11 may be connected to the second node N2, and a second electrode of the eleventh transistor T11 may be connected to the third node N3. The eleventh transistor T11 may be referred to as a driving transistor.

[0127] A gate electrode of the twelfth transistor T12 may be connected to the scan line SLi1, a first electrode of the twelfth transistor T12 may be connected to the data line DLj, and a second electrode of the twelfth transistor T12 may be connected to the second node N2. A gate electrode of the thirteenth transistor T13 may be connected to the scan line SLi2, a first electrode of the thirteenth transistor T13 may be connected to the first node N1, and a second electrode of the thirteenth transistor T13 may be connected to the third node N3.

[0128] A gate electrode of the fourteenth transistor T14 may be connected to the scan line SLi3, a first electrode of the fourteenth transistor T14 may be connected to the first node N1, and a second electrode of the fourteenth transistor T14 may be connected to the third power line PL3. A gate electrode of the fifteenth transistor T15 may be connected to the i-th emission control line ELi, a first electrode of the fifteenth transistor T15 may be connected to the first power line PL1, and a second electrode of the fifteenth transistor T15 may be connected to the second node N2.

[0129] A gate electrode of the sixteenth transistor T16 may be connected to the i-th emission control line ELi, a first electrode of the sixteenth transistor T16 may be connected to the third node N3, and a second electrode of the sixteenth transistor T16 may be connected to the anode of the light emitting element LD. In an embodiment, the fifteenth transistor T15 and the sixteenth transistor T16 may be connected to different emission control lines.

[0130] A gate electrode of the seventeenth transistor T17 may be connected to the scan line SLi4, a first electrode of the seventeenth transistor T17 may be connected to the third power line PL3, and a second electrode of the seventeenth transistor T17 may be connected to the anode of the light emitting element LD. A first electrode of the storage capacitor Cst may be connected to the first power line PL1, and a second electrode of the storage capacitor Cst may be connected to the first node N1.

[0131] The anode of the light emitting element LD can be connected to the second electrode of the sixteenth transistor T16, and the cathode of the light emitting element LD can be connected to the second power line PL2. The light emitting element LD can be a light emitting diode. The light emitting element LD can be an organic light emitting diode, an inorganic light emitting diode, a quantum dot / well light emitting diode, etc. The light emitting element LD can emit any one of the first color, the second color, and the third color. In addition, in this embodiment, only one light emitting element LD is set in the pixel PXij. However, in another embodiment, a plurality of light emitting elements can be set in the pixel. A plurality of light emitting elements can be connected in series, in parallel, in series / in parallel, etc.

[0132] The voltage of the first driving power supply VDD may be applied to the first power line PL1, the voltage of the second driving power supply VSS may be applied to the second power line PL2, and the voltage of the initialization power supply VINT may be applied to the third power line PL3. For example, the voltage of the initialization power supply VINT may be equal to or higher than the voltage of the second driving power supply VSS. For example, the voltage of the initialization power supply VINT may be set to be equal to or lower than the minimum value of the data voltage within the range of voltages that can be provided for the data signal.

[0133] Fig.13 Is shown driving Fig.12 FIG. 1 is a diagram of an exemplary method for a pixel shown in FIG.

[0134] In the following, for ease of description, it is assumed that the scan lines SLi1, SLi2, and SLi4 correspond to the i-th scan line SLi, and the scan line SLi3 corresponds to the (i-1)th scan line SLi-1. However, in some embodiments, the connection relationship between the scan lines SLi1, SLi2, SLi3, and SLi4 may be different. For example, the scan line SLi4 may be the (i-1)th scan line or the (i+1)th scan line.

[0135] First, an emission control signal having a cut-off level (e.g., a logic high level) is applied to the i-th emission control line ELi, a data signal DATA(i-1)j for the (i-1)-th pixel is applied to the data line DLj, and a scan signal having a turn-on level (e.g., a logic low level) is applied to the scan line SLi3. The high / low of the logic level may be changed depending on whether the transistor is a P-type or an N-type.

[0136] Since the scan signal having the off level is applied to the scan lines SLi1 and SLi2 , the twelfth transistor T12 is in a turned-off state and prevents the data signal DATA(i-1)j for the (i-1)th pixel from being input to the pixel PXij.

[0137] Since the fourteenth transistor T14 is in the on state, the first node N1 is connected to the third power line PL3 and is initialized to the voltage of the initialization power supply VINT. Since the emission control signal with the cut-off level is applied to the i-th emission control line ELi, the transistors T15 and T16 are in the cut-off state. In this way, when the voltage from the initialization power supply VINT is applied, unnecessary light emission from the light emitting element LD is prevented.

[0138] Next, a data signal DATAij for a pixel PXij is applied to the data line DLj, and a scan signal having a conduction level is applied to the scan lines SLi1 and SLi2. Therefore, transistors T12, T11, and T13 are in a conductive state, and the data line DLj and the first node N1 are electrically connected to each other. Therefore, a compensation voltage obtained by subtracting the threshold voltage of the eleventh transistor T11 from the data signal DATAij is applied to the second electrode (e.g., the first node N1) of the storage capacitor Cst. Therefore, the storage capacitor Cst maintains a voltage corresponding to the difference between the voltage of the first driving power supply VDD and the compensation voltage. This period may be referred to as a threshold voltage compensation period or a data write period.

[0139] In addition, when the scan line SLi4 is the i-th scan line SLi, the seventeenth transistor T17 is in the on state. Therefore, the anode of the light emitting element LD and the third power line PL3 are connected to each other. Therefore, the light emitting element LD is initialized to a charge amount corresponding to the voltage difference between the voltage of the initialization power supply VINT and the voltage of the second driving power supply VSS.

[0140] Thereafter, when an emission control signal having a turn-on level is applied to the i-th emission control line ELi, the transistors T15 and T16 may be electrically connected to each other, thereby forming a driving current path through which the first power line PL1, the fifteenth transistor T15, the eleventh transistor T11, the sixteenth transistor T16, the light emitting element LD, and the second power line PL2 are connected to each other.

[0141] The amount of driving current flowing through the first electrode and the second electrode of the eleventh transistor T11 is adjusted according to the voltage held in the storage capacitor Cst. The light emitting element LD emits light having a brightness corresponding to the amount of driving current. The light emitting element LD emits light until an emission control signal having a cut-off level is applied to the i-th emission control line ELi.

[0142] When the emission control signal has an on-level, the pixel receiving the corresponding emission control signal may be in a display state. The period in which the emission control signal has an on-level may be referred to as an emission period EP (or emission enabled period). In addition, when the emission control signal has an off-level, the pixel receiving the corresponding emission control signal may be in a non-display state. The period in which the emission control signal has an off-level may be referred to as a non-emission period NEP (or emission prohibited period).

[0143] Fig.13 The non-emission period NEP described in is used to prevent the pixel PXij from emitting light with an undesired brightness while passing through the initialization period and the data writing period.

[0144] One or more non-emission periods NEP can be set while maintaining the data signal written to the pixel PXij (for example, one frame period). This approach aims to reduce the emission period EP of the pixel PXij. As a result, it can effectively depict low gray levels or subtle motion blur in the image.

[0145] In the display device and the method of driving the display device according to the present disclosure, the gamma value is set by considering the load of the data line, the shape of the pixel unit, process variation, etc., so that the display quality can be improved.

[0146] Exemplary embodiments have been disclosed herein, and although specific terms are used, they are used and interpreted in a general and descriptive sense and not for purposes of limitation. In some cases, as will be apparent to one of ordinary skill in the art, unless otherwise specifically indicated, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, those skilled in the art will understand that various changes in form and detail may be made thereto without departing from the spirit and scope of the present disclosure as set forth in the appended claims.

Claims

1. A display device, comprising: a pixel unit divided into a plurality of blocks including at least one scan line, the pixel unit including pixels connected to the scan line and the data line in each of the blocks; a gamma voltage supplier configured to generate a gamma voltage based on the gamma value; a data driver configured to generate a data signal to be provided to the data line using the gamma voltage; as well as A timing controller is configured to provide different gamma values ​​to at least two of the blocks, each of the different gamma values ​​corresponding to the same gray level.

2. The display device according to claim 1, wherein: The gamma voltage supplier generates different gamma voltages corresponding to the same grayscale based on the different gamma values.

3. The display device according to claim 2, wherein: The data driver generates data signals having different voltages to be supplied to the at least two blocks, each of the data signals corresponding to the same gray level.

4. The display device according to claim 1, wherein: The timing controller provides the different gamma values ​​to the at least two blocks to compensate for a load of the data line.

5. The display device according to claim 1, wherein: The blocks include odd-numbered blocks and even-numbered blocks, the odd-numbered blocks include odd-numbered scan lines, and the even-numbered blocks include even-numbered scan lines.

6. The display device according to claim 5, wherein: The timing controller provides an odd gamma value corresponding to the odd-numbered blocks, and provides an even gamma value different from the odd gamma value corresponding to the even-numbered blocks.

7. The display device according to claim 1, wherein: The pixel units have at least partially different widths, and the at least two of the blocks have different areas.

8. The display device according to claim 7, wherein: The timing controller provides the different gamma values ​​to the at least two blocks having the different areas.

9. The display device according to claim 1, wherein: The timing controller comprises: a lookup table configured to store the gamma value; and a gamma value supplier configured to provide the gamma value corresponding to the position of the block to which the data signal is provided to the gamma voltage supplier, and The gamma value supplier determines the position of the block to which the data signal is provided using at least one of a data enable signal and a horizontal synchronization signal.

10. The display device according to claim 9, wherein: When the gamma value corresponding to the first portion of the block is stored in the lookup table, the gamma value supplier generates the gamma value corresponding to the second portion of the block by interpolation.

Images