Display panel, driving method and display device

Abstract

The invention discloses a display panel, a driving method and a display device. The display panel comprises a plurality of pixel circuits, data lines and pulse width data lines, the pixel circuit comprises a driving transistor, a light-emitting control module, a pulse width adjusting module and a light-emitting element. The light emitting control module is connected between the first end of the driving transistor and a first power supply signal end; the pulse width adjusting module is connected between the second end of the driving transistor and the first end of the light-emitting element; a second end of the light-emitting element is connected with a second power signal end; the control end of the light-emitting control module receives a light-emitting control signal; the control end of the pulse width adjusting module is connected with a corresponding pulse width data line and receives a pulse width data signal. The time period of the effective pulse of the pulse width data signal is at least partially overlapped with the first time period of the effective pulse of the light-emitting control signal; the total width of effective pulses of the pulse width data signal is adjustable. According to the technical scheme, the problem that an existing modulation mode is complex can be solved.

Description

Technical Field

[0001] The present invention relates to the field of display technologies, and in particular, to a display panel, a driving method, and a display device. Background Art

[0002] An organic light-emitting diode (OLED) display panel refers to a display panel in which a light-emitting material emits light under the drive of an electric field through carrier injection and recombination. The organic light-emitting display panel is thinner and lighter, has better viewing angles and contrast ratios, etc., and thus has received extensive attention.

[0003] During the display process of the display panel, different display brightnesses of the light-emitting diodes can be represented by a pulse width driving method. In the pixel circuit in the prior art, a combination of a pulse amplitude modulation (PAM) mode and a pulse width modulation (PWM) mode can be used to achieve this, but the modulation method is complex and the setting of the pixel circuit is relatively complicated. Summary of the Invention

[0004] Embodiments of the present invention provide a display panel and a display device to solve the problem of the complex modulation method in the prior art.

[0005] In a first aspect, embodiments of the present invention provide a display panel, including: a plurality of pixel circuits, a data line, and a pulse width data line; the pixel circuit includes a driving transistor, a light-emitting control module, a pulse width adjustment module, and a light-emitting element;

[0006] The light-emitting control module is connected between the first end of the driving transistor and the first power signal terminal; the pulse width adjustment module is connected between the second end of the driving transistor and the first end of the light-emitting element; the second end of the light-emitting element is connected to the second power signal terminal;

[0007] Wherein, the control end of the light-emitting control module receives a light-emitting control signal; the control end of the pulse width adjustment module is connected to the corresponding pulse width data line and receives a pulse width data signal; the time period where the effective pulse of the pulse width data signal is located overlaps at least partially with the first time period where the effective pulse of the light-emitting control signal is located; within the first time period, the total width of the effective pulse of the pulse width data signal is adjustable.

[0008] In a second aspect, embodiments of the present invention further provide a driving method for a display panel, applicable to the display panel provided in any embodiment of the present invention, including:

[0009] Inputting a light-emitting control signal to the control end of the light-emitting control module of the pixel circuit;

[0010] Input the pulse width data signal output by the pulse width data line to the control end of the pulse width adjustment module of the pixel circuit; the time period where the effective pulse of the pulse width data signal is located overlaps at least partially with the first time period where the effective pulse of the light emission control signal is located;

[0011] Within the first time period, the total width of the effective pulses of the pulse width data signal is adjustable.

[0012] In a third aspect, an embodiment of the present invention further provides a display device, including the display panel provided by any embodiment of the present invention.

[0013] In the present invention, between the first power signal terminal and the second power signal terminal, the light emission control module, the driving transistor, the pulse width adjustment module, and the light emitting element of the pixel circuit are sequentially connected to form a driving light emission path. Among them, the driving transistor provides a driving current for the light emitting element, and the light emission control module and the pulse width adjustment module can control the on / off of this light emission path. Specifically, the control end of the light emission control module receives the light emission control signal, and the control end of the pulse width adjustment module receives the pulse width data signal. When both the light emission control signal and the pulse width data signal are effective pulses, the above driving light emission path can be turned on. In this embodiment, the conduction time of the driving light emission path can be controlled by controlling the overlapping time between the effective pulse of the pulse width data signal and the effective pulse of the light emission control signal, so as to adjust the display brightness of the light emitting element. It should be noted that if the time where the effective pulse of the light emission control signal is located is the first time period, the effective pulse width of the pulse width data signal within the first time period is adjustable, so as to realize the adjustable display brightness of the light emitting element. This embodiment does not require a complex pixel circuit structure, nor does it require a complex dimming signal. The relatively accurate adjustment of the display brightness of the light emitting element can be realized through the adjustment of the pulse width data signal. Description of the Drawings

[0014] Figure 1 It is a schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0015] Figure 2 It is a schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0016] Figure 3 It is a driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0017] Figure 4 It is another driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0018] Figure 5 It is another driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0019] Figure 6 Another structural schematic diagram of a pixel circuit provided by an embodiment of the present invention;

[0020] Figure 7 For Figure 6 A driving timing diagram of the pixel circuit in;

[0021] Figure 8 For Figure 6 Another driving timing diagram of the pixel circuit in;

[0022] Figure 9 A partial structural schematic diagram of a display panel provided by an embodiment of the present invention;

[0023] Figure 10 A timing diagram of multiple pulse width data signals provided by an embodiment of the present invention;

[0024] Figure 11 Another structural schematic diagram of a pixel circuit provided by an embodiment of the present invention;

[0025] Figure 12 Another timing diagram of multiple pulse width data signals provided by an embodiment of the present invention;

[0026] Figure 13 A structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0027] Figure 14 A structural schematic diagram of a comparative example of a display panel provided by an embodiment of the present invention;

[0028] Figure 15 A flow schematic diagram of a driving method of a display panel provided by an embodiment of the present invention;

[0029] Figure 16 A structural schematic diagram of a display device provided by an embodiment of the present invention. Detailed implementation manners

[0030] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. Additionally, it should be noted that for the convenience of description, only parts related to the present invention rather than all structures are shown in the drawings.

[0031] The current mainstream dimming methods are the direct current (DC) dimming method and the dimming method combining PAM and PWM. Among them, the DC dimming method adjusts the brightness of the display panel by changing the power of the pixel circuit. For example, the screen brightness is adjusted by adjusting the voltage or current, but the adjustment range of the brightness is small. For the dimming method combining PAM and PWM, PWM controls the emission pulse width, and PAM controls the emission pulse amplitude. Its common pixel structures are 13T, 14T, 16T, etc. This structure uses more thin film transistors (TFTs) to meet the pixel functions, resulting in a larger pixel size and a complex structure, which limits the PPI of the product. At the same time, more vertical shift registers (VSRs) also affect the border size of the display panel, making the overall panel design more complex and limiting the PPI of the product.

[0032] To solve the above problems, an embodiment of the present invention provides a display panel, as Figures 1 to 3 shown, Figure 1 which is a schematic structural diagram of a display panel provided by an embodiment of the present invention, Figure 2 which is a schematic structural diagram of a pixel circuit provided by an embodiment of the present invention, Figure 3 which is a driving timing diagram of a pixel circuit provided by an embodiment of the present invention. The display panel includes:

[0033] a plurality of pixel circuits 11, a data line 12, and a pulse width data line 13; the pixel circuit 11 includes a driving transistor M3, a light emission control module 111, a pulse width adjustment module 112, and a light emitting element 113;

[0034] the light emission control module 111 is connected between the first end of the driving transistor M3 and the first power signal terminal 15; the pulse width adjustment module 112 is connected between the second end of the driving transistor M3 and the first end of the light emitting element 113; the second end of the light emitting element 113 is connected to the second power signal terminal 14;

[0035] wherein, the control end of the light emission control module 111 receives a light emission control signal EMIT; the control end of the pulse width adjustment module 112 is connected to the corresponding pulse width data line 13 and receives a pulse width data signal PWM_DATA; the time period where the valid pulse of the pulse width data signal PWM_DATA is located overlaps at least partially with the first time period T1 where the valid pulse of the light emission control signal EMIT is located; within the first time period T1, the total width of the valid pulses of the pulse width data signal PWM_DATA is adjustable.

[0036] In an embodiment of the present invention, between a first power signal terminal and a second power signal terminal, a light-emitting control module, a driving transistor, a pulse-width modulation module, and a light-emitting element of a pixel circuit are sequentially connected to form a driving and light-emitting path. Among them, the driving transistor provides a driving current for the light-emitting element, and the light-emitting control module and the pulse-width modulation module can control the on / off of this light-emitting path. Specifically, the control terminal of the light-emitting control module receives a light-emitting control signal, and the control terminal of the pulse-width modulation module receives a pulse-width data signal. When both the light-emitting control signal and the pulse-width data signal are valid pulses, the above-mentioned driving and light-emitting path can be turned on. In this embodiment, the overlapping time of the valid pulse of the pulse-width data signal and the valid pulse of the light-emitting control signal can be controlled, so as to control the conduction time of the driving and light-emitting path, and thus adjust the display brightness of the light-emitting element. It should be noted that if the time where the valid pulse of the light-emitting control signal is located is the first time period, the width of the valid pulse of the pulse-width data signal within the first time period is adjustable, so as to realize the adjustable display brightness of the light-emitting element. This embodiment does not require a complex pixel circuit structure nor a complex dimming signal, and the relatively accurate adjustment of the display brightness of the light-emitting element can be realized through the adjustment of the pulse-width data signal.

[0037] The above is the core idea of the present invention. Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present invention.

[0038] The display panel includes pixel circuits 11 arranged in an array, and the pixel circuit 11 includes a pixel driving circuit 11a and a light-emitting element 113. The pixel driving circuit 11a includes a plurality of thin-film transistors for providing a driving current for the light-emitting element 113. The pixel driving circuit 11a at least includes a driving transistor M3, a light-emitting control module 111, and a pulse-width modulation module 112. The driving transistor M3 can provide a driving current for driving the light-emitting element 113. The light-emitting control module 111 is connected between the first end of the driving transistor M3 and the first power signal terminal 15. The pulse-width modulation module 112 is connected between the second end of the driving transistor M3 and the first end of the light-emitting element 113. The second end of the light-emitting element 113 is connected to the second power signal terminal 14, so that the first power signal terminal 15, the light-emitting control module 111, the driving transistor M3, the pulse-width modulation module 112, the light-emitting element 113, and the second power signal terminal 14 are sequentially turned on to form a transmission path to provide a light-emitting driving signal for the light-emitting element 113.

[0039] The display panel includes a plurality of data lines 12 and a plurality of pulse width data lines 13. The data lines 12 are used to provide data signals to the first ends of the driving transistors M3, and the pulse width data lines 13 are used to output a pulse width data signal PWM_DATA to the control end of the pulse width adjustment module 112. The control end of the light emission control module 111 receives a light emission control signal EMIT. The light emission control module 111 is turned on or off under the control of the light emission control signal EMIT. Specifically, when the light emission control signal EMIT is a valid pulse, the light emission control module 111 is turned on. Similarly, the pulse width adjustment module 112 is turned on or off under the control of the pulse width data signal PWM_DATA. When the pulse width data signal PWM_DATA is a valid pulse, the pulse width adjustment module 112 is turned on. Then both the light emission control module 111 and the pulse width adjustment module 112 can control the on or off of the above transmission path. Only when both the light emission control module 111 and the pulse width adjustment module 112 are turned on, the above transmission path can be turned on and the light emitting element 113 can emit light.

[0040] It should be noted that in this embodiment, the duration of the valid pulse of the pulse width data signal PWM_DATA output by the pulse width data line 13 can be controlled. Refer to Figure 3 , if the time period where the valid pulse of the light emission control signal EMIT is located is the first time period T1, then the valid pulse of the pulse width data signal PWM_DATA needs to at least partially overlap with the first time period T1. In this embodiment, within the first time period T1, the total width d1 of the valid pulse of the pulse width data signal PWM_DATA can be controlled to be adjustable, that is, the overlapping time is adjustable. Then in this embodiment, the size of the total width d1 within the first time period T1 can be controlled to accurately control the lighting time of the light emitting element 113. This embodiment can achieve stepless dimming of the display panel through the size of the total width d1 within the first time period T1, increase the brightness adjustment range of the display panel, and increase the brightness adjustment accuracy to adapt to different environmental requirements. And within the first time period T1, the light emitting element 113 does not emit light continuously, effectively reducing the energy consumption of the light emitting element 113 and extending the battery life of the display panel. In addition, in this embodiment, the pixel circuit structure is simple, there is no need to set a large number of thin film transistors, and there is no need to set a large number of VSR units to provide complex dimming signals. Compared with the prior art, only the pulse width data signal PWM_DATA is added to achieve a more accurate adjustment of the display brightness, which is beneficial to increasing the PPI of the display panel and improving the picture display effect.

[0041] Optionally, the light-emitting element 113 may be an Organic Light-Emitting Diode (OLED), or an LED chip, a Mini-LED, a Micro-LED, etc. This embodiment does not make special limitations on this. Exemplarily, when the light-emitting element 113 is an LED chip, a Mini-LED, or a Micro-LED, the light-emitting element 113 has advantages such as smaller size, faster response speed, higher luminous efficiency, stronger stability, and longer service life. At the same time, a higher PPI can also be achieved. In existing LED display products, especially in Mini LED / Micro LED display products on a glass substrate, the display effects such as color uniformity at low gray levels, low gray flicker, and gray levels are key problems that need to be solved in the driving of such products at this stage. In this embodiment, through a simple pixel circuit structure, the light-emitting time of the light-emitting element 113 can be infinitely adjusted by the pulse width data signal PWM_DATA, improving the display effect and adjustment accuracy of the display panel in the low gray level state and improving the picture display effect.

[0042] Figure 4 FIG. 4 is a driving timing diagram of another pixel circuit provided by an embodiment of the present invention. Optionally, the first time period T1 may cover the time period where the effective pulse of the pulse width data signal PWM_DATA is located. Since the light-emitting element 113 will only emit light during the overlapping time period of the pulse width data signal PWM_DATA and the first time period T1, in this embodiment, the effective pulse of the pulse width data signal PWM_DATA can be controlled within the first time period T1, that is, the start edge of the effective pulse of the light-emitting control signal (if the thin film transistors of the pixel circuit are all P-type transistors and the enable level is low, the start edge is the falling edge) is before the start edge of the effective pulse of the pulse width data signal PWM_DATA (if the enable level is low, the start edge is the falling edge), or the start edge of the effective pulse of the light-emitting control signal coincides with the start edge of the effective pulse of the pulse width data signal PWM_DATA; and the end edge of the effective pulse of the light-emitting control signal (if the thin film transistors of the pixel circuit are all P-type transistors and the enable level is low, the end edge is the rising edge) is after the end edge of the effective pulse of the pulse width data signal PWM_DATA (if the enable level is low, the end edge is the rising edge), or the end edge of the effective pulse of the light-emitting control signal coincides with the end edge of the effective pulse of the pulse width data signal PWM_DATA. As Figure 4As shown, this embodiment takes a P-type transistor as an example for illustration. However, in this embodiment, the thin-film transistor can also be an N-type transistor. Exemplarily, if the thin-film transistor of the pixel circuit is an N-type transistor, then the start edge (rising edge) of the effective pulse of the light emission control signal is before the start edge (rising edge) of the effective pulse of the pulse width data signal PWM_DATA, or the start edge of the effective pulse of the light emission control signal coincides with the start edge of the effective pulse of the pulse width data signal PWM_DATA; and the end edge (falling edge) of the effective pulse of the light emission control signal is after the end edge (falling edge) of the effective pulse of the pulse width data signal PWM_DATA, or the end edge of the effective pulse of the light emission control signal coincides with the end edge of the effective pulse of the pulse width data signal PWM_DATA. For the convenience of illustration, the following will all take the thin-film transistors of the pixel circuit as P-type transistors as an example for description. However, it should be noted that in this embodiment, the type of the thin-film transistors of the pixel circuit is not specifically limited. The pixel circuit can set all the thin-film transistors as P-type transistors, or can set all the thin-film transistors as N-type transistors, or can also set some of the thin-film transistors as P-type transistors and some of the thin-film transistors as N-type transistors. While ensuring stepless dimming of the light-emitting element 113, this embodiment of the display panel can reduce the conduction time of the pulse width adjustment module 112, reduce the loss of the transistors in the pulse width adjustment module 112, and improve the reliability of the display panel.

[0043] Continuing to refer to Figure 4 , optionally, the maximum value of the total width d1 of the effective pulse of the pulse width data signal PWM_DATA can be the first time period T1; the minimum value of the total width d1 of the effective pulse of the pulse width data signal PWM_DATA can be zero. During the process of adjusting the display brightness of the light-emitting element 113 through the pulse width data signal PWM_DATA, the minimum value of the total width d1 of the effective pulse of the pulse width data signal PWM_DATA can be zero, and the maximum can reach the first time period T1. Then, this embodiment can adjust between non-light emission and the maximum brightness controlled by the light emission control signal EMIT, and can perform continuous and uninterrupted stepless adjustment, increasing the adjustment range of the display brightness of the light-emitting element 113. Compared with the prior art's jump-type, stepped, and graded dimming methods, this embodiment can provide a more delicate visual experience, meet a wider range of environmental requirements, and improve the user experience.

[0044] Continuing to refer to Figure 4 , optionally, within the first time period T1, the pulse width data signal PWM_DATA can include a first effective pulse G1; the width of the first effective pulse G1 is adjustable. Then, this embodiment can control the light-emitting time of the light-emitting element by adjusting the width of the first effective pulse G1, improving the accuracy of the display brightness of the light-emitting element.

[0045] Figure 5 Another driving timing diagram of the pixel circuit provided by the embodiment of the present invention. Optionally, within the first time period T1, the pulse width data signal PWM_DATA may include a plurality of second active pulses G2; the width and / or the number of the second active pulses G2 are adjustable. That is, within the first time period T1, the pulse width data signal PWM_DATA may include a plurality of active pulses. When there are a plurality of active pulses within the first time period T1, each active pulse can be referred to as a second active pulse G2. It should be noted that the number of the second active pulses G2 within the first time period T1 is adjustable. For example, it can be 2 or 3, Figure 5 and 2 is taken as an example for illustration. The width of each second active pulse G2 within the first time period T1 can also be adjusted. In this embodiment, the width of the second active pulse G2 can be adjusted, the set number of the second active pulses G2 can be adjusted, or the width and the number of the second active pulses G2 can be adjusted simultaneously, so as to control the total width d1 of the active pulses of the pulse width data signal PWM_DATA, improve the brightness adjustment range of the light-emitting element, and improve the accuracy of the display brightness of the light-emitting element.

[0046] Continue to refer to Figure 2 , optionally, the light-emitting control module 111 may include a first transistor M1; the pulse width adjustment module 112 includes a second transistor M6; the width-to-length ratio of the second transistor M6 is greater than that of the first transistor M1. The width-to-length ratio of the transistor has a significant impact on the circuit performance. In this embodiment, the light-emitting control module 111 includes the first transistor M1, the pulse width adjustment module 112 includes the second transistor M6, and the width-to-length ratio of the second transistor M6 is greater than that of the first transistor M1. Then the output resistance of the first transistor M1 is smaller, and the switching speed of the second transistor M6 is faster, so that the second transistor M6 can be turned on and off multiple times within the first time period T1, so as to form a first active pulse or a plurality of second active pulses within the first time period T1, thereby adjusting the total width d1 of the active pulses of the second transistor M6 within the first time period T1.

[0047] The pixel circuit structure in this embodiment is relatively simple compared with the 13T2C (13 thin film transistors and 2 capacitors) circuit, 14T2C circuit, etc. Exemplarily, the pixel circuit in this embodiment can be a 7T1C circuit or an 8T1C. In this embodiment, the 7T1C circuit is used for illustration. Optionally, as Figure 6 shown, Figure 6FIG. 0 is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention. The pixel circuit 11 may further include: a storage module 114, a threshold compensation module 115, a data writing module 116, a first reset module 117, and a second reset module 118; the storage module 114 is connected between a first power signal terminal and a control terminal of the driving transistor M3; the threshold compensation module 115 is connected between the control terminal of the driving transistor M3 and a second terminal of the driving transistor M3; the data writing module 116 is connected to a first terminal of the driving transistor M3 and is configured to transmit a data signal output from the corresponding data line 12 to the driving transistor M3. The first reset module 117 is configured to transmit a first reference voltage VREF1 to the control terminal of the driving transistor M3; the second reset module 118 is configured to transmit a second reference voltage VREF2 to a first terminal of the light-emitting element 113.

[0048] Continue to refer to Figure 6 , optionally, the pixel circuit 11 may further include: a storage module 114, a threshold compensation module 115, a data writing module 116, a first reset module 117, and a second reset module 118; the light-emitting control module 111 includes a first transistor M1; the pulse width adjustment module 112 includes a second transistor M6; the threshold compensation module 115 includes a third transistor M4; the first reset module 117 includes a fourth transistor M5; the data writing module 116 includes a fifth transistor M2; the second reset module 118 includes a sixth transistor M7; the control terminal of the first transistor M1 receives a light-emitting control signal EMIT; the first terminal of the first transistor M1 is electrically connected to the first power signal terminal 15; the second terminal of the first transistor M1 is electrically connected to the first terminal of the driving transistor M3; the first terminal of the fifth transistor M2 is electrically connected to the data line 12; the second terminal of the fifth transistor M2 is electrically connected to the first terminal of the driving transistor M3; the control terminal of the fifth transistor M2 receives a second scan signal SCAN2; the control terminal of the fourth transistor M5 receives a first scan signal SCAN1; the first terminal of the fourth transistor M5 receives the first reference voltage VREF1; the second terminal of the fourth transistor M5 is connected to the control terminal of the driving transistor M3; the first terminal of the third transistor M4 is connected to the control terminal of the driving transistor M3; the second terminal of the third transistor M4 is connected to the second terminal of the driving transistor M3; the control terminal of the third transistor M4 receives the second scan signal SCAN2; the control terminal of the second transistor M6 is connected to a pulse width data line 13; the first terminal of the second transistor M6 is connected to the second terminal of the driving transistor M3; the second terminal of the second transistor M6 is connected to the first terminal of the light-emitting element 113; the control terminal of the sixth transistor M7 receives the second scan signal SCAN2; the first terminal of the sixth transistor M7 receives the second reference voltage VREF2; the second terminal of the sixth transistor M7 is electrically connected to the first terminal of the light-emitting element 113. Figure 6The pixel circuit shown, while improving the control accuracy of the driving transistor M3 over the driving current, adjusts the total width d1 of the effective pulse of the second transistor M6 within the first time period T1, further increasing the brightness adjustment range of the light-emitting element.

[0049] Figure 7 is Figure 6 a driving timing diagram of the pixel circuit in the figure. Optionally, the display panel may include: in the initialization stage T21, the first scan signal SCAN1 is at the enable level, and the second scan signal SCAN2, the light-emitting control signal EMIT, and the pulse-width data signal PWM_DATA are at the non-enable level; the fourth transistor M5 is turned on to transmit the first reference voltage VREF1 to the control terminal of the driving transistor M3; in the data writing stage T22, the second scan signal SCAN2 is at the enable level, and the first scan signal SCAN1, the light-emitting control signal EMIT, and the pulse-width data signal PWM_DATA are at the non-enable level; the fifth transistor M2 and the third transistor M4 are turned on to transmit the threshold voltage of the driving transistor M3 and the data signal DATA to the control terminal of the driving transistor M3; in the first adjustment stage T23, the light-emitting control signal EMIT is at the enable level, and the first scan signal SCAN1, the second scan signal SCAN2, and the pulse-width data signal PWM_DATA are at the non-enable level; the first transistor M1 and the driving transistor M3 are turned on, and the second transistor M6 is turned off, and the light-emitting element 113 does not emit light; in the light-emitting stage T24, the light-emitting control signal EMIT and the pulse-width data signal PWM_DATA are at the enable level, and the first scan signal SCAN1 and the second scan signal SCAN2 are at the non-enable level; the first transistor M1, the driving transistor M3, and the second transistor M6 are turned on, and the light-emitting element 113 emits light.

[0050] For a transistor, the transistor can be turned on only when the signal at its control terminal is at the enable level, and the transistor is turned off when the signal at its control terminal is at the non-enable level. The enable level can be a high level or a low level. In this embodiment, the transistor is taken as a P-type transistor, and its enable level is a low level. As Figure 6 and Figure 7As shown, in the initialization stage T21, the first scan signal SCAN1 is at the enabling level, the fourth transistor M5 is turned on, and the control terminal of the driving transistor M3 is at the first reference voltage VREF1; in the data writing stage T22, the second scan signal SCAN2 is at the enabling level, the fifth transistor M2 and the third transistor M4 are turned on, and the threshold voltage of the driving transistor M3 and the data signal are written to the control terminal of the driving transistor M3; in the first adjustment stage T23, the light emission control signal EMIT is at the enabling level, but the pulse width data signal PWM_DATA is at the non-enabling level, and the driving light emission paths of the first transistor M1, the driving transistor M3, and the second transistor M6 are not turned on; in the light emission stage T24, the driving light emission paths of the first transistor M1, the driving transistor M3, and the second transistor M6 are turned on. Among them, the duration of the light emission control signal EMIT being at the enabling level (the first time period T1) covers the first adjustment stage T23 and the light emission stage T24. In this embodiment, when the light emission control signal EMIT is at the enabling level, the duration of the enabling state of the pulse width data signal PWM_DATA is controlled, so as to adjust the duration of the first adjustment stage T23, thereby realizing the control of the duration of the light emission stage T24, that is, adjusting the total duration d1 of the enabling level of the pulse width data signal PWM_DATA, so as to control by adjusting the light emission duration of the light emitting element 113 within the first time period T1, and further adjusting the light emission brightness of the entire display panel.

[0051] Optionally, a first adjustment stage T23 may be set between the data writing stage T22 and the light emission stage T24; a first adjustment stage T23 may also be set after the light emission stage T24. The first adjustment stage T23 may be set only between the data writing stage T22 and the light emission stage T24, or may be set only after the light emission stage T24, or as Figure 7 shown, set both before and after the light emission stage T24. This embodiment does not make special limitations on this.

[0052] As Figure 8 shown, Figure 8 is Figure 6 Another driving timing diagram of the pixel circuit in [reference], the first adjustment stage T23 may also be set during the light emission stage T24. Optionally, the light emission stage T24 and the first adjustment stage T23 may be alternately set. In this embodiment, if the light emission stage T24 and the first adjustment stage T23 are alternately set, then this embodiment can control the light emission duration of the light emitting element 113 within the first time period T1 by controlling the number of settings of the first adjustment stage T23 and the duration of each first adjustment stage T23, and realize stepless adjustment of the light emission time of the light emitting element 113 through the pulse width data signal PWM_DATA, improve the display effect and adjustment accuracy of the display panel in the low gray level state, and improve the picture display effect.

[0053] Continue to refer to Figure 1 and Figure 7 , optionally, multiple pixel circuits 11 may be arranged in a pixel circuit column 16 in the first direction X, and the pixel circuit columns 16 are arranged along the second direction Y; the first direction X and the second direction Y intersect; the width of the first time period T1 is N row times; N is an integer greater than or equal to 1; the row time H = 1 / (f×b); f is the driving frequency of the pixel circuit 11; b is the number of pixel circuits 11 in the pixel circuit column 16. The pixel circuit 11 extends along the first direction X to form a pixel circuit column 16, and the display panel includes multiple pixel circuit columns 16 arranged along the second direction Y. The first direction X and the second direction Y intersect and are both parallel to the plane where the display panel is located. As Figure 7 shown, the width of the first time period T1 is N row times, the row time H is the row time of the pixel circuit 1 at the current driving frequency f, and the relationship between the row time H and the driving frequency f is time H = 1 / (f×b), where b is the number of pixel circuits 11 in the pixel circuit column 16. Then, after the driving frequency f and the specific display panel are determined, the row time H of the display panel is determined. In this embodiment, the enabling time of the first scan signal SCAN1 and the second scan signal SCAN2 is approximately one row time H, and the width of the first time period T1 is N row times, that is, the light emission control signal EMIT is at the enabling level for N row times. Along the first direction Y, there is a misalignment of one row time H in the enabling levels of the first scan signal SCAN1 of two adjacent pixel circuits 11, and there is a misalignment of one row time H in the enabling level of the light emission control signal EMIT. Correspondingly, there may also be a misalignment of one row time H in the pulse width data signals PWM_DATA of two adjacent pixel circuits 11.

[0054] Figure 9 is a schematic diagram of a partial structure of a display panel provided by an embodiment of the present invention, Figure 10 is a timing diagram of multiple pulse width data signals provided by an embodiment of the present invention. Optionally, the pixel circuit column 16 may be correspondingly provided with P pulse width data lines 13, P = N; P is an integer greater than or equal to 1; in the pixel circuit column 16, the i-th pixel circuit 11 is connected to the i-th pulse width data line 13 among the N pulse width data lines 13; the (i + m×N)-th pixel circuit 11 is connected to the i-th pulse width data line 13 among the N pulse width data lines 13; 1 ≤ i ≤ N; (i + m×N) ≤ b; both i and m are positive integers.

[0055] Along the first direction Y, there is a misalignment of one row time H in the pulse width data signals PWM_DATA of two adjacent pixel circuits 11, then the same pixel circuit column 16 needs to be correspondingly provided with multiple pulse width data lines 13. For example, each pixel circuit column 16 may be correspondingly provided with P pulse width data lines 13. As Figure 10As shown, the enable level of the start signal STV_SCAN of the first scan signal SCAN1 is one line time H, and the enable level of the start signal STV_EMIT of the light emission control signal EMIT is multiple line times H. Figure 10 Taking 3 line times H as an example for illustration. If the enable level of the light emission control signal EMIT is N line times, then P = N. Specifically, because along the first direction Y, if the first pixel circuit 11 in the pixel circuit column 16 is electrically connected to the current pulse width data line 13, and if the width of the pulse width data signal PWM_DATA of the current pulse width data line 13 is N line times, then the (1 + N)th pixel circuit 11 in the pixel circuit column 16 can be electrically connected to the current pulse width data line 13, and it is ensured that the two enable levels L1 and L2 output from the current pulse width data line 13 to the first pixel circuit 11 and the (1 + N)th pixel circuit 11 do not overlap (taking the pulse width data signal PWM_DATA including a first pulse as an example for illustration), so that the current pulse width data line 13 can supply power to multiple pixel circuits 11 in the same pixel circuit column 16. Then, N pulse width data lines 13 can be correspondingly arranged for each pixel circuit column 16 to reduce the number of arranged pulse width data lines 13.

[0056] Specifically, as Figure 9 and Figure 10 shown, in the pixel circuit column 16, the first pixel circuit 11 is connected to the first pulse width data line 13 among the N pulse width data lines 13; the ith pixel circuit 11 is connected to the ith pulse width data line 13 among the N pulse width data lines 13; the (i + m×N)th pixel circuit 11 is connected to the ith pulse width data line 13 among the N pulse width data lines 13; that is, in the pixel circuit column 16, pixel circuits such as the ith pixel circuit 11, the (i + N)th pixel circuit 11, and the (i + 2N)th pixel circuit 11 are all connected to the ith pulse width data line 13, that is, the (i + m×N)th pixel circuit 11 is connected to the ith pulse width data line 13 among the N pulse width data lines 13. On the premise that (i + m×N) is less than b, m can take any positive integer value. Exemplarily, as Figure 9 and Figure 10As shown in the figure, the width of the pulse width data signal PWM_DATA is 3 line times. Therefore, each pixel circuit column 16 is provided with 3 pulse width data lines 13, which respectively output PWM_DATA1, PWM_DATA2, and PWM_DATA3. Among them, the 1st, 4th, 7th, 10th,..., 3N + 1st pixel circuits 11 are connected to the pulse width data signal PWM_DATA1; the 2nd, 5th, 8th, 11th,..., 3N + 2nd pixel circuits 11 are connected to the pulse width data signal PWM_DATA2; the 3rd, 6th, 9th, 12th,..., 3N + 3rd pixel circuits 11 are connected to the pulse width data signal PWM_DATA3. Then, each pixel circuit column 16 is correspondingly provided with 3 pulse width data lines 13. In this embodiment, without increasing the complexity of the pixel circuit, the display brightness of the light-emitting element can be adjusted more accurately within a large dimming range.

[0057] Optionally, the pixel circuit column 16 can be correspondingly provided with P pulse width data lines 13; P is an integer greater than or equal to 1; and the adjacent P pixel circuits 11 in the pixel circuit column 16 are connected to the P pulse width data lines 13 in a one-to-one correspondence. In this embodiment, each pixel circuit column 16 is correspondingly provided with P pulse width data lines 13, and the adjacent P pixel circuits 11 in the pixel circuit column 16 are connected to the P pulse width data lines 13 in a one-to-one correspondence. The minimum value of P can be N. Of course, in order to further avoid interference between the effective pulses output from the i-th pulse width data line 13 to the i-th pixel circuit 11 and the effective pulses output to the (i + N)-th pixel circuit 11, P can be set to be greater than N to increase the interval time between the two effective pulses. Exemplarily, P = N + 1. This embodiment can realize the adjustment of the display brightness of the light-emitting element more accurately within a large dimming range. In addition, optionally, this embodiment can also adopt a scheme combining the DC dimming method and the pulse width data signal PWM_DATA dimming method. While adjusting the width of the effective pulse of the pulse width data signal PWM_DATA, the voltage value of the data signal is adjusted to further increase the dimming range and dimming fineness of the light-emitting element and improve the display effect of the picture.

[0058] Figure 11 Another schematic diagram of the pixel circuit structure provided by the embodiment of the present invention Figure 12 Another timing diagram of multiple pulse width data signals provided by the embodiment of the present invention. Optionally, the pulse width data signal PWM_DATA can be multiplexed as the light emission control signal EMIT. In this embodiment, the pulse width data signal PWM_DATA can be transmitted to the control end of the light emission control module 111 as the light emission control signal. Then, as Figure 11 shown, the total width of the pulse signal of the pulse width data signal PWM_DATA can be T1. Then, in this embodiment, a light emission control circuit for providing a light emission control signal can be not provided on the side of the display panel. As Figure 13 andFigure 14 As shown Figure 13 FIG. is a schematic structural diagram of another display panel provided by an embodiment of the present invention. Figure 14 FIG. is a schematic structural diagram of a comparative example of a display panel provided by an embodiment of the present invention. The display panel includes a display area AA and at least a non-display area surrounding the display area AA. Specifically, along the second direction Y, non-display areas NA are provided on opposite sides of the display area AA, as Figure 14 shown, if the pulse width data signal PWM_DATA and the emission control signal EMIT are different signals, the non-display area NA is provided with a first shift register VSR1 that outputs the emission control signal EMIT and a second shift register VSR2 that outputs the scan signal SCAN. As Figure 13 shown, if the pulse width data signal PWM_DATA is multiplexed as the emission control signal EMIT, the non-display area NA is provided with a second shift register VSR2 that outputs the scan signal SCAN, and there is no need to provide the first shift register VSR1. Then, compared with Figure 14 the display panel shown, the display panel in this embodiment does not need to provide the first shift register VSR1 that outputs the emission control signal EMIT, reducing the width of the non-display area NA and achieving a narrow bezel design.

[0059] Continuing to refer to Figure 1 , optionally, N pulse width data lines 13 and one data line 12 extending along the first direction X may be provided between adjacent two pixel circuit columns 16 to implement pulse width modulation of the pixel circuit by the pulse width data signal PWM_DATA output through the pulse width data lines 13, so that the 7T1C circuit implements PWM dimming. The pixel circuit has a simple structure, and stepless adjustment of the display brightness of the light-emitting element is achieved, increasing the brightness adjustment range of the display panel and improving the brightness adjustment accuracy of the display panel at the same time.

[0060] Based on the same concept, an embodiment of the present invention further provides a driving method for a display panel. Figure 15 FIG. is a schematic flow chart of a driving method for a display panel provided by an embodiment of the present invention. As Figure 15 shown, the method of this embodiment includes the following steps:

[0061] Step S110: Input an emission control signal to the control end of the emission control module of the pixel circuit.

[0062] Step S120: Input the pulse width data signal output by the pulse width data line to the control end of the pulse width adjustment module of the pixel circuit; at least part of the time period where the effective pulse of the pulse width data signal overlaps with the first time period where the effective pulse of the emission control signal is located.

[0063] Step S130: During the first time period, the total width of the effective pulses of the pulse width data signal is adjustable.

[0064] In the embodiment of the present invention, between the first power signal terminal and the second power signal terminal, a light-emitting control module, a driving transistor, a pulse width adjustment module, and a light-emitting element of the pixel circuit are sequentially connected to form a driving light-emitting path. Among them, the driving transistor provides a driving current for the light-emitting element, and the light-emitting control module and the pulse width adjustment module can control the on / off of this light-emitting path. Specifically, the control terminal of the light-emitting control module receives a light-emitting control signal, and the control terminal of the pulse width adjustment module receives a pulse width data signal. When both the light-emitting control signal and the pulse width data signal are effective pulses, the above-mentioned driving light-emitting path can be turned on. In this embodiment, the conduction time of the driving light-emitting path can be controlled by controlling the overlapping time of the effective pulse of the pulse width data signal and the effective pulse of the light-emitting control signal, so as to adjust the display brightness of the light-emitting element. It should be noted that if the time when the effective pulse of the light-emitting control signal is located is the first time period, the width of the effective pulse of the pulse width data signal within the first time period is adjustable, so as to realize the adjustable display brightness of the light-emitting element. This embodiment does not require a complex pixel circuit structure nor a complex dimming signal, and the relatively accurate adjustment of the display brightness of the light-emitting element can be realized through the adjustment of the pulse width data signal.

[0065] Based on the above embodiment, optionally, the pixel circuit includes a plurality of pixel circuit columns extending along the first direction and arranged in sequence along the second direction; the first direction and the second direction intersect; the width of the first time period is N row times; each pixel circuit column is correspondingly provided with N pulse width data lines; N is an integer greater than or equal to 1; the driving method of the display panel further includes: when scanning to the i-th pixel circuit of the pixel circuit column, inputting a pulse width data signal to the pixel circuit through the i-th pulse width data line among the N pulse width data lines; when scanning to the (i + m×N)-th pixel circuit of the pixel circuit column, inputting a pulse width data signal to the pixel circuit through the i-th pulse width data line among the N pulse width data lines; 1≤i≤N; (i + m×N)≤b; both i and m are integers. In this embodiment, each pixel circuit column is correspondingly provided with N pulse width data lines. In this embodiment, while not increasing the complexity of the pixel circuit, the PWM dimming method of the light-emitting element is realized, and within a large dimming range, the display brightness can be adjusted more finely and accurately.

[0066] The embodiment of the present invention also provides a display device. Figure 16 As shown in the structural schematic diagram of a display device provided by an embodiment of the present invention, Figure 16 The display device provided by the embodiment of the present invention includes the display panel 200 provided by any embodiment of the present invention. The display device can be, for example, Figure 16The mobile phone shown in the figure may also be a computer, a television, a smart wearable device, etc., and this embodiment does not make special limitations on this.

[0067] The display device provided in this embodiment includes the technical features of the display panel provided in any embodiment of the present invention and has the beneficial effects possessed by the influencing technical features.

[0068] Note that the above is only the preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described here, and various obvious changes, re-adjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: include: A plurality of pixel circuits, data lines and pulse width data lines; the pixel circuits include a driving transistor, a light emitting control module, a pulse width adjustment module and a light emitting element; The light emitting control module is connected between the first end of the driving transistor and the first power signal end; the pulse width modulation module is connected between the second end of the driving transistor and the first end of the light emitting element; the second end of the light emitting element is connected to the second power signal end; Among them, the control end of the light-emitting control module receives a light-emitting control signal; the control end of the pulse width regulation module is connected to the corresponding pulse width data line to receive a pulse width data signal; the time period in which the effective pulse of the pulse width data signal is located at least partially overlaps with the first time period in which the effective pulse of the light-emitting control signal is located; within the first time period, the total width of the effective pulse of the pulse width data signal is adjustable.

2. The display panel according to claim 1, characterized in that: The first time period covers the time period in which the valid pulses of the pulse width data signal are located.

3. The display panel according to claim 1, characterized in that: In the first time period, the pulse width data signal includes a first effective pulse; the width of the first effective pulse is adjustable.

4. The display panel according to claim 1, characterized in that: In the first time period, the pulse width data signal includes a plurality of second valid pulses; The width and / or number of the second effective pulses are adjustable.

5. The display panel according to claim 2, characterized in that: A plurality of pixel circuits are arranged in a first direction into a pixel circuit column, and the pixel circuit column is arranged along a second direction; the first direction and the second direction intersect; The width of the first time period is N row times; N is an integer greater than or equal to 1; the row time H=1 / (f×b); f is the driving frequency of the pixel circuit; b is the number of the pixel circuits in the pixel circuit column.

6. The display panel according to claim 5, characterized in that: The pixel circuit column is correspondingly provided with P pulse width data lines, where P=N; P is an integer greater than or equal to 1; In the pixel circuit column, the i-th pixel circuit is connected to the i-th pulse width data line among the N pulse width data lines; the (i+m×N)-th pixel circuit is connected to the i-th pulse width data line among the N pulse width data lines; 1≤i≤N; (i+m×N)≤b; i and m are both positive integers.

7. The display panel according to claim 5, characterized in that: The pixel circuit column is correspondingly provided with P pulse width data lines; P is an integer greater than or equal to 1; and adjacent P pixel circuits in the pixel circuit column are connected to the P pulse width data lines in a one-to-one correspondence.

8. The display panel according to claim 1, characterized in that: The pulse width data signal is multiplexed into the light emitting control signal.

9. The display panel according to claim 5, characterized in that: N pulse width data lines and one data line extending along the first direction are arranged between two adjacent pixel circuit columns.

10. The display panel according to claim 1, characterized in that: The light emitting control module includes a first transistor; the pulse width adjustment module includes a second transistor; A width-to-length ratio of the second transistor is greater than a width-to-length ratio of the first transistor.

11. The display panel according to claim 1, characterized in that: The pixel circuit further includes: a storage module, a threshold compensation module, a data writing module, a first reset module and a second reset module; The light emitting control module includes a first transistor; the pulse width adjustment module includes a second transistor; The threshold compensation module includes a third transistor; the first reset module includes a fourth transistor; the data writing module includes a fifth transistor; the second reset module includes a sixth transistor; The control end of the first transistor is connected to the light-emitting control signal; the first end of the first transistor is electrically connected to the first power signal end; the second end of the first transistor is electrically connected to the first end of the driving transistor; the first end of the fifth transistor is electrically connected to the data line; the second end of the fifth transistor is electrically connected to the first end of the driving transistor; the control end of the fifth transistor is connected to the second scanning signal; the control end of the fourth transistor is connected to the first scanning signal; the first end of the fourth transistor is connected to the first reference voltage; the second end of the fourth transistor is connected to the control end of the driving transistor; the first end of the third transistor is connected to the control end of the driving transistor; the second end of the third transistor is connected to the second end of the driving transistor; the control end of the third transistor is connected to the second scanning signal; The control end of the second transistor is connected to the pulse width data line; the first end of the second transistor is connected to the second end of the driving transistor; the second end of the second transistor is connected to the first end of the light-emitting element; the control end of the sixth transistor is connected to the second scanning signal; the first end of the sixth transistor is connected to the second reference voltage; the second end of the sixth transistor is electrically connected to the first end of the light-emitting element.

12. The display panel according to claim 11, characterized in that: The display panel comprises: In the initialization stage, the first scanning signal is at an enable level, and the second scanning signal, the light emitting control signal and the pulse width data signal are at a non-enable level; the fourth transistor is turned on to transmit the first reference voltage to the control terminal of the driving transistor; In the data writing stage, the second scanning signal is at an enable level, and the first scanning signal, the light emitting control signal and the pulse width data signal are at a non-enable level; the fifth transistor and the third transistor are turned on, and the threshold voltage of the driving transistor and the data signal are transmitted to the control terminal of the driving transistor; In the first adjustment stage, the light emitting control signal is at an enable level, the first scanning signal, the second scanning signal and the pulse width data signal are at a non-enable level; the first transistor and the driving transistor are turned on, the second transistor is turned off, and the light emitting element does not emit light; In the light-emitting stage, the light-emitting control signal and the pulse width data signal are at an enable level, and the first scanning signal and the second scanning signal are at a non-enable level; the first transistor, the driving transistor and the second transistor are turned on, and the light-emitting element emits light.

13. The display panel according to claim 12, characterized in that: The first adjustment stage is arranged between the data writing stage and the light emitting stage; and the first adjustment stage is also arranged after the light emitting stage.

14. The display panel according to claim 12, characterized in that: The light emitting stage and the first regulating stage are arranged alternately.

15. The display panel according to claim 2, characterized in that: The maximum value of the total width of the valid pulses of the pulse width data signal is the first time period; the minimum value of the total width of the valid pulses of the pulse width data signal is zero.

16. A method for driving a display panel, characterized in that: The display panel according to any one of claims 1 to 15, comprising: Inputting a light emitting control signal into a control terminal of a light emitting control module of a pixel circuit; Inputting the pulse width data signal output by the pulse width data line into the control end of the pulse width modulation module of the pixel circuit; the time period in which the effective pulse of the pulse width data signal is located at least partially overlaps with the first time period in which the effective pulse of the light emitting control signal is located; In the first time period, the total width of the effective pulses of the pulse width data signal is adjustable.

17. The method for driving a display panel according to claim 16, wherein: The pixel circuit comprises a plurality of pixel circuit columns extending along a first direction and arranged in sequence along a second direction; the first direction and the second direction intersect; the width of the first time period is N row times; each of the pixel circuit columns is correspondingly provided with N pulse width data lines; N is an integer greater than or equal to 1; The display panel driving method further includes: When scanning to the i-th pixel circuit in the pixel circuit column, inputting a pulse width data signal to the pixel circuit through the i-th pulse width data line among the N pulse width data lines; When scanning to the (i+m×N)th pixel circuit in the pixel circuit column, a pulse width data signal is input to the pixel circuit through the i-th pulse width data line among the N pulse width data lines; 1≤i≤N; (i+m×N)≤b; i and m are both integers.

18. A display device, characterized in that: A display panel comprising any one of claims 1 to 15.

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