A wiring substrate, a light-emitting substrate, and a display device

Abstract

A wiring substrate includes functional units (31) arranged in an array; each functional unit (31) includes: a plurality of first pad groups (311) arranged along a first direction; a second pad group (312) located on one side of the plurality of first pad groups (311) along a second direction, the second pad group (312) including a plurality of channel pads and at least two functional pads, the number of pads being even, and the pads being arranged in an array in a 2*N manner; the plurality of channel pads are sequentially arranged in a first row in the same direction and respectively correspond to the same number of the plurality of first pad groups (311) one by one; one of the at least two functional pads is located in the first row, and the functional pad is adjacent to only one of the plurality of channel pads; the remaining functional pads of the at least two functional pads are arranged in a second row in the same direction at intervals. The wiring substrate can simplify the process, improve the yield of the product, and reduce the manufacturing cost. A light-emitting substrate including the wiring substrate and a display device including the light-emitting substrate are also provided.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display devices, in particular to a wiring substrate, a light-emitting substrate and a display device. BACKGROUND

[0002] At present, glass-based Mini-LED display technology is approaching maturity, and more and more panel factories are transforming to produce Mini-LED display panels. With the increasing maturity of technology, the cost is reduced, and the competition is increasingly fierce. For the Back plane lamp panel (referred to as BP lamp panel) of the glass-based Mini-LED direct display device, the mainstream process is still a double-layer copper, 6-mask process, that is, two layers of metal wiring layers are set. The double-layer copper process on the lamp panel is complex, has a low yield, and is high in cost. SUMMARY

[0003] The present disclosure provides a wiring substrate, a light-emitting substrate and a display device, which can greatly simplify the manufacturing process, thereby improving the product yield and greatly reducing the manufacturing cost.

[0004] To achieve the above-mentioned purpose, the present disclosure provides the following technical solutions:

[0005] A wiring substrate comprises: a plurality of functional units arranged in an array; each of the functional units comprises:

[0006] a plurality of first pad groups, the plurality of first pad groups are arranged at intervals along a first direction, each of the first pad groups comprises first sub-pads and second sub-pads arranged at intervals along a second direction;

[0007] a second pad group, the second pad group is located on one side of the plurality of first pad groups along the second direction, the second pad group comprises a plurality of channel pads and at least two functional pads, the number of pads in the second pad group is even, and the pads are arranged in an array at intervals in a 2*N manner;

[0008] wherein the plurality of channel pads are arranged at intervals in a first row in the same direction in sequence, and each of the plurality of channel pads is connected to a same number of first pad groups one by one; one of the at least two functional pads is located in the first row, and the functional pad is adjacent to only one of the plurality of channel pads; the remaining functional pads of the at least two functional pads are arranged at intervals in a second row in the same direction.

[0009] Optionally, a plurality of wiring groups arranged along the second direction are further included, the number of the plurality of wiring groups is the same as the number of columns of the functional units, and each of the wiring groups is connected to a column of functional units;

[0010] Each group of the traces includes multiple connecting lines, a first type of trace, and a second type of trace. The multiple connecting lines are used to connect the channel pads in a column of functional units to the second sub-pads one by one. The first type of trace is connected to the functional pads in a column of functional units, and the second type of trace is connected to the first sub-pads in a column of functional units.

[0011] The first type of trace and the second type of trace are arranged along the second direction and extend along the first direction. At least one trace of the first type of trace passes through the gap between the first row and the second row of the second pad group in a column of functional units. At least one trace of the second type of trace passes through the gap between the first sub-pad and the second sub-pad in a column of functional units, so that each trace in the plurality of trace groups is arranged on the same layer.

[0012] Optionally, in each of the functional units, the plurality of channel pads are arranged adjacent to the second sub-pads in the plurality of first pad groups along a second direction, and the arrangement order of the channel pads corresponds to the arrangement order of the corresponding first pad groups.

[0013] Optionally, in each of the functional units, the at least two functional pads include a signal pad, an address input pad, an address output pad, and at least one ground pad;

[0014] Any one of the signal pad, address input pad, and address output pad is located in the first row of the second pad group, and at least one of the address input pad and address output pad is adjacent to only one of the other pads in the same row.

[0015] Optionally, the first type of trace includes:

[0016] Signal lines, wherein the signal lines are connected to all signal pads in a corresponding column of functional units;

[0017] A grounding wire, wherein the grounding wire is connected to the grounding pad in a corresponding column of functional units;

[0018] Multiple cascade lines are used to cascade every two adjacent functional units in a column of functional units. One end of the cascade line is connected to the address output pad of the previous functional unit and the other end is connected to the address input pad of the next functional unit.

[0019] Address lines are connected to the address input pad of the first functional unit in a corresponding column of functional units.

[0020] Optionally, in each of the functional units, the extension directions of the first row and the second row of the second pad group are both the first direction.

[0021] Optionally, in each of the functional units, the signal pad is located in the first row of the second pad group;

[0022] The signal line is positioned to pass through the gap between the first row and the second row in the second pad group;

[0023] The grounding wire is located on the side of the second pad group away from the first pad group.

[0024] Optionally, in the second pad group, both the address input pad and the address output pad are adjacent to only one of the other pads in the same row;

[0025] The cascade line is located between two adjacent functional units in a column of functional units.

[0026] Optionally, in the second pad group, one of the address input pads and the address output pads is adjacent to only one of the other pads in the same row;

[0027] The cascaded lines are positioned through the gap between the first and second rows in the second pad group.

[0028] Optionally, in each of the functional units, the extension direction of the first row and the second row of the second pad group is both the second direction.

[0029] Optionally, in each of the functional units, one of the address input pads and the address output pads is located in the first row of the second pad group;

[0030] The cascade line is located between two adjacent functional units in a column of functional units.

[0031] Optionally, in each of the functional units, the at least one ground pad is adjacent to a functional pad located in the first row of the second pad group;

[0032] The grounding wire is located on the side of the second pad group away from the plurality of first pad groups along the second direction;

[0033] The signal line is positioned to pass through the gap between the first row and the second row of the second pad.

[0034] Optionally, in each of the functional units, the signal pad is adjacent to the functional pad located in the first row of the second pad group;

[0035] The signal line is located on the side of the second pad group away from the plurality of first pad groups along the second direction;

[0036] The grounding wire is positioned in the gap between the first and second rows of the second pad.

[0037] Optionally, the address line is located on the side of the second type of trace away from the second pad group.

[0038] Optionally, the second pad group includes two ground pads, which are arranged adjacent to each other.

[0039] Optionally, in each of the functional units, the plurality of first pad groups are divided into two categories, and the first pad groups of the same category are arranged adjacent to each other;

[0040] The second type of trace includes two power lines, each of which is connected to a first pad group in a column of functional units. One power line is located on the side of the plurality of first pad groups away from the second pad group, and the other power line passes through the gap between the first sub-pad and the second sub-pad in the first pad group.

[0041] This disclosure also provides a light-emitting substrate, including any of the wiring substrates provided in the above technical solutions, and further including a plurality of light-emitting elements connected one-to-one with the first pad group and a plurality of driving elements connected one-to-one with the second pad group.

[0042] This disclosure also provides a display device, including the light-emitting substrate provided in the above technical solution.

[0043] This disclosure provides a wiring substrate, a display substrate, and a display device. The wiring substrate includes multiple identical functional units arranged in an array. Each functional unit includes multiple first pad groups and second pad groups. The multiple first pad groups are spaced apart along a first direction, and the second pad groups are located on the same side of the multiple first pad groups along a second direction. In the second pad groups, multiple channel pads are sequentially spaced apart in a first row along the same direction and are respectively connected to the same number of multiple first pad groups in their respective functional units. This allows the traces connected to the first pad groups, the traces connecting the first pad groups and the second pad groups, and the traces connected to the second pad groups to be arranged sequentially along the second direction without overlapping, which is beneficial for all traces to be disposed on the same layer. In the second pad group, at least one of the two functional pads is located on the same side of the first pad groups. The first row, and the functional pad is adjacent to only one of the channel pads among multiple channel pads, that is, a functional pad is set at the end of the first row of the second pad group, and the remaining functional pads of at least two functional pads are arranged in the second row at intervals in the same direction. Compared with the technical solutions in related technologies, the number of functional pads in the second pad group is increased and the position of the functional pads is adjusted. At the same time, the type of signal received by the functional pads can be adjusted, and the shape and extension direction of the traces connected to the second pad group can be changed. It is possible to realize that all traces in the wiring substrate are set on the same layer, so that the functional units on the wiring substrate and the traces connected to the functional units can achieve single-layer wiring. This can greatly simplify the process of manufacturing the wiring substrate, thereby improving the product yield, reducing the amount of mask used, and significantly reducing the manufacturing cost. Attached Figure Description

[0044] Figure 1 This is a schematic diagram of the connection structure between pads and traces on a light-emitting substrate in related technologies.

[0045] Figure 2 This is a schematic diagram of the connection structure between a functional unit and its wiring in a related technology.

[0046] Figure 3 This is a schematic diagram of the structure of a functional unit and its wiring in a related technology;

[0047] Figure 4 for Figure 3 Cross-sectional view along the cutting line AA';

[0048] Figure 5 This is a schematic diagram of the structure of functional units and traces on a wiring substrate provided in an embodiment of the present disclosure;

[0049] Figure 6 for Figure 5 Cross-sectional view along the cutting line BB';

[0050] Figure 7A cross-sectional view of a wiring substrate provided in an embodiment of this disclosure;

[0051] Figure 8 This is a schematic diagram of another functional unit and trace structure on a wiring substrate provided in an embodiment of the present disclosure;

[0052] Figure 9 A schematic diagram of the connection between a first pad group and a second pad group provided in an embodiment of this disclosure;

[0053] Figures 10-15 This is a schematic diagram of the pad arrangement in a functional unit provided in an embodiment of the present disclosure;

[0054] Figures 16-29 This is a schematic diagram illustrating the connection between a second pad group and a first type of trace, provided in an embodiment of this disclosure.

[0055] Figure 30 A schematic diagram of a functional unit and its connected wiring provided in an embodiment of this disclosure;

[0056] Figures 31-32 This is a schematic diagram illustrating the connection between a first pad group and a second type of trace, provided in an embodiment of this disclosure.

[0057] icon:

[0058] 1-Substrate; 2-Buffer layer; 3-Metal trace layer; 31-Functional unit; 311, 3111, 3112, 3113-First pad group; 312-Second pad group; 3121-First row; 3122-Second row; 32-Trace group; 321-Connection trace; 322-Type 1 trace; 323-Type 2 trace; 4-Insulating layer; 41-Opening. Detailed Implementation

[0059] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this disclosure.

[0060] In related technologies, the light-emitting substrate includes a substrate 01, M1*M2 functional units 02 arranged in an array on the substrate, M1 address signal lines S, M1 address signal transfer lines Q, M2 data lines D, M2 ground lines G, M2 first power lines Va and M2 second power lines Vb, and multiple pixel units; such as Figure 1 The diagram shown is a schematic representation of the connection structure of the light-emitting substrate in an embodiment of this disclosure. Figure 2The diagram shown is a schematic diagram of the connection structure of a functional unit in an embodiment of this disclosure.

[0061] Among them, multiple functional units 02 are arranged in an array in the first direction F1 and the second direction F2, and the first direction F1 and the second direction F2 intersect each other. The functional unit 02 includes multiple first pad groups 021 and a second pad group 022. The second pad group 022 includes channel pads CH (e.g., CH1, CH2, CH3), data signal pads Da, address pads Uc, and ground pads GND that correspond to the first pad groups in the functional unit. The channel pads can be connected one-to-one with the first pad groups 021 through connecting traces 023. The data signal pads Da, address pads Uc, and ground pads GND are functional pads.

[0062] Multiple pixel units 03 are connected one-to-one with multiple functional units 02. Each pixel unit 03 includes multiple light-emitting elements 031 and driving elements 032. The number of pads in the first pad group 021 of the functional unit is the same as the number of pins of the light-emitting elements 031. The pins of the light-emitting elements 031 are connected one-to-one with the pads in the first pad group 021 of the functional unit. The number of pads in the second pad group 022 of the functional unit is the same as the number of pins of the driving elements 032. The pins of the driving elements 032 are connected one-to-one with the pads in the second pad group 022 of the functional unit, which are used to drive the light-emitting elements 031 to light up.

[0063] It should be noted that the first direction F1 can be the row direction of the multiple functional units arranged in the array, and the second direction F2 can be the column direction of the multiple functional units arranged in the array; alternatively, the first direction F1 can be the column direction of the multiple functional units arranged in the array, and the second direction F2 can be the row direction of the multiple functional units arranged in the array, without limitation. For ease of explanation, in the embodiments of this disclosure, the first direction F1 is the column direction, and the second direction F2 is the row direction. The value of M1 is equal to the number of rows of the functional units, and the value of M2 is equal to the number of columns of the functional units.

[0064] Each address signal line Si (0 < i ≤ M1, i is a positive integer) is coupled to the address pad Uc in the second pad group of each functional unit arranged in a row in the second direction F2, and is used to provide address data for the pixel unit.

[0065] Address signal adapter Q i (0 < i ≤ M1, i is a positive integer) and address signal line S i One-to-one correspondence;

[0066] Each data line Dj (0 < j ≤ M2, j is a positive integer) is coupled to the data signal pads Da of each second pad group of a column of functional units arranged in the first direction F1, for use in providing data to the pixel units.

[0067] The grounding line Gj (0<j≤M2, j is a positive integer) is coupled to the grounding pad GND of each second pad group of a row of functional units arranged in the first direction F1, and is used to provide a grounding voltage signal for the pixel unit.

[0068] The first power line Vaj and the second power line Vbj are coupled to a row of first pad groups arranged in the first direction F1; the second sub-pads of each first pad group in the functional unit are coupled to each signal channel pad CH of the second pad group respectively.

[0069] During the driving process of the aforementioned light-emitting substrate, in the address allocation stage, addressing information is sequentially transmitted to the address pads through each address signal line. The addressing information includes the address ID of the corresponding pixel row, so that the driving element 032 obtains a specific address ID. In the data signal transmission stage, data information is transmitted to each pixel column through each data line. The data information includes the address ID and pixel data information that correspond one-to-one with all driving elements in a certain pixel column. Therefore, each driving element can accurately obtain the pixel data information that matches its own address ID, and after parsing and packetizing the pixel data information, it forms electrical signals for controlling the connected light-emitting units respectively, thereby realizing the active addressing driving mode.

[0070] The specific wiring structure diagram and cross-sectional view of the area where functional unit 02 is located in the above-mentioned light-emitting substrate can be respectively shown as follows: Figure 3 and Figure 4 As shown. Figure 4 for Figure 3 The cross-sectional view formed along the cutting line AA' shows that, during the fabrication process, the light-emitting substrate specifically includes a substrate 01, a buffer layer 04, a first metal wiring layer 05, a first insulating layer 061, a first planarization layer 071, a second insulating layer 062, a second metal wiring layer 08, a third insulating layer 063, a second planarization layer 072, and a fourth insulating layer 064. Among these, as shown... Figure 3 As shown, the aforementioned M1 address signal transfer lines Q, M2 data lines D, M2 ground lines G, M2 first power lines Va, and M2 second power lines Vb can belong to the first metal trace layer. Multiple functional units 02, connection traces 023, and M1 address signal lines S can belong to the second metal trace layer 08, forming a double-layer trace layer. Each trace in the first metal trace layer 05 is connected to the first pad group 021 and the second pad group 022 of the functional unit in the second metal trace layer 08 through the first through-hole 091 that passes through the first insulating layer 061, the first planarization layer 071, and the second insulating layer 062. The light-emitting element can be connected to the first pad group 021 and the second pad group 022 in the functional unit through the second through-hole 092 that passes through the third insulating layer 063, the second planarization layer 071, and the fourth insulating layer 064.

[0071] Among them, such as Figure 3 As shown, in the second metal trace layer 08, each pad in the functional unit 02 and the connected trace are an integral structure. Each pad is the part of the second metal trace layer 08 exposed by the second via 092 formed on the third insulating layer 063, the second planarization layer 071 and the fourth insulating layer 064, while the trace in the second metal trace layer 08 is the part covered and protected by the third insulating layer 063, the second planarization layer 071 and the fourth insulating layer 064.

[0072] The aforementioned double-layer metal trace structure requires multiple patterning processes during fabrication, specifically including, for example: (1) patterning the first metal trace layer 05; (2) patterning the first insulating layer 061 and the first planarization layer 071; (3) patterning the second insulating layer 062; (4) patterning the second metal trace layer 08; (5) patterning the third insulating layer 063 and the second planarization layer 072; and (6) patterning the fourth insulating layer 064. Therefore, the fabrication process for the double-layer metal trace layer is complex, potentially leading to lower product yield and higher costs.

[0073] To overcome the above-mentioned technical problems, embodiments of this disclosure provide a wiring substrate, such as... Figure 5 and Figure 6 As shown, it includes: multiple functional units 31 arranged in an array; each functional unit 31 includes:

[0074] Multiple first pad groups 311 are arranged at intervals along a first direction F1, and each first pad group 311 includes a first sub-pad P1 and a second sub-pad P2 arranged at intervals along a second direction F2.

[0075] The second pad group 312 is located on one side of multiple first pad groups 311 along the second direction F2. The second pad group 312 includes multiple channel pads Ch and at least two functional pads Gn. The number of pads in the second pad group 312 is even and they are distributed in an array with intervals of 2*N.

[0076] In this arrangement, multiple channel pads Ch are arranged in a first row 3121 at intervals along the same direction, and are respectively connected to a first group of multiple first pads 311 of the same number; one of the at least two functional pads Gn is located in the first row 3121, and the functional pad Gn is adjacent to only one of the channel pads Ch; the remaining functional pads Gn in the at least two functional pads are arranged in a second row 3122 at intervals along the same direction.

[0077] The wiring substrate provided in this embodiment includes multiple identical functional units 31 arranged in an array. Each functional unit 31 includes multiple first pad groups 311 and a second pad group 312. The multiple first pad groups 311 are arranged at intervals along a first direction F1, and the second pad group 312 is located on the same side of the multiple first pad groups 311 along a second direction F2. In the second pad group 312, multiple channel pads Ch are arranged in a first row 3121 at intervals along the same direction, and are respectively connected to the same number of multiple first pad groups 311 in the functional unit 31. This allows the traces connected to the first pad group 311, the traces connecting the first pad group 311 and the second pad group 312, and the traces connected to the second pad group 312 to be arranged sequentially along the second direction F2 without overlapping, which is beneficial for all traces to be disposed on the same layer. In the second pad group 312, at least one of the two functional pads Gn is located on the same side of the first pad group 311. The first row 3121, and the functional pad Gn is adjacent to only one of the channel pads Ch among the multiple channel pads Ch, that is, a functional pad Gn is set at the end of the first row 3121 of the second pad group 312, and the remaining functional pads Gn among at least two functional pads Gn are arranged in the same direction to form the second row 3122. Compared with the technical solutions in related technologies, the second pad group 312 increases the number of functional pads Gn and adjusts the position of the functional pads Gn. At the same time, the type of signal received by the functional pads Gn can be adjusted, and the shape and extension direction of the traces connected to the second pad group 312 can be changed. It can realize that all traces in the wiring substrate are set on the same layer, so that the functional unit 31 on the wiring substrate and the traces connected to the functional unit 31 can achieve single-layer wiring, which can greatly simplify the process of manufacturing the wiring substrate, thereby improving the product yield, reducing the amount of mask used, and significantly reducing the manufacturing cost.

[0078] Specifically, such as Figure 7 As shown Figure 6 A cross-sectional view along the cutting line BB' shows that the wiring substrate includes a substrate 1, a buffer layer 2, a metal trace layer 3, and an insulating layer 4 stacked sequentially. The fabrication process of the wiring substrate requires only two masking processes, specifically: (1) patterning the metal trace layer 3 to form metal traces; and (2) patterning the insulating layer 4 to form openings 41. Through the openings 41 on the insulating layer 4, pads in the functional unit 31 can be defined within a predetermined area of ​​the metal traces. Pixel units can be connected to the portion of the metal traces exposed at the openings 41. Pixel units can include multiple light-emitting elements and driving elements. The light-emitting elements can be connected to a first pad group 311, and the driving elements can be connected to a second pad group 312. Therefore, the structure of the wiring substrate provided in this disclosure can greatly simplify the fabrication process of the wiring substrate.

[0079] In practical applications, the pins of the light-emitting element are rectangular, with the width of the wider side between 30 and 50 μm and the width of the longer side between 50 and 75 μm. The length and width of the first sub-pad P1 and the second sub-pad P2 in the first pad group 311 are 2 to 30 μm larger than the length and width of the light-emitting element pins, respectively. The pins of the driving element are rectangular, with the width of the wider side generally between 30 and 50 μm and the width of the longer side between 45 and 70 μm. The length and width of the pads in the second pad group 312 are 2 to 30 μm larger than the length and width of the driving element pins, respectively. The gap width d1 between the first sub-pad P1 and the second sub-pad P2 in the first pad group 311 can be 50 to 200 μm, and the gap width d2 between the two rows in the second pad group 312 can be 50 to 200 μm. Since the position distribution of the first pad group determines the position distribution of the subsequent light-emitting elements, and the position distribution of the light-emitting elements has a decisive impact on the display effect, once the position of the first pad group 311 is determined, the position of the second pad group 312 must not only take into account the design requirements of the traces, but also the distance between it and the first pad group 311. The distance d3 between the second pad group 312 and the first pad group 311 should be greater than or equal to 100μm to meet the space requirements for repairing the light-emitting elements.

[0080] In this embodiment of the disclosure, such as Figure 5 and Figure 6As shown, the aforementioned wiring substrate may include multiple wiring groups 32 arranged along the second direction F2. The number of wiring groups 32 is the same as the number of columns of functional units 31, and each wiring group 32 is connected to a column of functional units 31. Specifically, each wiring group 32 includes multiple connecting lines 321, first type wirings 322, and second type wirings 323. The connecting lines 321 are used to connect the channel pads Ch and second sub-pads P2 in a column of functional units 31 one by one. The first type wirings 322 are connected to the functional pads Gn in a column of functional units 31, and the second type wirings 323 are connected to the first sub-pads P1 in a column of functional units 31. The first type wirings 322 and the second type wirings 323 are arranged along the second direction F2 and extend along the first direction F1, enabling the first type wiring to be connected to the second type wirings 31. The general routing of type 1 traces 322 and type 2 traces 323 is consistent, avoiding overlap between them and facilitating the placement of all traces on the same layer. At least one trace in type 1 trace 322 passes through the gap between the first row 3121 and the second row 3122 of the second pad group 312 in a column of functional units 31. At least one trace in type 2 trace 323 passes through the gap between the first sub-pad P1 and the second sub-pad P2 in a column of functional units 31. By allowing some traces in type 1 traces 322 and type 2 traces 323 to pass through the gaps between the pads, all traces in all trace groups 32 can be placed on the same layer, simplifying the structure of the wiring substrate, reducing manufacturing difficulty, and thus reducing production costs.

[0081] In practical applications, such as Figure 6 As shown, the distance d4 between two adjacent traces in the first type of trace 322 and the second type of trace 323 can be from 5μm to 100μm, and can be set according to the actual situation. The width of the traces in the first type of trace 322 and the second type of trace 323 varies depending on the different trace functions, and the required trace width is also different. It needs to be set according to the actual situation, and there is no restriction here.

[0082] In the above-disclosed embodiments, the two rows of pads in the second pad group 312 of a functional unit 31 can extend along the first direction F1, such as... Figure 5 and Figure 6 As shown; or, it can also extend along the second direction F2, as... Figure 8 and Figure 9 As shown, it is about to Figure 5 and Figure 6 The second pad group 312 is rotated 90 degrees counterclockwise. Based on the extension direction of the two rows of pads in the second pad group 312, the specific position of each pad and the specific routing of each trace in the second pad group 312 need to be adaptively adjusted. Those skilled in the art can perform this adjustment according to the embodiments of this disclosure, depending on the actual situation.

[0083] Specifically, in each functional unit 31, multiple channel pads Ch are arranged along the second direction F2 adjacent to the second sub-pads P2 in multiple first pad groups 311, so that the connecting lines connecting the second sub-pads P2 and the channel pads Ch are located between the first pad group 311 and the second pad group 312 of the functional unit 31. The arrangement order of the channel pads Ch matches the arrangement order of the corresponding first pad groups 311, so that the second sub-pads P2 in each group of the first pad group 311 are connected to the channel pads Ch in the second pad group 312 in sequence. Each connecting trace 321 can be arranged on the same layer as the first type trace 322 and the second type trace 323, and they are mutually insulated and do not cross each other.

[0084] In practical applications, a functional unit 31 may specifically include a first pad group 3111 for connecting to a red light-emitting element, a first pad group 3112 for connecting to a green light-emitting element, and a first pad group 3113 for connecting to a blue light-emitting element. The second pad group 312 of the functional unit 31 includes a first channel pad Ch1 connected to the first pad group 3111, a second channel pad Ch2 connected to the first pad group 3112, and a third channel pad Ch3 connected to the first pad group 3113. For example... Figure 10 As shown, the two rows in the second pad group 312 of the functional unit 31 extend along the first direction F1. The first row 3121 of the second pad group 312 in the functional unit 31 is located on the side of the second pad group 312 adjacent to the first pad group 311. This allows the first channel pad Ch1, the second channel pad Ch2, and the third channel pad Ch3 to be positioned adjacent to the first pad group 311. The first pad groups 3111, 3112, and 3113 are arranged in the first direction F1. The arrangement order of the first channel pads Ch1, Ch2, and Ch3 in the first direction F1 is the same as the arrangement order of the first pad groups 3111, 3112, and 3113 in the first direction F1, ensuring that the three corresponding connection lines are arranged in sequence, insulated from each other, and do not cross. For example, as... Figure 10 As shown, in a functional unit 31, the first pad group 3111, the first pad group 3112, and the first pad group 3113 are arranged sequentially in the first direction F1. Then, in the second pad group 312, the first channel pad Ch1, the second channel pad Ch1, and the third channel pad Ch1 are arranged sequentially in the first direction F1; or, as shown... Figure 11 As shown, Figure 10 If the positions of the first pad group 3111 and the first pad group 3113 are interchanged, then the positions of the corresponding first channel pad Ch1 and third channel pad Ch3 will also be interchanged; or, as Figure 12 As shown, Figure 10If the positions of the first channel pad 3112 and the first channel pad 3113 are interchanged, then the positions of the corresponding second channel pad Ch2 and the third channel pad Ch3 will also be interchanged; in addition, if Figure 13 As shown, the positions of the three channel pads Ch in the first row 3121 of the second pad group 312 can also be interchanged with the positions of the functional pads Gn. Specifically, the arrangement of the multiple first pad groups 311 and the multiple channel pads Ch can be determined according to the actual situation.

[0085] Optionally, such as Figure 14 As shown, the extension direction of the two rows of pads in the second pad group 312 of functional unit 31 can also be the second direction F2. The channel pads Ch in the second pad group 312 can be located in the first row 3121 adjacent to the first pad group 311. The first pad groups 3111, 3112, and 3113 are arranged sequentially in the first direction F1. Then, the first channel pads Ch1, Ch1, and Ch1 in the second pad group 312 are arranged sequentially in the second direction F2. Alternatively, the order of the three first pad groups can be interchanged, and the positions of the corresponding three channel pads Ch can also be interchanged to achieve the same arrangement order. In addition, as shown... Figure 15 As shown, the vertical positions of the first row 3121 and the second row 3122 of the second pad group 312 can also be interchanged, and the positions of the three channel pads Ch need to be adjusted accordingly. Specifically, the arrangement of the multiple first pad groups 311 and the multiple channel pads Ch can be determined according to the actual situation.

[0086] In this embodiment of the disclosure, specifically, in each functional unit 31, such as Figure 16 As shown, at least two functional pads Gn may include a signal pad Vc, an address input pad D-in, an address output pad D-out, and at least one ground pad GND; wherein, any one of the signal pad Vc, the address input pad D-in, and the address output pad D-out may be located in the first row 3121 of the second pad group 312, and at least one of the address input pad D-in and the address output pad D-out is adjacent to only one of the other pads in the same row, which facilitates wiring at the end of the second pad group 312 and is beneficial to the arrangement of the single-layer metal trace layer 3. In the second pad group 312 of the aforementioned functional unit 31, the functions of the data signal pad Da and the address pad Uc in the double-layer metal trace layer 3 of the related technology are replaced by the address input pad D-in and the address output pad D-out, and the data signal pad Vc, respectively. Correspondingly, the functions of the pins of the driving element connected to the second pad group 312 also need to be redefined. The single-layer metal trace layer 3 on the wiring substrate can be set by adjusting the logic control circuit and function inside the driving element.

[0087] To ensure stability when the second pad group is connected to the driving component, the two rows of pads in the second pad group 312 need to be symmetrically arranged. Therefore, at least one ground pad GND in the second pad group 312 can include two. The two ground pads GND can be arranged adjacent to each other in the second row 3122 of the second pad group 312 to facilitate connection with the corresponding trace Gd.

[0088] Specifically, such as Figure 16 As shown, Figure 16 The specific layout structure on the corresponding wiring substrate can be as follows: Figure 5 and Figure 6 As shown, the first type of trace 322 mentioned above may include: signal line Vcc, ground line Gd, multiple cascade lines L, and address line Addr; wherein, the signal line Vcc is connected to all signal pads Vc in the corresponding column of functional units 31, the ground line Gd is connected to the ground pad GND in the corresponding column of functional units 31, the multiple cascade lines L are used to cascade every two adjacent functional units 31 in the column of functional units 31, one end of the cascade line L is connected to the address output pad D-out of the previous functional unit 31, and the other end is connected to the address input pad D-in of the next functional unit 31; the address line Addr is connected to the address input pad D-in of the first functional unit 31 in the corresponding column of functional units 31.

[0089] In the above-disclosed embodiments, the signal line Vcc connected to the signal pad Vc of a column of functional units 31 is used to provide data including address information and light emission information. The address line Addr and multiple cascaded lines L are used to provide specific address information. By adjusting the function and number of pads in the functional unit 31, combined with the adjustment of the routing function and layout, it is possible to avoid routing that needs to be set up to cross each other, and to realize that the first type of routing 322 and the connecting routing 321 are set up on the same layer, thereby realizing single-layer routing of the wiring substrate.

[0090] Specifically, before the light-emitting substrate with the above wiring substrate is powered on and displayed normally, specific address information is sequentially assigned to the driving element through the address line Addr and the cascade line L. When the display stage arrives, the signal transmitted in the signal line Vcc is a power line carrier signal, which includes both the power supply signal that provides the working voltage to the driving element and the address data signal and the light-emitting data signal. Each driving element matches the light-emitting data that is the same as its own address information from the data transmitted from the signal line Vcc. After internal processing and calculation by the driving element, the signal path is formed between the driving element and the light-emitting element through the connection line, so that the light-emitting element presents a specific gray level of brightness, which is different from the driving method of the light-emitting substrate in related technologies.

[0091] In this embodiment of the disclosure, in each functional unit 31, the first row 3121 and the second row 3122 of the second pad group 312 can extend in different directions, so the wiring layout of the resulting wiring substrate is also different.

[0092] Specifically, the extension direction of the first row 3121 and the second row 3122 of the second pad group 312 can both be the first direction F1. In this case, the pad and trace layout in each functional unit 31 can be set according to the following structure.

[0093] Among them, such as Figure 16 As shown, since the channel pads Ch in the second pad group 312 of the functional unit 31 need to be set adjacent to multiple first pad groups 311, in each functional unit 31, the signal pad Vc can be located in the first row 3121 of the second pad group 312, and is located in the same row as multiple channel pads Ch; the signal line Vcc can be set through the gap between the first row 3121 and the second row 3122 in the second pad group 312; the ground line Gd can be located on the side of the second pad group 312 away from the first pad group 311, which can avoid interference between the signal line Vcc and the ground line Gd and other traces, and achieve the same layer setting.

[0094] Specifically, such as Figure 17 As shown, in the first row 3121 of the second pad group 312 of the functional unit 31, the arrangement positions of the signal pad Vc and the multiple channel pads Ch can be interchanged. The specific order of the signal pad Vc and the multiple channel pads Ch is not limited here and can be determined according to the actual situation. The arrangement of the multiple channel pads Ch can be any of the above technical solutions, and is not limited here and can be determined according to the actual situation.

[0095] Optionally, such as Figure 16 and Figure 17 As shown, in the second pad group 312, the address input pad D-in and the address output pad D-out are each adjacent to only one of the other pads in the same row. That is, the address input pad D-in and the address output pad D-out are both located at the end of the second row 3122 of the second pad group 312. In this way, the cascading line L can be located between two adjacent functional units 31 in a column of functional units 31, avoiding interference with other traces.

[0096] Optionally, such as Figure 18As shown, in the second pad group 312, one of the address input pads D-in and D-out can be configured to be adjacent to only one of the other pads in the same row. That is, one of the address input pads D-in and D-out is located at the end of the second row 3122 of the second pad group 312, while the other is sandwiched between the two pads. In this way, in order to avoid interference between the cascade line L and other traces, the cascade line L can also be configured to pass through the gap between the first row 3121 and the second row 3122 in the second pad group 312.

[0097] In this case, the arrangement of each pad in the second pad group 312 of functional unit 31 can be set not only as follows: Figure 18 As shown, there are many other possible implementations. For example, such as... Figure 19 As shown, Figure 18 The positions of the address input pad D-in and the address output pad D-out are interchanged; or, as follows: Figure 20 As shown, Figure 18 The position of the ground pad GND is interchanged with the positions of the address input pad D-in and the address output pad D-out; or, as follows: Figure 21 As shown, Figure 20 The positions of the address input pad D-in and the address output pad D-out are interchanged; or, as follows: Figure 22 As shown, Figure 20 The positions of multiple channel pads Ch and signal pads Vc are interchanged; or, as... Figure 23 As shown, Figure 22 The positions of the address input pad D-in and the address output pad D-out are interchanged; or, as follows: Figure 24 As shown, Figure 22 The position of the ground pad GND is interchanged with the positions of the address input pad D-in and the address output pad D-out; or, as follows: Figure 25 As shown, Figure 24 The positions of the address input pad D-in and the address output pad D-out are interchanged. Specifically, the arrangement order of the pads in the second pad group 312 of functional unit 31 can be determined according to the actual situation and is not restricted here.

[0098] In this embodiment of the present disclosure, in each functional unit 31, the extension direction of the first row 3121 and the second row 3122 of the second pad group 312 can both be the second direction F2. In this case, the pad and trace layout in each functional unit 31 can be configured as follows.

[0099] Among them, such as Figure 26 and Figure 27 As shown, Figure 26The specific layout structure on the corresponding wiring substrate can be as follows: Figure 8 and Figure 9 As shown, in each functional unit 31, one of the address input pads D-in and D-out is located in the first row 3121 of the second pad group 312. That is, one of the address input pads D-in and D-out needs to be set at the end of the second pad group 312 away from the first pad group 311. In this way, the other one of the address input pads D-in and D-out is located in the second row 3122 of the second pad group 312. The cascading line L can be located between two adjacent functional units 31 in a column of functional units 31, which can avoid interference between the cascading line L and other traces.

[0100] Optionally, such as Figure 26 and Figure 27 As shown, in each functional unit 31, at least one ground pad GND can be set adjacent to the functional pad Gn located in the first row 3121 of the second pad group 312; in this way, the ground line Gd can be located on the side of the second pad group 312 away from the multiple first pad groups 311 along the second direction F2, so as to avoid interference with other traces; the signal line Vcc can be set through the gap between the first row 3121 and the second row 3122 of the second pad, so as to avoid interference with other traces.

[0101] Specifically, such as Figure 26 and Figure 27 As shown, in the second pad group 312, the signal pad Vc can be sandwiched between two pads in the second row 3122. The signal line Vcc can pass through the gap between the first row 3121 and the second row 3122 of the second pad group 312 from the side of the second pad group 312 away from the first pad group 311, so that the cascaded line L and the signal line Vcc do not interfere with each other; or, as Figure 28 As shown, the signal pad Vc in the second pad group 312 can also be located at the end of the second row 3122. The signal line Vcc can pass through the gap between the functional pad Gn and the channel pad Ch in the first row 3121 of the second pad group 312, as well as the gap between the second row 3122 and the first row 3121.

[0102] Optionally, such as Figure 29 As shown, in each functional unit 31, the signal pad Vc can also be set to be adjacent to the functional pad Gn located in the first row 3121 of the second pad group 312; the signal line Vcc can be located on the side of the second pad group 312 away from the multiple first pad groups 311 along the second direction F2; the ground line Gd can be set in the gap between the first row 3121 and the second row 3122 of the second pad.

[0103] In this embodiment of the disclosure, such as Figure 16 ,Figure 18 and Figure 26 As shown, the address line Addr can be located on the side of the second type of trace 323 away from the second pad group 312. The address line Addr can be connected to the address input pad D-in of the first functional unit 31 in a column of functional units 31 through a trace located on one side of the functional unit 31 array.

[0104] In practical applications, to better realize the functions of each trace, the minimum line width of the aforementioned cascade line L, address line Addr, and signal line Vcc can be 30μm, and the minimum line width of the ground line Gd can be 150μm. For better layout, the ground line Gd can be placed on the side of the second pad group 312 away from the first pad group 311, ensuring the line width of the ground line Gd. The minimum line width requirement for the signal line Vcc or cascade line L is relatively small, allowing the signal line Vcc or cascade line L to pass through the gap between the first row 3121 and the second row 3122 in the second pad group 312. Therefore, the signal line Vcc and cascade line L passing through the gap in the second pad group 312 can include a first main body located outside the area of ​​the second pad group 312 and a first passing portion passing through the second pad group 312. Since the gap width between the two rows of pads in the second pad group 312 is limited, the line width of the first passing portion can be set to be smaller than the line width of the first main body. For example, ... Figure 30 As shown, the gap between the two rows of pads in the second pad group 312 can be 50 to 200 μm. Then, the line width d51 of the first main body of the signal line Vcc or the cascade line L can be set to greater than or equal to 30 μm, and the line width d52 of the first crossing part of the signal line Vcc or the cascade line L can be set to greater than or equal to 5 μm. If the signal line Vcc and the cascade line L are located between the two rows of gaps in the second pad group 312, the line spacing between the signal line Vcc and the cascade line L can be 5 to 20 μm. The specific dimensions can be determined according to the actual process capability.

[0105] In this embodiment of the present disclosure, in each functional unit 31, the plurality of first pad groups 311 are divided into two categories, and the first pad groups 311 of the same category are arranged adjacent to each other; specifically, as shown in the figure Figure 31 and 32As shown, each functional unit 31 may include a first pad group 3111 for connecting to a red light-emitting element, a first pad group 3112 for connecting to a green light-emitting element, and a first pad group 3113 for connecting to a blue light-emitting element. The light-emitting element is generally a light-emitting diode (LED). In practical applications, the photoelectric characteristics of green and blue light-emitting diodes are basically the same, while the photoelectric characteristics of red light-emitting diodes are different from those of blue or green light-emitting diodes. Therefore, the power supply voltage required for red light-emitting diodes is different from that required for green and blue light-emitting diodes. Thus, the first pad group 3111 can be regarded as a first type of first pad group, while the first pad group 3112 and the first pad group 3113 can be regarded as a second type of first pad group. The first pad group 3112 and the first pad group 3113 are arranged adjacent to each other.

[0106] Specifically, such as Figure 31 and Figure 32 As shown, the second type of trace 323 may include two power lines, each power line being connected to a first pad group 311 in a row of functional units 31. One power line is located on the side of the plurality of first pad groups 311 away from the second pad group 312, and the other power line is arranged through the gap between the first sub-pad P1 and the second sub-pad P2 in the first pad group 311.

[0107] For example, the second type of trace 323 may include a first power line Ve and a second power line Vf. The first power line Ve is connected to the first sub-pad P1 of the first pad group 3111 in a row of functional units 31, and the second power line Vf is connected to the first pad group 3112 and the first pad group 3113 in a row of functional units 31. Wherein, as... Figure 31 As shown, the specific layout structure on the corresponding wiring substrate can be as follows: Figure 5 and Figure 6 As shown, the first power line Ve can be located on the side of the plurality of first pad groups 311 away from the second pad group 312, and the second power line Vf can be arranged through the gap between the first sub-pad P1 and the second sub-pad P2 in the first pad group 311; or, as shown Figure 32 As shown, the second power line Vf can also be located on the side of the plurality of first pad groups 311 away from the second pad group 312, and the first power line Ve passes through the gap between the first sub-pad P1 and the second sub-pad P2 in the first pad group 311.

[0108] In practical applications, since the voltage recorded on the first power line Ve needs to be greater than the voltage applied on the second power line Vf, the minimum width of the first power line Ve can be 100 μm, and the minimum width of the second power line Vf can be 50 μm. The power line passing through the gap between the first sub-pad P1 and the second sub-pad P2 can include a second main body portion located outside the area where the first pad group 311 is located and a second crossing portion located between the first sub-pad P1 and the second sub-pad P2. Since the gap width between the first sub-pad P1 and the second sub-pad P2 is limited, the line width of the second crossing portion can be set to be smaller than the line width of the first main body portion, for example, as shown below. Figure 30 As shown, the second power line Vf passes through the gap between the first sub-pad P1 and the second sub-pad P2. The line width d61 of the second main body of the second power line Vf can be 100μm, and the line width d62 of the second crossing part of the second power line Vf can be greater than or equal to 20μm. The specific dimensions are not limited here and can be determined according to the actual situation.

[0109] This disclosure also provides a light-emitting substrate, including any of the wiring substrates provided in the above technical solutions, and further including a plurality of light-emitting elements connected one-to-one with the first pad group and a plurality of driving elements connected one-to-one with the second pad group.

[0110] In the light-emitting substrate provided in this embodiment, only one metal trace layer is provided in the wiring substrate, which can simplify the manufacturing process, greatly simplify the manufacturing process, thereby improving the product yield, and reducing the amount of mask used, thus significantly reducing the manufacturing cost.

[0111] Specifically, the fabrication process of the aforementioned light-emitting substrate can be as follows:

[0112] Step 1: A buffer layer is fabricated on the substrate using a sputtering process. This reduces the stress on the substrate caused by the subsequent fabrication of the metal wiring layer, thereby reducing the warpage of the substrate. The substrate can be a glass substrate.

[0113] Step 2: A metal trace layer is fabricated on top of the buffer layer through a process of sputtering, cleaning, coating, baking, exposure, development, hard baking, etching, and stripping. Alternatively, this metal trace layer can also be fabricated through electroplating.

[0114] Step 3: Create an insulating layer through a sputtering, exposure, and development process;

[0115] Step 4: Perform nickel plating on the portion of the metal trace layer that is exposed on the insulating layer;

[0116] Step 5: Apply white grease to the insulating layer;

[0117] Part Six: Perform processes such as die bonding, which involves connecting the light-emitting elements and driving elements in the pixel unit to the pads in the metal trace layer through openings.

[0118] The light-emitting element can be a sub-millimeter light-emitting diode (micro LED) or a micro LED; there is no limitation here. The driving element can be a driving chip, which can be set according to the actual situation; there are no restrictions here.

[0119] This disclosure also provides a display device, including the light-emitting substrate provided in the above technical solution.

[0120] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. Therefore, if these modifications and variations of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include these modifications and variations.

Claims

1. A wiring substrate, wherein, include: Multiple functional units arranged in an array; Each of the functional units includes: Multiple first pad groups are arranged at intervals along a first direction, and each first pad group includes first sub-pads and second sub-pads arranged at intervals along a second direction. A second pad group is located on one side of the plurality of first pad groups along a second direction. The second pad group includes a plurality of channel pads and at least two functional pads. The number of pads in the second pad group is an even number, 2. N-type array spacing distribution; The plurality of channel pads are arranged in a first row at intervals along the same direction and are respectively connected to a plurality of first pad groups of the same number; one of the at least two functional pads is located in the first row and is adjacent to only one of the channel pads among the plurality of channel pads; the remaining functional pads of the at least two functional pads are arranged in a second row at intervals along the same direction. It also includes multiple wiring groups arranged along the second direction, the number of which is the same as the number of columns of the functional unit, and each wiring group is connected to a corresponding column of functional unit. Each group of the traces includes multiple connecting lines, a first type of trace, and a second type of trace. The multiple connecting lines are used to connect the channel pads in a column of functional units to the second sub-pads one by one. The first type of trace is connected to the functional pads in a column of functional units, and the second type of trace is connected to the first sub-pads in a column of functional units. The first type of trace and the second type of trace are arranged along the second direction and extend along the first direction. At least one trace of the first type of trace passes through the gap between the first row and the second row of the second pad group in a column of functional units. At least one trace of the second type of trace passes through the gap between the first sub-pad and the second sub-pad in a column of functional units, so that each trace in the plurality of trace groups is arranged on the same layer.

2. The wiring substrate according to claim 1, wherein, In each of the functional units, the plurality of channel pads are arranged adjacent to the second sub-pads in the plurality of first pad groups along a second direction, and the arrangement order of the channel pads corresponds to the arrangement order of the corresponding first pad groups.

3. The wiring substrate according to claim 2, wherein, In each of the functional units, the at least two functional pads include a signal pad, an address input pad, an address output pad, and at least one ground pad; Any one of the signal pad, address input pad, and address output pad is located in the first row of the second pad group, and at least one of the address input pad and address output pad is adjacent to only one of the other pads in the same row.

4. The wiring substrate according to claim 3, wherein, The first type of trace includes: Signal lines, wherein the signal lines are connected to all signal pads in a corresponding column of functional units; A grounding wire, wherein the grounding wire is connected to the grounding pad in a corresponding column of functional units; Multiple cascade lines are used to cascade every two adjacent functional units in a column of functional units. One end of the cascade line is connected to the address output pad of the previous functional unit and the other end is connected to the address input pad of the next functional unit. Address lines are connected to the address input pad of the first functional unit in a corresponding column of functional units.

5. The wiring substrate according to claim 4, wherein, In each of the functional units, the extension directions of the first row and the second row of the second pad group are both the first direction.

6. The wiring substrate according to claim 5, wherein, In each of the aforementioned functional units, the signal pads are located in the first row of the second pad group; The signal line is positioned to pass through the gap between the first row and the second row in the second pad group; The grounding wire is located on the side of the second pad group away from the first pad group.

7. The wiring substrate according to claim 6, wherein, In the second pad group, both the address input pad and the address output pad are adjacent to only one of the other pads in the same row; The cascade line is located between two adjacent functional units in a column of functional units.

8. The wiring substrate according to claim 6, wherein, In the second pad group, one of the address input pads and the address output pads is adjacent to only one of the other pads in the same row; The cascaded lines are positioned through the gap between the first and second rows in the second pad group.

9. The wiring substrate according to claim 4, wherein, In each of the functional units, the extension directions of the first row and the second row of the second pad group are both the second direction.

10. The wiring substrate according to claim 9, wherein, In each of the functional units, one of the address input pads and the address output pads is located in the first row of the second pad group; The cascade line is located between two adjacent functional units in a column of functional units.

11. The wiring substrate according to claim 10, wherein, In each of the functional units, the at least one ground pad is adjacent to the functional pads located in the first row of the second pad group; The grounding wire is located on the side of the second pad group away from the plurality of first pad groups along the second direction; The signal line is positioned to pass through the gap between the first row and the second row of the second pad.

12. The wiring substrate according to claim 10, wherein, In each of the functional units, the signal pad is adjacent to the functional pad located in the first row of the second pad group; The signal line is located on the side of the second pad group away from the plurality of first pad groups along the second direction; The grounding wire is positioned in the gap between the first and second rows of the second pad.

13. The wiring substrate according to any one of claims 4-12, wherein, The address line is located on the side of the second type of trace away from the second pad group.

14. The wiring substrate according to claim 3, wherein, The second pad group includes two ground pads, which are arranged adjacent to each other.

15. The wiring substrate according to claim 2, wherein, In each of the functional units, the plurality of first pad groups are divided into two categories, and the first pad groups of the same category are arranged adjacent to each other; The second type of trace includes two power lines, each of which is connected to a first pad group in a column of functional units. One power line is located on the side of the plurality of first pad groups away from the second pad group, and the other power line passes through the gap between the first sub-pad and the second sub-pad in the first pad group.

16. A light-emitting substrate, wherein, The substrate includes the wiring substrate as described in any one of claims 1-15, and further includes a plurality of light-emitting elements connected to the first pad group and a plurality of driving elements connected to the second pad group.

17. A display device, wherein, Includes the light-emitting substrate as described in claim 16.

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