Test parameter preloading method and system and method for modifying preloaded data

Abstract

The invention relates to a test parameter preloading method and system and a modification method of preloaded data, the test parameter preloading method comprises the following steps: based on a to-be-executed test item, obtaining a plurality of corresponding test parameter sets, the test parameter sets comprising a plurality of tested pins and corresponding test parameters; all the test parameter sets are traversed, a plurality of preloading threads are initiated in parallel with the test parameter sets as units, and the preloading threads are used for obtaining corresponding channel parameters and hardware memory addresses, on all the test channels, of all the tested pins in the corresponding test parameter sets; and writing the corresponding channel parameter into the hardware memory corresponding to the test channel based on the hardware memory address obtained by each preloading thread, thereby solving the problem of low test parameter preloading efficiency in the chip test process.

Description

Technical Field

[0001] The present application relates to the technical field of chip testing, and particularly to a method for preloading test parameters, a system, and a method for modifying preloaded data. Background Art

[0002] Integrated circuit testing applies stimuli to a device under test (DUT) according to the function of the DUT, measures the output response of the chip, and compares the output response with the expected output to determine whether the DUT is qualified. A test program based on an ATE usually includes DC parameter testing. During the DC parameter testing process, it is necessary to set the amplitude and mode of the stimuli applied to the DUT by the parameter setting test machine, as well as the threshold for comparing the chip output with the expected result. To improve the testing efficiency of the test machine, before the test machine tests the DUT, preloaded data is downloaded to the test machine. Subsequently, when testing the DUT, the upper computer notifies each test board of the test machine of the start and end addresses of the storage of the preloaded data corresponding to the current test item; each test board reads the corresponding preloaded data from the DDR and configures it into the register, thereby completing the test item parameter configuration process.

[0003] However, with the increase in test scenarios, the amount of parameter data continues to increase, and the time-consuming of the preloading process of the preloaded parameters also increases linearly, resulting in the problem of low preloading efficiency of the parameter data.

[0004] In response to the problem of low preloading efficiency of test parameters in the chip testing process in related technologies, no effective solution has been proposed yet. Summary of the Invention

[0005] In this embodiment, a method for preloading test parameters, a system, and a method for modifying preloaded data are provided to solve the problem of low preloading efficiency of test parameters in the chip testing process in related technologies.

[0006] In a first aspect, in this embodiment, a method for preloading test parameters is provided. The method is applied to a test system, the test system includes an upper computer and multiple types of test boards communicatively connected to the upper computer, and the test board includes multiple test channels. The method includes:

[0007] Based on the test item to be executed, obtain multiple corresponding test parameter sets, where the test parameter set includes multiple pins under test and corresponding test parameters;

[0008] Traverse each of the test parameter sets, and initiate multiple preloading threads in parallel with each test parameter set as a unit. The preloading thread is used to obtain the channel parameters and hardware memory addresses corresponding to each pin under test in each test parameter set on each of the test channels;

[0009] Based on the hardware memory addresses obtained by each of the preloading threads, write the corresponding channel parameters to the hardware memory corresponding to the test channels.

[0010] In some embodiments, the preloading thread includes a first preloading thread, and the execution process of the first preloading thread includes:

[0011] Traverse each tested pin in the test parameter set, and obtain the hardware information corresponding to the tested pin on the multiple types of test boards, where the hardware information includes the board type and the channel identifier;

[0012] Based on the hardware information and the test parameters corresponding to the tested pin, obtain the channel parameters and hardware memory addresses corresponding to the tested pin on each of the test channels.

[0013] In some embodiments, the writing the corresponding channel parameters to the hardware memory corresponding to the test channels based on the hardware memory addresses obtained by each of the preloading threads includes:

[0014] Wait for whether a first preloading thread ends;

[0015] When a first preloading thread ends, obtain the channel parameters and hardware memory addresses corresponding to the first preloading thread and cache them to obtain a cache address;

[0016] Based on the cache address, read the channel parameters and hardware memory addresses and send them to the corresponding test board, and the test board writes the channel parameters to the hardware memory corresponding to the hardware memory address;

[0017] Based on the end order of the multiple first preloading threads, repeat the above steps until the test parameter sets corresponding to all the first preloading threads have been preloaded.

[0018] In some embodiments, the preloading thread includes a second preloading thread, and the execution process of the second preloading thread includes:

[0019] Traverse each tested pin in the test parameter set, and obtain the hardware information corresponding to the tested pin on the multiple types of test boards, where the hardware information includes the board type and the channel identifier;

[0020] Based on the hardware information and the test parameters corresponding to the tested pin, obtain the channel parameters and hardware memory addresses corresponding to the tested pin on each of the test channels;

[0021] Cache the channel parameters and the hardware memory addresses to obtain a cache address;

[0022] Read the channel parameters and the hardware memory address based on the cache address, and send them to the corresponding test board card, and the test board card writes the channel parameters into the hardware memory corresponding to the hardware memory address.

[0023] In some embodiments, the obtaining the channel parameters and the hardware memory address corresponding to the pin under test on each of the test channels based on the hardware information and the test parameters corresponding to the pin under test includes:

[0024] Obtain the corresponding hardware interface based on the board card type;

[0025] Determine whether the test parameters meet the preset conditions;

[0026] When the preset conditions are met, run the hardware interface based on the channel identifier and the test parameters to obtain the corresponding channel parameters and hardware memory address.

[0027] In some embodiments, the test board card includes one or more sub-board cards, the hardware information includes a sub-board card identifier, and the reading the channel parameters and the hardware memory address based on the cache address and sending them to the corresponding test board card, and the test board card writing the channel parameters into the hardware memory corresponding to the hardware memory address includes:

[0028] Read the corresponding stored data based on the cache address, where the stored data includes a sub-board card identifier, and the corresponding channel parameters and hardware memory address;

[0029] Send the stored data to the corresponding sub-board card based on the sub-board card identifier;

[0030] The sub-board card writes the channel parameters into the corresponding hardware memory based on the hardware memory address.

[0031] In some embodiments, the obtaining the corresponding multiple sets of test parameters based on the test item to be executed includes:

[0032] Obtain the configuration coefficient and multiple sequences of pins under test corresponding to the test item to be executed, and the initial values of the test parameters corresponding to each pin under test in the sequence of pins under test based on the user interface;

[0033] Obtain the test parameters corresponding to each pin under test based on the configuration coefficient and the initial values of the test parameters;

[0034] Generate the corresponding multiple sets of test parameters based on the multiple sequences of pins under test and the corresponding test parameters.

[0035] Second aspect, in this embodiment, a method for modifying pre-loaded data is provided. The method is applied to a test system, which includes a host computer and multiple types of test boards communicatively connected to the host computer. The test boards include multiple test channels. The method includes:

[0036] Obtain a plurality of first test parameter sets based on the user interface. The first test parameter sets include test parameters to be modified and corresponding target pins under test.

[0037] Traverse each of the first test parameter sets, and initiate multiple parameter modification threads in parallel with each first test parameter set as a unit. The parameter modification threads are used to obtain the channel parameters and hardware memory addresses corresponding to each of the target pins under test in each of the first test parameter sets on each of the test channels.

[0038] Based on the hardware memory addresses obtained by each of the parameter modification threads, write the corresponding channel parameters into the hardware memory corresponding to the test channels.

[0039] Third aspect, in this embodiment, a method for adding pre-loaded data is provided. The method is applied to a test system, which includes a host computer and multiple types of test boards communicatively connected to the host computer. The test boards include multiple test channels. The method includes:

[0040] Obtain a plurality of second test parameter sets based on the user interface. The second test parameter sets include multiple pins under test to be added and corresponding test parameters.

[0041] Traverse each of the second test parameter sets, and initiate multiple parameter addition threads in parallel with each second test parameter set as a unit. The parameter addition threads are used to obtain the channel parameters and hardware memory addresses corresponding to each of the pins under test to be added in each of the second test parameter sets on each of the test channels.

[0042] Based on the hardware memory addresses obtained by each of the parameter addition threads, write the corresponding channel parameters into the hardware memory corresponding to the test channels.

[0043] Fourth aspect, in this embodiment, a test parameter pre-loading system is provided. The system is applied to a test system, which includes a host computer and multiple types of test boards communicatively connected to the host computer. The test boards include multiple test channels. The test parameter pre-loading system includes:

[0044] User interface layer: used to obtain corresponding multiple test parameter sets based on the test items to be executed. The test parameter sets include multiple pins under test and corresponding test parameters.

[0045] Business layer: used to manage the correspondence relationships among test items, test parameter sets, and pins under test;

[0046] Hardware abstraction layer: used to control each of the test boards according to the hierarchy of board type, daughter board, and test channel;

[0047] Hardware layer: provides a hardware interface corresponding to the board type for the hardware abstraction layer.

[0048] In some of the embodiments, the business layer further includes:

[0049] Test item layer: used to traverse each of the test parameter sets, and initiate multiple preloading threads in parallel with each test parameter set as a unit, where the preloading threads are used to obtain the channel parameters and hardware memory addresses corresponding to each pin under test on each of the test channels in the corresponding test parameter set;

[0050] Test parameter set layer: used to traverse each pin under test in the test parameter set to obtain the corresponding test parameters; and used to obtain and cache the channel parameters and hardware memory addresses corresponding to the preloading threads;

[0051] Pin under test layer: used to obtain the hardware information corresponding to the pin under test on the multiple types of test boards, where the hardware information includes board type and channel identifier.

[0052] In some of the embodiments, before traversing each of the test parameter sets and initiating multiple preloading threads in parallel with each test parameter set as a unit,

[0053] The test item layer is further used to sequentially create objects for each test parameter set and pass the corresponding test parameters;

[0054] The test parameter set layer is further used to sequentially create objects for each pin under test in the test parameter set and pass the corresponding test parameters;

[0055] The pin under test layer is further used to save the corresponding test parameters in the objects of each pin under test.

[0056] In some of the embodiments, the hardware abstraction layer is further used to: based on the board type, obtain the corresponding hardware interface; determine whether the test parameters corresponding to the pin under test meet a preset condition; and in the case where the preset condition is met, run the hardware interface based on the channel identifier and the test parameters to obtain the corresponding channel parameters and hardware memory addresses.

[0057] Compared with the related art, in the test parameter preloading method provided in this embodiment, multiple corresponding test parameter sets are obtained based on the test items to be executed, and the test items are put into one-to-one correspondence with the pins under test and the test parameters in the test parameter sets; by traversing each test parameter set, multiple preloading threads are launched in parallel with each test parameter set as a unit, and the channel parameters and hardware memory addresses corresponding to each pin under test in each test parameter set on each test channel are obtained. The pins under test and the test parameters corresponding to different test items are processed in parallel with each test parameter set as a unit. Different loading processes are executed according to different types of underlying test boards, converting the loading process from serial to parallel, which improves the preloading efficiency; based on the hardware memory addresses obtained by each preloading thread, the corresponding channel parameters are written into the hardware memory corresponding to the test channel, completing the preloading of the test parameters, and solving the problem of low preloading efficiency of test parameters in the chip test process in the related art.

[0058] Details of one or more embodiments of this application are set forth in the following drawings and description to make other features, objects, and advantages of this application more concise and understandable. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] The drawings described herein are used to provide a further understanding of this application and constitute a part of this application. The illustrative embodiments and descriptions thereof of this application are used to explain this application and do not constitute an improper limitation of this application. In the drawings:

[0060] Figure 1 is a structural block diagram of a test system for the test parameter preloading method of some embodiments of this application;

[0061] Figure 2 is a flowchart of the test parameter preloading method of some embodiments of this application;

[0062] Figure 3 is a flowchart of the execution of the first preloading thread of some embodiments of this application;

[0063] Figure 4 is a flowchart of the writing of preloaded data of some embodiments of this application;

[0064] Figure 5 is a flowchart of the execution of the second preloading thread of some embodiments of this application;

[0065] Figure 6 is a flowchart of obtaining the channel parameters and hardware memory addresses of the pins under test of some embodiments of this application;

[0066] Figure 7 is a flowchart of writing the channel parameters into the corresponding registers of some embodiments of this application;

[0067] Figure 8It is a flowchart for obtaining a test parameter set corresponding to a test item in some embodiments of the present application;

[0068] Figure 9 It is a flowchart for a test parameter preloading method in some preferred embodiments of the present application;

[0069] Figure 10 It is a flowchart for a method of modifying preloaded data in some embodiments of the present application;

[0070] Figure 11 It is a flowchart for a method of adding new preloaded data in some embodiments of the present application;

[0071] Figure 12 It is a schematic diagram of a test parameter preloading system in some embodiments of the present application. Detailed implementation manners

[0072] For a clearer understanding of the purpose, technical solution, and advantages of the present application, the present application is described and explained below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0073] Unless otherwise defined, the technical terms or scientific terms involved in the present application shall have the general meaning understood by those with ordinary skills in the technical field to which the present application belongs. In the present application, words such as "a", "one", "a kind of", "the", "these", etc. do not indicate a limitation in quantity, and they can be singular or plural. The terms "including", "comprising", "having" and any variations thereof involved in the present application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device including a series of steps or modules (units) is not limited to the listed steps or modules (units), but may include unlisted steps or modules (units), or may include other steps or modules (units) inherent in these processes, methods, products, or devices. The terms "connected", "coupled", etc. involved in the present application do not limit to physical or mechanical connections, but may include electrical connections, whether directly or indirectly connected. The term "a plurality of" involved in the present application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" may represent: A exists alone, A and B exist simultaneously, and B exists alone. Usually, the character " / " indicates that the objects associated before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in the present application only distinguish similar objects and do not represent a specific sorting for the objects.

[0074] The test parameter preloading method provided by the embodiments of the present application can be executed in a test system. Figure 1It is a block diagram of a test system for a test parameter preloading method according to some embodiments of the present application. As Figure 1 shown, the test system includes a host computer and multiple types of test boards communicatively connected to the host computer (2 types of test boards, test board A and test board B, are shown in the figure). Test board A includes multiple test channels A (3 are shown in the figure), and test board B includes multiple test channels B (2 are shown in the figure). Those of ordinary skill in the art can understand that Figure 1 the structure shown is only schematic and does not limit the structure of the above test system. For example, the test system may further include more components than Figure 1 shown, or have a different configuration from Figure 1 shown.

[0075] In this embodiment, a test parameter preloading method is provided. Figure 2 It is a flowchart of the test parameter preloading method according to some embodiments of the present application. As Figure 2 shown, the process includes the following steps:

[0076] Step S201, based on the test item to be executed, obtain the corresponding multiple test parameter sets, where the test parameter set includes multiple pins under test and the corresponding test parameters.

[0077] The preloading of the test parameters in this embodiment refers to the process of writing the test parameters into the hardware memory corresponding to each test channel of each test board for the pin under test before the tester executes the test item on the DUT, based on the multiple pins under test corresponding to the test item and the test parameters corresponding to the pin under test, to complete the parameter configuration. Among them, the pin under test is the input or output functional pin of the voltage or current signal of the device under test (DUT) during the test process. For example, the pin under test is an I 2 C pin, which can correspond to multiple I 2 C pin pins of the DUT.

[0078] According to the test requirements of different test items, the pins under test of the DUT are managed through test parameter sets. Each test item can correspond to multiple different parameter configurations, and each parameter configuration can correspond to a test parameter set. Each test parameter set includes the pins under test and the corresponding test parameters that need to be used during the test process of the test item. The number of pins under test and the corresponding test parameters in different test parameter sets can be different. Before the test, the corresponding test parameter sets can be constructed in advance according to the pins under test and the test parameters corresponding to each test item. When the operator determines the test item to be executed through the user interface, the corresponding test parameter set is obtained.

[0079] Step S202: Traverse each test parameter set, and initiate multiple preloading threads in parallel with each test parameter set as a unit. The preloading threads are used to obtain the channel parameters and hardware memory addresses corresponding to each DUT pin under test on each test channel in the corresponding test parameter set.

[0080] The test channel is used to implement the corresponding connection between the pins under test of the DUT on the test station and the test board, so as to apply an excitation signal or measure a response signal through the test board. For the same pin under test, the test channels and channel parameters corresponding to different types of test boards may be different. The corresponding relationship between the pins under test and the test channels on different types of test boards can be preset in advance. Further, the same pin under test can correspond to multiple test channels on multiple different types of digital boards.

[0081] In this embodiment, the driver software traverses each test parameter set, initiates multiple parallel preloading threads with each test parameter set as a unit. The preloading threads call the corresponding interface functions according to the type of the test board where the test channel corresponding to the pin under test is located, and obtain the channel parameters and hardware memory addresses corresponding to each pin under test on each test channel by running the interface functions.

[0082] In this embodiment, the test parameters are parameters set by the user, such as the applied voltage value, etc.; the channel parameters are parameter values that can be recognized by the hardware obtained after protocol conversion of the test parameters, such as the corresponding CODE value.

[0083] Step S203: Based on the hardware memory addresses obtained by each preloading thread, write the corresponding channel parameters into the hardware memory corresponding to the test channel.

[0084] In some embodiments, after the preloading thread obtains the channel parameters and hardware memory addresses corresponding to each pin under test on each test channel in the corresponding test parameter set, according to the type of the test board where each test channel is located, send the corresponding channel parameters and hardware memory addresses to the corresponding test board, and then end the preloading thread. The test board writes the corresponding channel parameters into the hardware memory according to the hardware memory address, and completes the configuration of the test parameters.

[0085] In other embodiments, after the preloading thread obtains the channel parameters and hardware memory addresses corresponding to each pin under test on each test channel in the corresponding test parameter set, send the channel parameters and hardware memory addresses to the main thread of the driver software, and then end the preloading thread. The main thread of the driver software sends the corresponding channel parameters and hardware memory addresses to the corresponding test board according to the type of the test board where each test channel is located, and the test board writes the corresponding channel parameters into the hardware memory according to the hardware memory address, and completes the configuration of the test parameters.

[0086] Through steps S201 - S203, multiple corresponding test parameter sets are obtained based on the test items to be executed, and the test items are put into one-to-one correspondence with the pins under test and the test parameters in the test parameter sets. By traversing each test parameter set, multiple preloading threads are launched in parallel with each test parameter set as a unit, and the channel parameters and hardware memory addresses corresponding to each pin under test on each of the test channels in the corresponding test parameter set are obtained. With each test parameter set as a unit, parallel processing is performed, and different loading processes are executed according to different types of the underlying test boards, converting the loading process from serial to parallel, which improves the preloading efficiency. Based on the hardware memory addresses obtained by each preloading thread, the corresponding channel parameters are written into the hardware memory corresponding to the test channel, completing the preloading of the test parameters, and solving the problem of low preloading efficiency of test parameters in the chip testing process in the related art.

[0087] In some embodiments, the preloading thread includes a first preloading thread. Figure 3 It is the execution flowchart of the first preloading thread in some embodiments of the present application. As Figure 3 shown, this process includes the following steps:

[0088] Step S301, traverse each pin under test in the test parameter set, and obtain the hardware information corresponding to the pin under test on various types of test boards. The hardware information includes the board type and the channel identifier.

[0089] The hardware information of the test board includes the board type of the test board and the channel identifiers of the test channels it contains. The channel identifier can be the channel number. In this embodiment, the driver software can pre-obtain the hardware information of each test board and the corresponding relationship between each pin under test and the hardware information. Specifically, the hardware information can include the board type of the test board, the channel identifiers of each test channel on the board, the corresponding pins under test, etc. Further, it can also include the sub-board identifiers of each sub-board included in the test board. The corresponding relationship between each pin under test and the hardware information includes which test channels on different types of test boards each pin under test has a corresponding connection relationship with.

[0090] After each preloading thread is launched, the driver software traverses each pin under test in the test parameter set, and sequentially obtains the hardware information corresponding to each pin under test, including the test board type and the channel identifier corresponding to the pin under test.

[0091] Step S302, based on the hardware information and the test parameters corresponding to the pin under test, obtain the channel parameters and the hardware memory addresses corresponding to the pin under test on each test channel.

[0092] For the same pin under test, the test channels and channel parameters corresponding to different types of test boards can be different. Therefore, in some embodiments, the correspondence between the channel parameters and test parameters of each test channel in different types of test boards, as well as the correspondence between the hardware memory address and the channel identifier, can be obtained in advance. After the driver software obtains the board type and channel identifier corresponding to the pin under test, according to the test parameters and board type corresponding to the pin under test, the channel parameters corresponding to the test channel are obtained; and according to the channel identifier, the corresponding hardware memory address is obtained.

[0093] In other embodiments, the board type, channel identifier, and test parameters of the test board can also be used as the call parameters of the hardware interface by calling the pre-stored hardware interface, and the corresponding channel parameters and hardware memory address can be obtained by running the interface program.

[0094] Through steps S301 - S302, by traversing each pin under test in the test parameter set, the hardware information corresponding to the pin under test on multiple types of test boards is obtained, and the pin under test is associated with the test channel at the hardware level; based on the hardware information and the test parameters corresponding to the pin under test, the channel parameters and hardware memory address corresponding to the pin under test on each test channel are obtained. Through each parallel preloading thread, the channel parameters and hardware memory address corresponding to each pin under test in different parameter configuration cases are respectively obtained, providing the necessary data for subsequent parameter writing.

[0095] In some embodiments, Figure 4 is the write flowchart of the preloaded data in some embodiments of the present application. As Figure 4 shown, the process includes the following steps:

[0096] Step S401, wait for whether a first preloading thread ends.

[0097] After the main thread initiates multiple first preloading threads, the initiated first preloading threads are added to the thread pool, and then the main thread waits for whether a first preloading thread ends.

[0098] Step S402, in the case where a first preloading thread ends, obtain the channel parameters and hardware memory address corresponding to the first preloading thread and cache them to obtain a cache address.

[0099] In the case where a first preloading thread ends, obtain the channel parameters and hardware memory address corresponding to the first preloading thread. Cache the channel parameters and hardware memory address in a preset format to obtain a cache address.

[0100] Step S403: Based on the cache address, read the channel parameters and the hardware memory address and send them to the corresponding test board. The test board writes the channel parameters into the hardware memory corresponding to the hardware memory address.

[0101] Specifically, the driver software can calculate whether the data volume of the preloaded data exceeds the preset range according to the cache address. If not, according to the cache address, read the cache in units of test boards to obtain the corresponding channel parameters and hardware memory address. Send the channel parameters and the hardware memory address to the corresponding test board, and the controller of the test board writes the channel parameters into the corresponding DDR hardware memory according to the hardware memory address.

[0102] Step S404: Based on the end order of multiple first preloading threads, repeat the above steps until the preloading of the test parameter sets corresponding to all first preloading threads is completed.

[0103] After the preloading of the channel parameters of the current first preloading thread is completed, the main thread determines whether the channel parameters corresponding to all first preloading threads have been preloaded. If there are other first preloading threads that have not been loaded, repeat steps S401 - S404 until the preloading of the test parameter sets corresponding to all first preloading threads is completed.

[0104] Through steps S401 - S404, the main thread of the driver software waits for the end of the first preloading thread. When the first preloading thread ends, obtain the channel parameters and the hardware memory address corresponding to the first preloading thread and cache them. Read the channel parameters and the hardware memory address according to the corresponding cache address and send them to the corresponding test board. The test board completes the parameter writing. Through the mutual cooperation and control of the driver software layer, the driver hardware layer, and the test board controller, the writing of the test parameters is completed, improving the preloading efficiency of the test parameters.

[0105] In some embodiments, the preloading thread includes a second preloading thread. Figure 5 It is the execution flowchart of the second preloading thread in some embodiments of the present application. As Figure 5 shown, this process includes the following steps:

[0106] Step S501: Traverse each tested pin in the test parameter set to obtain the hardware information corresponding to the tested pin on various types of test boards. The hardware information includes the board type and the channel identifier.

[0107] The implementation manner of this step can be the same as that of step S301.

[0108] Step S502: Based on the hardware information and the test parameters corresponding to the tested pin, obtain the channel parameters and the hardware memory address corresponding to the tested pin on each test channel.

[0109] The implementation of this step can be the same as that of step S302.

[0110] Step S503: Cache the channel parameters and the hardware memory address to obtain a cache address.

[0111] The second preloading thread caches the channel parameters and the hardware memory address in a preset format to obtain a cache address.

[0112] Step S504: Based on the cache address, read the channel parameters and the hardware memory address and send them to the corresponding test board. The test board writes the channel parameters into the hardware memory corresponding to the hardware memory address.

[0113] Specifically, the second preloading thread can calculate whether the data volume of the preloaded data exceeds a preset range according to the cache address. If it does not exceed, then according to the cache address, read the cache in units of test boards to obtain the corresponding channel parameters and hardware memory address. Send the channel parameters and the hardware memory address to the corresponding test board, and the controller of the test board writes the channel parameters into the corresponding DDR hardware memory according to the hardware memory address.

[0114] Through steps S501 to S504, the second preloading thread traverses each tested pin in the test parameter set, obtains the corresponding hardware information of the tested pin on various types of test boards, and corresponds the tested pin to the test channel at the hardware level; based on the hardware information and the test parameters corresponding to the tested pin, obtain the channel parameters and the hardware memory address corresponding to the tested pin on each test channel, and send them to the corresponding test board. The test board completes the parameter writing. The test parameter preloading of multiple test parameter sets is completed in parallel by multiple second preloading threads, which further improves the preloading efficiency of the test parameters. In some embodiments, Figure 6 is a flowchart for obtaining the channel parameters and the hardware memory address of the tested pin in some embodiments of the present application. As Figure 6 shown, this process includes the following steps:

[0115] Step S601: Obtain the corresponding hardware interface based on the board type.

[0116] In this embodiment, different board types correspond to different hardware interfaces. Determine the corresponding hardware interface according to the board type corresponding to the tested pin. Specifically, the hardware interfaces corresponding to each board type can be used as objects for calling.

[0117] Step S602: Determine whether the test parameters meet the preset conditions.

[0118] Check whether the test parameters meet the requirements according to the preset conditions in the hardware interface. For example, check whether the voltage range or current range of the test parameters meets the preset conditions. If the preset conditions are not met, it indicates that the test parameters are incorrect, and the preloading process ends.

[0119] Step S603, when the preset conditions are met, run the hardware interface based on the channel identifier and the test parameters to obtain the corresponding channel parameters and the hardware memory address.

[0120] When the preset conditions are met, run the hardware interface program, obtain the corresponding hardware memory address according to the channel identifier, and convert the test parameters into the corresponding channel parameters through the interface program.

[0121] Furthermore, the hardware interface program can also determine the corresponding channel parameters and the hardware memory address according to the chip attributes corresponding to different board types.

[0122] Furthermore, the test board may include multiple daughter boards, and the obtained channel parameters and the hardware memory address corresponding to the pins under test can correspond to each daughter board.

[0123] Through steps S601 - S603, by obtaining the corresponding hardware interface based on the board type, the same pins under test use different interface programs in different types of test boards to obtain the corresponding preloading parameters, and the underlying hardware is associated with the pins under test; by determining whether the test parameters meet the preset conditions, the data correctness of parameter preloading is ensured; by running the hardware interface based on the channel identifier and the test parameters when the test parameters meet the preset conditions to obtain the corresponding channel parameters and the hardware memory address, and by each preloading thread parallelly obtaining the data necessary for parameter writing, the preloading efficiency of the parameters is improved.

[0124] In some embodiments, the test board includes one or more daughter boards, and the hardware information includes the daughter board identifier. Figure 7 It is a flowchart of writing channel parameters to the corresponding register in some embodiments of the present application, as Figure 7 shown, and this process includes the following steps:

[0125] Step S701, based on the cache address, read the corresponding stored data, and the stored data includes the daughter board identifier, as well as the corresponding channel parameters and the hardware memory address.

[0126] In this embodiment, a test board card includes multiple daughter board cards, and each daughter board card includes a corresponding DDR and multiple test channels. The hardware information includes the daughter board card identifier. After the preloading thread obtains the channel parameters and the hardware memory address corresponding to the preloading thread, the channel parameters and the hardware memory address can be cached in units of daughter board cards. Specifically, the stored data can be divided into multiple data blocks, and each data block can include the daughter board card identifier, the channel parameters of the test channels corresponding to the daughter board card, and the hardware memory address.

[0127] Step S702: Based on the daughter board card identifier, send the stored data to the corresponding daughter board card.

[0128] The driver software calculates whether the data volume of the stored data exceeds a preset range according to the cache address. If it does not exceed, it determines the test board card to be sent according to the type of the test board card where each test channel is located; then reads the cache according to the cache address to obtain the data blocks corresponding to each daughter board card. And according to the daughter board card identifier in the data block, the data block is sent to the corresponding daughter board card.

[0129] Step S703: The daughter board card writes the channel parameters into the corresponding hardware memory based on the hardware memory address.

[0130] The controller of the daughter board card can be an FPGA, and the FPGA writes the channel parameters into the hardware memory of the corresponding daughter board card according to the hardware memory address.

[0131] Through steps S701 - S703, by reading the corresponding stored data based on the cache address, sending the stored data to the corresponding daughter board card based on the daughter board card identifier, and the daughter board card writing the channel parameters into the corresponding hardware memory based on the hardware memory address, through the mutual cooperation and control of each layer of the driver software layer, the driver hardware layer, the test board card, and the daughter board card, the writing of test parameters in units of daughter board cards is realized, and the preloading efficiency of test parameters is improved.

[0132] In some embodiments, Figure 8 is a flowchart of obtaining a test parameter set corresponding to a test item in some embodiments of the present application. As Figure 8 shown, the process includes the following steps:

[0133] Step S801: Based on the user interface, obtain the configuration coefficient corresponding to the test item to be executed, multiple sequences of pins under test, and the initial values of test parameters corresponding to each pin under test in the sequence of pins under test.

[0134] The tester can select the test items to be executed on the user interface and set the corresponding configuration coefficients. The configuration coefficients are used to adjust the test parameter values of the same pin under different test scenarios. The pin sequence to be tested can be a set of multiple pins corresponding to a certain test item. Determine the pin sequence to be tested according to the test item, and determine the initial test parameter values corresponding to the pin sequence to be tested. The pin sequence to be tested can be one or more. The configuration coefficients and the initial test parameter values can be manually input by the tester on the user interface or preset based on the test item.

[0135] Step S802: Obtain the test parameters corresponding to each pin to be tested based on the configuration coefficients and the initial test parameter values.

[0136] The configuration coefficients can be combined with the initial test parameter values of each pin in the pin sequence to be tested to obtain the test parameters corresponding to each pin. In some embodiments, the test parameter can be equal to the product of the configuration coefficient and the initial test parameter value of the pin. In a further embodiment, there can be multiple configuration coefficients. Different pin sequences to be tested can correspond to different configuration coefficients. The user can specify the combination of the configuration coefficient and the initial test parameter value of a specific pin sequence to obtain the test parameters corresponding to the pin sequence.

[0137] Step S803: Generate corresponding multiple sets of test parameters based on multiple pin sequences to be tested and the corresponding test parameters.

[0138] Correspond each pin sequence to be tested and the test parameters corresponding to the test item to be executed one by one to generate corresponding multiple sets of test parameters. Each set of test parameters can include multiple pin sequences to be tested. Each pin sequence to be tested includes multiple pins and the corresponding test parameters.

[0139] Through steps S801 - S803, by obtaining the configuration coefficients, multiple pin sequences to be tested, and the initial test parameter values corresponding to each pin in the pin sequence to be tested based on the user interface, it is convenient for the user to perform initial test parameter settings according to the test requirements; by obtaining the test parameters corresponding to each pin to be tested based on the configuration coefficients and the initial test parameter values, it provides a convenient adjustment method for adjusting the test parameters of the same pin under different test scenarios; by generating corresponding multiple sets of test parameters based on multiple pin sequences to be tested and the corresponding test parameters, hierarchical management of each pin and test parameter is carried out through the sets of test parameters, reducing the data interaction during the preloading process of each test parameter, and improving the security and maintainability of the preloading process.

[0140] The test parameter preloading method of the present application will be described and illustrated below through preferred embodiments. The test parameter preloading method of this embodiment is applied to a test system, which includes a host computer and various types of test boards communicatively connected to the host computer. The test board includes multiple test channels. The test parameter preloading method of this embodiment can be executed by the cooperation of multiple software modules and hardware modules that communicate with each other. These software modules and hardware modules include a user interface layer, a service layer, a hardware abstraction layer, and a hardware layer.

[0141] Figure 9 is a flowchart of the test parameter preloading method of some preferred embodiments of the present application. As Figure 9 shown, the process includes the following steps:

[0142] Step S901, the user interface layer obtains the configuration coefficients corresponding to the test items to be executed, multiple sequences of pins to be measured, and the initial values of the test parameters corresponding to each pin to be measured in the sequence of pins to be measured;

[0143] Step S902, the user interface layer obtains the test parameters corresponding to each pin to be measured based on the configuration coefficients and the initial values of the test parameters;

[0144] Step S903, the user interface layer generates corresponding multiple sets of test parameters based on multiple sequences of pins to be measured and the corresponding test parameters;

[0145] Step S904, the user interface layer calls the driver interface to pass parameters based on the preloading instruction. The driver interface calls the service layer to pass parameters. The service layer creates objects for each set of test parameters and passes parameters, and creates objects for each pin to be measured in each set of test parameters and passes parameters;

[0146] Step S905, the main thread of the service layer traverses each set of test parameters and initiates multiple preloading threads in parallel with each set of test parameters as a unit;

[0147] Step S906, the preloading thread traverses each pin to be measured in the set of test parameters, and obtains the hardware information corresponding to the pin to be measured on different types of test boards. The hardware information includes board type, daughter board identification, and channel identification;

[0148] Step S907, the preloading thread obtains the corresponding hardware abstraction layer object (hardware interface) based on the hardware information and passes in the test parameters;

[0149] Step S908, the preloading thread checks whether the test parameters meet the preset conditions;

[0150] Step S909, when the preset conditions are met, the preloading thread executes the hardware interface function based on the channel identification and the test parameters to obtain the channel parameters and hardware memory addresses corresponding to each daughter board;

[0151] Step S910, the preloading thread caches the channel parameters and the hardware memory address in units of the daughter boards of each test board card to obtain the cache address;

[0152] Step S911, the preloading thread performs an out-of-bounds check on the cache address. If the check passes, based on the cache address, the corresponding stored data is read. The stored data includes the daughter board identifier, as well as the corresponding channel parameters and the hardware memory address;

[0153] Step S912, the preloading thread sends the stored data to the corresponding daughter board based on the daughter board identifier, and ends the preloading thread;

[0154] Step S913, the FPGA of the daughter board writes the channel parameters into the corresponding hardware memory based on the hardware memory address.

[0155] Through steps S901 to S913, the test parameters set by the user according to the test requirements and the sequence of pins under test are managed through the test parameter set. Each test parameter set corresponds to a parameter configuration scheme, which facilitates the user to perform test parameter preloading from the perspective of the parameter configuration scheme, reduces data changes during the switching of test configuration schemes, and improves the security and maintainability of preloading; the main thread of the business layer executes multiple preloading threads in parallel in units of the test parameter set, processes the preloading processes of different parameter configuration schemes in parallel in units of the test parameter set, and executes different loading processes according to different types of underlying test board cards, converting the loading process from serial to parallel, improving the preloading efficiency; each preloading thread executes the corresponding hardware interface according to different board card types, supports the mixed insertion and testing of multiple different core chip board cards, and the user interface layer and the business layer do not need to perceive the board card type.

[0156] It should be noted that the steps shown in the above process or the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. And, although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.

[0157] In some embodiments, the present application also provides a method for modifying preloaded data, which is applied to a test system. The test system includes a host computer and multiple types of test board cards communicatively connected to the host computer. The test board cards include multiple test channels. Figure 10 is a flowchart of the method for modifying preloaded data in some embodiments of the present application, as Figure 10 shown, this process includes the following steps:

[0158] Step S1001, based on the user interface, obtain multiple first test parameter sets. The first test parameter sets include the test parameters to be modified and the corresponding target pins under test.

[0159] In the case where the tester needs to modify the pre-loaded data corresponding to a certain test item, the pins under test and the corresponding test parameters corresponding to the test item can be viewed and edited on the user interface. According to the editing results, it can be determined which test parameters need to be modified. According to the test parameters to be modified, the corresponding first test parameter set and the target pins under test corresponding to the first test parameter set are determined. The first test parameter set can be one or more.

[0160] Step S1002, traverse each first test parameter set, and initiate multiple parameter modification threads in parallel with each first test parameter set as a unit. The parameter modification threads are used to obtain the channel parameters and hardware memory addresses corresponding to each target pin under test in each test channel in the first test parameter set.

[0161] The main thread of the driver software traverses each first test parameter set, initiates multiple parallel parameter modification threads with each first test parameter set as a unit, and calls the interface functions corresponding to each different type of test board through the parameter modification threads to obtain the channel parameters and hardware memory addresses corresponding to each target pin under test in each test channel in the first test parameter set.

[0162] Specifically, the parameter modification thread can traverse the target pins under test in the first test parameter set, and sequentially obtain the hardware information corresponding to each target pin under test, including the type of test board and the channel identifier corresponding to the target pin under test. And by calling the hardware interface corresponding to the type of test board, taking the board type, channel identifier, and test parameters corresponding to the target pin under test as the call parameters of the hardware interface, and running the interface program to obtain the corresponding channel parameters and hardware memory addresses.

[0163] Step S1003, based on the hardware memory addresses obtained by each parameter modification thread, write the corresponding channel parameters into the hardware memory corresponding to the test channel.

[0164] In some embodiments, after the main thread of the driver software initiates each parameter modification thread, it waits for each parameter modification thread to end. In the case where a parameter modification thread ends, the channel parameters and hardware memory addresses corresponding to the parameter modification thread are obtained, and the channel parameters and hardware memory addresses are sent to the corresponding test board, and the test board writes the channel parameters into the corresponding hardware memory. After repeating multiple times, all the channel parameters corresponding to each parameter modification thread are written into the hardware memory, and the modification of the test parameters is completed.

[0165] In other embodiments, after each parameter modification thread obtains the corresponding channel parameters and hardware memory addresses, the channel parameters and hardware memory addresses are sent to the corresponding test board, and then the parameter modification thread ends. The test board writes the channel parameters into the corresponding hardware memory.

[0166] Through steps S1001 to S1003, by corresponding the test parameters to be modified with the test parameter set and the target pins under test, the target pins under test corresponding to the test parameters to be modified are processed in parallel with the first test parameter set as the unit, and different modification processes are executed according to different types of underlying test boards, converting the modification process from serial to parallel, which improves the parameter modification efficiency; by writing the corresponding channel parameters into the hardware memory corresponding to the test channel based on the hardware memory addresses obtained by each parameter modification thread, the modification of the test parameters is realized, reducing the parameter interaction corresponding to different test scenarios during the modification of the test parameters, and improving the security and maintainability of the parameter modification.

[0167] In some embodiments, the present application further provides a method for adding preloaded data, which is applied to a test system. The test system includes a host computer and multiple types of test boards communicatively connected to the host computer. The test boards include multiple test channels. Figure 11 is a flowchart of the method for adding preloaded data in some embodiments of the present application, as Figure 11 shown, and the process includes the following steps:

[0168] Step S1101, obtaining multiple second test parameter sets based on the user interface. The second test parameter sets include multiple newly added pins under test and corresponding test parameters.

[0169] When a tester needs to add a test parameter set, or newly added pins under test and test parameters under a test item to be executed, the pins under test corresponding to the test item and the corresponding test parameters can be viewed and edited on the user interface. According to the editing results, the newly added second test parameter sets, as well as the newly added pins under test and the corresponding test parameters in the second test parameter sets, can be obtained. The second test parameter sets can be one or more.

[0170] Step S1102, traversing each second test parameter set, and initiating multiple parameter addition threads in parallel with each second test parameter set as the unit. The parameter addition threads are used to obtain the channel parameters and hardware memory addresses corresponding to each newly added pin under test in each second test parameter set on each test channel.

[0171] The user interface can call the driver interface to transfer parameters. The driver interface calls the service layer to transfer parameters. The service layer creates objects for each second test parameter set and transfers parameters, and creates objects for each newly added pin under test in each second test parameter set and transfers parameters, completing the object creation and parameter transfer of the second test parameter sets and the newly added pins under test.

[0172] The main thread of the driver software traverses each second test parameter set, initiates multiple parallel parameter addition threads in units of the second test parameter set, and calls the interface functions corresponding to each different type of test board through the parameter addition threads to obtain the channel parameters and hardware memory addresses corresponding to each newly added pin under test in each test channel in the second test parameter set.

[0173] Specifically, the parameter addition thread can traverse the newly added pins under test in the second test parameter set, and sequentially obtain the hardware information corresponding to each newly added pin under test, including the type of test board and channel identifier corresponding to the newly added pin under test. And by calling the hardware interface corresponding to the type of test board, taking the board type, channel identifier, and test parameters corresponding to the newly added pin under test as the call parameters of the hardware interface, and running the interface program to obtain the corresponding channel parameters and hardware memory addresses.

[0174] Step S1103: Based on the hardware memory addresses obtained by each parameter addition thread, write the corresponding channel parameters into the hardware memory corresponding to the test channel.

[0175] In some embodiments, after the main thread of the driver software initiates each parameter addition thread, it waits for each parameter addition thread to end. When a parameter addition thread ends, the channel parameters and hardware memory addresses corresponding to the parameter addition thread are obtained, and the channel parameters and hardware memory addresses are sent to the corresponding test board. The test board writes the channel parameters into the corresponding hardware memory. After repeating multiple times, all the channel parameters corresponding to each parameter addition thread are written into the hardware memory, completing the addition of test parameters.

[0176] In other embodiments, after each parameter addition thread obtains the corresponding channel parameters and hardware memory addresses, it sends the channel parameters and hardware memory addresses to the corresponding test board, and then ends the parameter addition thread. The test board writes the channel parameters into the corresponding hardware memory.

[0177] Through steps S1101 - S1103, by corresponding the newly added pins under test with the test parameters and test parameter sets, processing the newly added pins under test in parallel in units of the second test parameter set, executing different addition processes according to different types of underlying test boards, converting the addition process from serial to parallel, the efficiency of parameter addition is improved; by writing the corresponding channel parameters into the hardware memory corresponding to the test channel based on the hardware memory addresses obtained by each parameter addition thread, the addition of test parameters is realized, reducing the parameter interaction corresponding to different test scenarios during the test parameter configuration process, and improving the security and maintainability of parameter addition.

[0178] In addition, this embodiment also provides a test parameter preloading system. The system is applied to a test system, which includes a host computer and multiple types of test boards communicatively connected to the host computer. The test boards include multiple test channels.Figure 12 is a schematic structural diagram of a test parameter preloading system according to some embodiments of the present application. As Figure 12 shown, the test parameter preloading system includes:

[0179] User interface layer: used to obtain a corresponding plurality of test parameter sets based on the test items to be executed, where the test parameter sets include a plurality of pins under test and corresponding test parameters;

[0180] Business layer: used to manage the correspondence relationships among test items, test parameter sets, and pins under test;

[0181] Hardware abstraction layer: used to control each test board card according to the hierarchy of board card type, daughter board card, and test channel;

[0182] Hardware layer: provides a hardware interface corresponding to the board card type for the hardware abstraction layer.

[0183] The test parameter preloading system of this embodiment obtains test parameter sets through the user interface layer based on the test items to be executed, and makes the test items correspond one by one with the pins under test and test parameters in the test parameter sets; manages the correspondence relationships among test items, test parameter sets, and pins under test through the business layer, and avoids changes in the corresponding configuration parameters during the switching of test configuration schemes through hierarchical management, improving the security and maintainability of preloading; controls each test board card according to the hierarchy of board card type, daughter board card, and test channel through the hardware abstraction layer, so that the user interface layer and the business layer do not need to perceive the underlying test board card type, and the preloading of test parameters can be completed only through the configuration of test items and test parameters; provides a hardware interface corresponding to the board card type for the hardware abstraction layer through the hardware layer, supporting the mixed insertion and testing of boards with multiple different core chips.

[0184] In a further embodiment, the business layer further includes:

[0185] Test item layer: used to traverse each test parameter set and initiate multiple preloading threads in parallel with the test parameter set as the unit. The preloading threads are used to obtain the channel parameters and hardware memory addresses corresponding to each pin under test in each test channel in the corresponding test parameter set;

[0186] Test parameter set layer: used to traverse each pin under test in the test parameter set to obtain the corresponding test parameters; and used to obtain and cache the channel parameters and hardware memory addresses corresponding to the preloading threads;

[0187] Pin under test layer: used to obtain the hardware information corresponding to the pin under test on multiple types of test board cards, where the hardware information includes board card type and channel identifier.

[0188] In the test parameter preloading system of this embodiment, the main thread parallelizes the preloading processes of different parameter configuration schemes in the test item layer in units of test parameter sets, converting the loading process from serial to parallel, which improves the preloading efficiency. Each preloading thread traverses each tested pin in the test parameter set in the test parameter set layer to obtain the corresponding test parameters, and obtains the corresponding hardware information of the tested pin on various types of test boards in the tested pin layer, providing necessary information for subsequent invocation of different types of corresponding loading processes. And the channel parameters and hardware memory addresses corresponding to the preloading thread are obtained and cached in the test parameter set layer, facilitating each test board to obtain the preloading data.

[0189] In some embodiments, before traversing each test parameter set and parallelly initiating multiple preloading threads in units of test parameter sets,

[0190] The test item layer is also used to sequentially create objects of each test parameter set and pass the corresponding test parameters;

[0191] The test parameter set layer is also used to sequentially create objects of each tested pin in the test parameter set and pass the corresponding test parameters;

[0192] The tested pin layer is also used to save the corresponding test parameters in the objects of each tested pin.

[0193] In the test parameter preloading system of this embodiment, the test item layer, the test parameter set layer, and the tested pin layer are used to hierarchically manage the test items, test parameter sets, and tested pins. Through the sequential creation of objects and the sequential transmission of test parameters layer by layer, the corresponding relationships among the three and the test parameters are determined, avoiding the random change of test parameters during the switching of test configuration schemes, and improving the security and maintainability of preloading.

[0194] In some embodiments, the hardware abstraction layer is also used to: obtain the corresponding hardware interface based on the board type; determine whether the test parameters corresponding to the tested pin meet the preset conditions; and when the preset conditions are met, run the hardware interface based on the channel identifier and the test parameters to obtain the corresponding channel parameters and hardware memory addresses.

[0195] In the test parameter preloading system of this embodiment, the hardware abstraction layer associates the underlying hardware with the tested pin correspondingly. The same tested pin uses different interface programs to obtain the corresponding preloading parameters in different types of test boards; by determining whether the test parameters meet the preset conditions, the data correctness of parameter preloading is ensured; when the test parameters meet the preset conditions, by running the hardware interface based on the channel identifier and the test parameters, the corresponding channel parameters and hardware memory addresses are obtained, and the preloading efficiency of the parameters is improved by parallelly obtaining the data necessary for writing by each preloading thread.

[0196] It should be noted that the specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementation manners, and will not be elaborated herein.

[0197] It should be understood that the specific embodiments described herein are only used to explain this application, rather than to limit it. According to the embodiments provided in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this application.

[0198] Obviously, the accompanying drawings are only some examples or embodiments of this application. For those of ordinary skill in the art, this application can also be applied to other similar situations based on these drawings without creative efforts. Additionally, it can be understood that although the work done during this development process may be complex and time-consuming, for those of ordinary skill in the art, certain design, manufacturing, or production changes based on the technical content disclosed in this application are only conventional technical means and should not be regarded as insufficient disclosure of this application.

[0199] The term "embodiment" in this application means that the specific features, structures, or characteristics described in connection with the embodiment may be included in at least one embodiment of this application. The phrase appears in various positions in the specification and does not necessarily mean the same embodiment, nor does it mean being independent or alternative to other embodiments and mutually exclusive. Those of ordinary skill in the art can clearly or implicitly understand that the embodiments described in this application can be combined with other embodiments without conflict.

[0200] The above-described embodiments only represent several implementation manners of this application, and their descriptions are relatively specific and detailed, but should not be construed as limiting the scope of patent protection. It should be noted that for those of ordinary skill in the art, without departing from the concept of this application, several modifications and improvements can still be made, and these all belong to the protection scope of this application. Therefore, the protection scope of this application shall be subject to the appended claims.

Claims

1. A test parameter preloading method, characterized in that: The method is applied to a test system, the test system comprising a host computer and multiple types of test boards communicatively connected to the host computer, the test boards comprising multiple test channels, and the method comprising: Based on the test items to be executed, obtaining a corresponding plurality of test parameter sets, wherein the test parameter sets include a plurality of tested pins and corresponding test parameters; Traversing each of the test parameter sets, initiating multiple preloading threads in parallel with the test parameter set as a unit, the preloading threads being used to obtain the channel parameters and hardware memory addresses corresponding to each tested pin in the corresponding test parameter set on each of the test channels; Based on the hardware memory address obtained by each preloading thread, the corresponding channel parameter is written into the hardware memory corresponding to the test channel.

2. The method according to claim 1, characterized in that The preloading thread includes a first preloading thread, and the execution process of the first preloading thread includes: Traversing each tested pin in the test parameter set, and acquiring hardware information corresponding to the tested pin on the multiple types of test boards, wherein the hardware information includes a board type and a channel identifier; Based on the hardware information and the test parameters corresponding to the tested pins, the channel parameters and hardware memory addresses corresponding to the tested pins on each of the test channels are obtained.

3. The method according to claim 2, characterized in that The step of writing corresponding channel parameters into the hardware memory corresponding to the test channel based on the hardware memory address obtained by each preloading thread comprises: Waiting to see whether the first preloading thread ends; When a first preloading thread ends, a channel parameter and a hardware memory address corresponding to the first preloading thread are acquired and cached to obtain a cache address; Based on the cache address, the channel parameters and the hardware memory address are read and sent to the corresponding test board, and the test board writes the channel parameters into the hardware memory corresponding to the hardware memory address; Based on the termination order of the multiple first preloading threads, the above steps are repeated until the test parameter sets corresponding to all the first preloading threads have completed preloading.

4. The method according to claim 1, characterized in that: The preloading thread includes a second preloading thread, and the execution process of the second preloading thread includes: Traversing each tested pin in the test parameter set, and acquiring hardware information corresponding to the tested pin on the multiple types of test boards, wherein the hardware information includes a board type and a channel identifier; Based on the hardware information and the test parameters corresponding to the tested pins, obtaining the channel parameters and hardware memory addresses corresponding to the tested pins on each of the test channels; Cache the channel parameter and the hardware memory address to obtain a cache address; Based on the cache address, the channel parameters and the hardware memory address are read and sent to the corresponding test board, and the test board writes the channel parameters into the hardware memory corresponding to the hardware memory address.

5. The method according to claim 2 or claim 4, characterized in that: The acquiring, based on the hardware information and the test parameters corresponding to the tested pins, the channel parameters and the hardware memory addresses corresponding to the tested pins on the test channels comprises: Based on the board type, obtain the corresponding hardware interface; Determining whether the test parameters meet preset conditions; When the preset condition is met, the hardware interface is run based on the channel identifier and the test parameter to obtain corresponding channel parameters and hardware memory address.

6. The method according to claim 3 or claim 4, characterized in that: The test board includes one or more daughter boards, the hardware information includes a daughter board identifier, the channel parameters and the hardware memory address are read based on the cache address and sent to the corresponding test board, and the test board writes the channel parameters into the hardware memory corresponding to the hardware memory address, including: Based on the cache address, read the corresponding storage data, the storage data including the daughterboard identification, and the corresponding channel parameters and hardware memory address; Based on the daughter card identification, the stored data is sent to the corresponding daughter card; The daughter card writes the channel parameter into the corresponding hardware memory based on the hardware memory address.

7. The method according to claim 1, characterized in that The acquiring of the corresponding multiple test parameter sets based on the test items to be executed includes: Based on the user interface, obtain configuration coefficients corresponding to the test items to be executed and multiple tested pin sequences, as well as initial values ​​of test parameters corresponding to each tested pin in the tested pin sequences; Based on the configuration coefficient and the initial value of the test parameter, obtaining the test parameter corresponding to each tested pin; Based on the multiple tested pin sequences and the corresponding test parameters, a corresponding multiple test parameter sets are generated.

8. A method for modifying preloaded data, characterized in that: The method is applied to a test system, the test system comprising a host computer and multiple types of test boards communicatively connected to the host computer, the test boards comprising multiple test channels, and the method comprising: Acquire a plurality of first test parameter sets based on a user interface, wherein the first test parameter sets include test parameters to be modified and corresponding target tested pins; Traversing each of the first test parameter sets, initiating multiple parameter modification threads in parallel with the first test parameter set as a unit, the parameter modification threads being used to obtain the channel parameters and hardware memory addresses corresponding to each of the target tested pins in the first test parameter set on each of the test channels; Based on the hardware memory address obtained by each parameter modification thread, the corresponding channel parameter is written into the hardware memory corresponding to the test channel.

9. A new method for preloading data, characterized in that: The method is applied to a test system, the test system comprising a host computer and multiple types of test boards communicatively connected to the host computer, the test boards comprising multiple test channels, and the method comprising: Acquire multiple second test parameter sets based on the user interface, where the second test parameter sets include multiple newly added tested pins and corresponding test parameters; Traversing each of the second test parameter sets, initiating multiple parameter adding threads in parallel with the second test parameter set as a unit, the parameter adding threads being used to obtain the channel parameters and hardware memory addresses corresponding to each of the newly added tested pins in the second test parameter set on each of the test channels; Based on the hardware memory address obtained by each parameter-added thread, the corresponding channel parameter is written into the hardware memory corresponding to the test channel.

10. A test parameter preloading system, characterized in that: The system is applied to a test system, the test system includes a host computer and multiple types of test boards connected to the host computer for communication, the test boards include multiple test channels, and the test parameter preloading system includes: User interface layer: used to obtain corresponding multiple test parameter sets based on the test items to be executed, wherein the test parameter sets include multiple tested pins and corresponding test parameters; Business layer: used to manage the correspondence between test items, test parameter sets, and tested pins; Hardware abstraction layer: used to control each of the test boards according to the level of board type, sub-board, and test channel; Hardware layer: provides the hardware abstraction layer with a hardware interface corresponding to the board type.

11. The test parameter preloading system according to claim 10, characterized in that: The business layer also includes: Test item layer: used to traverse each of the test parameter sets, initiate multiple preloading threads in parallel based on the test parameter set, and the preloading threads are used to obtain the channel parameters and hardware memory addresses corresponding to each tested pin in the corresponding test parameter set on each of the test channels; Test parameter set layer: used to traverse each tested pin in the test parameter set to obtain the corresponding test parameters; and used to obtain the channel parameters and hardware memory address corresponding to the preload thread and cache them; The tested pin layer is used to obtain the hardware information corresponding to the tested pin on the multiple types of test boards, wherein the hardware information includes the board type and the channel identifier.

12. The test parameter preloading system according to claim 11, characterized in that: Before traversing each of the test parameter sets and initiating multiple preloading threads in parallel based on the test parameter sets, The test item layer is also used to sequentially create objects of each test parameter set and pass corresponding test parameters; The test parameter set layer is also used to sequentially create objects of each tested pin in the test parameter set and transfer corresponding test parameters; The tested pin layer is also used to store corresponding test parameters in the objects of each tested pin.

13. The test parameter preloading system according to claim 11, characterized in that: The hardware abstraction layer is also used to: obtain the corresponding hardware interface based on the board type; determine whether the test parameters corresponding to the tested pin meet the preset conditions; and when the preset conditions are met, run the hardware interface based on the channel identifier and the test parameters to obtain the corresponding channel parameters and hardware memory address.

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