An ignition circuit system based on digital structure

Abstract

This invention belongs to the field of digital circuit technology, specifically relating to an ignition circuit system based on a digital structure. It includes a digital logic control circuit and an ignition circuit, with the digital logic control circuit partially connected to the ignition circuit. The digital logic control circuit includes an encoding conversion module and a logic transformation module, while the ignition circuit includes a power charging module and a power discharging module. The encoding conversion module includes a shift register chip IC1, which converts serial encoding into parallel encoding. The logic transformation module includes four-channel AND gates IC2 and IC3, and a NOT gate IC4. After logical transformation by the logic transformation module, the parallel encoding generates control signals that are output to ports S1 and S2. In the power charging module, when the control signal causes port S2 to output a high level, the ignition circuit performs power charging; when the control signal causes port S1 to output a high level, the ignition circuit performs power discharging.

Description

Technical Field

[0001] This invention belongs to the field of digital circuit technology, and specifically relates to an ignition circuit system based on a digital structure. Background Technology

[0002] Digital circuits are widely used in weaponry due to their strong anti-interference capabilities, easy input adjustment, simple circuitry, and ability to be encoded and input by microcontrollers. The logic converter, as a crucial component of the ignition circuit, mainly consists of shift registers, AND gates, and NOT gates, achieving ignition by controlling the charging and discharging of capacitors. Existing analog circuit technology, used as input control circuits, is highly susceptible to external signal interference due to its resistors and capacitors. It also exhibits significant temperature drift at high and low temperatures. Furthermore, the input signal, an analog pulse signal, has poor stability during circuit conversion, resulting in a complex circuit structure and higher cost. Summary of the Invention

[0003] This invention provides an ignition circuit system based on a digital structure to solve the technical problems of poor anti-interference capability and difficulty in adjusting input in existing ignition circuits.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] A digital-based ignition circuit system includes a digital logic control circuit and an ignition circuit, with the digital logic control circuit connected to the ignition circuit. The digital logic control circuit includes an encoding conversion module and a logic transformation module, while the ignition circuit includes a power charging module and a power discharging module.

[0006] The encoding conversion module is used to convert the received serial encoding into parallel encoding;

[0007] The logic transformation module is used to perform logic transformation on the parallel code and output control signals to the ignition circuit.

[0008] The ignition circuit executes the power charging module or the power discharging module according to the control signal.

[0009] The encoding loop module includes a shift register chip IC1, which is used to convert serial encoding into parallel encoding.

[0010] The DB interface of shift register chip IC1 is connected to the encoding signal terminal BM. The CLOCKB interface of shift register chip IC1 is connected to the clock signal terminal CK. The encoding signal terminal BM is connected to the microcontroller. The microcontroller is used to generate serial codes of four bits or more, which are input to shift register chip IC1 through the encoding signal terminal BM. Shift register chip IC1 is connected to the logic conversion module. The clock signal terminal CK controls the shifting and parallel encoding of the encoding signal in shift register chip IC1. The logic conversion module receives the output parallel encoding.

[0011] The VSS interface of shift register chip IC1 is connected to GND signal ground, and the VDD interface of shift register chip IC1 is connected to SV power supply.

[0012] The logic transformation module includes NOT gate IC4A and NOT gate IC4B, as well as AND gates IC2A, IC2B, and IC2C, and AND gates IC3A, IC3B, and IC3D. The input terminal 13 of NOT gate IC4A is connected to the Q2B interface of shift register chip IC1. The output terminal of NOT gate IC4A is connected to the second input terminal of AND gate IC2A. The first input terminal of AND gate IC2A is connected to the Q1B interface of shift register chip IC1. The output terminal of AND gate IC2A is connected to the first input terminal of AND gate IC2B. The Q3B and Q4B interfaces of shift register chip IC1 are respectively connected to the first and second input terminals of AND gate IC2C. The Q1B and Q2B interfaces of shift register chip IC1 are connected to the first and second input interfaces of AND gate IC3D, respectively. The output interface of IC3D is connected to the first input interface of AND gate IC3A. The Q4B interface of shift register chip IC1 is connected to the second input interface of AND gate IC3B. The input interface of NOT gate IC4B is connected to the Q3B interface of shift register chip IC1. The output interface of NOT gate IC4B is connected to the first input interface of AND gate IC3B. The output interface of AND gate IC3B is connected to the second input interface of AND gate IC3A. The first power interface of AND gate IC2A and the second power interface of AND gate IC3A are both connected to power supplies.

[0013] The IC2B output interface of AND gate IC2B is connected to the power charging module of the ignition circuit through resistors R9 and R11; the IC3A output interface of AND gate IC3A is connected to the power discharging module of the ignition circuit through resistors R10 and R12.

[0014] Resistor R9, resistor R4 and diode D5 form a series circuit, resistor R10, resistor R5 and diode D4 form a series circuit, and the two series circuits are connected in parallel to the monitoring terminal JC.

[0015] The power charging module of the ignition circuit includes a diode D2. The positive terminal of diode D2 is connected to port S2, and the negative terminal of diode D2 is connected to the first interface of control thyristor T1 (T1). The second interface of control thyristor T1 is connected to one end of resistor R2. The other end of resistor R2 is connected in series with one end of resistor R1. The other end of resistor R1 is connected to the source of control power transistor Q1. The end of resistor R2 connected to resistor R1 is also connected to the gate of control power transistor Q1. The drain of control power transistor Q1 is connected to the negative terminal of diode D1. The positive terminal of diode D1 is connected to capacitors C9 and C10 in parallel through resistor R3.

[0016] The ignition circuit also includes a voltage monitoring module. The voltage monitoring module is connected to the power charging module and the power discharging module through diode D6. The voltage monitoring module includes resistors R6 and R7. One end of resistor R6 is connected to the negative terminal of diode D6, and the positive terminal of diode D6 is connected to one end of resistor R3. The other end of resistor R6 is connected in series with resistor R7 and then grounded. One end of resistor R6 connected to resistor R7 is also connected to the PREF port, and the other end of resistor R7 is connected to the load RL.

[0017] The power discharge module also includes an output thyristor T2. The first interface of the output thyristor T2 is connected to the negative terminal of diode D3, and the positive terminal of diode D3 is connected to port S1. The second interface of the output thyristor T2 is connected to capacitors C9 and C10 in parallel, and the third interface of the output thyristor T2 is connected to the load RL.

[0018] Compared with the prior art, the present invention has the following beneficial effects:

[0019] This invention discloses a digitally based ignition circuit system that connects the digital logic control circuit and the ignition circuit via ports S1 and S2. This design helps reduce electromagnetic interference (EMI) and improves the system's anti-interference capability. Simultaneously, the digitalization of logic control allows for more precise and adjustable ignition timing, enhancing the flexibility of input adjustment.

[0020] Furthermore, the encoding conversion module is integrated with the microcontroller: the encoding signal terminal BM is directly connected to the microcontroller, enabling the system to receive complex encoded signals from the microcontroller, improving the diversity and accuracy of signal processing, which is beneficial for precise control of the ignition process and enhancing anti-interference capabilities.

[0021] Furthermore, the shift register is controlled by a clock signal: the introduction of the clock signal terminal CK ensures the synchronous movement of the coded signal in the shift register, improves the stability and reliability of signal processing, and has better resistance to high-frequency interference.

[0022] Furthermore, the logic transformation module uses NOT gates and AND gates: the combination of two NOT gates and AND gates not only enables flexible signal processing, but also increases the circuit's logical judgment capability, which helps to filter out erroneous signals and improve anti-interference performance.

[0023] Furthermore, AND gates IC2 and IC3 are connected to VS: This indicates that the system can perform logic operations according to specific voltage states, enhancing the stability of the circuit under different operating conditions and making it more adaptable to interference factors such as power supply fluctuations.

[0024] Furthermore, the logic transformation module directly controls ports S1 and S2. This design simplifies the control path, reduces signal attenuation and distortion during signal transmission, and enhances signal reliability and precise control of ignition timing.

[0025] Furthermore, the addition of the monitoring terminal JC provides an interface for monitoring the system's operating status, facilitating real-time monitoring and fault diagnosis, helping to promptly identify and correct problems, and improving the overall system's stability and reliability.

[0026] Furthermore, the control thyristor T1 and related protection components effectively manage the charging and discharging process of the power supply, protect the circuit from overvoltage or current surges, and improve the system's anti-interference capability in harsh environments.

[0027] Furthermore, the voltage monitoring module monitors the capacitor voltage through resistors R6 and R7 and diode D6 to ensure a stable power supply and adjust the charging strategy in a timely manner, thereby further enhancing the stability and safety of the system.

[0028] Furthermore, the capacitor discharge process is controlled by turning on the output thyristor T2, ensuring rapid and accurate energy release, improving ignition efficiency and reliability. At the same time, in conjunction with the aforementioned protection measures, the overall anti-interference capability is enhanced. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the ignition circuit;

[0030] Figure 2 This is a schematic diagram of a digital logic control conversion circuit.

[0031] Numbered: 1. T1 First Interface; 2. T1 Second Interface; 3. T1 Third Interface; 4. T2 First Interface; 5. T2 Second Interface; 6. T3 Third Interface; 7. IC4A Input Interface; 8. IC4B Input Interface; 9. IC2A First Input Interface; 10. IC2A Second Input Interface; 11. IC2B First Input Interface; 12. IC2B Second Input Interface; 13. IC2C First Input Interface; 14. IC2C Second Input Interface; 15. IC3A First Input Interface; 16. IC3A 17. IC3B First Input Interface; 18. IC3B Second Input Interface; 19. IC3D First Input Interface; 20. IC3D Second Input Interface; 21. IC4A Output Interface; 22. IC4B Output Interface; 23. IC2A Output Interface; 24. IC2B Output Interface; 25. IC2C Output Interface; 26. IC3A Output Interface; 27. IC3B Output Interface; 28. IC3D Output Interface; 29. ​​First Power Interface; 30. Second Power Interface. Detailed Implementation

[0032] To further understand the content of this invention, the invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments are merely illustrative and not limiting of the invention.

[0033] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0034] See Figure 1 and Figure 2 The circuit system is divided into two parts. Figure 1 For ignition circuit, Figure 2 This is a digital logic control conversion circuit; where D1 to D6 are diodes, T1 is a thyristor for the control circuit, T2 is an output control thyristor, Q1 is a control power transistor, IC1 is a shift register chip, IC2 and IC3 are four-channel AND gates, IC4 is an NOT gate, RL is the output load, BM port is the input encoding signal terminal, CK is the clock signal terminal, VS is the power supply terminal, and FIRE is the output terminal.

[0035] The digital logic control conversion circuit includes an IC1 shift register chip. The DB interface of the shift register chip IC1 is connected to the encoding signal terminal BM. The CLOCKB interface of the shift register chip IC1 is connected to the clock signal terminal CK. The encoding signal terminal BM is connected to the microcontroller. The microcontroller is used to generate an encoding signal of more than four bits, which is input to the shift register chip IC1 through the encoding signal terminal BM. The clock signal terminal CK controls the shift of the encoding signal in the shift register chip IC1. The VSS interface of the shift register chip IC1 is connected to the GND signal ground. The VDD interface of the shift register chip IC1 is connected to the power supply. The IC4A input terminal interface 7 of the NOT gate IC4A is connected to the Q2B interface of the shift register chip IC1. The IC4A input terminal interface 13 of the NOT gate IC4A is connected to the Q2B interface of the shift register chip IC1. The IC4A output terminal interface (21) of the NOT gate IC4A is connected to the IC2A second input terminal interface (10) of the AND gate IC2A. The IC2A first input terminal interface (10) of the AND gate IC2A is connected to the IC2A second input terminal interface (10). 9) Connect the Q1B interface of shift register chip IC1, and connect the IC2A output interface (23) of AND gate IC2A to the first input interface (11) of AND gate IC2B; connect the Q3B and Q4B interfaces of shift register chip IC1 to the first input interface (13) and second input interface (14) of AND gate IC2C respectively; connect the Q1B and Q2B interfaces of shift register chip IC1 to the first input interface of AND gate IC3D respectively. (19) and IC3D second input interface (20), IC3D output interface (28) of IC3D is connected to the first input interface (15) of AND gate IC3A; Q4B interface of shift register chip IC1 is connected to the second input interface (18) of AND gate IC3B, IC4B input interface (8) of NOT gate IC4B is connected to the Q3B interface of shift register chip IC1, and IC4B output interface (22) of NOT gate IC4B is connected to the AND gate IC3B. The first input terminal interface (17) of the AND gate IC3B is connected to the second input terminal interface (16) of the AND gate IC3A. The first power interface (29) of the AND gate IC2A and the second power interface (30) of the AND gate IC3A are both connected to power supplies. The output terminal interface (24) of the AND gate IC2B is connected to the power charging module of the ignition circuit through resistors R9 and R11. The output terminal interface (26) of the AND gate IC3A is connected to the power discharging module of the ignition circuit through resistors R10 and R12. Resistors R9, R4 and diode D5 form a series circuit, and resistors R10, R5 and diode D4 form a series circuit. The two series circuits are connected in parallel and then connected to the monitoring terminal JC.

[0036] The ignition circuit includes a diode D2, the anode of which is connected to port S2, and the cathode of which is connected to the first interface (1) of the control thyristor T1. The second interface (2) of the control thyristor T1 is connected to one end of resistor R2. The other end of resistor R2 is connected in series with one end of resistor R1. The other end of resistor R1 is connected to the source of the control power transistor Q1. The end of resistor R2 connected to resistor R1 is also connected to the gate of the control power transistor Q1. The drain of the control power transistor Q1 is connected to the cathode of diode D1. The anode of diode D1 is connected to capacitors C9 and C10 in parallel through resistor R3. The ignition circuit also includes a voltage monitoring module, which is connected to the power charging module through diode D6. The power discharge module and voltage monitoring module include resistors R6 and R7. One end of resistor R6 is connected to the negative terminal of diode D6, the positive terminal of diode D6 is connected to one end of resistor R3, and the other end of resistor R6 is connected in series with resistor R7 and then grounded. One end of resistor R6 connected to resistor R7 is also connected to the PREF port, and the other end of resistor R7 is connected to the load RL. The power discharge module also includes an output thyristor T2. The first interface (4) of the output thyristor T2 is connected to the negative terminal of diode D3, and the positive terminal of diode D3 is connected to the S1 port. The second interface (5) of the output thyristor T2 is connected to the parallel capacitors C9 and C10, and the third interface (6) of the output thyristor T2 is connected to the load RL.

[0037] The four-channel AND gate IC2, AND gate IC3, and NOT gate IC4 perform logical transformations based on the truth table to obtain the level control signals for ports S1 and S2. The control signals cause port S1 or port S2 to generate a high level, thereby controlling the ignition circuit to charge or discharge the power supply.

[0038] This invention proposes an ignition circuit system based on a digital structure, the specific implementation method of which is as follows:

[0039] The system mainly consists of an ignition circuit and a digital logic control circuit. The ignition circuit mainly includes: diode D, resistor R, load RL, control power transistor Q1, thyristor T, and capacitor C. The digital logic control circuit mainly includes: a register IC1, four-channel AND gates IC2 and IC3, and NOT gate IC4.

[0040] Diode D includes diodes D1, D2, D3, and D4, and is used for protection circuits and signal direction control;

[0041] The resistors R include: resistors R1, R2, R3, R6, and R7, which are used for voltage division and current limiting;

[0042] The load RL serves as an ignition coil or other device that requires pulsed electrical energy.

[0043] The control power transistor Q1, as the main control element, is used to provide sufficient current drive capability and is responsible for charging the capacitor;

[0044] Thyristor T includes thyristor T1 and thyristor T2, where thyristor T1 is the thyristor of the control circuit, used to control the charging process, and thyristor T2 is the output control thyristor used to control the discharge process of the capacitor.

[0045] Capacitors C include C9 and C10, which are used to store and release energy.

[0046] The shift register chip IC1 converts the serial encoded signal generated by the microcontroller into a parallel encoded signal.

[0047] Four-channel AND gates IC2 and IC3 are used for logic transformation to generate control signals based on parallel encoded signals;

[0048] NOT gate IC4 is used to further process the logic signals after the logic transformation by AND gates IC2 and IC3.

[0049] The coded signal generated by the microcontroller is input at the BM terminal. IC1 converts the serial code to parallel code, and then IC2-IC4 perform logic transformation before outputting to ports S1 and S2. The JC terminal is the monitoring terminal. When port S2 is high, as the voltage at port S2 increases, thyristor T1 turns on. The VGS turn-on voltage of the control power transistor Q1 is provided by a voltage divider between resistors R1 and R2. This voltage divider turns on Q1, thereby charging capacitors C9 and C10 to the power supply voltage VS through the control power transistor Q1, diode D1, and resistor R3. The PREF terminal monitors the charging voltage through diode D6, resistor R6, and resistor R7. When thyristor T1 is on, resistors R1 and R2 provide a sustaining current to ensure the thyristor is in a normally on state. The control power transistor Q1 is also in a normally on state, continuously charging the capacitors. When the input level of port S1 is high, as the voltage of port S2 increases, thyristor T2 starts to conduct, and the energy at both ends of capacitors C9 and C10 can be released through thyristor T2 and external load RL.

[0050] The encoding signal terminal BM of the digital logic control circuit is connected to a microcontroller. The microcontroller generates an encoding signal of four or more bits according to a preset program or external input. The encoding signal terminal BM is connected to the DB interface of the shift register chip IC1. The encoding signal is input to the shift register IC1 through the encoding signal terminal BM. The encoding signal is continuously input into the shift register chip IC1 in one-bit single input units to form serial encoding. When the shift register chip IC1 is filled with all bits, the shift register chip IC1 outputs data from all register bits simultaneously, converting it into parallel encoding. The clock signal terminal CK is connected to the CLOCKB interface of the shift register chip IC1. The shifting of the shift register chip IC1 is controlled by the clock signal terminal CK. Whenever the rising edge of the clock signal terminal arrives, the shift register chip IC1 receives a new input signal and shifts the previous encoding signal. When the bits in the shift register chip IC1 are filled with the encoding signal, it is the falling edge of the clock signal terminal Ck. At this time, the clock signal terminal CK controls the shift register chip IC1 to output all the encoding signals in parallel, forming parallel encoding.

[0051] The input terminal 13 of NOT gate IC4A is connected to the Q2B interface of shift register chip IC1. The output terminal (21) of NOT gate IC4A is connected to the second input terminal (10) of AND gate IC2A. The first input terminal (9) of AND gate IC2A is connected to the Q1B interface of shift register chip IC1. The output terminal (23) of AND gate IC2A is connected to the first input terminal (11) of AND gate IC2B. The Q3B and Q4B interfaces of shift register chip IC1 are connected to the first input terminal (13) and second input terminal (14) of AND gate IC2C, respectively. The Q1B and Q2B interfaces of shift register chip IC1 are connected to the AND gate IC3D, respectively. The IC3D first input interface (19) and IC3D second input interface (20) are connected to the IC3D output interface (28) of the IC3D and the first input interface (15) of the AND gate IC3A. The Q4B interface of the shift register chip IC1 is connected to the second input interface (18) of the AND gate IC3B. The IC4B input interface (8) of the NOT gate IC4B is connected to the Q3B interface of the shift register chip IC1. The IC4B output interface (22) of the NOT gate IC4B is connected to the first input interface (17) of the AND gate IC3B and the IC3B output interface (27) of the AND gate IC3B is connected to the second input interface (16) of the AND gate IC3A. The first power interface (29) of the AND gate IC2A and the second power interface (30) of the AND gate IC3A are both connected to power supplies. The parallel encoding of shift register IC1 is output to NOT gates IC4A and IC4B through interfaces Q2B and Q3B. The parallel encoding undergoes logic transformation via four AND gates IC2A, IC2B, and IC2C, AND gates IC3A, IC3B, and IC3D, and NOT gates IC4A and IC4B, generating control signals output to ports S1 and S2. When the input encoding at the BM terminal is 1011, port S2 outputs a high level; when the input encoding at the BM terminal is 1101, port S1 outputs a high level. Other encoded inputs are invalid. The logic truth table 1 is shown below:

[0052] Table 1 Logical Truth Table

[0053]

[0054] When the input level at port S2 is high, as the voltage at port S2 increases, the VGT of T1 begins to increase, T1 begins to conduct, and the VGT of Q1 increases. GSThe conduction voltage is provided by a voltage divider formed by resistors R1 and R2. This voltage divider turns on Q1, which in turn charges capacitors C9 and C10 via the control power transistor Q1, diode D1, and resistor R3. The capacitors C9 and C10 are then charged to the power supply voltage VS. The PREF terminal monitors the voltage generated during the charging process via diode D6, resistors R6 and R7, providing monitoring data (R6 and R7 are typically chosen with relatively large resistance values). When T1 is turned on, R1 and R2 provide a sustaining current to T1, ensuring that the thyristor and Q1 are always on, continuously charging the capacitors. Once T1 is turned on, resistors R1 and R2 provide current to ensure that the thyristor T1 and control power transistor Q1 are always on, continuously charging the capacitors until the next electrical signal arrives.

[0055] When the input level at port S1 is high, as the voltage at port S2 increases, the output control thyristor T2 starts to conduct, and the voltage of T2... GT As the discharge begins, the energy across capacitors C9 and C10 is released via T2 and the external load RL, thus completing the ignition process. The discharge current is:

[0056]

[0057] It should be noted that when selecting the values ​​of R1 and R2, the magnitude of the sustaining current that can be provided for the thyristor to conduct must be considered. If the current value is too small, it will affect the normal conduction of the thyristor. At the same time, Q1 should be a field-effect transistor with low on-resistance, which can effectively reduce product losses.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. An ignition circuit system based on a digital structure, characterized in that, It includes a digital logic control circuit and an ignition circuit, with the digital logic control circuit connected to the ignition circuit; the digital logic control circuit includes an encoding conversion module and a logic transformation module, and the ignition circuit includes a power charging module and a power discharging module. The encoding conversion module is used to convert the received serial encoding into parallel encoding. The encoding conversion module includes a shift register chip IC1, which is used to convert the serial encoding into parallel encoding. The logic transformation module is used to transform the parallel code and output the control signal to the ignition circuit. The logic transformation module includes NOT gate IC4A and NOT gate IC4B, as well as AND gate IC2A, AND gate IC2B and AND gate IC2C, and AND gate IC3A, AND gate IC3B and AND gate IC3D. The input terminal 13 of NOT gate IC4A is connected to the Q2B interface of shift register chip IC1. The output terminal (21) of NOT gate IC4A is connected to the second input terminal (10) of AND gate IC2A. The first input terminal (9) of AND gate IC2A is connected to the Q1B interface of shift register chip IC1. The output terminal (23) of AND gate IC2A is connected to the first input terminal (11) of AND gate IC2B. The Q3B and Q4B interfaces of chip IC1 are connected to the first input interface (13) and the second input interface (14) of AND gate IC2C, respectively; the Q1B and Q2B interfaces of shift register chip IC1 are connected to the first input interface (19) and the second input interface (20) of AND gate IC3D, respectively; the output interface (28) of IC3D is connected to the first input interface (15) of AND gate IC3A; the Q4B interface of shift register chip IC1 is connected to the second input interface (18) of AND gate IC3B; the input interface (8) of NOT gate IC4B is connected to the Q3B interface of shift register chip IC1; and the output interface (22) of NOT gate IC4B is connected to the AND gate IC3B. The first input terminal interface (17) of the AND gate IC3B is connected to the second input terminal interface (16) of the AND gate IC3A; the first power interface (29) of the AND gate IC2A and the second power interface (30) of the AND gate IC3A are both connected to power supplies. The ignition circuit executes the power charging module or the power discharging module according to the control signal. The power charging module of the ignition circuit includes a diode D2. The positive terminal of the diode D2 is connected to the S2 port, and the negative terminal of the diode D2 is connected to the first interface (1) of the control thyristor T1. The second interface (2) of the control thyristor T1 is connected to one end of the resistor R2. The other end of the resistor R2 is connected in series with one end of the resistor R1. The other end of the resistor R1 is connected to the source of the control power transistor Q1. The end of the resistor R2 connected to the resistor R1 is also connected to the gate of the control power transistor Q1. The drain of the control power transistor Q1 is connected to the negative terminal of the diode D1. The positive terminal of the diode D1 is connected to the parallel capacitors C9 and C10 through the resistor R3.

2. The ignition circuit system based on a digital structure according to claim 1, characterized in that, The DB interface of shift register chip IC1 is connected to the encoding signal terminal BM. The CLOCKB interface of shift register chip IC1 is connected to the clock signal terminal CK. The encoding signal terminal BM is connected to the microcontroller. The microcontroller is used to generate serial codes of four bits or more, which are input to shift register chip IC1 through the encoding signal terminal BM. Shift register chip IC1 is connected to the logic conversion module. The clock signal terminal CK controls the shifting and parallel encoding of the encoding signal in shift register chip IC1. The logic conversion module receives the output parallel encoding.

3. The ignition circuit system based on a digital structure according to claim 2, characterized in that, The VSS interface of shift register chip IC1 is connected to GND signal ground, and the VDD interface of shift register chip IC1 is connected to SV power supply.

4. The ignition circuit system based on a digital structure according to claim 1, characterized in that, The IC2B output interface (24) of AND gate IC2B is connected to the power charging module of the ignition circuit through resistors R9 and R11; the IC3A output interface (26) of AND gate IC3A is connected to the power discharging module of the ignition circuit through resistors R10 and R12.

5. The ignition circuit system based on a digital structure according to claim 4, characterized in that, Resistor R9, resistor R4 and diode D5 form a series circuit, resistor R10, resistor R5 and diode D4 form a series circuit, and the two series circuits are connected in parallel to the monitoring terminal JC.

6. The ignition circuit system based on a digital structure according to claim 1, characterized in that, The ignition circuit also includes a voltage monitoring module. The voltage monitoring module is connected to the power charging module and the power discharging module through diode D6. The voltage monitoring module includes resistors R6 and R7. One end of resistor R6 is connected to the negative terminal of diode D6, and the positive terminal of diode D6 is connected to one end of resistor R3. The other end of resistor R6 is connected in series with resistor R7 and then grounded. One end of resistor R6 connected to resistor R7 is also connected to the PREF port, and the other end of resistor R7 is connected to the load RL.

7. The ignition circuit system based on a digital structure according to claim 6, characterized in that, The power discharge module also includes an output thyristor T2. The first interface (4) of the output thyristor T2 is connected to the negative terminal of the diode D3, and the positive terminal of the diode D3 is connected to the S1 port. The second interface (5) of the output thyristor T2 is connected to the parallel capacitors C9 and C10, and the third interface (6) of the output thyristor T2 is connected to the load RL.

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