Field programmable gate array (FPGA) circuit and method for solving micro-grid economic dispatching problem based on neurodynamics optimization algorithm

Abstract

The invention provides an FPGA circuit and method for solving a micro-grid economic dispatching problem based on a neurodynamics optimization algorithm. The FPGA circuit comprises a top layer module; the top layer module comprises a Runge-Kutta control module, a state control module and a counting module; the Runge-Kutta control module comprises a G module and at least one Runge-Kutta module LGKTi; the G module comprises at least one gradient calculation module Gi; the number of the Runge-Kutta modules LGKTi and the number of the gradient calculation modules Gi are configured to be at least the number n of generators; a gradient calculation module Gi in the G module is used for calculating gradient information data in a Runge-Kutta formula and sending the gradient information data to a corresponding Runge-Kutta module LGKTi; the Runge-Kutta module LGKTi is used for calculating the slope of each stage in a Runge-Kutta formula and carrying out iterative updating on an output power vector of a generator; the method has the advantages of high efficiency, reconfigurability, low energy consumption and the like.

Description

Technical Field

[0001] The present invention belongs to the field of intelligent microgrids, and in particular, to an FPGA circuit and method for solving the economic dispatch problem of a microgrid based on a neural dynamics optimization algorithm. Background Art

[0002] The power resources in the smart grid are widely distributed and involve the dispatching of multiple links such as power generation, power transmission, and power distribution. As an important issue in the operation of the power system, economic dispatch aims to minimize the system operation cost by optimizing the distribution of load demand and reasonably arranging the power generation plan on the premise of meeting the system-level and unit-level operation constraints. In order to reduce the economic cost and ensure the power supply reliability, it is necessary to develop efficient dispatch algorithms and use efficient hardware platforms.

[0003] As a simulation algorithm based on a neuron model, the neural dynamics algorithm can simulate the dynamic behavior of neurons and can implement data processing and analysis during its simulation process. Compared with traditional computing methods, this algorithm has better computing speed, higher parallelism, higher accuracy, and lower energy consumption. In the power system, the economic dispatch problem involves a large amount of data processing and analysis, and the high efficiency of the neural dynamics algorithm makes it an ideal algorithm choice. FPGA (Field Programmable Gate Array) is an integrated circuit chip with the characteristics of easy implementation, reasonable price, flexible design, and the advantage of high parallelism. Therefore, the hardware implementation of the neural dynamics algorithm by FPGA can accelerate the calculation, improve the dispatch efficiency and computing speed. At the same time, FPGA can also be flexibly optimized in hardware to further improve the algorithm performance and efficiency.

[0004] Although researchers at home and abroad have proposed many mature economic dispatch algorithms, there are few studies on the hardware implementation of the economic dispatch problem. Traditional computer architectures often have problems such as slow computing speed, high power consumption, and large volume, which are difficult to meet the requirements of the power system for real-time performance, reliability, and efficiency. The hardware implementation of the economic dispatch problem by FPGA can give full play to its high parallelism advantage, greatly improving the algorithm solving speed and dispatch efficiency. At the same time, the circuit for solving the economic dispatch problem based on FPGA adopts the IP core encapsulation technology, encapsulating the solving circuit into a reusable IP core. This greatly simplifies the user usage and integration process, improves the maintainability and scalability of the system. It enables the IP core for solving the economic dispatch problem to be flexibly applied to various embedded system design environments. Summary of the Invention

[0005] To solve at least one technical problem in the prior art, an embodiment of the present invention provides an FPGA circuit and method for solving the economic dispatch problem of a microgrid based on a neural dynamics optimization algorithm, enabling the solution of the economic dispatch problem of the microgrid through the neural dynamics algorithm to be implemented in the FPGA circuit, with advantages such as high efficiency, reconfigurability, and low energy consumption, which is a new solution for solving the economic dispatch problem of the power system. To achieve the above technical objectives, the technical solution adopted in the embodiment of the present invention is as follows:

[0006] In the first aspect, an embodiment of the present invention provides an FPGA circuit for solving the economic dispatch problem of a microgrid based on a neural dynamics optimization algorithm, including a top-level module;

[0007] The top-level module includes a Runge-Kutta control module, a state control module, and a counting module; the Runge-Kutta control module includes a G module and at least one Runge-Kutta module LGKTi; the G module includes at least one gradient calculation module Gi; the numbers of the Runge-Kutta module LGKTi and the gradient calculation module Gi are respectively configured to be at least the number n of generators;

[0008] The solution of the economic dispatch problem of the microgrid based on the neural dynamics optimization algorithm includes:

[0009] Define the power generation cost function of the generator and its constraints;

[0010] Define the neural dynamics optimization algorithm;

[0011] Discretize the neural dynamics optimization algorithm to obtain the Runge-Kutta formula;

[0012] The top-level module is used to input the generator output power vector and send the generator output power vector to the Runge-Kutta control module through the state control module;

[0013] The gradient calculation module Gi in the G module is used to calculate the gradient information data in the Runge-Kutta formula and send the gradient information data to the corresponding Runge-Kutta module LGKTi;

[0014] The Runge-Kutta module LGKTi is used to calculate the slopes of each stage in the Runge-Kutta formula and iteratively update the generator output power vector to obtain the iteratively updated generator output power vector;

[0015] The state control module controls the loop using a finite state machine, including three states: S1, S2, and S3; the state control module configures the corresponding state according to the iterative update process of the generator output power vector;

[0016] The counting module is used to count the number of iterations.

[0017] Furthermore, the power generation cost function of the generator and its constraints are expressed as:

[0018]

[0019] where C(P) represents the generator cost function, p i is the output power of the i-th generator, P is the generator output power vector of n generators, that is, [p 1 , p 2 … p i … p n , and α i , β i , γ i are cost parameters respectively, where α i > 0; D is the total power demand in the power grid;

[0020] The neural dynamics optimization algorithm is expressed as:

[0021]

[0022] where L(P, λ) = f(P) + λ T h(P) is the Lagrangian function, and λ is the Lagrange multiplier;

[0023]

[0024] Discretizing formula (3) gives the Runge-Kutta formula, which is expressed as:

[0025]

[0026] where h is the iteration step size, and K 1 , K 2 , K 3 , K 4 are the slopes at each stage in the Runge-Kutta formula; P j is the generator output power vector at the j-th iteration.

[0027] Furthermore, the Runge-Kutta module LGKTi includes a K1 module, a K2 module, a K3 module, a K4 module, and an update module; the K1 module, K2 module, K3 module, and K4 module are respectively used to calculate the slopes K 1 , K 2 , K 3 and K 4 at each stage in the Runge-Kutta formula; the update module is used to iteratively update the generator output power vector according to the slopes K 1 , K 2 , K 3 and K 4 and send the updated generator output power vector to the state control module.

[0028] Further, the K1 module, K2 module, K3 module, and K4 module each include a floating-point multiplier and a floating-point adder.

[0029] Further, the G module is instantiated by gradient calculation modules Gi of multiple dimensions.

[0030] Further, the gradient calculation module Gi and the Runge-Kutta module LGKTi correspond one-to-one and correspond to the output power pi of the i-th generator. i Correspond.

[0031] Further, the gradient calculation module Gi includes a floating-point multiplier and a floating-point adder inside.

[0032] Further, the FPGA circuit for solving the microgrid economic dispatch problem based on the neurodynamics optimization algorithm uses IP core encapsulation, and sets the cost parameters α i , β i and γ i as well as the iteration step size h and the maximum number of iterations as IP core parameters.

[0033] In a second aspect, an embodiment of the present invention provides a method for solving the microgrid economic dispatch problem based on the neurodynamics optimization algorithm. Based on the FPGA circuit for solving the microgrid economic dispatch problem based on the neurodynamics optimization algorithm as described above, the method includes the following steps:

[0034] Step S1, the initial value P of the generator output power vector j is input into the top-level module, and the state control module enters the S1 state;

[0035] Step S2, the state control module sends the initial value P of the generator output power vector j to the Runge-Kutta control module;

[0036] Step S3, each gradient calculation module Gi in the G module calculates the gradient information data ▽ Pj L(P j ,λ) and sends it to the Runge-Kutta module LGKTi; the stage slope K 1 is calculated by the K1 module inside each dimension of the Runge-Kutta module LGKTi and transmitted to the internal K2 module and the update module;

[0037] Step S4, the K2 module inside each dimension of the Runge-Kutta module LGKTi sends (P j +K 1 / 2,λ+K 1 / 2) data to each gradient calculation module Gi in the G module;

[0038] Step S5, each gradient calculation module Gi in the G module calculates the gradient information data ▽ Pj L(P j +K 1 / 2, λ + K 1 / 2) and sends it to the Runge-Kutta module LGKTi; the K2 module inside each dimension's Runge-Kutta module LGKTi calculates the stage slope K 2 and transmits it to the internal K3 module and update module;

[0039] Step S6, the K3 module inside each dimension's Runge-Kutta module LGKTi sends (P j +K 2 / 2, λ + K 2 / 2) data to each gradient calculation module Gi in the G module;

[0040] Step S7, each gradient calculation module Gi in the G module calculates the gradient information data ▽ Pj L(P j +K 2 / 2, λ + K 2 / 2) and sends it to the Runge-Kutta module LGKTi; the K3 module inside each dimension's Runge-Kutta module LGKTi calculates the stage slope K 3 and transmits it to the internal K4 module and update module;

[0041] Step S8, the K4 module inside each dimension's Runge-Kutta module LGKTi sends (P j +K 3 , λ + K 3 ) data to each gradient calculation module Gi in the G module;

[0042] Step S9, each gradient calculation module Gi in the G module calculates the gradient information data ▽ Pj L(P j +K 3 , λ + K 3 ) and sends it to the Runge-Kutta module LGKTi; the K4 module inside each dimension's Runge-Kutta module LGKTi calculates the stage slope K 4 and transmits it to the internal K4 module and update module;

[0043] Step S10, the update module iteratively updates the generator output power vector according to the formula P j+1 =P j +(K 1 +2K 2 +2K 3 +K 4 ) / 6; the iteratively updated generator output power vector P j+1Send to the status control module;

[0044] After each iteration of the generator output power vector is completed, the counting module increments the iteration count by 1; after each iteration of the generator output power vector is completed, the status control module enters the S2 state, and at this time, the detection of iteration convergence is performed; if the convergence condition is not met, the status control module remains in the S2 state and steps S1 - S10 are performed again; if the convergence condition is satisfied after one iteration, the status control module enters the S3 state; at this time, the top-level module outputs the generator output power vector Min_P corresponding to the minimum generator cost minC(P).

[0045] Further, the convergence condition includes that the iteration count reaches the maximum iteration count, or the minimum generator cost minC(P) is less than a preset threshold.

[0046] The beneficial effects brought by the technical solution provided by the embodiments of the present invention are: compared with traditional calculation methods, the advantages of implementing the present invention using FPGA hardware lie in high parallelism and reconfigurability, which can give full play to the computing advantages of FPGA. The advantages of implementing with FPGA hardware are high parallelism and reconfigurability; on the one hand, it can give full play to the computing advantages of the FPGA parallel architecture, thereby greatly improving the algorithm solution speed and scheduling efficiency; on the other hand, the FPGA circuit can be packaged into a reusable IP core, enabling flexible invocation of the IP core. The FPGA hardware has lower power consumption compared to traditional computer architectures. The present invention has broad application prospects and can also provide new ideas and methods for the research and solution of the economic dispatch problem of intelligent microgrids. Description of the Drawings

[0047] Figure 1 It is a schematic diagram of the top-level module structure in the embodiments of the present invention.

[0048] Figure 2 It is the internal structure diagram of the Runge - Kutta module in the embodiments of the present invention. Detailed Embodiments

[0049] In order to make the objectives, technical solutions, and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0050] In the description of the embodiments of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation on the present invention. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0051] In the description of the embodiments of the present invention, it should be noted that unless otherwise clearly specified and limited, the terms "installation", "connection", "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can also be the communication inside two elements. It can be a wireless connection or a wired connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0052] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0053] As Figure 1 shown and Figure 2 shown, an FPGA circuit for solving the economic dispatch problem of a microgrid based on a neurodynamics optimization algorithm is proposed in the embodiments of the present invention, including a top-level module;

[0054] The top-level module includes a Runge-Kutta control module, a state control module, and a counting module; the Runge-Kutta control module includes a G module and at least one Runge-Kutta module LGKTi; the G module includes at least one gradient calculation module Gi; the numbers of the Runge-Kutta module LGKTi and the gradient calculation module Gi are respectively configured to be at least the number n of generators.

[0055] The solution to the economic dispatch problem of the microgrid based on the neurodynamics optimization algorithm includes:

[0056] Define the power generation cost function and its constraints of the generator;

[0057] Define the neurodynamics optimization algorithm;

[0058] Discretize the neurodynamics optimization algorithm to obtain the Runge-Kutta formula;

[0059] The top-level module is used to input the generator output power vector and send the generator output power vector to the Runge-Kutta control module through the state control module;

[0060] The gradient calculation module Gi in the G module is used to calculate the gradient information data in the Runge-Kutta formula and send the gradient information data to the corresponding Runge-Kutta module LGKTi;

[0061] The Runge-Kutta module LGKTi is used to calculate the slopes at each stage in the Runge-Kutta formula and iteratively update the generator output power vector to obtain the iteratively updated generator output power vector;

[0062] The state control module uses a finite state machine to control the loop, including three states: S1, S2, and S3; the state control module configures the corresponding state according to the iterative update process of the generator output power vector;

[0063] The counting module is used to count the number of iterations.

[0064] An FPGA circuit for solving the microgrid economic dispatch problem based on the neurodynamics optimization algorithm proposed in the embodiments of the present invention can explore the application prospects of the neurodynamics algorithm in FPGA, and at the same time can also provide new ideas and methods for the research and solution of the intelligent microgrid economic dispatch problem. The advantages of using FPGA hardware implementation are high parallelism and reconfigurability; on the one hand, it can give full play to the computing advantages of the FPGA parallel architecture, thereby greatly improving the algorithm solving speed and dispatch efficiency; on the other hand, the FPGA circuit can be packaged into a reusable IP core, enabling flexible invocation of the IP core.

[0065] The following details an FPGA circuit for solving the microgrid economic dispatch problem based on the neurodynamics optimization algorithm through a specific embodiment;

[0066] The power generation cost function and its constraints of the generator are expressed as:

[0067]

[0068] Among them, C(P) represents the generator cost function, p i is the output power of the i-th generator, P is the generator output power vector of n generators, that is, [p 1 、p 2 …p i …p n , α i 、β i 、γ i are cost parameters respectively, where α i> 0; D is the total power demand in the power grid; The premise of the economic dispatch of the intelligent microgrid is to meet the balance between supply and demand;

[0069] The neurodynamics optimization algorithm is expressed as:

[0070]

[0071] where L(P, λ) = f(P) + λ T h(P) is the Lagrangian function, and λ is the Lagrange multiplier;

[0072]

[0073] Discretizing formula (3) gives the Runge-Kutta formula, which is expressed as:

[0074]

[0075] where h is the iteration step size, and K 1 、K 2 、K 3 、K 4 are the slopes at each stage in the Runge-Kutta formula; P j is the generator output power vector at the j-th iteration;

[0076] As Figure 2 shown, the Runge-Kutta module LGKTi includes a K1 module, a K2 module, a K3 module, a K4 module, and an update module; The K1 module, K2 module, K3 module, and K4 module are respectively used to calculate the slopes K 1 、K 2 、K 3 and K 4 at each stage in the Runge-Kutta formula; The update module is used to iteratively update the generator output power vector according to the slopes K 1 、K 2 、K 3 and K 4 at each stage, and send the updated generator output power vector to the state control module.

[0077] Specifically, the K1 module, K2 module, K3 module, and K4 module internally include floating-point multipliers and floating-point adders to implement the function of calculating the slopes K 1 、K 2 、K 3 and K 4 at each stage.

[0078] Specifically, the G module is instantiated from gradient calculation modules Gi in multiple dimensions; It is mainly used to calculate the gradient information data in the Runge-Kutta formula, that is

[0079] Specifically, the gradient calculation module Gi and the Runge-Kutta module LGKTi correspond one-to-one and are associated with the output power pi of the ith generator i corresponding; it can give full play to the computing advantages of the FPGA parallel architecture, thereby greatly improving the algorithm solving speed and scheduling efficiency.

[0080] Specifically, the gradient calculation module Gi internally includes a floating-point multiplier and a floating-point adder to implement the calculation of gradient information data.

[0081] Specifically, the FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm uses IP core encapsulation, and sets the cost parameters α i , β i and γ i as well as the iteration step size h and the maximum number of iterations as IP core parameters; when the user uses this IP core, corresponding parameter inputs can be made on the IP core user interface, and flexible invocation can be achieved without modifying the code.

[0082] As Figure 1 , Figure 2 shown, a method for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm proposed in the embodiment of the present invention, based on the above-mentioned FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm, includes:

[0083] Step S1, as Figure 1 and Figure 2 shown in ① therein, the initial value P of the generator output power vector j is input into the top-level module, and the state control module enters the S1 state;

[0084] Step S2, as Figure 1 and Figure 2 shown in ② therein, the state control module sends the initial value P of the generator output power vector j to the Runge-Kutta control module;

[0085] Step S3, as Figure 1 and Figure 2 shown in ③ therein, each gradient calculation module Gi in the G module calculates the gradient information data and sends it to the Runge-Kutta module LGKTi; the stage slope K 1 is calculated by the K1 module inside each-dimensional Runge-Kutta module LGKTi and transmitted to the internal K2 module and update module;

[0086] Step S4, as Figure 1 and Figure 2As shown in ④ in, the K2 module inside each - dimensional Runge - Kutta module LGKTi sends (P j +K 1 / 2,λ+K 1 / 2) data to each gradient calculation module Gi in the G module;

[0087] Step S5, as shown in ⑤ in Figure 1 and Figure 2 Each gradient calculation module Gi in the G module calculates gradient information data and sends it to the Runge - Kutta module LGKTi; The stage slope K 2 is calculated by the K2 module inside each - dimensional Runge - Kutta module LGKTi and transmitted to the internal K3 module and the update module;

[0088] Step S6, as shown in ⑥ in Figure 1 and Figure 2 The K3 module inside each - dimensional Runge - Kutta module LGKTi sends (P j +K 2 / 2,λ+K 2 / 2) data to each gradient calculation module Gi in the G module;

[0089] Step S7, as shown in ⑦ in Figure 1 and Figure 2 Each gradient calculation module Gi in the G module calculates gradient information data and sends it to the Runge - Kutta module LGKTi; The stage slope K 3 is calculated by the K3 module inside each - dimensional Runge - Kutta module LGKTi and transmitted to the internal K4 module and the update module;

[0090] Step S8, as shown in ⑧ in Figure 1 and Figure 2 The K4 module inside each - dimensional Runge - Kutta module LGKTi sends (P j +K 3 ,λ+K 3 ) data to each gradient calculation module Gi in the G module;

[0091] Step S9, as shown in ⑨ in Figure 1 and Figure 2 Each gradient calculation module Gi in the G module calculates gradient information data and sends it to the Runge - Kutta module LGKTi; The stage slope K 4 is calculated by the K4 module inside each - dimensional Runge - Kutta module LGKTi and transmitted to the internal K4 module and the update module;

[0092] Step S10, as shown in Figure 1 andFigure 2 As shown in ①0 in, the update module iteratively updates the generator output power vector according to the formula P j+1 = P j +(K 1 + 2K 2 + 2K 3 + K 4 ) / 6; and sends the iteratively updated generator output power vector P j+1 to the state control module;

[0093] Each time an iteration of the generator output power vector is completed, the counting module increments the iteration count by 1; each time an iteration of the generator output power vector is completed, the state control module enters state S2, at which time convergence detection is performed; if the convergence condition is not met, the state control module remains in state S2 and steps S1 - S10 are performed again; if the convergence condition is met after an iteration is completed, the state control module enters state S3; at this time, the top-level module outputs the generator output power vector Min_P corresponding to the minimum generator cost minC(P).

[0094] Specifically, the convergence condition includes that the iteration count reaches the maximum iteration count, or the minimum generator cost minC(P) is less than a preset threshold value.

[0095] Finally, it should be noted that the above specific embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention, and they should all be covered within the scope of the claims of the present invention.

Claims

1. An FPGA circuit for solving microgrid economic dispatch problems based on a neural dynamics optimization algorithm, comprising a top-level module; characterized in that: The top-level module includes a Runge-Kutta control module, a state control module, and a counting module; the Runge-Kutta control module includes a G module and at least one Runge-Kutta module LGKTi; the G module includes at least one gradient calculation module Gi; the number of the Runge-Kutta modules LGKTi and the gradient calculation modules Gi are respectively configured to be at least the number of generators n; The method for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm includes: Define the power generation cost function and its constraints for the generator; Define the neural dynamics optimization algorithm; Discretize the neural dynamics optimization algorithm to obtain the Runge-Kutta formula; The top-level module is used to input the generator output power vector, and send the generator output power vector to the Runge-Kutta control module through the state control module; The gradient calculation module Gi in the G module is used to calculate the gradient information data in the Runge-Kutta formula and send the gradient information data to the corresponding Runge-Kutta module LGKTi; The Runge-Kutta module LGKTi is used to calculate the slope of each stage in the Runge-Kutta formula, and iteratively update the generator output power vector to obtain the iteratively updated generator output power vector; The state control module adopts a finite state machine control loop, including three states: S1, S2, and S3; the state control module configures the corresponding state according to the iterative update process of the generator output power vector; The counting module is used to count the number of iterations.

2. The FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm as claimed in claim 1, characterized in that: The power generation cost function of the generator and its constraints are expressed as: Where C(P) represents the generator cost function, p i is the output power of the i-th generator, P is the generator output power vector of n generators, that is, [p1, p2…p i …p n ], α i , β i , γ i are cost parameters, where α i >0; D is the total power demand in the power grid; The neural dynamics optimization algorithm is expressed as: Where L(P,λ)=f(P)+λ T h(P) is the Lagrangian function, λ is the Lagrangian multiplier; Discretizing formula (3) yields the Runge-Kutta formula, expressed as: Where h is the iteration step length, K1, K2, K3, K4 are the slopes of each stage in the Runge-Kutta formula; P j is the generator output power vector at the jth iteration.

3. The FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm as claimed in claim 2, characterized in that: The Runge-Kutta module LGKTi includes a K1 module, a K2 module, a K3 module, a K4 module and an update module; the K1 module, the K2 module, the K3 module and the K4 module are respectively used to calculate the slopes K1, K2, K3 and K4 of each stage in the Runge-Kutta formula; the update module is used to iteratively update the generator output power vector according to the slopes K1, K2, K3 and K4 of each stage, and send the updated generator output power vector to the state control module.

4. The FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm as claimed in claim 3, characterized in that: The K1 module, K2 module, K3 module and K4 module include floating point multipliers and floating point adders.

5. The FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm as claimed in claim 3, characterized in that: The G module is instantiated from gradient calculation modules Gi in multiple dimensions.

6. The FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm as claimed in claim 3, characterized in that: The gradient calculation module Gi corresponds to the Runge-Kutta module LGKTi one by one and is related to the output power p of the i-th generator. i correspond.

7. The FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm as claimed in claim 3, characterized in that: The gradient calculation module Gi includes a floating-point multiplier and a floating-point adder.

8. The FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm as claimed in claim 3, characterized in that: The FPGA circuit for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm adopts IP core packaging and sets the cost parameter α i , β i and γ i As well as the iteration step size h and the maximum number of iterations are set as IP core parameters.

9. A method for solving microgrid economic dispatch problems based on a neural dynamics optimization algorithm, based on an FPGA circuit for solving microgrid economic dispatch problems based on a neural dynamics optimization algorithm as described in any one of claims 3 to 8, characterized in that: The following steps are involved: Step S1: the generator output power vector initial value P j Enter the top-level module, and the state control module enters the S1 state; Step S2: the state control module sets the generator output power vector initial value P j Send to Runge-Kutta control module; Step S3, each gradient calculation module Gi in the G module calculates the gradient information data ▽ Pj L(P j ,λ) and sent to the Runge-Kutta module LGKTi; the stage slope K1 is calculated by the K1 module inside the Runge-Kutta module LGKTi of each dimension and transmitted to the internal K2 module and update module; Step S4, the K2 module inside the Runge-Kutta module LGKTi of each dimension sends (P j +K1 / 2,λ+K1 / 2) data to each gradient calculation module Gi in the G module; Step S5: Each gradient calculation module Gi in the G module calculates the gradient information data ▽ Pj L(P j +K1 / 2,λ+K1 / 2) and send it to the Runge-Kutta module LGKTi; the stage slope K2 is calculated by the K2 module inside the Runge-Kutta module LGKTi of each dimension and transmitted to the internal K3 module and update module; Step S6: The K3 module inside the Runge-Kutta module LGKTi of each dimension sends (P j +K2 / 2,λ+K2 / 2) data to each gradient calculation module Gi in the G module; Step S7, each gradient calculation module Gi in the G module calculates the gradient information data ▽ Pj L(P j +K2 / 2,λ+K2 / 2) and send it to the Runge-Kutta module LGKTi; the stage slope K3 is calculated by the K3 module inside the Runge-Kutta module LGKTi of each dimension and transmitted to the internal K4 module and update module; Step S8, the K4 module inside the Runge-Kutta module LGKTi of each dimension sends (P j +K3,λ+K3) data to each gradient calculation module Gi in the G module; Step S9: Each gradient calculation module Gi in the G module calculates the gradient information data ▽ Pj L(P j +K3,λ+K3) and send it to the Runge-Kutta module LGKTi; the stage slope K4 is calculated by the K4 module inside the Runge-Kutta module LGKTi of each dimension and transmitted to the internal K4 module and update module; Step S10, the update module is based on the formula P j+1 =P j +(K1+2K2+2K3+K4) / 6Iteratively update the generator output power vector; The iteratively updated generator output power vector P j+1 Send to the state control module; Each time an iteration of the generator output power vector is completed, the counting module increases the number of iterations by 1; each time an iteration of the generator output power vector is completed, the state control module enters the S2 state, at which time the iterative convergence detection is performed; if the convergence condition is not met, the state control module remains in the S2 state and performs steps S1 to S10 again; if the convergence condition is met after one iteration is completed, the state control module enters the S3 state; at this time, the top-level module outputs the generator output power vector Min_P corresponding to the minimum generator cost minC(P).

10. The method for solving the microgrid economic dispatch problem based on the neural dynamics optimization algorithm according to claim 9, characterized in that: The convergence condition includes that the number of iterations reaches a maximum number of iterations, or the minimum generator cost minC(P) is less than a preset threshold.

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