Display device and electronic device

Abstract

The invention relates to a display device and an electronic device. The display device of the present invention comprises: a display panel for displaying an image; and the circuit board is electrically connected with the display panel. The circuit board includes: a plurality of power supply wirings; a plurality of signal wirings; a first connector including a plurality of first connection portions electrically connected to the power supply wires, respectively; a plurality of connection pads electrically connected to the first connection portions, respectively; and a second connector including a plurality of second connection portions electrically connected to the plurality of signal wirings, respectively. A first pitch of the first connection portion in the first direction and a second pitch of the connection pad in the first direction are different from each other.

Description

Technical Field

[0001] The present invention relates to a display device and an electronic device, and more particularly to a display device and an electronic device having reliability. Background Art

[0002] Display devices such as televisions, monitors, smartphones, and tablet PCs that provide images to users include a display panel for displaying images. As display panels, various display panels such as liquid crystal display panels, organic light emitting display panels, electroWetting display panels, and electrophoretic display panels have been developed.

[0003] An electronic device may include: a flexible printed circuit board connected to the display panel; and a printed circuit board and a main circuit board connected to the display panel through the flexible printed circuit board. Summary of the Invention

[0004] An object of the present invention is to provide a display device and an electronic device in which connectors of a printed circuit board and a main circuit board are easily combined and the manufacturing process is simplified.

[0005] A display device according to an embodiment of the present invention includes: a display panel for displaying an image; and a printed circuit board electrically connected to the display panel. The printed circuit board includes: a plurality of power supply wirings; a plurality of signal wirings; a first connector including a plurality of first connection portions electrically connected to the power supply wirings respectively; a plurality of connection pads electrically connected to the first connection portions respectively; and a second connector including a plurality of second connection portions electrically connected to the plurality of signal wirings respectively. A first pitch of the first connection portion in a first direction and a second pitch of the connection pad in the first direction are different from each other.

[0006] The connection pad may include: a plurality of first sub-pads arranged in a row along the first direction; and a plurality of second sub-pads spaced apart from the first sub-pads in a second direction and arranged in a row along the first direction, the second direction being a direction intersecting the first direction.

[0007] The first sub-pads and the second sub-pads may be arranged in a zigzag pattern in the first direction.

[0008] A pitch of the first sub-pads and a pitch of the second sub-pads may be the same as each other.

[0009] The second pitch may be greater than the first pitch.

[0010] Each of the first connection portions may include: a plurality of first pads; and a plurality of first connection pins electrically connected to the first pads. Each of the second connection portions may include: a plurality of second pads; and a plurality of second connection pins electrically connected to the second pads.

[0011] The first pads and the second pads may be arranged in a first interval along the first direction, respectively.

[0012] The first pads may be arranged in a first interval along the first direction, and the second pads may be arranged in a second interval different from the first interval along the first direction.

[0013] A first width of the first connection pins in the first direction and a second width of the second connection pins in the first direction may be different from each other.

[0014] The first connector and the connection pads may be arranged at intervals from each other on a plane.

[0015] The circuit board may further include: connection wirings for electrically connecting the first connector and the connection pads.

[0016] The number of the first connection portions may be greater than the number of the second connection portions.

[0017] An electronic device according to an embodiment of the present invention includes: a display panel for displaying an image; a circuit board electrically connected to the display panel; and a main circuit board including a power connector for supplying a power signal to the circuit board and a signal connector for supplying an image signal. The circuit board includes: a plurality of power wirings; a plurality of signal wirings; a first connector including a plurality of first connection portions respectively electrically connected to the power wirings; a plurality of connection pads connected to the power connector and respectively electrically connected to the first connection portions; and a second connector connected to the signal connector and including a plurality of second connection portions respectively electrically connected to the plurality of signal wirings. A first pitch of the first connection portions in a first direction and a second pitch of the connection pads in the first direction are different from each other.

[0018] The first connector and the connection pads are arranged at intervals from each other on a plane, and the circuit board may further include connection wirings for electrically connecting the first connector and the connection pads.

[0019] The power connector may include: a first clamping plate; and a plurality of first clamping pins arranged on the first clamping plate and contacting the connection pads.

[0020] The pitch of the first jig pin in the first direction may be the same as the second pitch.

[0021] The signal connector may include: a second jig plate; and a plurality of second jig pins disposed on the second jig plate and in contact with the second connection portion.

[0022] The pitch of the second jig pin in the first direction may be the same as the third pitch of the second connection portion in the first direction.

[0023] The number of the first connection portions may be greater than the number of the second connection portions.

[0024] The first width of the first connection portion in the first direction and the second width of the second connection portion in the first direction may be different from each other.

[0025] (Advantageous Effects of the Invention)

[0026] The circuit board of the present invention may include connection pads that are spaced apart from the first connector and directly connected to the power connector. Since the connection pads are arranged at a pitch greater than the pitch at which the connection portions of the first connector are arranged, the jig pins of the power connector can be arranged more freely corresponding to the connection pads. As a result, alignment and bonding between the connection pads and the jig pins can be facilitated.

[0027] Moreover, since there is no need to use an additional bridging substrate for increasing the contact rate between the flexible circuit board and the main circuit board, the process of the display module can be simplified. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 is a perspective view of an electronic device according to an embodiment of the present invention.

[0029] Figure 2 is Figure 1 a cross-sectional view of a display device included in the electronic device.

[0030] Figure 3 is Figure 2 a cross-sectional view of the display panel shown.

[0031] Figures 4A to 4C is a view showing an electronic device according to an embodiment of the present invention.

[0032] Figure 5 is illustratively Figure 4A a view of a cross-section of a display device corresponding to a certain pixel shown.

[0033] Figure 6 is Figure 4A an enlarged view of the pad portion of the present invention shown, enlarged.

[0034] Figure 7A and Figure 7B is a diagram showing the situation when the pad portion and the power connector of the present invention are combined.

[0035] Figure 8A is to Figure 4A an enlarged view of the first connector of the present invention shown in

[0036] Figure 8B is a perspective view of the first connector of the present invention.

[0037] Figure 9 is to Figure 4A an enlarged view of the second connector shown in

[0038] Figure 10A and Figure 10B is a diagram showing the situation when the second connector and the signal connector of the present invention are combined.

[0039] Description of reference numerals

[0040] ED: Electronic device; DD: Display device; DP: Display panel; PCB: Printed circuit board; PWL: Power wiring; DWL1, DWL2: Signal wiring; CP1: First connection part; CN1: First connector; CPD: Connection pad; CP2: Second connection part; CN2: Second connector Detailed description of the invention

[0041] The present invention can be implemented with various changes and can have various forms. Specific embodiments are illustrated in the drawings and described in detail in the specification. However, this is not intended to limit the present invention to a specific disclosed form, but should be understood to cover all changes, equivalents, and alternatives included in the technical idea and technical scope of the present invention.

[0042] In this specification, when it is mentioned that a certain component (or region, layer, part, etc.) is "above" another component, "connected" or "combined" with another component, it means that the certain component can be directly disposed / connected / combined above the other component, or a third component can be disposed between them.

[0043] The same reference numerals denote the same components. Also, in the drawings, for effective illustration of the technical content, the thickness, ratio, and size of the components are exaggerated.

[0044] "And / or" includes all combinations of one or more that can be defined by the related components.

[0045] The terms "first", "second", etc. may be used to describe various components, but the components are not limited to these terms. These terms are only used for the purpose of differentiating one component from other components. For example, without departing from the scope of the claims of the present invention, the first component may be referred to as the second component, and similarly, the second component may be referred to as the first component. Unless clearly indicated otherwise in the context, singular expressions include plural expressions.

[0046] In addition, terms such as "below", "lower side", "above", "upper side", etc. are used to describe the relative relationships of the components shown in the drawings. These terms are relative concepts and are described based on the directions shown in the drawings.

[0047] Unless otherwise defined, all terms (including technical terms and scientific terms) used in this specification have the same meanings as those commonly understood by those skilled in the technical field to which the present invention pertains. Also, terms that are the same as those defined in a general dictionary should be interpreted as having meanings consistent with those in the context of the related art. Unless explicitly defined, they should not be interpreted as overly ideal or overly formal meanings.

[0048] Terms such as "comprising" or "having" should be understood to be intended to specify the presence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and are not intended to preclude the presence or additional possibility of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0049] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0050] Figure 1 is a perspective view of an electronic device according to an embodiment of the present invention. Figure 2 is Figure 1 a cross-sectional view of a display device included in the electronic device. Figure 3 is Figure 2 a cross-sectional view of the display panel shown.

[0051] Referring to Figure 1 , an electronic device ED according to an embodiment of the present invention may have a rectangular shape, which has a short side extending along a first direction DR1 and a long side extending along a second direction DR2 intersecting the first direction DR1. However, it is not limited thereto, and the electronic device ED may have various shapes such as a circular shape and an oval shape.

[0052] Hereinafter, a direction that is substantially perpendicular to the plane defined by the first direction DR1 and the second direction DR2 is defined as the third direction DR3. Also, in this specification, "when viewed from the plane" can be defined as the state of viewing from the third direction DR3.

[0053] The upper surface of the electronic device ED can be defined as the display surface DS, and the display surface DS can have a plane defined by the first direction DR1 and the second direction DR2. The image IM generated in the electronic device ED can be provided to the user through the display surface DS.

[0054] The display surface DS can include a display area DA and a non-display area NDA around the display area DA. The display area DA can display an image, and the non-display area NDA does not display an image. The non-display area NDA can surround the display area DA and can define a border of the electronic device ED printed in a specified color.

[0055] Although not shown, the electronic device ED may include a display device DD (refer to Figure 2 ). The display device DD will be described in detail below.

[0056] Refer to Figure 2 , the display device DD may include: a display module DM, an anti-reflection layer RPL disposed on the display module DM, and a panel protection layer PPL disposed below the display module DM. The display module DM may include a display panel DP and an input sensing unit ISP disposed on the display panel DP. The display panel DP may be a flexible panel. For example, the display panel DP may include a flexible substrate and a plurality of elements disposed on the flexible substrate.

[0057] The display panel DP of an embodiment of the present invention may be a light-emitting display panel, and there is no particular limitation. For example, the display panel DP may be an organic light-emitting display panel or an inorganic light-emitting display panel. The light-emitting layer of the organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of the inorganic light-emitting display panel may include quantum dots and quantum rods, etc. Hereinafter, the display panel DP is described as an organic light-emitting display panel.

[0058] The input sensing unit ISP may include a plurality of sensor units (not shown) for capacitively sensing an external input. The input sensing unit ISP can be directly formed on the display panel DP without an additional bonding layer when manufacturing the display device DD.

[0059] The anti-reflection layer RPL can be disposed on the input sensing part ISP. The anti-reflection layer RPL can be directly formed on the input sensing part ISP when manufacturing the display device DD. The anti-reflection layer RPL can be defined as an external light anti-reflection film. The anti-reflection layer RPL can reduce the reflectance of external light incident on the display panel DP from above the electronic device ED.

[0060] Exemplarily, the input sensing part ISP can be directly formed on the display panel DP, and the anti-reflection layer RPL is directly formed on the input sensing part ISP, but the embodiments of the present invention are not limited thereto. For example, the input sensing part ISP can be separately manufactured and attached to the display panel DP through an adhesive layer, and the anti-reflection layer RPL can be separately manufactured and attached to the input sensing part ISP through an adhesive layer.

[0061] The panel protection layer PPL can be disposed below the display panel DP. The panel protection layer PPL can protect the lower part of the display panel DP. The panel protection layer PPL can include a flexible plastic material. For example, the panel protection layer PPL can include polyethylene terephthalate (PET).

[0062] Referring Figure 3 , the display panel DP can include: a substrate SUB, a circuit element layer DP-CL disposed on the substrate SUB, a display element layer DP-OLED disposed on the circuit element layer DP-CL, and a thin film encapsulation layer TFE disposed on the display element layer DP-OLED.

[0063] The substrate SUB can include a display area DA and a non-display area NDA around the display area DA. The substrate SUB can include a flexible plastic material such as glass or polyimide (PI). The display element layer DP-OLED can be disposed on the display area DA.

[0064] A plurality of pixels can be disposed in the circuit element layer DP-CL and the display element layer DP-OLED. Each pixel can include a transistor disposed in the circuit element layer DP-CL and a light-emitting element disposed in the display element layer DP-OLED and connected to the transistor. The structure of the pixel will be described in detail in Figure 5 .

[0065] The thin film encapsulation layer TFE can be disposed on the circuit element layer DP-CL so as to cover the display element layer DP-OLED. The thin film encapsulation layer TFE can protect the pixels from moisture, oxygen, and external foreign matters.

[0066] Figures 4A to 4C is a diagram showing an electronic device according to an embodiment of the present invention. Specifically,Figure 4A This is a diagram of the state before a flexible printed circuit board (FPC), a printed circuit board (PCB), and a main circuit board (MCB) connected to a display panel (DP) are bent. Figure 4B This is a diagram showing the state where the flexible printed circuit board (FPC), the printed circuit board (PCB), and the main circuit board (MCB) connected to the display panel (DP) are bent. Figure 4C This is related to Figure 4B A cross-sectional view of an electronic device (ED) according to an embodiment of the present invention corresponding to the I-I' line of

[0067] Referring to Figure 4A , the electronic device (ED) may include a display module (DM) and a main circuit board (MCB). The display module (DM) may include: a display panel (DP), a flexible printed circuit board (FPC) connected to the display panel (DP), a printed circuit board (PCB) connected to the flexible printed circuit board (FPC), a scan driving unit (GDC), a plurality of signal lines (SGL), a plurality of data driving units (DDV), and a plurality of pixels (PX).

[0068] The display panel (DP) may include a display area (DA) and a non-display area (NDA) around the display area (DA). The non-display area (NDA) may surround the display area (DA). The display area (DA) may be an area for displaying an image, and the non-display area (NDA) is an area where no image is displayed.

[0069] The data driving units (DDV) may be disposed in the non-display area (NDA) of the display panel (DP). The data driving units (DDV) may be disposed adjacent to the border of the display panel (DP). The data driving units (DDV) may be arranged along a first direction (DR1).

[0070] The data driving units (DDV) may include: a first data driving unit (DDV1), a second data driving unit (DDV2), and a third data driving unit (DDV3). When viewed from a plane, the first data driving unit (DDV1) may overlap with the central portion of the display panel (DP).

[0071] The second data driving unit (DDV2) may be disposed at an interval from the first data driving unit (DDV1) along the first direction (DR1). When viewed from the first direction (DR1), the second data driving unit (DDV2) may be disposed on the left side of the first data driving unit (DDV1).

[0072] The third data driving unit (DDV3) may be disposed at an interval from the first data driving unit (DDV1) along the first direction (DR1). When viewed from the first direction (DR1), the third data driving unit (DDV3) may be disposed on the right side of the first data driving unit (DDV1).

[0073] The first to third data driving units DDV1 to DDV3 can be mounted on a flexible printed circuit board FPC. Each of the first to third data driving units DDV1 to DDV3 mounted on the flexible printed circuit board FPC can be electrically connected to a display panel DP and supply an electrical signal for driving the display panel DP to the display panel DP.

[0074] The flexible printed circuit board FPC can be connected to the display panel DP. One end of the flexible printed circuit board FPC can be disposed in a non-display area NDA of the display panel DP. The flexible printed circuit board FPC can be disposed adjacent to a frame of the display panel DP.

[0075] Although not shown, the flexible printed circuit board FPC can be disposed on pads disposed on the display panel DP. The flexible printed circuit board FPC can be electrically connected to the pads through an anisotropic conductive adhesive layer. Thus, the flexible printed circuit board FPC can be electrically connected to the display panel DP through the pads.

[0076] The flexible printed circuit board FPC can include: a first flexible printed circuit board FPC1, a second flexible printed circuit board FPC2, and a third flexible printed circuit board FPC3. When viewed from a plane, the first flexible printed circuit board FPC1 can overlap a central portion of the display panel DP.

[0077] The second flexible printed circuit board FPC2 can be disposed at an interval from the first flexible printed circuit board FPC1 along a first direction DR1. When viewed from the first direction DR1, the second flexible printed circuit board FPC2 can be disposed on the left side of the first flexible printed circuit board FPC1.

[0078] The third flexible printed circuit board FPC3 can be disposed at an interval from the first flexible printed circuit board FPC1 along the first direction DR1. When viewed from the first direction DR1, the third flexible printed circuit board FPC3 can be disposed on the right side of the first flexible printed circuit board FPC1.

[0079] The first data driving unit DDV1 can be mounted on the first flexible printed circuit board FPC1. The first data driving unit DDV1 can be electrically connected to a part of signal lines SGL through the first flexible printed circuit board FPC1. The second data driving unit DDV2 can be mounted on the second flexible printed circuit board FPC2. The second data driving unit DDV2 can be electrically connected to a part of signal lines SGL through the second flexible printed circuit board FPC2. The third data driving unit DDV3 can be mounted on the third flexible printed circuit board FPC3. The third data driving unit DDV3 can be electrically connected to a part of signal lines SGL through the third flexible printed circuit board FPC3.

[0080] Exemplarily, in Figure 4A although three flexible printed circuit boards FPC and three data driving units DDV are shown, the number of the flexible printed circuit boards FPC and the data driving units DDV is not limited thereto.

[0081] The printed circuit board (PCB) can be connected to the flexible printed circuit (FPC). One of the two opposite sides of the FPC in the second direction (DR2) can be connected to the display panel (DP). The other side of the FPC, which is opposite to the said one side in the second direction (DR2), can be connected to the PCB. The PCB can be electrically connected to the DP through the FPC.

[0082] When viewed from a plane, the PCB can have a "T" - shaped form. However, the shape of the PCB is not limited thereto, and the width of the PCB in the first direction (DR1) can be variable along the second direction (DR2).

[0083] The PCB can include: a timing controller (T - CON), a pad portion (PDP), a first connector (CN1), and a second connector (CN2). The T - CON can be arranged at an interval from the first FPC (FPC1) in the second direction (DR2). The PDP, the first connector (CN1), and the second connector (CN2) can be arranged at intervals from each other. The PDP and the second connector (CN2) can be parts connected to the main circuit board (MCB). Detailed content thereof will be described later.

[0084] The PCB can further include connection wirings (CL1 - CLn) and circuit wiring (CWL). The connection wirings (CL1 - CLn) can electrically connect the PDP and the first connector (CN1) which are arranged at intervals from each other. The PDP can transmit signals to the first connector (CN1) through the connection wirings (CL1 - CLn).

[0085] The circuit wiring (CWL) can include a power supply wiring (PWL), signal wirings (DWL1, DWL2). The PWL can electrically connect the first connector (CN1) and the FPC to each other. The PWL can be connected to the first FPC (FPC1), the second FPC (FPC2), and the third FPC (FPC3) respectively. The PWL can transmit the power supply signals received from the MCB to the first FPC (FPC1), the second FPC (FPC2), and the third FPC (FPC3) respectively.

[0086] The signal wirings DWL1 and DWL2 may include a first signal wiring DWL1 and a second signal wiring DWL2. The first signal wiring DWL1 may electrically connect the second connector CN2 and the timing controller T-CON to each other. The second signal wiring DWL2 may electrically connect the timing controller T-CON and the flexible printed circuit board FPC to each other. The first signal wiring DWL1 may transfer the video signal received from the main circuit board MCB to the timing controller T-CON. The timing controller T-CON may transform the data format of the video signal in a manner matching the interface specification and generate a data signal. The second signal wiring DWL2 may transfer the data signal received from the timing controller T-CON to the first flexible printed circuit board FPC1, the second flexible printed circuit board FPC2, and the third flexible printed circuit board FPC3, respectively.

[0087] The main circuit board MCB may be electrically connected to the circuit board PCB. The main circuit board MCB may transfer an electrical signal to the circuit board PCB. Although not shown, a voltage generation unit may be disposed on the main circuit board MCB. The voltage generation unit may generate the voltage required for the operation of the display panel DP.

[0088] The main circuit board MCB may include: a main board MB, a power connector CN-P, and a signal connector CN-D. The main board MB may include a voltage generation unit for generating the voltage required for the operation of the display panel DP. The main board MB may transfer a power signal to the circuit board PCB through the power connector CN-P. Also, the main board MB may transfer a data signal to the circuit board PCB through the signal connector CN-D.

[0089] The power connector CN-P may be disposed on the pad portion PDP. The power connector CN-P may be electrically connected to the pad portion PDP. After the power connector CN-P is connected to the pad portion PDP, the main board MB may transfer the power signal to the power wiring PWL of the circuit board PCB through the connected power connector CN-P and pad portion PDP.

[0090] The signal connector CN-D may be disposed on the second connector CN2. The signal connector CN-D may be electrically connected to the second connector CN2. After the signal connector CN-D is connected to the second connector CN2, the main board MB may transfer the data signal to the data wirings DWL1 and DWL2 of the circuit board PCB through the connected signal connector CN-D and second connector CN2. The detailed configurations of the power connector CN-P, the pad portion PDP, the signal connector CN-D, and the second connector CN2 will be described in detail below.

[0091] Although not shown, a plurality of components may also be disposed on the main board MB. The components may include resistors, capacitors, inductors, and a plurality of terminals.

[0092] The scan driver unit GDC can generate a plurality of scan signals and output the scan signals to a plurality of scan lines GL described later. The scan driver unit GDC can also output another control signal to the driving circuit of the pixel PX.

[0093] The scan driver unit GDC can include a plurality of transistors formed by the same process as the data driver unit DDV of the pixel PX, such as a low temperature polycrystalline silicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process.

[0094] The signal line SGL can include: a scan line GL, a data line DL, a power line PL, and a control signal line CSL. The scan line GL can extend in the first direction DR1 and be connected to the scan driver unit GDC. Each scan line GL can be connected to a corresponding pixel PX among the plurality of pixels PX, and each data line DL can be connected to a corresponding pixel PX among the plurality of pixels PX. The power line PL can be connected to the pixel PX. The control signal line CSL can be connected to the scan driver unit GDC and provide a control signal.

[0095] The data line DL can be connected to the data driver unit DDV and the flexible printed circuit board FPC. Although not shown, the data line DL can be electrically connected to the flexible printed circuit board FPC through a data pad.

[0096] The power line PL can be electrically connected to each of the first flexible printed circuit board FPC1, the second flexible printed circuit board FPC2, and the third flexible printed circuit board FPC3. The power line PL can supply a driving voltage from the circuit board PCB to the pixel PX.

[0097] The control signal line CSL can be connected to the scan driver unit GDC. The control signal line CSL can be electrically connected to each of the first flexible printed circuit board FPC1, the second flexible printed circuit board FPC2, and the third flexible printed circuit board FPC3 through a control signal pad.

[0098] The timing controller T-CON can control the operations of the scan driver unit GDC and the data driver unit DDV. The timing controller T-CON can generate a scan control signal and a data control signal in response to a control signal received from the main board MB.

[0099] The scan control signal can be provided to the scan driving unit GDC through the control signal line CSL. The data control signal can be provided to the data driving unit DDV. The timing controller T-CON can receive the image signal from the main board MB, transform the data format of the image signal in a manner matching the interface specification of the data driving unit DDV, generate a data signal, and provide the data signal to the data driving unit DDV.

[0100] The scan driving unit GDC can generate a plurality of scan signals in response to the scan control signal. The scan signals can be applied to the pixels PX through the scan lines GL. The scan signals can be sequentially applied to the pixels PX.

[0101] The data driving unit DDV can generate a plurality of data voltages corresponding to the data signal in response to the data control signal. The data voltages can be applied to the pixels PX through the data lines DL.

[0102] The pixel PX can receive the provided data voltage in response to the scan signal. The pixel PX can display an image by emitting light with a brightness corresponding to the data voltage.

[0103] Refer to Figure 4B and Figure 4C , the display device DD may further include a cover panel CP (cover panel). The cover panel CP can be disposed under the panel protection layer PPL. Although not shown, the cover panel CP can be adhered to the panel protection layer PPL through an adhesive layer. The cover panel CP can support the back surface of the display panel DP. The back surface of the display panel DP can be defined as the surface opposite to the upper surface where the input sensing unit ISP is disposed in the third direction DR3.

[0104] Exemplarily, the border of the input sensing unit ISP, the anti-reflection layer RPL, and the cover panel CP can be disposed at a position closer to the inside than the border of the display panel DP and the panel protection layer PPL. The display panel DP and the panel protection layer PPL can have the same width as each other.

[0105] According to an embodiment of the present invention, each flexible printed circuit board FPC can be bent based on an imaginary axis parallel to the first direction DR1 so that the circuit board PCB and the main circuit board MCB are disposed at the lower part of the display panel DP.

[0106] Exemplarily, as Figure 4C shown, the second flexible printed circuit board FPC2 can be bent based on the bending axis RX. However, this is only exemplary, and the number of bending axes can be two or more.

[0107] Although not shown, the first and third flexible printed circuit boards FPC1, FPC3 can also have substantially the same shape and be bent.

[0108] In the case where the flexible printed circuit board FPC is bent, a part of the flexible printed circuit board FPC may be disposed on the lower surface of the cover panel CP. Exemplarily, as Figure 4C shown, the adhesive layer AL may be disposed between the second flexible printed circuit board FPC2 and the cover panel CP. The second flexible printed circuit board FPC2 may be adhered to the cover panel CP via the adhesive layer AL. Although not shown, the first and third flexible printed circuit boards FPC1, FPC3 may be adhered to the cover panel CP via the adhesive layer AL.

[0109] In the case where the flexible printed circuit board FPC is bent, the main circuit board MCB may be disposed below the display panel DP. Hereinafter, a part of the main circuit board MCB exposed to the outside from the display panel DP when viewed from a plane may be defined as the exposed substrate OMC.

[0110] Figure 5 is an exemplary diagram showing a cross-section of a display device corresponding to a certain pixel as Figure 4A shown.

[0111] Referring to Figure 5 , the pixel PX may include a transistor TR and a light-emitting element OLED. The light-emitting element OLED may include: a first electrode AE (or anode), a second electrode CE (or cathode), a hole control layer HCL, an electron control layer ECL, and a light-emitting layer EML. The transistor TR and the light-emitting element OLED may be disposed on the substrate SUB. Although an exemplary diagram shows one transistor TR, substantially, the pixel PX may include a plurality of transistors for driving the light-emitting element OLED and at least one capacitor.

[0112] The display area DA may include a light-emitting area PA corresponding to each pixel PX and a non-light-emitting area NPA around the light-emitting area PA. The light-emitting element OLED may be disposed in the light-emitting area PA.

[0113] A buffer layer BFL is disposed on the substrate SUB, and the buffer layer BFL may be an inorganic layer. A semiconductor pattern may be disposed on the buffer layer BFL. The semiconductor pattern may include polysilicon, amorphous silicon, or metal oxide.

[0114] The semiconductor pattern may be doped with an N-type dopant or a P-type dopant. The semiconductor pattern may include a highly doped region and a lowly doped region. The conductivity of the highly doped region is greater than that of the lowly doped region, and it may substantially function as the source electrode and the drain electrode of the transistor TR. The lowly doped region may substantially correspond to the active (or channel) of the transistor.

[0115] The source S, active region A, and drain D of the transistor TR can be formed from a semiconductor pattern. A first insulating layer INS1 can be disposed on the semiconductor pattern. A gate G of the transistor TR can be disposed on the first insulating layer INS1. A second insulating layer INS2 can be disposed on the gate G. A third insulating layer INS3 can be disposed on the second insulating layer INS2.

[0116] The connection electrode CNE can include a first connection electrode CNE1 and a second connection electrode CNE2 for connecting the transistor TR and the light-emitting element OLED. The first connection electrode CNE1 can be disposed on the third insulating layer INS3 and connected to the drain D through a first contact hole CH1 defined in the first to third insulating layers INS1 to INS3.

[0117] A fourth insulating layer INS4 can be disposed on the first connection electrode CNE1. A fifth insulating layer INS5 can be disposed on the fourth insulating layer INS4. The second connection electrode CNE2 can be disposed on the fifth insulating layer INS5. The second connection electrode CNE2 can be connected to the first connection electrode CNE1 through a second contact hole CH2 defined in the fourth and fifth insulating layers INS4 and INS5.

[0118] A sixth insulating layer INS6 can be disposed on the second connection electrode CNE2. The layers from the buffer layer BFL to the sixth insulating layer INS6 can be defined as the circuit element layer DP-CL. The first insulating layer INS1 to the sixth insulating layer INS6 can be an inorganic layer or an organic layer.

[0119] A first electrode AE can be disposed on the sixth insulating layer INS6. The first electrode AE can be connected to the second connection electrode CNE2 through a third contact hole CH3 defined in the sixth insulating layer INS6. A pixel defining film PDL can be disposed on the first electrode AE and the sixth insulating layer INS6, and the pixel defining film PDL is used to define an opening PX_OP for exposing a predetermined portion of the first electrode AE.

[0120] A hole control layer HCL can be disposed on the first electrode AE and the pixel defining film PDL. The hole control layer HCL can include a hole transport layer and a hole injection layer.

[0121] A light-emitting layer EML can be disposed on the hole control layer HCL. The light-emitting layer EML can be disposed in a region corresponding to the opening PX_OP. The light-emitting layer EML can contain an organic substance and / or an inorganic substance. The light-emitting layer EML can generate one of red, green, and blue light.

[0122] The electronic control layer ECL can be disposed on the light-emitting layer EML and the hole control layer HCL. The electronic control layer ECL can include an electron transport layer and an electron injection layer. The hole control layer HCL and the electronic control layer ECL can be commonly disposed in the light-emitting region PA and the non-light-emitting region NPA.

[0123] The second electrode CE can be disposed on the electronic control layer ECL. The second electrode CE can be commonly disposed in the pixel PX. The layer on which the light-emitting element OLED is disposed can be defined as the display element layer DP-OLED.

[0124] The thin film encapsulation layer TFE can be disposed on the second electrode CE and cover the pixel PX. The thin film encapsulation layer TFE can include: a first encapsulation layer EN1 disposed on the second electrode CE, a second encapsulation layer EN2 disposed on the first encapsulation layer EN1, and a third encapsulation layer EN3 disposed on the second encapsulation layer EN2.

[0125] The first and third encapsulation layers EN1, EN3 can include an inorganic insulating layer and protect the pixel PX from the influence of moisture / oxygen. The second encapsulation layer EN2 can include an organic insulating layer and protect the pixel PX from foreign substances such as dust particles.

[0126] A first voltage is applied to the first electrode AE through the transistor TR, and a second voltage having a level lower than the first voltage can be applied to the second electrode CE. The holes and electrons injected into the light-emitting layer EML combine to form excitons, and as the excitons migrate to the ground state, the light-emitting element OLED can emit light.

[0127] An input sensing unit ISP can be disposed on the thin film encapsulation layer TFE. The input sensing unit ISP can be directly fabricated on the upper surface of the thin film encapsulation layer TFE.

[0128] A base layer BS can be disposed on the thin film encapsulation layer TFE. The base layer BS can include an inorganic insulating layer. More than one inorganic insulating layer can be provided as the base layer BS on the thin film encapsulation layer TFE.

[0129] The input sensing unit ISP can include a first conductive pattern CTL1 and a second conductive pattern CTL2 disposed on the first conductive pattern CTL1. The first conductive pattern CTL1 can be disposed on the base layer BS. An insulating layer TINS can be disposed on the base layer BS so as to cover the first conductive pattern CTL1. The insulating layer TINS can include an inorganic insulating layer or an organic insulating layer. The second conductive pattern CTL2 can be disposed on the insulating layer TINS.

[0130] The first and second conductive patterns CTL1 and CTL2 may overlap with the non-light-emitting region NPA. Although not shown, the first and second conductive patterns CTL1 and CTL2 may be disposed on the non-light-emitting region NPA between the light-emitting regions PA and have a mesh shape.

[0131] The first and second conductive patterns CTL1 and CTL2 may form the sensors of the aforementioned input sensing unit ISP. For example, the mesh-shaped first and second conductive patterns CTL1 and CTL2 may be separated from each other in a predetermined region to form sensors. A part of the second conductive pattern CTL2 may be connected to the first conductive pattern CTL1.

[0132] An antireflection layer RPL may be disposed on the second conductive pattern CTL2. The antireflection layer RPL may include a black matrix BM and a plurality of color filters CF. The black matrix BM may overlap with the non-light-emitting region NPA, and the color filters CF may overlap with the light-emitting region PA.

[0133] The black matrix BM may be disposed on the insulating layer TINS so as to cover the second conductive pattern CTL2. An opening B_OP overlapping with the light-emitting region PA and the opening PX_OP may be defined in the black matrix BM. The black matrix BM may absorb light and block it. The width of the opening B_OP may be greater than the width of the opening PX_OP.

[0134] The color filters CF may be disposed on the first insulating layer TINS and the black matrix BM. The color filters CF may be respectively disposed in the opening B_OP. A planarizing insulating layer PINS may be disposed on the color filters CF. The planarizing insulating layer PINS may provide a flat upper surface.

[0135] In the case where external light traveling toward the display panel DP is reflected at the display panel DP and then provided to the external user again, like a mirror, the user may visually recognize the external light. To prevent such a phenomenon, illustratively, the antireflection layer RPL may include a plurality of color filters CF that display the same color as the pixels PX of the display panel DP. The color filters CF may filter the external light to the same color as the pixels PX. In such a case, the external light may not be visually recognized by the user.

[0136] However, embodiments of the present invention are not limited thereto, and the antireflection layer RPL may include a polarizing film to reduce the reflectance of external light. The polarizing film may be separately manufactured and attached to the input sensing unit ISP using an adhesive layer. The polarizing film may include a retarder and / or a polarizer.

[0137] Figure 6 is to Figure 4AAn enlarged view of the pad portion of the present invention shown is provided. Figure 7A and Figure 7B is a diagram showing a situation when the pad portion of the present invention is combined with a power connector.

[0138] Referring to Figure 6 , the pad portion PDP may include a plurality of connection pads CPD. The connection pads CPD may be arranged along a first direction DR1. The connection pads CPD may include a plurality of first sub-pads SCPD1 and a plurality of second sub-pads SCPD2. The first sub-pads SCPD1 and the second sub-pads SCPD2 may be arranged along the first direction DR1 respectively. The first sub-pads SCPD1 and the second sub-pads SCPD2 may be spaced apart from each other in a second direction DR2.

[0139] The first sub-pads SCPD1 may be arranged at a first interval d1 in the first direction DR1, and the second sub-pads SCPD2 may be arranged at a second interval d2 in the first direction DR1. The first interval d1 and the second interval d2 may be the same as each other. For example, each of the first interval d1 and the second interval d2 may be 0.4 mm or more and 0.6 mm or less.

[0140] When viewed from the second direction DR2, the second sub-pads SCPD2 may be arranged in the space separated between the first sub-pads SCPD1, and the first sub-pads SCPD1 may be arranged in the space separated between the second sub-pads SCPD2. That is, the first sub-pads SCPD1 and the second sub-pads SCPD2 may be arranged in a zigzag pattern in the first direction DR1. However, the present invention is not limited thereto, the first sub-pads SCPD1 and the second sub-pads SCPD2 may be arranged in a row in the first direction DR1, or the pad portion PDP further includes a third sub-pad and the first to third sub-pads are arranged in three or more rows.

[0141] The width w1 of the first sub-pads SCPD1 and the width w2 of the second sub-pads SCPD2 may be the same as each other. The width w1 of the first sub-pads SCPD1 and the width w2 of the second sub-pads SCPD2 may be 0.25 mm or more and 0.35 mm or less respectively. However, the present invention is not limited thereto, the width w1 of the first sub-pads SCPD1 and the width w2 of the second sub-pads SCPD2 may be different from each other.

[0142] The connection wirings CL1 to CLn may be connected to each of the first sub-pads SCPD1 and the second sub-pads SCPD2. Each of the first sub-pads SCPD1 and the second sub-pads SCPD2 may transmit a power signal to the first connector CN1 through the connection wirings CL1 to CLn. The connection wirings CL1 to CLn may be respectively connected to a first connection portion CP1 of the first connector CN1 (refer to Figure 8A)Connection. The number of connection wirings CL1 to CLn may be the same as the number of the first secondary pads SCPD1 and the second secondary pads SCPD2. That is, the number of the first secondary pads SCPD1 and the second secondary pads SCPD2 may be n, which is the number of the connection wirings CL1 to CLn.

[0143] Refer to Figure 7A and Figure 7B , the connection pad CPD and the power connector CN-P may be in contact with each other.

[0144] The power connector CN-P may include a first jig plate JPL1 and a plurality of first jig pins JPI1. The first jig plate JPL1 may include an upper surface and a lower surface extending along a first direction DR1 and a second direction DR2. The first jig pins JPI1 may be made of metal for conducting electricity. The first jig pins JPI1 may be attached to the first jig plate JPL1. For example, the first jig pins JPI1 may be attached to the lower surface of the first jig plate JPL1.

[0145] The first jig pins JPI1 may include a plurality of first secondary jig pins SJPI1 and a plurality of second secondary jig pins SJPI2. The first secondary jig pins SJPI1 and the second secondary jig pins SJPI2 may be arranged in a row along the first direction DR1 respectively. The first secondary jig pins SJPI1 and the second secondary jig pins SJPI2 may be spaced apart from each other in the second direction DR2.

[0146] Refer to Figure 7A , before the first jig plate JPL1 and the first jig pins JPI1 move toward the connection pad CPD, a process of alignment in the first direction DR1 may be performed. That is, each of the jig pins among the first secondary jig pins SJPI1 and the second secondary jig pins SJPI2 may be arranged corresponding to each of the pads among the first secondary pads SCPD1 and the second secondary pads SCPD2. The first secondary jig pins SJPI1 and the second secondary jig pins SJPI2 may be arranged in a zigzag pattern in the first direction DR1.

[0147] The first secondary pads SCPD1 arranged in a row along the first direction DR1 may have a first pitch P1, and the first secondary jig pins SJPI1 arranged in a row along the first direction DR1 may have a second pitch P2. The first pitch P1 may be the interval between the centers of two adjacent first secondary pads SCPD1 among the first secondary pads SCPD1, and the second pitch P2 may be the interval between the centers of two adjacent first secondary jig pins SJPI1 among the first secondary jig pins SJPI1.

[0148] According to an embodiment of the present invention, a first pitch P1 of a first sub-pad SCPD1 in a first direction DR1 and a second pitch P2 of a first sub-jig pin SJPI1 may be the same as each other. The first sub-pad SCPD1 may be arranged at intervals of the first pitch P1 in the first direction DR1, and the first sub-jig pin SJPI1 may be arranged at intervals of the second pitch P2 in the first direction DR1. With the first pitch P1 and the second pitch P2 being the same, the first sub-jig pin SJPI1 may be accurately aligned with and in contact with the first sub-pad SCPD1. Also, the second sub-pad SCPD2 may be arranged at intervals of the first pitch P1 in the first direction DR1, and the second sub-jig pin SJPI2 may be arranged at intervals of the second pitch P2 in the first direction DR1. Thus, with the first pitch P1 and the second pitch P2 being the same, the second sub-jig pin SJPI2 may be accurately aligned with and in contact with the second sub-pad SCPD2. For example, the first pitch P1 and the second pitch P2 may each be 0.8 mm or more and 1.0 mm or less. However, the first pitch P1 and the second pitch P2 are not limited thereto, but may be variable according to the position of the pad portion PDP (refer to Figure 4A ).

[0149] Although in Figure 7A and Figure 7B the first sub-jig pin SJPI1 and the second sub-jig pin SJPI2 are each shown to be arranged at equal intervals, the arrangement intervals of the first sub-jig pin SJPI1 and the second sub-jig pin SJPI2 are not limited thereto.

[0150] After the first jig plate JPL1 and the first jig pin JPI1 are aligned on the connection pad CPD, the first jig plate JPL1 and the first jig pin JPI1 may move in a direction opposite to a third direction DR3, that is, move toward the connection pad CPD. By moving the first jig plate JPL1 and the first jig pin JPI1 in the direction opposite to the third direction DR3, the first jig pin JPI1 may be in contact with the connection pad CPD respectively. A power signal may be transmitted to the connection pad CPD through the first jig pin JPI1. The connection pad CPD may transmit the received power signal to the connection wirings CL1 to CLn.

[0151] Figure 8A is an enlarged view of the first connector of the present invention shown in Figure 4A . Figure 8B is a perspective view of the first connector of the present invention.

[0152] Refer to Figure 8A, the first connector CN1 may include a plurality of first connection portions CP1. The first connection portions CP1 may be arranged along the first direction DR1. The first connection portions CP1 may be arranged at intervals of a third interval d3 in the first direction DR1. According to an embodiment of the present invention, Figure 6 The first sub-pad SCPD1 shown in the first interval d1 separated in the first direction DR1 and the third interval d3 separated by the first connection portion CP1 in the first direction DR1 may be different from each other. The third interval d3 may be smaller than the first interval d1. For example, the third interval d3 may be 0.15 mm or more and 0.25 mm or less.

[0153] Refer to together Figure 8A and Figure 8B , each of the first connection portions CP1 may include a plurality of first pads PD1 and a plurality of first connection pins CPI1 disposed on the first pads PD1. The first connection pins CPI1 may be disposed at the centers of the first pads PD1. The first pads PD1 and the first connection pins CPI1 may be electrically connected to each other. The first connection pins CPI1 may include a metal for conducting electricity. The width of the first pad PD1 may be the same as Figure 6 the width w1 of the first sub-pad SCPD1 shown. The width w3 of the first connection pin CPI1 may be smaller than the width of the first pad PD1. For example, the width w3 of the first connection pin CPI1 may be 0.18 mm or more and 0.22 mm or less.

[0154] The first connection portions CP1 arranged along the first direction DR1 may have a third pitch P3. The third pitch P3 may be the interval between the centers of two adjacent first connection portions CP1 among the first connection portions CP1. Specifically, the third pitch P3 may be the interval between the centers of two adjacent first connection pins CPI1 among the first connection pins CPI1.

[0155] According to an embodiment of the present invention, Figure 7A The first pitch P1 of the first sub-pad SCPD1 in the first direction DR1 and the third pitch P3 of the first connection portion CP1 in the first direction DR1 may be different from each other. The third pitch P3 may be smaller than the first pitch P1. For example, the third pitch P3 may be 0.4 mm or more and 0.6 mm or less.

[0156] The first connection portions CP1 may receive power signals through the connection wirings CL1 to CLn. The first connection portions CP1 may transmit the power signals to the power wiring PWL. The connection wirings CL1 to CLn and the power wiring PWL may extend along the second direction DR2. The power wiring PWL may transmit the power signals to the flexible printed circuit board FPC (refer to Figure 4A ). The power signal may be used to drive Figure 4AThe voltage corresponding to the display module DM shown. That is, as the DC voltage of the power signal, it is the voltage used to drive the display module DM, and it can be substantially distinguished from the data voltage for displaying images on the display module DM. Therefore, even if noise is generated by the first connection part CP1 during the process of the power signal received from the main circuit board MCB being transmitted to the power distribution line PWL through the first connection part CP1, it will not affect the images displayed on the display module DM.

[0157] The number of the first connection parts CP1 can be the same as the number of the connection wires CL1 to CLn. That is, the number of the first connection parts CP1 can be n, which is the number of the connection wires CL1 to CLn. And the number of the first connection parts CP1 can be the same as Figure 6 the number of the first sub-pads SCPD1 and the second sub-pads SCPD2 shown.

[0158] Refer to Figures 6 to 8B , when the first connector CN1 and the additional power connector are connected to each other, since the interval between the first connection parts CP1 included in the first connector CN1 is narrow and the width of the first connection pin CPI1 is narrow, it is possible that the power connector fails to be accurately aligned on the first connector CN1 due to process errors. That is, poor contact may occur between the first connection pin CPI1 and the first jig pin JPI1.

[0159] The circuit board PCB of the present invention (refer to Figure 4A ) may include connection pads CPD, which are arranged at an interval from the first connector CN1 and are directly connected to the power connector CN-P. Since the connection pads CPD are arranged at the third pitch P3, the first jig pins JPI1 can be arranged more freely corresponding to the connection pads CPD. As a result, the connection pads CPD and the first jig pins JPI1 can be easily aligned and combined. And since there is no need to use an additional bridging substrate for improving the contact rate between the circuit board PCB (refer to Figure 4A ) and the main circuit board MCB (refer to Figure 4A ), the process of the display module DM (refer to Figure 4A ) can be simplified.

[0160] Figure 9 Is to Figure 4A an enlarged view of the second connector of the present invention shown. Figure 10A And Figure 10B is a diagram showing the situation when the second connector and the signal connector of the present invention are combined.

[0161] Refer to Figure 9, the second connector CN2 may include a plurality of second connection portions CP2. The second connection portions CP2 may be arranged along the first direction DR1. The number of the second connection portions CP2 may be less than that of the first connection portions CP1 (refer to Figure 8A ). For example, the number of the first connection portions CP1 may be 60, and the number of the second connection portions CP2 may be 40. The second connection portions CP2 may be arranged at intervals of a fourth interval d4 in the first direction DR1. According to an embodiment of the present invention, Figure 8A as shown, a third interval d3 at which the first connection portions CP1 are separated from each other in the first direction DR1 and a fourth interval d4 at which the second connection portions CP2 are separated from each other in the first direction DR1 may be the same. For example, the fourth interval d4 may be 0.15 mm or more and 0.25 mm or less.

[0162] Refer to Figures 9 to 10B , each of the second connection portions CP2 may include a plurality of second pads PD2 and a plurality of second connection pins CPI2 disposed on the second pads PD2. The second connection pins CPI2 may be disposed at the centers of the second pads PD2. The second pads PD2 and the second connection pins CPI2 may be electrically connected to each other. The second connection pins CPI2 may include a metal for conducting electricity. The width of the second pads PD2 may be the same as Figure 8A as shown, the width of the first pads PD1. The width w4 of the second connection pins CPI2 may be less than Figure 8A as shown, the width w3 of the first connection pins CPI1. For example, the width w4 of the second connection pins CPI2 may be 0.1 mm or more and 0.14 mm or less.

[0163] The second connector CN2 and the signal connector CN-D may be in contact with each other. The signal connector CN-D may include a second jig plate JPL2 and a plurality of second jig pins JPI2. The second jig plate JPL2 may include an upper surface and a lower surface extending along the first direction DR1 and the second direction DR2. The second jig pins JPI2 may include a metal for conducting electricity. The second jig pins JPI2 may be attached to the second jig plate JPL2. For example, the second jig pins JPI2 may be attached to the lower surface of the second jig plate JPL2.

[0164] Refer to Figure 10A , before the second jig plate JPL2 and the second jig pins JPI2 move toward the second connector CN2 (refer to Figure 9 ), a process of alignment in the first direction DR1 may be performed. That is, the second jig pins JPI2 may be arranged corresponding to the second connection portions CP2. Specifically, the second jig pins JPI2 may be arranged corresponding to the second connection pins CPI2.

[0165] The second connection part CP2 arranged along the first direction DR1 may have a fourth pitch P4, and the second jig pin JPI2 arranged along the first direction DR1 may have a fifth pitch P5. The fourth pitch P4 may be the interval between the centers of two adjacent second connection parts CP2 in the second connection part CP2, and the fifth pitch P5 may be the interval between the centers of two adjacent second jig pins JPI2 in the second jig pin JPI2. The fourth pitch P4 may be the same as the interval between the centers of two adjacent second connection pins CPI2 in the second connection pin CPI2.

[0166] The fourth pitch P4 of the second connection part CP2 in the first direction DR1 and the fifth pitch P5 of the second jig pin JPI2 may be the same as each other. With the fourth pitch P4 and the fifth pitch P5 being the same, the second jig pin JPI2 may be accurately aligned with the second connection part CP2 and contact each other. Specifically, the second jig pin JPI2 may contact the center of the second connection pin CPI2. For example, the fourth pitch P4 and the fifth pitch P5 may be 0.4 mm or more and 0.6 mm or less. Although shown in Figure 10A and Figure 10B that the second jig pins JPI2 are arranged at equal intervals, the arrangement interval of the second jig pins JPI2 is not limited thereto.

[0167] After the second jig plate JPL2 and the second jig pin JPI2 are aligned on the second connection part CP2, the second jig plate JPL2 and the second jig pin JPI2 may move in the opposite direction of the third direction DR3, that is, move towards the second connection part CP2. By moving the second jig plate JPL2 and the second jig pin JPI2 in the opposite direction of the third direction DR3, the second jig pin JPI2 may contact the second connection part CP2.

[0168] The image signal may be transmitted to the second connection pin CPI2 through the second jig pin JPI2. The second pad PD2 electrically connected to the second connection pin CPI2 may transmit the image signal to the first signal wiring DWL1. The first signal wiring DWL1 extending along the second direction DR2 may transmit the image signal to the timing controller T-CON (refer to Figure 4A ).

[0169] Although the above has been described with reference to the preferred embodiments of the present invention, those skilled in the relevant technical field or ordinary technicians in the relevant technical field can understand that various modifications and changes can be made to the present invention without departing from the spirit of the present invention described in the appended claims and the scope of the technical field.

[0170] Therefore, the technical scope of the present invention should not be limited to the content described in the specific embodiments of the specification, but should be defined by the appended claims.

Claims

1. A display device, in, include: A display panel for displaying images, and A circuit board, electrically connected to the display panel; The circuit board comprises: Multiple power distribution lines, Multiple signal wiring, The first connector includes a plurality of first connection parts electrically connected to the power supply wirings respectively. a plurality of connection pads, electrically connected to the first connection portions respectively, and The second connector includes a plurality of second connection parts electrically connected to the plurality of signal wirings respectively; A first pitch of the first connection portions in the first direction and a second pitch of the connection pads in the first direction are different from each other.

2. The display device according to claim 1, wherein: The connecting pad comprises: a plurality of first secondary pads arranged along the first direction; and The plurality of second sub-pads are spaced apart from the first sub-pads in a second direction and are arranged along the first direction, wherein the second direction is a direction intersecting the first direction.

3. The display device according to claim 2, wherein: The first sub-pads and the second sub-pads are arranged in a zigzag shape in the first direction.

4. The display device according to claim 2, wherein: A pitch of the first sub-pads and a pitch of the second sub-pads are identical to each other.

5. The display device according to claim 1, wherein: The second pitch is greater than the first pitch.

6. The display device according to claim 1, wherein: Each of the first connecting parts comprises: a plurality of first pads, and A plurality of first connecting pins, electrically connected to the first pads; Each of the second connecting parts comprises: a plurality of second pads, and A plurality of second connecting pins are electrically connected to the second pad.

7. The display device according to claim 6, wherein: The first pads and the second pads are respectively arranged at first intervals along the first direction.

8. The display device according to claim 6, wherein: The first pads are arranged at first intervals along the first direction, The second pads are arranged along the first direction at a second interval different from the first interval.

9. The display device according to claim 7, wherein: A first width of the first connecting needle in the first direction and a second width of the second connecting needle in the first direction are different from each other.

10. The display device according to claim 1, wherein: The first connector and the connection pad are arranged at a distance from each other on a plane.

11. The display device according to claim 10, wherein: The circuit board also includes: The connection wiring is used to electrically connect the first connector and the connection pad.

12. The display device according to claim 1, wherein: The number of the first connection parts is greater than the number of the second connection parts.

13. An electronic device, wherein: include: Display panel, used to display images, a circuit board, electrically connected to the display panel, and A main circuit board, comprising a power connector for providing a power signal to the circuit board and a signal connector for providing an image signal; The circuit board comprises: Multiple power distribution lines, Multiple signal wiring, The first connector includes a plurality of first connection parts electrically connected to the power supply wirings respectively. a plurality of connection pads connected to the power connector and electrically connected to the first connection parts respectively; and A second connector connected to the signal connector and including a plurality of second connection parts electrically connected to the plurality of signal wirings respectively; A first pitch of the first connection portions in the first direction and a second pitch of the connection pads in the first direction are different from each other.

14. The electronic device according to claim 13, wherein: The first connector and the connection pad are arranged at a distance from each other on a plane. The circuit board further includes a connection wiring for electrically connecting the first connector and the connection pad.

15. The electronic device according to claim 13, wherein: The power connector comprises: a first fixture plate; and A plurality of first fixture needles are arranged on the first fixture plate and contact the connection pads.

16. The electronic device according to claim 15, wherein: A pitch of the first gripper needles in the first direction is the same as the second pitch.

17. The electronic device according to claim 14, wherein: The signal connector comprises: a second fixture plate; and A plurality of second fixture needles are disposed on the second fixture plate and contact the second connecting portion.

18. The electronic device according to claim 17, wherein: A pitch of the second jig needles in the first direction is the same as a third pitch of the second connecting portion in the first direction.

19. The electronic device according to claim 13, wherein: The number of the first connection parts is greater than the number of the second connection parts.

20. The electronic device according to claim 13, wherein: A first width of the first connection portion in the first direction and a second width of the second connection portion in the first direction are different from each other.

Images