Switching board card and switching board card management method

Abstract

The invention provides a switching board card and a switching board card management method. The switching board card comprises a switching controller, a plurality of switching modules and a power supply module, the switching controller is connected to the switching module through an asynchronous transmission bus; the switching controller is connected to the power supply module through the digital-to-analog converter; and the switching controller is connected to a host controller at the mainboard end through a universal serial bus or a first integrated circuit bus. On the basis of the switching board card, a server configured with the board card can easily realize the collection of related information of the switching module carried in the switching board card through the host controller at the mainboard end and the switching controller in the switching board card, and further realizes the adjustment of the switching board card.

Description

Technical Field

[0001] This application relates to the technical field of servers, and particularly to a switching board and a switching board management method. Background Art

[0002] With the rapid development of artificial intelligence technology, AI (Artificial Intelligence) servers, as key infrastructure devices to support the operation of artificial intelligence technology, have shown an explosive growth trend. Generally, general-purpose servers mainly adopt a serial architecture dominated by the CPU and are more proficient in logical operations; while AI servers mainly adopt a heterogeneous form dominated by acceleration cards and are more proficient in large-throughput parallel computing.

[0003] AI servers need to be equipped with different numbers of GPU modules. To support the GPU function, the server also needs to support the same number of network cards and solid-state drives; therefore, AI servers require a large amount of PCIe resources, and thus a PCIe Switch (Peripheral Component Interconnect Express switch) is introduced into the AI server.

[0004] Due to the high rate of PCIe signals and the large number and variety of PCIe devices mounted on the board; while enjoying the convenience brought by the PCIe Switch board, how to improve the stability of the server system has become an issue worthy of attention. Summary of the Invention

[0005] Based on this, in view of the above technical problems, it is necessary to provide a switching board and a switching board management method.

[0006] In a first aspect, this application provides a switching board, including a switching controller, a plurality of switching modules, and a power module;

[0007] The switching controller is connected to the switching module through an asynchronous transmission bus;

[0008] The switching controller is connected to the power module through a digital-to-analog converter;

[0009] The switching controller is connected to the host controller at the motherboard end through a universal serial bus or a first integrated circuit bus.

[0010] In some embodiments, the switching controller is connected to the plurality of switching modules through an external serial peripheral bus;

[0011] The switching controller is connected to one or more controller flash memories through an internal serial peripheral bus.

[0012] In some embodiments, the external serial peripheral bus includes one or more serial communication links and one or more serial strobe links;

[0013] The switching controller is connected to the input end of the switching flash memory through the serial communication link;

[0014] The output end of the switching flash memory is connected to the switching module through the serial communication link;

[0015] The switching controller is connected to the input end of the switching flash memory through the serial strobe link;

[0016] The output end of the switching flash memory is connected to the switching module through the serial strobe link;

[0017] The number of serial communication links matches the number of switching modules;

[0018] The number of serial strobe links matches the number of switching modules.

[0019] In some embodiments, the switching controller is connected to the input end of the switching flash memory through the serial communication link, including:

[0020] The switching controller is connected to the input end of the level converter through the serial communication link;

[0021] The output end of the level converter is connected to the switching flash memory through the serial communication link.

[0022] In some embodiments, the switching controller is connected to the input end of the switching flash memory through the serial strobe link, including:

[0023] The switching controller is connected to the input end of the level converter through the serial strobe link;

[0024] The input end of the level converter is connected to the switching flash memory through the serial strobe link.

[0025] In some embodiments, the switching board further includes a temperature sensor;

[0026] The switching controller is connected to the temperature sensor through the second integrated circuit bus.

[0027] In a second aspect, the present application provides a server, including the switching board and the motherboard end disclosed in the first aspect.

[0028] In a third aspect, the present application further provides a method for managing a switching board, which is applied to a switching controller in the switching board of the server disclosed in the second aspect. The method includes:

[0029] In response to receiving a firmware update instruction sent by the host controller and updating the firmware, parsing the firmware update instruction to obtain the target switching module;

[0030] After pulling up the target serial strobe link that matches the target switching module, burn the target switching flash memory that matches the target switching module according to the updated firmware.

[0031] In some embodiments, it further includes:

[0032] In response to receiving a fault recovery instruction, transmit the fault recovery instruction to each switching module through the asynchronous transmission bus;

[0033] Determine the fault problems of the switching module according to the register log fed back by the switching module;

[0034] Among them, the register log is captured by the switching module in response to the received fault recovery instruction and fed back to the switching controller through the asynchronous transmission bus.

[0035] In some embodiments, it further includes:

[0036] In response to the switching board status acquisition instruction sent by the motherboard controller in the motherboard end through the serial bus, transmit the switching controller log information to the motherboard controller through the serial bus or the first integrated circuit bus;

[0037] Send a host status acquisition instruction to the motherboard controller through the serial bus or the first integrated circuit bus;

[0038] In response to the host status information fed back by the motherboard controller in response to the host status acquisition instruction through the serial bus or the first integrated circuit bus, adjust the switching board.

[0039] In a fourth aspect, the present application provides an electronic device, and the electronic device includes:

[0040] One or more processors;

[0041] And a memory associated with one or more processors, the memory is used to store program instructions, and when the program instructions are read and executed by one or more processors, the following operations are performed:

[0042] In response to receiving a firmware update instruction and updated firmware sent by the host controller, parse the firmware update instruction to obtain the target switching module;

[0043] After pulling up the target serial strobe link that matches the target switching module, burn the target switching flash memory that matches the target switching module according to the updated firmware.

[0044] In some embodiments, when the program instructions are read and executed by one or more processors, the following operations are further performed:

[0045] In response to receiving a fault recovery instruction, transmit the fault recovery instruction to each switching module through the asynchronous transmission bus;

[0046] Determine the fault problem of the switching module according to the register log fed back by the switching module;

[0047] Wherein, the register log is captured by the switching module in response to the received fault recovery instruction and fed back to the switching controller through the asynchronous transmission bus.

[0048] In some embodiments, when the program instructions are read and executed by one or more processors, the following operations are also performed:

[0049] In response to the switching board status acquisition instruction sent by the motherboard controller in the motherboard end through the serial bus, transfer the switching controller log information to the motherboard controller through the serial bus or the first integrated circuit bus;

[0050] Send the host status acquisition instruction to the motherboard controller through the serial bus or the first integrated circuit bus;

[0051] In response to the host status information fed back by the motherboard controller through the serial bus or the first integrated circuit bus in response to the host status acquisition instruction, adjust the switching board.

[0052] In a fifth aspect, the present application also provides a computer-readable storage medium, on which a computer program is stored, and the computer program causes the computer to perform the following operations:

[0053] In response to receiving the firmware update instruction sent by the host controller and updating the firmware, parse the firmware update instruction to obtain the target switching module;

[0054] After pulling up the target serial strobe link matching the target switching module, burn the target switching flash memory matching the target switching module according to the updated firmware.

[0055] In some embodiments, the computer program causes the computer to also perform the following operations:

[0056] In response to receiving the fault recovery instruction, transfer the fault recovery instruction to each switching module through the asynchronous transmission bus;

[0057] Determine the fault problem of the switching module according to the register log fed back by the switching module;

[0058] Wherein, the register log is captured by the switching module in response to the received fault recovery instruction and fed back to the switching controller through the asynchronous transmission bus.

[0059] In some embodiments, the computer program causes the computer to also perform the following operations:

[0060] In response to the instruction for obtaining the status of the switching card sent by the motherboard controller in the motherboard end through the serial bus, transmit the switching controller log information to the motherboard controller through the serial bus or the first integrated circuit bus;

[0061] Send the host status acquisition instruction to the motherboard controller through the serial bus or the first integrated circuit bus;

[0062] In response to the host status information fed back by the motherboard controller through the serial bus or the first integrated circuit bus in response to the host status acquisition instruction, adjust the switching card.

[0063] The beneficial effects achieved by this application are as follows:

[0064] This application provides a switching card and a switching card management method, including a switching controller, a plurality of switching modules, and a power module; the switching controller is connected to the switching modules through an asynchronous transfer bus; the switching controller is connected to the power module through a digital-to-analog converter; the switching controller is connected to the host controller at the motherboard end through a universal serial bus or a first integrated circuit bus. Based on the switching card disclosed above in this application, the server configured with this card can easily collect information related to the switching modules carried in the switching card and adjust the status of the switching card through the host controller at the motherboard end and the switching controller in the switching card. Description of the Drawings

[0065] In order to more clearly illustrate the technical solutions in the embodiments of this application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of this application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings, where:

[0066] Figure 1 is a schematic connection diagram of a switching card provided by an embodiment of this application and the motherboard end;

[0067] Figure 2 is a schematic diagram of a partial architecture of a switching card provided by an embodiment of this application;

[0068] Figure 3 is another schematic diagram of a partial architecture of a switching card provided by an embodiment of this application;

[0069] Figure 4 is still another schematic diagram of a partial architecture of a switching card provided by an embodiment of this application;

[0070] Figure 5 is still another schematic diagram of a partial architecture of a switching card provided by an embodiment of this application;

[0071] Figure 6 It is a schematic diagram of a partial architecture of a server provided by an embodiment of the present application;

[0072] Figure 7 It is a schematic diagram of a method for managing a switching board card provided by an embodiment of the present application;

[0073] Figure 8 It is a structural diagram of an electronic device provided by an embodiment of the present application. Detailed implementation manners

[0074] To make the objectives, technical solutions and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part rather than all of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without making creative efforts shall fall within the protection scope of the present application.

[0075] It should be understood that in the description of the present application, unless clearly required by the context, the words such as "including" and "comprising" in the whole specification and claims should be interpreted as the meaning of including rather than exclusive or exhaustive; that is, the meaning of "including but not limited to".

[0076] It should also be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be construed as indicating or implying relative importance. In addition, in the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0077] It should be noted that the terms "S1", "S2", etc. are only used for the purpose of describing steps and do not particularly refer to the order or sequence. Nor are they used to limit the present application. They are only used to facilitate the description of the method of the present application and cannot be construed as indicating the order of steps. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present application.

[0078] As disclosed in the background art, most of the current maintenance methods for PCIe Switch still rely on external tools. Such as Firmware burners and debug serial port tools, etc., all need to be externally connected for use. Specifically, the firmware of the switching board is stored in the half-load SPI (Serial Peripheral Interface) flash memory, and a burning interface is reserved. The debug interface is also placed on the Switch board in the form of a debug header. When burning or debugging work is required, the machine needs to be pulled out of the cabinet first, the Switch node is taken out, the burning tool or debug serial port is connected to the board, and then the node is put back and powered on for operation. The operation is extremely cumbersome and there are certain risks throughout the operation process:

[0079] Each time of burning or debugging requires taking out the machine, and then connecting the burning tool or debug serial port to the corresponding interface of the corresponding switch. Generally, four PCIe Switch chips are installed on the switching board. If each needs to be burned and debugged, the same steps need to be repeated four times, which is extremely cumbersome. Moreover, there is a great risk of hitting components during the process of disassembling and assembling the tools, and it is not easy to detect. Further, in the case of not pre-connecting the tools, the access operation needs to be carried out after power-off, which means that the problems encountered during the operation of the machine cannot be debugged while retaining the on-site environment. It often takes a lot more time or even the problem cannot be reproduced in the short term to reproduce the problem after connecting the tools, causing a huge blockage to the debug work.

[0080] Therefore, the present application provides a method for optimizing a switching board to reduce the maintenance risk of the switching module and improve the usage efficiency.

[0081] Embodiment 1

[0082] The embodiment of the present application provides a switching board (Switch Board). Specifically, refer to Figure 1The disclosed Switch Board. The above-mentioned switch board card includes a switch controller (Switch BMC), multiple switch modules, and a power module (power); the switch controller is connected to the switch module through an asynchronous transmission bus (UART, Universal Asynchronous Receiver / Transmitter); the switch controller is connected to the power module through an analog-to-digital converter (ADC, Analog-to-Digital Converter); the switch controller is connected to the host controller (Host BMC) on the motherboard end (Motherboard) through a universal serial bus (USB, Universal Serial Bus) or a second integrated circuit bus (I2C, Inter-Integrated Circuit). It can be understood that the above-mentioned switch module is a PCIe Switch chip or other devices with PCIe switching function. Generally, a switch board card will carry four switch modules. Of course, in specific implementation scenarios, it can also carry eight or more.

[0083] Among them, the above-mentioned switch controller can be a baseboard management controller, such as an AST2600 BMC (Baseboard Management Controller) chip. Of course, it can also be other devices with management and control functions; the above-mentioned power module includes, but is not limited to, AC-DC power (AC-DC converter), redundant power supply (Redundant PSU), distributed power architecture (DPA, Distributed Power Architecture), etc. The present application does not limit the specific power supply type.

[0084] As is well known, the traditional server design solution generally places a baseboard management controller chip on the motherboard end to manage the entire server system; however, due to the limitations of the number of interfaces of the baseboard management controller itself and the limited inter-board connection signals, it is difficult for the baseboard management controller on the motherboard end to fully monitor the specific states of each board card or each node. When there are more interconnected board cards or the system is more complex, the monitoring and management coverage of the baseboard management controller will be challenged. Based on the above-mentioned disclosed switch board card in the present application, the server configured with this board card can easily collect information related to the switch modules carried in the switch board card and adjust the state of the switch board card through the host controller on the motherboard end and the switch controller in the switch board card.

[0085] In some implementation scenarios, such as Figure 2As shown, the switching controller in the above switching board is connected to multiple switching modules through an external serial peripheral interface (SPI, Firmware Serial Peripheral Interface); the switching controller is connected to one or more controller flash memories through an internal serial peripheral interface (FW SPI, Firmware Serial Peripheral Interface). It can be understood that the firmware burning of the baseboard management controller is generally through out-of-band burning by MAC (media access control layer), and a PHY (Port Physical Layer) chip network line is required; while in the switching board disclosed in this application, the mainboard controller on the mainboard side can transfer the updated firmware to the switching controller through a serial bus, and the switching controller transfers the updated firmware to the controller flash memory through the internal serial peripheral interface for burning, without separately connecting the network of the switching controller in the switching board for burning, which simplifies the operation steps and thus improves the overall stability of the server.

[0086] In a specific embodiment, as Figure 3 shown, the above external serial peripheral interface includes one or more serial communication links, such as SPI 1_SW_AB and SPI 2_SW_CD; and one or more serial strobe links, such as SPI 1_CS0, SPI 1_CS1, SPI 2_CS0, and SPI 2_CS1; the switching controller is connected to the input end of the switch flash memory (SwitchFlash) through the serial communication link; the output end of the switch flash memory is connected to the switching module through the serial communication link; the switching controller is connected to the input end of the switch flash memory through the serial strobe link; the output end of the switch flash memory is connected to the switching module through the serial strobe link; the number of serial communication links matches the number of switching modules; the number of serial strobe links matches the number of switching modules.

[0087] Taking the specific AST2600 BMC as an example of the switching controller, this type of BMC has a total of three groups of SPI ports. One group (i.e., the built-in serial peripheral bus) is used for the firmware burning of the BMC itself, that is, it is connected to the switch flash memory. The other two groups of SPI can be used for the firmware burning of other chips. In this embodiment, through the above settings, the general two groups of SPI buses can be used to implement the Firmware burning of the switching module (PCIe Switch). Specifically, since in most cases, the Switch board of the AI server will carry four PCIe Switch chips, the two groups of SPI signals SPI_1 and SPI_2 of the BMC can be used to burn the four switching flash memories (Switch Flash) respectively. Further, in this embodiment, each group of SPI can also switch which specific switching flash memory to burn through the CS signal (Chip Select, chip select signal) transmitted on the serial strobe bus.

[0088] In a specific embodiment, since the power supply of the switching controller is usually STBY power, while the power supply of the switching module is usually Main power, there is a problem that the power-on timings of the two devices are different. To solve this problem, the present application proposes to place a level converter (LEVEL SHIFT) on the external serial peripheral bus to isolate the two types of power to prevent leakage and cause line problems. The specific structure is as Figure 4 shown. Specifically, the above switching controller is connected to the input end of the switching flash memory through a serial communication link, including: the switching controller is connected to the input end of the level converter through a serial communication link; the output end of the level converter is connected to the switching flash memory through a serial communication link; the above switching controller is connected to the input end of the switching flash memory through a serial strobe link, including: the switching controller is connected to the input end of the level converter through a serial strobe link; the input end of the level converter is connected to the switching flash memory through a serial strobe link.

[0089] In a specific embodiment, as Figure 5 shown, the switching board further includes a temperature sensor; the switching controller is connected to the temperature sensor through a second integrated circuit bus. Thus, the temperature on the switching board can be transmitted to the switching controller through the second integrated circuit and further transmitted to the motherboard controller in the motherboard for subsequent operations.

[0090] Embodiment Two

[0091] The present application also provides a server, as Figure 1 shown, including the switching board disclosed in the above Embodiment One, as well as the motherboard end and the external device end. Among them, in this server, the switching controller on the above switching board and the motherboard controller on the motherboard end are connected through a universal serial bus or a first integrated circuit bus.

[0092] In some specific implementation scenarios, such as Figure 6 shown, the switching controller on the above switching board is connected to an expansion device at the external device end through a third integrated circuit bus. That is, the I2C bus is directly connected from the switching controller to the external device end, avoiding problems such as signal loss caused by too long a link when connected from the main board controller. This enables PCIe-related devices to be connected to the bus through the S switching controller when accessing the bus, avoiding evaluation limitations of structures and other solutions caused by line loss. In addition, the power monitoring function of the switching controller can also replace the original on-board ADC module to monitor important power signals on the switching board. It can be understood that the specific device types and quantities within the above external device end are determined by the type of the server, and higher computing speeds can be achieved by installing a certain number and types of expansion devices on the switching board. Among them, the switching controller is generally connected to an expansion device on the external device end through an integrated circuit bus, such as a solid-state drive, a PCIe (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard) expansion card, etc. If the external device is a GPU board, it is also necessary to connect to the PHY RETIMER (physical layer retimer) within the GPU board through MDC (Management Data Clock) / MDIO (Management Data Input / Output) lines.

[0093] Embodiment 3

[0094] The present application also discloses a switching board management method, which is applied to the switching controller of the switching board in the server disclosed in Embodiment 2, as Figure 7 shown, and specifically includes:

[0095] S1. In response to receiving a firmware update instruction and updated firmware sent by the host controller, parse the firmware update instruction to obtain a target switching module.

[0096] It can be understood that the firmware update operation is executed in the host controller. After the host controller completes the firmware update, the host controller generates a firmware update instruction and the updated firmware (i.e., the updated firmware), and sends them to the switching controller together; after receiving the firmware update instruction, the switching controller parses the target switching module that matches the firmware update instruction, that is, determines which switching module's firmware needs to be burned according to the firmware update instruction.

[0097] S2. After pulling up the target serial strobe link that matches the target switching module, burn the target switching flash memory that matches the target switching module according to the updated firmware.

[0098] After determining the target switching firmware, raise the target serial strobe link on the target switching flash memory connected to the target switching firmware, making the link active high; then burn the target switching flash memory according to the updated firmware to achieve the firmware update of the target switching module. When it is found in mass production that the firmware of a switching module needs to be upgraded and the machine needs to be reconfigured to change the switching firmware of the switching module, the switching firmware can be directly upgraded through the controller, reducing the risk of component collision caused by manual disassembly and assembly, and greatly improving the maintainability of the server system.

[0099] It should be noted that if the normal communication of the PCIe link is the core of the normal operation of the server, the health of the PCIe Switch chip is the core guarantee for the health of the PCIe link. Therefore, the status monitoring and debug (fault debugging) of the switching module (PCIe Swtich) are also key considerations in this solution.

[0100] In some embodiments, the above switching board management method further includes that the switching controller transmits the fault recovery instruction to each switching module through the asynchronous transfer bus in response to receiving the fault recovery instruction; determines the fault problem of the switching module according to the register log fed back by the switching module; wherein, the register log is captured by the switching module in response to the received fault recovery instruction and fed back to the switching controller through the asynchronous transfer bus.

[0101] It can be understood that there are two traditional debug methods. One is the out-of-band method, which uses the UART or DB interface on the board. The operator connects the debug cable to the switching board to analyze the problem. However, this operation requires powering off the machine, removing it, connecting the cable, and then powering it on again. This will cause the original problem phenomenon to be lost, and the problem can only be reproduced, which will reduce the debugging efficiency. Moreover, this hardware debugging method also has the risk of component collision. The other is the in-band method, which captures registers through the PCIe Switch tool under the operating system. This method is relatively convenient to operate, but when there is a fault in the switching module itself, it is impossible to capture the abnormal working state of the module for debugging. For example, when the switching module is not recognized by the system and the reason for the non-recognition needs to be analyzed, this method cannot obtain relevant information under the system. In the switching board disclosed in the present application, the switching module and the switching controller are connected through a UART line, realizing the use of the UART signal as a dedicated signal for debugging the switching module, combining the advantages of in-band and out-of-band log capture. It can capture the register logs at the switching port at any time when a problem occurs, without the need to access the debug tool to reproduce the problem, and also avoids the problem that the in-band method cannot capture the complete working state of the switching module. Further, it enables R & D personnel to quickly locate problems in both the bare board environment and the whole machine environment, avoiding delays in analysis time caused by repeated reproduction. Moreover, when the switching module is not recognized, relevant registers can also be directly read from the switching module through the UART bus to check whether it is a problem with the chip itself or problems such as power supply and clock that cause non-recognition.

[0102] In some embodiments, the present application also discloses that the switching controller, in response to the switching board status acquisition instruction sent by the motherboard controller in the motherboard end through the serial bus, transmits the switching controller log information to the motherboard controller through the serial bus; sends the host status acquisition instruction to the motherboard controller through the serial bus or the first integrated circuit bus; and adjusts the switching board in response to the host status information fed back by the motherboard controller through the serial bus in response to the host status acquisition instruction. That is, the motherboard controller can obtain the log information recorded by the switching controller through the serial bus or the integrated circuit bus, such as the temperature detected by the sensor on the switching board, the working state of the switching module, the communication situation of the external PCIe network card, and the presence information of the hard disk, etc. Correspondingly, the switching controller can also obtain the status of the motherboard through the serial bus or the integrated circuit bus, such as the power supply status, the power-on and power-off situation, etc., so that the switching controller can adjust the switching board, such as adjusting whether the power supply operates in low power consumption, whether the fan needs to be turned on for heat dissipation in the shutdown state, etc.

[0103] Embodiment 4

[0104] Corresponding to all of the above embodiments, an embodiment of the present application provides an electronic device, including: one or more processors; and a memory associated with the one or more processors, the memory being configured to store program instructions that, when read and executed by the one or more processors, perform the following operations:

[0105] In response to receiving a firmware update instruction sent by a host controller and updating the firmware, parse the firmware update instruction to obtain a target switching module;

[0106] After pulling up the target serial strobe link matching the target switching module, burn the target switching flash memory matching the target switching module according to the updated firmware.

[0107] In some implementation scenarios, when the program instructions are read and executed by the one or more processors, the following operations are further performed:

[0108] In response to receiving a fault recovery instruction, transfer the fault recovery instruction to each switching module through an asynchronous transmission bus;

[0109] Determine the fault problem of the switching module according to the register log fed back by the switching module;

[0110] Wherein, the register log is captured by the switching module in response to the received fault recovery instruction and fed back to the switching controller through the asynchronous transmission bus.

[0111] In some implementation scenarios, when the program instructions are read and executed by the one or more processors, the following operations are further performed:

[0112] In response to receiving a switching board status acquisition instruction sent by a motherboard controller within the motherboard end through a serial bus, transfer the switching controller log information to the motherboard controller through the serial bus or the first integrated circuit bus;

[0113] Send a host status acquisition instruction to the motherboard controller through the serial bus or the first integrated circuit bus;

[0114] In response to the host status information fed back by the motherboard controller through the serial bus or the first integrated circuit bus in response to the host status acquisition instruction, adjust the switching board.

[0115] Wherein, Figure 8 An exemplary architecture of the electronic device is shown, which may specifically include a processor 810, a video display adapter 811, a disk drive 812, an input / output interface 813, a network interface 814, and a memory 820. The above-mentioned processor 810, video display adapter 811, disk drive 812, input / output interface 813, network interface 814, and the memory 820 can be communicatively connected through a bus 830.

[0116] Among them, the processor 810 can be implemented in the form of a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, etc., and is used to execute relevant programs to implement the technical solutions provided in this application.

[0117] The memory 820 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), a static storage device, a dynamic storage device, etc. The memory 820 can store an operating system 821 for controlling the execution of the electronic device 800, and a basic input / output system (BIOS) 822 for controlling the low-level operations of the electronic device 800. In addition, a web browser 823, a data storage management system 824, an icon font processing system 825, etc. can also be stored. The above-mentioned icon font processing system 825 can be the application program that specifically implements the operations of the foregoing steps in the embodiments of this application. In short, when implementing the technical solutions provided in this application through software or firmware, the relevant program codes are stored in the memory 820 and are called and executed by the processor 810.

[0118] The input / output interface 813 is used to connect to the input / output module to implement information input and output. The input / output module can be configured as a component in the device (not shown in the figure) or can be externally connected to the device to provide corresponding functions. Among them, the input device can include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device can include a display, a speaker, a vibrator, an indicator light, etc.

[0119] The network interface 814 is used to connect to a communication module (not shown in the figure) to implement communication interaction between this device and other devices. Among them, the communication module can implement communication in a wired manner (such as USB, network cable, etc.) or can implement communication in a wireless manner (such as a mobile network, WIFI, Bluetooth, etc.).

[0120] The bus 830 includes a path for transmitting information between various components of the device (such as the processor 810, the video display adapter 811, the disk drive 812, the input / output interface 813, the network interface 814, and the memory 820).

[0121] In addition, the electronic device 800 can also obtain information on specific collection conditions from the virtual resource object collection condition information database for condition judgment, etc.

[0122] It should be noted that although the above device only shows a processor 810, a video display adapter 811, a disk drive 812, an input / output interface 813, a network interface 814, a memory 820, a bus 830, etc., in the specific implementation process, the device may also include other components necessary for normal execution. In addition, those skilled in the art can understand that the above device may also only include the components necessary to implement the solution of the present application, and does not necessarily include all the components shown in the figure.

[0123] From the description of the above embodiments, those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. The computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disc, etc., and includes several instructions to enable a computer device (which can be a personal computer, a cloud server, or a network device, etc.) to execute the methods of various embodiments or some parts of the embodiments of the present application.

[0124] Embodiment Five

[0125] Corresponding to all the above embodiments, the embodiments of the present application also provide a computer-readable storage medium, which stores a computer program, and the computer program enables the computer to perform the following operations:

[0126] In response to receiving a firmware update instruction sent by the host controller and updating the firmware, parse the firmware update instruction to obtain the target switching module;

[0127] After pulling up the target serial strobe link matching the target switching module, burn the target switching flash memory matching the target switching module according to the updated firmware.

[0128] In some implementation scenarios, the computer program enables the computer to further perform the following operations:

[0129] In response to receiving a fault recovery instruction, transmit the fault recovery instruction to each switching module through the asynchronous transmission bus;

[0130] Determine the fault problem of the switching module according to the register log fed back by the switching module;

[0131] Among them, the register log is captured by the switching module in response to the received fault recovery instruction and fed back to the switching controller through the asynchronous transmission bus.

[0132] In some implementation scenarios, the computer program enables the computer to further perform the following operations:

[0133] In response to the instruction for obtaining the status of the switching card sent by the motherboard controller in the motherboard end via the serial bus, the switching controller log information is transmitted to the motherboard controller via the serial bus or the first integrated circuit bus;

[0134] Send the instruction for obtaining the host status to the motherboard controller via the serial bus or the first integrated circuit bus;

[0135] In response to the host status information fed back by the motherboard controller via the serial bus or the first integrated circuit bus in response to the instruction for obtaining the host status, adjust the switching card.

[0136] Each embodiment in this specification is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other. The key point of each embodiment is to illustrate the differences from other embodiments. In particular, for the system or system embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For the relevant parts, reference can be made to the partial description of the method embodiment. The system and system embodiments described above are only illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative efforts.

[0137] The above are only the preferred embodiments of the present application, and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A switching board, characterized in that: The switch board includes a switch controller, a plurality of switch modules, and a power supply module; The switch controller is connected to the switch module via an asynchronous transmission bus; The switching controller is connected to the power module via a digital-to-analog converter; The switch controller is connected to the host controller at the mainboard end through a universal serial bus or a first integrated circuit bus.

2. The switch board according to claim 1, characterized in that: The switch controller is connected to the plurality of switch modules via an external serial peripheral bus; The switch controller is connected to one or more controller flash memories via a built-in serial peripheral bus.

3. The switch board according to claim 2, characterized in that: The external serial peripheral bus includes one or more serial communication links and one or more serial strobe links; The exchange controller is connected to the input terminal of the exchange flash memory via the serial communication link; The output end of the exchange flash memory is connected to the exchange module via the serial communication link; The exchange controller is connected to the input terminal of the exchange flash memory via the serial strobe link; The output end of the exchange flash memory is connected to the exchange module via the serial strobe link; The number of the serial communication links matches the number of the switching modules; The number of the serial strobe links matches the number of the switch modules.

4. The switch board according to claim 3, characterized in that: The exchange controller is connected to the input end of the exchange flash memory through the serial communication link, including: The switch controller is connected to the input end of the level converter via the serial communication link; The output end of the level converter is connected to the exchange flash memory through the serial communication link.

5. The switch board according to claim 4, characterized in that: The exchange controller is connected to the input end of the exchange flash memory through the serial strobe link, and includes: The switch controller is connected to the input end of the level converter via the serial strobe link; The input end of the level converter is connected to the exchange flash memory through the serial strobe link.

6. The switch board according to claim 1, characterized in that: The switch board also includes a temperature sensor; The switch controller is connected to the temperature sensor via a second integrated circuit bus.

7. A server, characterized in that: The server comprises the switch board and the main board end as described in any one of claims 1 to 6.

8. A method for managing a switch board, characterized in that: The method applied to the switch controller in the switch board of the server according to claim 7 comprises: In response to receiving a firmware update instruction sent by the host controller and updating the firmware, parsing the firmware update instruction to obtain a target switch module; After pulling up the target serial strobe link that matches the target switch module, the target switch flash memory that matches the target switch module is burned according to the update firmware.

9. The method according to claim 8, characterized in that The method further comprises: In response to receiving the fault recovery instruction, transmitting the fault recovery instruction to each switch module via an asynchronous transmission bus; Determine the fault problem of the switching module according to the register log fed back by the switching module; The register log is captured by the switch module in response to a received fault recovery instruction and fed back to the switch controller via the asynchronous transmission bus.

10. The method according to claim 8, characterized in that The method further comprises: In response to a switch board status acquisition instruction sent by a mainboard controller in the mainboard end through a serial bus, the switch controller log information is transmitted to the mainboard controller through the serial bus or the first integrated circuit bus; Sending a host status acquisition instruction to the mainboard controller via the serial bus or the first integrated circuit bus; In response to the received host status information fed back by the mainboard controller in response to the host status acquisition instruction via the serial bus or the first integrated circuit bus, the switch board is adjusted.

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