Method for accelerating crc calculation of 5g radio access network based on programmable switch

Abstract

The application provides a method for accelerating 5G wireless access network cyclic redundancy check calculation based on a programmable switch, comprising: a server end sends a TB / CB, cuts a data packet into multiple segments, wherein the lengths of the multiple segments meet the requirements of the switch; the switch receives the multiple segments and continuously calculates the CRC of the received segments until the last segment in the TB / CB is received; if the last segment is not received by the switch, the switch calculates the CRC of the last segment, performs XOR operation on the CRC of the previous segment temporarily stored in the register, and uses the operation result to update the register; if the last segment is received by the switch, the switch reads the temporarily stored value in the register, completes the complete CRC calculation of the TB / CB, and then resets the register module; the application directly offloads the CRC calculation to the programmable switch, accelerates the CRC calculation by using the inherent parallelism and processing capacity of the switch, and solves the problem of large 5G physical layer CRC calculation demand.

Description

A Method for Accelerating Cyclic Redundancy Check Calculation in 5G Wireless Access Networks Based on Programmable Switches Technical Field

[0001] This invention belongs to the field of communication technology, specifically relating to a method for accelerating cyclic redundancy check calculation in 5G wireless access networks based on programmable switches. Background Technology

[0002] Technological advancements in 5G NR RAN have facilitated the development of ultra-high-speed transmission, but the inherent noise characteristics of wireless channels pose significant challenges to this progress. Wireless channels are susceptible to various factors, including signal attenuation, multiple access interference, Doppler effects, and inter-symbol interference. These factors can adversely affect data integrity and introduce errors during transmission. To address these challenges and ensure data integrity, 5G networks incorporate redundant bits into each transmitted message so that the receiver can detect unexpected changes in the data. The most widely adopted error detection technique is Cyclic Redundancy Check (CRC).

[0003] In 5G RAN, Cyclic Redundancy Check (CRC) algorithms are crucial for detecting potential errors during data transmission. In high-throughput scenarios such as massive MIMO and carrier aggregation, even lightweight processes can become bottlenecks. Accelerating these functions is essential to ensuring the network scales efficiently as data rates and processing demands increase. CRC calculation is a computationally intensive task and can potentially become a bottleneck in the physical layer (PHY) processing pipeline. Therefore, developing more efficient CRC calculations, such as parallel processing, optimized lookup tables, and hardware acceleration, is particularly important. Typically, CRC calculations use iterative algorithms involving XOR operations and arithmetic shifts. Hardware accelerators can perform these operations more efficiently than software.

[0004] In summary, proposing a method for accelerating CRC calculation based on a programmable switch is very meaningful for 5G NR. Summary of the Invention

[0005] Therefore, the purpose of this invention is to provide a method for accelerating cyclic redundancy check (CRC) calculation in 5G wireless access networks based on programmable switches, so as to solve the problem of high CRC calculation requirements in 5G physical layer.

[0006] The technical solution of this invention is: a method for accelerating cyclic redundancy check calculation in 5G wireless access networks based on programmable switches, comprising:

[0007] The server sends TB / CB, which divides the data packet into multiple segments, the length of which meets the requirements of the switch.

[0008] The switch receives the multiple segments and continuously calculates the CRC of the received segments until the last segment in TB / CB is received;

[0009] If the switch does not receive the last segment, the switch will calculate the CRC of the last segment and perform an XOR operation with the CRC of the previous segment temporarily stored in the register. The result of the operation will be used to update the register. If the switch receives the last segment, the switch will read the temporary value in the register, complete the full CRC calculation of TB / CB, and then reset the register module.

[0010] If the current segment only requires CRC generation, the switch appends the final CRC value to the data packet; if the segment also requires CRC verification, the switch compares the final CRC value with the input P. in Perform a CRC value comparison and append the pass or fail result obtained from the verification to the segment header;

[0011] The switch uses L2 / L3 routing to forward the segments to the target MAC / IPv4 address; otherwise, the segments will be sent back to the same ingress port.

[0012] Specifically, the server sends TB / CB, dividing the data packet into multiple segments:

[0013] In 5G wireless access networks, the MAC layer organizes data into transport blocks with CRC checksums and transmits them to the PHY layer. The transport block (TB) is the basic payload unit transmitted between the MAC layer and the physical layer. The PHY layer uses the LDPC encoding scheme, and its code block has a maximum size of K. cb Its specific value depends on the encoding structure used by LDPC;

[0014] The maximum size of a transport block (TB) is 1,277,992 bits. When a transport block exceeds the specified maximum size, it is divided into multiple equally sized code blocks (CBs), and a CRC checksum is appended to each code block.

[0015] Let A = {b0′, b1′, ..., b′} N+L-1} is the input sequence of the transport block with an L-bit CRC checksum, where |A|=N+L represents the bit length of the input sequence. The transport block TB is divided into multiple equal-sized code blocks, and each code block is appended with a μ-bit CRC checksum. The number of code blocks after division M is shown below, where μ=24.

[0016]

[0017] Let Φ r This represents the r-th code block, where 0 ≤ r ≤ M-1, and the size of each code block is K.cb ;

[0018] Each code block ψ r Divide into k segments, denoted as λ (r,i) A code block can be represented as a group of equal-sized segments: ψ r ={λ (r,0) ,λ (r,1) ,…,λ (r,i)}, where λ (r,i) Let i represent the i-th segment in the r-th code block, where 0 ≤ i ≤ k.

[0019] Specifically, the switch receives the multiple segments and continuously calculates the CRC of the received segments:

[0020] Using the linearity of the CRC function to analyze the r-th code block ψ r To perform CRC calculation, let Φ(·) be a general CRC function, and apply Φ(·) to the code block ψ. r This yields the following expression:

[0021]

[0022] Specifically, when data packets are transmitted over Ethernet, EtherType is specified as ABCD. 16 When NetCRC-NR is embedded in the L3 payload, it uses the IPv4 packet format and specifies the protocol type number as 33. 10 When NetCRC-NR is carried over UDP, the reserved source port is 55433. 10 .

[0023] Specifically, the segment header is used to carry key information required for performing CRC generation and verification, and it includes the following header fields:

[0024] Type: A 4-bit field used to represent the CRC polynomial type. Its value can be 0, 1, 2, 3, 4 and 5, which correspond to the six CRC algorithms specified in 5G NR TS 38.212: CRC24A, CRC24B, CRC24C, CRC16, CRC11 and CRC6, respectively. Its specific value depends on the channel type or transport block size.

[0025] Last: A header field of 1 bit length, used to indicate whether the incoming data packet is the last transport block or code block fragment;

[0026] Check: A 1-bit field used to distinguish between the generation and verification functions. When its value is 1, NetCRC-NR generates the CRC value of the segment and compares it with the CRC value appended to the end of the data packet; when its value is 0, it only generates the CRC value of the segment.

[0027] Pass: A 1-bit field used to indicate the result of the CRC verification function. It is 0 if the verification fails, and 1 otherwise.

[0028] TBSize: A 16-bit field indicating the size of the transport block or code block;

[0029] SeqID: A 16-bit field representing the sequence number of a code block or transport block.

[0030] Specifically, a packet generation algorithm is used to segment the transport block (TB) or code block (CB):

[0031] Step 1: Initialize an empty queue Q to store the generated NetCRC-NR packets;

[0032] Step 2: Iterate through i from 0 to k-1, and for each segment λ i Perform the following sub-steps:

[0033] Sub-step 2.1: Create a new NetCRC-NR packet Pkt;

[0034] Sub-step 2.2: Set the current segment λ i =Ω[iβ:(i+1)β] as the effective load of Pkt;

[0035] Sub-step 2.3: If it is the last segment (i.e., i = k-1), set the Last flag to 1;

[0036] Sub-step 2.4: Add Pkt to queue Q;

[0037] The input is a transport block (TB) or code block (CB), denoted as Ω; the output is a queue containing all generated packets, denoted as Q; where k: the number of segments in each Ω; β: the number of bits in each segment; λ i The i-th segment in Ω.

[0038] Specifically, the CRC generation and verification include:

[0039] Step 1: Inspect and process NetCRC-NR packets

[0040] If P in If it is a NetCRC-NR packet, then continue:

[0041] From P inExtracting NetCRC-NR header P crc ;

[0042] Calculate λ using the CRC calculation module. (r,i) The CRC value is then set as value;

[0043] Step 2: Process segments that are not the last one

[0044] If P crc If the last field is 0 (indicating it is not the last segment), then:

[0045] Read the current value from the register and set it as value';

[0046] Perform an XOR operation: value′=value⊕value′;

[0047] Update the register using the updated value';

[0048] Step 3: Process the last segment

[0049] If P crc If the last field is 1 (indicating it's the last segment), then:

[0050] Read the current value from the register and set it as value'.

[0051] Perform an XOR operation: value′=value⊕value′;

[0052] Reset register module.

[0053] If P crc If the check field is 0 (indicating no CRC check), then value' is appended to P. in ;

[0054] If P crc If the check field is 1 (indicating CRC check), then the calculated value′ is compared with P. in The CRC value in the header, and the comparison result is set to P. crc pass field

[0055] Update P in The header information.

[0056] Step 4: Apply L2 / L3 routing modules

[0057] Step 5: Place P in Forward to the matching outgoing port;

[0058] Algorithm input: (1) P in: Input packet from the parser; (2)λ (r,i) The i-th segment within the r-th transport block (TB) or code block (CB);

[0059] Algorithm output: Updated P in Packet and its header information;

[0060] value: Represents the input CRC value calculated in the calculation module; value': Represents the previously stored value, with a default value of zero; RST: Used to reset the registers within the module; EN: Used to enable the register module; RW: Used to enable read / write operations.

[0061] This invention provides a method for accelerating CRC calculation in 5G wireless access networks based on programmable switches. This method directly offloads CRC calculation to a programmable switch (such as Intel Tofino), leveraging the inherent parallelism and processing power of the switch to accelerate CRC calculation. The goal of this invention is to provide high-throughput CRC calculation capabilities and reduce the computational burden on general-purpose processors (GPPs). It implements the generation and verification of CRC algorithms conforming to the 3GPP TS 38.212 standard, including CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6. Attached Figure Description

[0062] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0063] Figure 1(a) High-level view of the wireless access network deployment; (b) NetCRC-NR architecture, consisting of programmable switches, general-purpose servers (distributed units, DUs), and a control plane.

[0064] Figure 2(a) NetCRC-NR packet format based on Ethernet; (b) NetCRC-NR packet format based on IPv4 / UDP; (c) NetCRC-NR common header; (d) NetCRC-NR payload header;

[0065] Figure 3 is a schematic diagram of the NetCRC-NR method provided by the present invention;

[0066] Figure 4 is a schematic diagram of the state machine of the NetCRC-NR entry parser provided by the present invention. Detailed Implementation

[0067] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of systems consistent with some aspects of the invention as detailed in the appended claims.

[0068] To address the issue of high CRC calculation requirements in the 5G physical layer, this invention offloads CRC calculation directly to a programmable switch (such as Intel Tofino), leveraging the inherent parallelism and processing capabilities of the switch to accelerate CRC calculation.

[0069] The objective of this invention is to provide high-throughput CRC calculation capabilities and reduce the computational burden on general-purpose processors (GPPs). It implements the generation and verification of CRC algorithms conforming to the 3GPP TS 38.212 standard, including CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6.

[0070] This invention provides a method for accelerating cyclic redundancy check (CRC-NR) calculation in 5G wireless access networks based on programmable switches (hereinafter referred to as NetCRC-NR), comprising:

[0071] The server sends TB / CB, which divides the data packet into multiple segments, the length of which meets the requirements of the switch.

[0072] The switch receives the multiple segments and continuously calculates the CRC of the received segments until the last segment in TB / CB is received;

[0073] If the switch does not receive the last segment, the switch will calculate the CRC of the last segment and perform an XOR operation with the CRC of the previous segment temporarily stored in the register. The result of the operation will be used to update the register. If the switch receives the last segment, the switch will read the temporary value in the register, complete the full CRC calculation of TB / CB, and then reset the register module.

[0074] If the current segment only requires CRC generation, the switch appends the final CRC value to the data packet; if the segment also requires CRC verification, the switch compares the final CRC value with the input P. in Perform a CRC value comparison and append the pass or fail result obtained from the verification to the segment header;

[0075] The switch uses L2 / L3 routing to forward the segments to the target MAC / IPv4 address; otherwise, the segments will be sent back to the same ingress port.

[0076] In the 5G NR Radio Access Network (RAN), the Transport Block (TB) is the basic payload unit transmitted between the MAC layer and the Physical Layer, with a maximum size of 1,277,992 bits. The Media Access Control (MAC) layer organizes data into transport blocks with CRC checksums and transmits them to the Physical Layer (PHY). The Physical Layer employs a Low-Density Parity-Check (LDPC) coding scheme, with a maximum block size of K. cb Its specific value depends on the coding structure used by LDPC. In the 3GPP standard, for LDPC schemes using Base Graph 1 (BG1), K... cb = 8448 bits; while for the LDPC scheme using Base Graph 2 (BG2), K cb = 3840 bits. When the transport block exceeds the specified maximum size, it will be divided into multiple code blocks (CBs) of equal size, and a CRC check bit will be added to each code block.

[0077] Let A = {b0′, b1′, ..., b′} N+L-1 Let be the input sequence of the transport block with an L-bit CRC checksum, where |A| = N + L represents the bit length of the input sequence. The transport block is divided into multiple equal-sized code blocks, each of which is appended with a μ-bit CRC checksum. The number of code blocks M after division is shown below, where μ = 24.

[0078]

[0079] Let Φ r This represents the r-th code block, where 0 ≤ r ≤ M-1, and the size of each code block is K. cb In programmable switches, due to the size limitation of the packet header vector (PHV), the switch cannot complete the CRC calculation for the entire code block at once. Therefore, in this invention, we will perform CRC calculation for each code block ψ r Divide into k segments, denoted as λ (r,i) Therefore, a code block can be represented as a set of equal-sized fragments: ψ r ={λ (r,0) ,λ (r,1) ,…,λ (r,i)}, where λ (r,i) Let i represent the i-th segment in the r-th code block, where 0 ≤ i ≤ k.

[0080] This invention utilizes the linearity of the CRC function to analyze the r-th code block ψ. r Perform CRC calculation. Let Φ(·) be a general CRC function, and apply Φ(·) to the code block ψ. r This can be expressed as follows:

[0081]

[0082] As can be seen from the above formula, ψ can be calculated separately. r The CRC of each segment is calculated, and then these CRC values ​​are XORed to obtain the CRC of the entire code block. Similarly, the CRC of the transport block can also be obtained by XORing the CRCs of each segment.

[0083] NetCRC-NR is a multi-layer protocol that can be embedded in the payloads of the MAC layer (L2), network layer (L3), and transport layer (L4). Figure 2 defines the formats of various data segments involved in this invention. NetCRC-NR has a dedicated identifier for each layer. When NetCRC-NR packets are transmitted over Ethernet, the EtherType is specified as ABCD. 16 To distinguish it from other protocols carried over Ethernet; when NetCRC-NR is embedded in an L3 payload, it uses an IPv4 packet format and specifies the protocol type number as 33. 10 To distinguish it from other protocols carried over IPv4; when NetCRC-NR is carried over UDP, the source port can be reserved as 55433. 10 This method distinguishes it from other protocols carried over UDP.

[0084] The NetCRC-NR header carries critical information required for performing CRC generation and verification, and includes the following header fields:

[0085] Type: This is a 4-bit field used to represent the CRC polynomial type. Its value can be 0, 1, 2, 3, 4 and 5, which correspond to the six CRC algorithms specified in 5G NR TS 38.212: CRC24A, CRC24B, CRC24C, CRC16, CRC11 and CRC6, respectively. Its specific value depends on the channel type or transport block size.

[0086] Last: This is a 1-bit header field used to indicate whether the incoming data packet is the last transport block or code block fragment.

[0087] Check: This is a 1-bit field used to distinguish between the generation and verification functions. When its value is 1, NetCRC-NR generates the CRC value of the segment and compares it with the CRC value appended to the end of the data packet; when its value is 0, it only generates the CRC value of the segment.

[0088] Pass: This is a 1-bit field used to indicate the result of the CRC verification function. It is 0 if the verification fails, and 1 otherwise.

[0089] TBSize: This is a 16-bit field used to indicate the size of a transport block or code block.

[0090] SeqID: This is a 16-bit field used to represent the sequence number of a code block or transport block.

[0091] Figure 2(d) illustrates the NetCRC-NR payload header format. This payload header is a data sequence passed to the switch for performing CRC generation or verification. This invention supports two single payload sizes: 768 bits (96 bytes) and 1536 bits (192 bytes). The payload size is chosen to be divisible by the maximum block size in the LDPC base diagrams 1 and 2 to avoid data padding.

[0092] Based on the above principles, this invention employs a packet generation algorithm to segment transport blocks or code blocks to accommodate the payload size. The input to this algorithm is a transport block (TB) or code block (CB), denoted as Ω; the output is a queue containing all generated packets, denoted as Q. The parameters required by the algorithm are as follows:

[0093] -k: the number of segments for each Ω

[0094] -β: Number of bits per segment

[0095] -λ i The i-th segment in Ω

[0096] The algorithm steps are as follows:

[0097] Step 1: Initialize an empty queue Q to store the generated NetCRC-NR packets.

[0098] Step 2: Iterate through i from 0 to k-1, and for each segment λ i Perform the following sub-steps:

[0099] Sub-step 2.1: Create a new NetCRC-NR packet Pkt.

[0100] Sub-step 2.2: Set the current segment λ i =…[iβ:(i+1)β] serves as the payload of Pki.

[0101] Sub-step 2.3: If it is the last segment (i.e., i = k-1), set the Last flag to 1.

[0102] Sub-step 2.4: Add Pkt to queue Q.

[0103] The present invention also employs the following algorithm to realize CRC generation and verification of segments in a programmable switch (such as Intel Tofino);

[0104] Algorithm input:

[0105] (1)P in : Input packet from the parser.

[0106] (2)λ (r,i) The i-th segment in the r-th transport block (TB) or code block (CB).

[0107] Algorithm output:

[0108] (1) Updated P in Packet and its header information.

[0109] Algorithm steps:

[0110] Step 1: Inspect and process NetCRC-NR packets

[0111] If P in If it is a NetCRC-NR packet, then continue:

[0112] a. From P in Extracting NetCRC-NR header P crc

[0113] b. Calculate λ using the CRC calculation module (r,i) The CRC value is obtained and set as value.

[0114] Step 2: Process segments that are not the last one

[0115] If P crc If the last field is 0 (indicating it is not the last segment), then:

[0116] c. Read the current value from the register and set it as value'.

[0117] d. Perform the XOR operation: value′=value⊕value′.

[0118] e. Update the register using the updated value′.

[0119] Step 3: Process the last segment

[0120] If P crc If the last field is 1 (indicating it's the last segment), then:

[0121] f. Read the current value from the register and set it as value'.

[0122] g. Perform an XOR operation: value′=value⊕value′.

[0123] h. Reset register module.

[0124] i. If the check field of Pcrc is 0 (indicating no CRC check), then append value' to P. in .

[0125] j. If P crc If the check field is 1 (indicating CRC check), then the calculated value′ is compared with P. in The CRC value in the header, and the comparison result is set to P. crc pass field

[0126] Update P in The header information.

[0127] Step 4: Apply L2 / L3 routing modules

[0128] Step 5: Place P in Forward to the matching exit port.

[0129] The CRC calculation module used in the above algorithm is a core module in NetCRC-NR. The CRC calculation module receives the NetCRC-NR payload and calculates its CRC value using a deterministic hash function. The Intel Tofino programmable switching architecture allows designers to implement custom hash functions using `Hash extern` and provides the `CRCPolynomial extern` function to facilitate the customization of CRC polynomials. This invention utilizes these features to define the CRC polynomial for 5G NR and calculate the CRC of the payload. This invention defines six `Hash extern` functions, corresponding to the CRC polynomials of the six CRC algorithms specified in the 5G NR standard. The output of the `Hash extern` is the input payload λ. (r,i) The length of the CRC value varies depending on the CRC polynomial, and can be 24 bits, 16 bits, 11 bits, or 6 bits. During CRC initialization, all CRC values ​​are initialized to zero, except for CRC24C, which is initialized to all bits according to 3GPP TS 38.212.

[0130] The algorithm described above also uses a register module to store previously calculated values. This invention utilizes state memory, i.e., a register array, within the register module, allowing data plane programs to read and write values ​​during packet forwarding. The register array can contain 8-bit, 16-bit, and 32-bit values, as well as combinations thereof. Developers can perform calculations based on registers using `RegisterAction extern`, thereby updating and accessing these register arrays. Given that registers in a switch can store 8-bit, 16-bit, and 32-bit values, and that the CRC polynomials are 24-bit, 16-bit, 11-bit, and 6-bit in size, this invention makes the following arrangements: a 32-bit register is used for the 24-bit polynomial; a 16-bit register is used for the 16-bit and 11-bit polynomials; and an 8-bit register is used for the 6-bit CRC. This invention defines the following input / output fields:

[0131] -value: indicates the input CRC value calculated in the calculation module.

[0132] '-value': indicates the previously stored value, with a default value of zero.

[0133] -RST: Used to reset registers within the module.

[0134] -EN: Enables the register module.

[0135] -RW: Enables read / write operations.

[0136] Figure 4 illustrates the NetCRC-NR parser state machine. The parser is a programmable state machine responsible for extracting user-defined headers and metadata from inbound packets. In P4, the parser has an explicit start state, from which it begins extracting data. The parser has two final states: Accept or Reject. If the state is Reject, the inbound packet is discarded; otherwise, the packet is passed to ingress control, where the actual algorithm logic is implemented.

[0137] The NetCRC-NR invention significantly speeds up CRC calculation by offloading the calculation to a programmable switch. It fully complies with the 5G NR standard and can be seamlessly integrated into existing network infrastructure without major modifications.

[0138] NetCRC-NR demonstrates excellent performance, as shown in Tables 1 and 2. Using the UDP transport protocol on a single switch port, NetCRC-NR achieves a CRC throughput of 56 Gbps for a 768-bit payload; and for a 1536-bit payload, this figure increases to 73 Gbps. The corresponding packet processing rates are 73.67 million packets per second and 47 million packets per second, respectively.

[0139] With the support of 100Gbps network cards, NetCRC-NR achieved a total network throughput of up to 88Gbps, demonstrating its efficient data processing capabilities. Regarding protocol efficiency, when the payload size was 1536 bits and carried using UDP, the efficiency reached 73%; while in IPv4 and Ethernet environments, this figure increased to 75.3% and 81.7%, respectively. For smaller payloads, such as 96 bytes, the protocol efficiencies when carried via UDP, IPv4, and Ethernet were 57.4%, 60.37%, and 69.04%, respectively.

[0140] NetCRC-NR also demonstrates excellent scalability. When 62 baseband units are connected to an Intel Tofino programmable switch, the system supports a throughput of up to 5.065 Tbps. Furthermore, NetCRC-NR effectively manages the switch's on-chip memory resources, ensuring sufficient space for both traditional network processing and CRC acceleration tasks, as shown in Table 3.

[0141] Table 1 shows the performance of the receiving system when using UDP as the transport protocol and a payload size of 768 bits.

[0142]

[0143] Table 2 shows the receiving system performance when using UDP as the transport protocol and a payload size of 1536 bits.

[0144]

[0145] Table 3. NetCRC-NR Intel Tofino Switch Resource Usage

[0146] Resource Name | Used | Available | Usage | Action Data Bus | 341536 | 2.2% | Exact Match Input Xbar | 4091536 | 26.6% | Hash Dist. Unit | 9721 | 2.5% | Logical Table ID | 1319 | 26.8% | Hash bit | 233499 | 24.7% | SRAM | 20960 | 2.1% | VLIM Instruction | 16384 | 4.2% | Pipes | 1425% | Stages within a single pipe | 5124 | 1.6% surface

[0147] Applying the method provided by this invention, in actual system construction, this invention uses an Intel Tofino programmable switch supporting a maximum throughput of 6.4Tbps as the core network device, and is equipped with two servers equipped with Intel Xeon Silver 4310 CPUs (2.10GHz, 48 cores) to meet computing requirements. These two servers are connected to the Intel Tofino switch via 100Gbps direct-attach copper cables (DACs), and each server is equipped with a Mellanox ConnectX-5100G network interface card (NIC). On the software side, the data plane is programmed using P4 language and Intel P4Studio to program the switch, the control plane uses Python to write applications, and the server-side applications are developed based on C language and DPDK v19.

[0148] In the experiment, the sending application was responsible for constructing the Ethernet, IP, UDP, and NetCRC-NR headers and generating a payload with random data. To collect experimental results, the DPDK application on the receiving server was started first, followed by the corresponding application on the sending server. The receiving server logged results to a file only when there were arriving packets in the Rx queue. During each experiment, both servers were configured to continuously transmit and receive packets for a total of 120 seconds.

[0149] The performance metrics of this invention include CRC calculation throughput T crc Packing rate P rate Code block rate R cb Total network throughput T net And protocol efficiency η.

[0150] Among them, CRC throughput T crc This represents the total throughput of NetCRC-NR performing CRC generation / verification per second.

[0151] P size=P overhead +P header +L size

[0152] T crc =L size ×P rate

[0153] Among them, L size It is the payload size of NetCRC-NR, P size It is the data packet size, P header It is the protocol header length, P overhead This represents the protocol overhead. For NetCRC-NR, the total protocol overhead P overhead It includes 38 bytes of Ethernet overhead, 20 bytes of IPv4 overhead, 8 bytes of UDP overhead, and 5 bytes of NetCRC-NR general header.

[0154] Packet rate P rate The number of data packets sent or received per second (pps) is a key metric for evaluating network performance. Let the bandwidth of a switch port or network interface card (NIC) be B. nic The unit is Gbps, and the data packet size is P. size If the unit is bytes, then the packet rate is:

[0155]

[0156] Code block rate R cb This refers to the number of code blocks (CBs) that NetCRC-NR has computed:

[0157]

[0158] Where, k cb It is the number of bits per code block.

[0159] Total network throughput T net The calculation is as follows:

[0160] T net =P size ×P rate

[0161] Protocol efficiency η is defined as the payload size L size With data packet size P size The ratio.

[0162]

[0163] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these changes and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for accelerating cyclic redundancy check (CRC) calculation in 5G wireless access networks based on programmable switches, characterized in that, The Network Cyclic Redundancy Check (NetCRC-NR) protocol is used for data transmission and CRC calculation, including: the server sending a Data Transfer Block (TB / CB) and dividing it into multiple segments, the length of which meets the switch's requirements; the switch receiving these segments and continuously calculating the CRC of each received segment until it receives the last segment of the TB / CB; if the switch does not receive the last segment, it calculates the CRC of the last segment and performs an XOR operation with the CRC of the previous segment temporarily stored in the register, using the result to update the register; if the switch receives the last segment, it reads the temporary value from the register, completes the full CRC calculation for the TB / CB, and then resets the register module; if the current segment only needs CRC generation, the switch appends the final CRC value to the TB / CB; if the segment also requires CRC verification, the switch modifies the final CRC value with the input... Perform CRC value comparison and append the pass or fail result to the segment header; the switch uses L2 / L3 routing to forward the segment to the target MAC / IPv4 address; otherwise, the segment will be sent back to the same ingress port; the CRC generation and verification includes: Step 1: Check and process the NetCRC-NR packet, if If it is a NetCRC-NR packet, then continue: From Extracting the NetCRC-NR header ; Use the CRC calculation module to calculate The CRC value, and set it to Step 2: Process segments that are not the last segment, if If the `last` field is 0, indicating it's not the last segment, then: read the current value from the register and set it to... Perform an XOR operation: Use the updated version Update registers; Step 3: Process the last segment, if If the `last` field is 1, indicating it's the last segment, then: read the current value from the register and set it to... Perform an XOR operation: ; Reset register module; If If the check field is 0, it means that no CRC check is performed, then... Attached to ;if If the check field is 1, it indicates that a CRC check is performed, and the calculated values ​​are compared. and The CRC value in the header, and the comparison result is set to Update the pass field Header information; Step 4: Apply L2 / L3 routing module; Step 5: ... Forward to the matching exit port; Algorithm input: : Input packet from the parser; : No. The first in the transport block TB or code block CB Each segment; Algorithm output: Updated Packet and its header information; value: represents the input CRC value calculated in the calculation module; value': represents the previously stored value, with a default value of zero; RST: used to reset the registers in the module; EN: used to enable the register module; RW: used to enable read / write operations.

2. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that, The server sends TB / CB, which is then divided into multiple segments: In the 5G wireless access network, the MAC layer organizes the data into transport blocks with CRC checksums and transmits them to the PHY layer. The transport block TB is the basic payload unit transmitted between the MAC layer and the physical layer; the PHY layer uses the LDPC encoding scheme, and the maximum size of its code block is [missing information]. Its specific value depends on the coding structure used by LDPC; the maximum size of the transport block TB is 1,277,992 bits. When the transport block exceeds the specified maximum size, it will be divided into multiple equally sized code blocks CB, and a CRC check bit will be added to each code block. For those with The transport block input sequence of the 10-bit CRC checksum, where The transport block (TB) represents the bit length of the input sequence. It is divided into multiple equal-sized code blocks, each with an appended bit length. A CRC checksum of 12 bits, and the number of code blocks after segmentation. As shown below, where ； set up Indicates the first A code block, in which The size of each code block is ; each code block Divided into A fragment, recorded as A code block can be represented as a group of equal-sized fragments: ,in Indicates the first The first code block A segment, 。 3. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that, The switch receives the multiple segments and continuously calculates the CRC of the received segments: utilizing the linearity of the CRC function to calculate the CRC of the first segment... code block Perform CRC calculation, assuming It is a general-purpose CRC function that... Applied to code blocks This yields the following expression: 。 4. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that, When data packets are transmitted over Ethernet, specify EtherType as When NetCRC-NR is embedded in the L3 payload, it uses the IPv4 packet format and specifies the protocol type number as... When NetCRC-NR is carried over UDP, the reserved source port is... 。 5. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that, The segment header carries key information required for CRC generation and verification, and includes the following header fields: Type: A 4-bit field indicating the CRC polynomial type, with values ​​of 0, 1, 2, 3, 4, and 5, corresponding to the six CRC algorithms CRC24A, CRC24B, CRC24C, CRC16, CRC11, and CRC6 specified in 5G NR TS 38.212, respectively. The specific value depends on the channel type or transport block size; Last: A 1-bit header field indicating whether the incoming data packet is the last transport block or code block fragment; Check: A 1-bit field distinguishing between the generation and verification functions. When its value is 1, NetCRC-NR generates the CRC value of the segment and compares it with the CRC value appended to the end of the data packet. When the value is 0, only the CRC value of the segment is generated; Pass: a 1-bit field used to indicate the result of the CRC verification function, which is 0 when the verification fails and 1 otherwise; TBSize: a 16-bit field indicating the size of the transport block or code block; SeqID: a 16-bit field indicating the sequence number of the code block or transport block.

6. The method for accelerating cyclic redundancy check calculation of 5G wireless access network based on programmable switch according to claim 1, characterized in that, The transport block (TB) or code block (CB) is segmented using a packet generation algorithm: Step 1: Initialize an empty queue. Used to store the generated NetCRC-NR packet; Step 2: From arrive Traversal For each segment Perform the following sub-steps: Sub-step 2.1: Create a new NetCRC-NR packet ； Sub-step 2.2: Set the current segment As The effective payload; Sub-step 2.3: If it is the last segment, i.e. Set the Last flag to 1; Sub-step 2.4: Add to queue The input is a transport block (TB) or a code block (CB), denoted as... ； The output is a queue containing all generated packets, denoted as . ;in The number of segments in each Ω; The number of bits in each segment; : The i-th segment in Ω.

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