Data verification circuit and method, chip, electronic device and electronic equipment
By designing a data verification circuit connected to multiple AND gates and OR gates, the problem of OneHot encoded data verification in machine learning and deep learning circuits is solved, and data verification effects with high accuracy and low latency are achieved.
Patent Information
- Application Number
- CN202510169656.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-17
- Publication Date
- 2025-06-03
- Estimated Expiration
- 2045-02-17
AI Technical Summary
In integrated circuit designs of machine learning and deep learning, it is difficult for prior art to effectively verify OneHot coded or OneHot coded data.
A data verification circuit is designed to perform and operate and operate through the connection between multiple AND gates and OR gates, and finally determine whether the data to be verified is the target data.
It realizes effective verification of OneHot coded or OneHot coded data, improves the accuracy of data verification, and reduces time delay, and is suitable for large-scale and high-speed digital circuit designs.
Smart Images

Figure CN120087294A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of circuit design, and in particular, to a data verification circuit, method, chip, electronic device, and electronic equipment. Background Art
[0002] In the integrated circuit design of machine learning and deep learning, OneHot encoding (also known as one-hot encoding, for data of any bit width, only one bit is valid) has a wide range of applications. At the same time, in actual designs, there are also a large number of data similar to OneHot, such as data with 2 valid bits, data with 1 invalid bit, etc. In actual designs, it is often necessary to verify whether such data is similar to OneHot encoding. Summary of the Invention
[0003] The purpose of the embodiments of this application is to provide a data verification circuit, method, chip, electronic device, and electronic equipment for verifying data encoded in OneHot or similar to OneHot.
[0004] The embodiments of this application provide a data verification circuit, including: a multi-layer AND operation unit and a multi-layer OR operation unit; the i-th AND gate in the first-layer AND operation unit of the multi-layer AND operation unit is respectively connected to the (2i - 1)-th bit and the 2i-th bit of the data to be verified; the i-th OR gate in the first-layer operation unit of the multi-layer OR operation unit is respectively connected to the (2i - 1)-th bit and the 2i-th bit of the data to be verified; the data to be verified has a total of N bits, and i is an integer from 1 to N / 2; in the n-th layer AND operation unit of the multi-layer AND operation unit, every 2 n-1 AND gates form a group; in the n-th layer OR operation unit of the multi-layer OR operation unit, every 2 n-1A group consists of OR gates; where: The j-th AND gate in the i-th group of the (n + 1)-th layer AND operation unit is respectively connected to the ((j + 1) / 2)-th AND gate in the (2i - 1)-th group and the ((j + 1) / 2)-th AND gate in the 2i-th group of the n-th layer AND operation unit; The k-th AND gate in the i-th group of the (n + 1)-th layer AND operation unit is respectively connected to the (k / 2)-th OR gate in the (2i - 1)-th group and the (k / 2)-th OR gate in the 2i-th group of the n-th layer OR operation unit; The j-th OR gate in the i-th group of the (n + 1)-th layer OR operation unit is respectively connected to the ((j + 1) / 2)-th AND gate in the (2i - 1)-th group and the ((j + 1) / 2)-th AND gate in the 2i-th group of the n-th layer AND operation unit; The k-th OR gate in the i-th group of the (n + 1)-th layer OR operation unit is respectively connected to the (k / 2)-th OR gate in the (2i - 1)-th group and the (k / 2)-th OR gate in the 2i-th group of the n-th layer OR operation unit; where j is odd and k is even; A judgment unit is respectively connected to each AND gate of the last layer AND operation unit of the multiple-layer AND operation units and each OR gate of the last layer OR operation unit of the multiple-layer OR operation units; The judgment unit is used to determine whether the data to be verified is the target data according to the output value of the last layer AND operation unit and the output value of the last layer OR operation unit; The target data represents a one-bit valid coding data or a quasi-one-bit valid coding data.
[0005] In the above implementation, through the connection of multiple layers of AND gates and OR gates, continuously performing AND operations and OR operations, the final result will more intuitively reflect the quantity situation of the valid data in the data to be verified, so as to determine whether the data to be verified is the target data. For example, for one-bit valid coding data, assuming the valid data is 1 and the other bits are 0, then all AND operations should be 0, and there will be exactly one value of 1 in the value after the final OR operation, thus enabling the judgment of one-bit valid coding data. Another example, for two-bit valid data, after multiple layers of AND operations, there are two cases. One is that the final AND operation result will all be 0, and there will be exactly 2 values of 1 in the value after the final OR operation, such as Figure 5 the final result shown, and the other is that there is exactly one value of 1 in the final AND operation result, and there will be exactly 1 value of 1 in the value after the final OR operation, such as Figure 6 the final result shown, thus enabling the judgment of two-bit valid data based on these two cases. The same is true for other quasi-one-bit valid coding data. And in the solution of the present application, each layer performs AND operations and OR operations based on AND gates and OR gates simultaneously, with relatively small latency, which is also conducive to application in large-scale and high-speed digital circuit designs.
[0006] Further, the number of layers of the AND operation unit is equal to log 2(N + 1) rounded down value; the number of layers of the OR operation unit is equal to log 2 (N + 1) rounded down value.
[0007] Further, each AND gate of each layer of the multi-layer AND operation unit is also respectively connected to the judgment unit; each OR gate of each layer of the multi-layer OR operation unit is also respectively connected to the judgment unit.
[0008] In the above implementation, each AND gate of each layer of the AND operation unit is respectively connected to the judgment unit, and each OR gate of each layer of the OR operation unit is respectively connected to the judgment unit. In this way, the judgment unit can further combine the AND operation results of each AND gate of each layer of the AND operation unit and the OR operation results of each OR gate of each layer of the OR operation unit to further determine whether the data to be verified is the target data, improving the accuracy of target data verification.
[0009] Further, the judgment unit includes a first comparator and a second comparator; each AND gate of each layer of the multi-layer AND operation unit is respectively connected to the first comparator; each OR gate of each layer of the multi-layer OR operation unit is respectively connected to the second comparator.
[0010] In the above implementation, the first comparator is used to connect to each AND gate of each layer of the AND operation unit, and the second comparator is used to connect to each OR gate of each layer of the OR operation unit. This can achieve separate comparisons of the AND operation results and the OR operation results, with higher comparison accuracy.
[0011] Further, if N is odd, and the number of groups in the first layer of the AND operation unit is odd, and the number of groups in the first layer of the OR operation unit is odd, then: the first AND gate in the last group of the second layer of the AND operation unit is respectively connected to the AND gate in the last group of the first layer of the AND operation unit and the last bit of the data to be verified; the second AND gate in the last group of the second layer of the AND operation unit is respectively connected to the OR gate in the last group of the first layer of the OR operation unit and the last bit of the data to be verified.
[0012] In the above implementation, by connecting the first AND gate in the last group of the second layer of the AND operation unit to the AND gate in the last group of the first layer of the AND operation unit and the last bit of the data to be verified respectively, and connecting the second AND gate in the last group of the second layer of the AND operation unit to the OR gate in the last group of the first layer of the OR operation unit and the last bit of the data to be verified respectively, this realizes the operation of the extra bit, improving the judgment reliability of the data to be verified.
[0013] Further, if N is odd, and the number of groups of AND operation units and OR operation units in each layer is even, then: the judgment unit is further connected to the last bit of the data to be verified.
[0014] In the above implementation, by further connecting the judgment unit to the last bit of the data to be verified, the combined judgment of the extra bit is realized, and the judgment reliability of the data to be verified is improved.
[0015] The embodiment of the present application further provides a data verification method, including: when receiving the data to be verified, taking the (2i - 1)-th bit and the 2i-th bit of the data to be verified as a group to obtain i groups of first-layer data groups to be operated; where the data to be verified has a total of N bits, and i belongs to an integer from 1 to N / 2; performing AND operation and OR operation on each group of first-layer data groups to be operated respectively to obtain the AND result data and OR result data of each group of first-layer data groups to be operated; taking the AND result data of the (2a - 1)-th group of first-layer data groups to be operated and the AND result data of the 2a-th group of first-layer data groups to be operated as a group to obtain a groups of second-layer AND operation data groups; taking the OR result data of the (2a - 1)-th group of first-layer data groups to be operated and the OR result data of the 2a-th group of first-layer data groups to be operated as a group to obtain a groups of second-layer OR operation data groups; where a belongs to an integer from 1 to i / 2; performing AND operation and OR operation on each group of second-layer AND operation data groups respectively to obtain the AND result data and OR result data of each group of second-layer AND operation data groups; performing AND operation and OR operation on each group of second-layer OR operation data groups respectively to obtain the AND result data and OR result data of each group of second-layer OR operation data groups; repeating the above process, continuously dividing the AND result data of the (2b - 1)-th group and the 2b-th group of the same type of data groups into a group to perform AND operation and OR operation respectively, and dividing the OR result data of the (2b - 1)-th group and the 2b-th group of the same type of data groups into a group to perform AND operation and OR operation respectively, until the above process is performed for the first preset number of times; where b successively takes integers greater than or equal to 1; determining whether the data to be verified is the target data according to the AND result data and OR result data obtained last; the target data represents a one-bit valid coding data or a quasi-one-bit valid coding data.
[0016] In the above implementation, by continuously grouping the data to be verified and then performing AND operation and OR operation, the finally obtained result will more intuitively reflect the quantity situation of the valid data in the data to be verified, so that it can be determined whether the data to be verified is the target data. And in the solution of the present application, each layer is based on the AND operation and OR operation performed by the AND gate and the OR gate at the same time, and the generated time delay is small, which is also beneficial to the application in large-scale and high-speed digital circuit designs.
[0017] Further, the first preset number is equal to the value obtained by taking the integer part of log 2 (N + 1).
[0018] In the above solution, by setting the first preset number to be equal to the value obtained by taking the integer part of log 2 (N + 1), it can be ensured that in the last calculation, each data group has exactly one pair of data, so as to achieve the effect of the maximum number of operations and make the final judgment result more reliable.
[0019] Further, if N is odd and the number of the first-layer data groups to be operated is also odd, then: when taking the AND result data of the (2a - 1)-th first-layer data group to be operated and the AND result data of the 2a-th first-layer data group to be operated as a group to obtain a second-layer AND operation data groups, it further includes: taking the AND result data of the last first-layer data group to be operated and the last bit data of the data to be verified as a group to obtain the (a + 1)-th second-layer AND operation data group; when taking the OR result data of the (2a - 1)-th first-layer data group to be operated and the OR result data of the 2a-th first-layer data group to be operated as a group to obtain a second-layer OR operation data groups, it further includes: taking the OR result data of the last first-layer data group to be operated and the last bit data of the data to be verified as a group to obtain the (a + 1)-th second-layer OR operation data group.
[0020] Further, determining whether the data to be verified is the target data according to the AND result data and OR result data obtained in the last time includes: when the AND result data obtained in the last time conforms to the preset first type of result value and the OR result data obtained in the last time conforms to the preset second type of result value, determining that the data to be verified is the target data.
[0021] As described above, data encoded by OneHot or quasi-OneHot has different characteristics after operation. Based on this, by designing appropriate first type of result value and second type of result value, it is easy to determine whether the data to be verified is the target data.
[0022] Further, determining whether the data to be verified is the target data according to the AND result data and OR result data obtained in the last time includes: if the AND result data obtained each time after the second preset number conforms to the preset first type of result value and the OR result data obtained in the last time conforms to the preset second type of result value, determining that the data to be verified is the target data; where the second preset number is less than the first preset number.
[0023] In the above implementation manner, the AND operation results of each AND gate of each layer and the operation unit, and the OR operation results of each OR gate of each layer or the operation unit can be further combined to further determine whether the data to be verified is the target data, improving the accuracy of target data verification.
[0024] Further, if N is equal to 2 n +1, and n is a positive integer greater than or equal to 2, then: determine whether the data to be verified is the target data according to the AND result data and OR result data obtained last time, and the last bit data of the data to be verified.
[0025] Further, determining whether the data to be verified is the target data according to the AND result data and OR result data obtained last time, and the last bit data of the data to be verified includes: when the AND result data obtained last time conforms to a preset first type of result value, and the OR result data obtained last time plus the last bit data of the data to be verified conforms to a preset second type of result value, determine that the data to be verified is the target data.
[0026] The embodiment of the present application also provides a chip, including the data verification circuit of any one of the foregoing.
[0027] The embodiment of the present application also provides an electronic device, including the above chip.
[0028] The embodiment of the present application also provides an electronic equipment, including the above electronic device. Description of the Drawings
[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.
[0030] Figure 1 It is a schematic flowchart of a data verification method provided by an embodiment of the present application;
[0031] Figure 2 It is a schematic structural diagram of a data verification circuit provided by an embodiment of the present application;
[0032] Figure 3 It is a schematic structural diagram of a data verification circuit when N is odd and the number of groups in the first layer AND operation unit is odd provided by an embodiment of the present application;
[0033] Figure 4A schematic structural diagram of a data verification circuit provided by an embodiment of the present application when N is an odd number, and the number of each layer and the operation unit and the number of groups of each layer or operation unit are all even;
[0034] Figure 5 A schematic diagram of a verification scenario provided by an embodiment of the present application when verifying whether 00001100 is a two-bit valid encoded data;
[0035] Figure 6 A schematic diagram of a verification scenario provided by an embodiment of the present application when verifying whether 00010100 is a two-bit valid encoded data. Detailed implementation manners
[0036] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application.
[0037] To verify data of OneHot encoding or OneHot-like encoding, an embodiment of the present application provides a data verification method, which can be seen Figure 1 as shown in Figure 1 A flowchart of the data verification method provided by an embodiment of the present application, including:
[0038] S101: When receiving the data to be verified, take the (2i - 1)-th bit and the 2i-th bit of the data to be verified as a group, and obtain i groups of first-layer data groups to be operated on.
[0039] Exemplarily, assume that the data to be verified is 8-bit data, which is sequentially denoted as the 1st bit data to the 8th bit data. Then, take the first bit data and the second bit data as a group of first-layer data groups to be operated on, take the third bit data and the fourth bit data as a group of first-layer data groups to be operated on, take the fifth bit data and the sixth bit data as a group of first-layer data groups to be operated on, and take the seventh bit data and the eighth bit data as a group of first-layer data groups to be operated on, and a total of 4 groups of first-layer data groups to be operated on are obtained.
[0040] In an embodiment of the present application, the data to be verified has a total of N bits, and N is a positive integer greater than or equal to 2, then i belongs to an integer from 1 to N / 2.
[0041] Exemplarily, when N is an even number, i sequentially takes values from 1 to N / 2. For example, for the aforementioned 8, then i sequentially takes values 1, 2, 3, 4. When N is an odd number, i sequentially takes values from 1 to (N - 1) / 2. For example, when N is 9, then i sequentially takes values 1, 2, 3, 4.
[0042] S102: Perform an AND operation and an OR operation on each group of first-layer data groups to be operated on respectively, and obtain the AND result data and the OR result data of each group of first-layer data groups to be operated on.
[0043] Exemplarily, assume that the data to be verified is 8-bit data, and each bit of data is denoted as A1 to A8 in sequence. Then: perform an AND operation on A1 and A2 to obtain the AND operation result Perform an OR operation on A1 and A2 to obtain the OR operation result Perform an AND operation on A3 and A4 to obtain the AND operation result Perform an OR operation on A3 and A4 to obtain the OR operation result Perform an AND operation on A5 and A6 to obtain the AND operation result Perform an OR operation on A5 and A6 to obtain the OR operation result Perform an AND operation on A7 and A8 to obtain the AND operation result Perform an OR operation on A7 and A8 to obtain the OR operation result
[0044] In the embodiments of the present application, AND represents the AND operation result, OR represents the OR operation result, the superscript represents the layer number of the AND operation or the OR operation, and the subscript represents the two objects of the operation
[0045] S103: Take the AND result data of the (2a - 1)-th group of first-layer data to be operated and the AND result data of the 2a-th group of first-layer data to be operated as a group to obtain a groups of second-layer AND operation data groups; take the OR result data of the (2a - 1)-th group of first-layer data to be operated and the OR result data of the 2a-th group of first-layer data to be operated as a group to obtain a groups of second-layer OR operation data groups
[0046] Where a is an integer in the range of 1 to i / 2. Exemplarily, assume that i is 4, then a takes 1 and 2 in sequence
[0047] Exemplarily, still taking the example where each bit of the aforementioned data to be verified is denoted as A1 to A8, take and as the first group of second-layer AND operation data groups, take and as the second group of second-layer AND operation data groups, take and as the first group of second-layer OR operation data groups, take and as the second group of second-layer OR operation data groups
[0048] S104: Perform AND operations and OR operations respectively on each group of second-layer AND operation data groups to obtain the AND result data and OR result data of each group of second-layer AND operation data groups; perform AND operations and OR operations respectively on each group of second-layer OR operation data groups to obtain the AND result data and OR result data of each group of second-layer OR operation data groups
[0049] Exemplarily, still taking the example where the respective data of the aforementioned data to be verified are denoted as A1 to A8 in sequence, then for and perform an AND operation to obtain the AND operation result For and perform an OR operation to obtain the OR operation result For and perform an AND operation to obtain the AND operation result For and perform an OR operation to obtain the OR operation result For and perform an AND operation to obtain the AND operation result For and perform an OR operation to obtain the OR operation result For and perform an AND operation to obtain the AND operation result For and perform an OR operation to obtain the OR operation result Among them, the 2 in the superscripts 2A and 2O represents the second - layer AND operation or OR operation. A represents that the operation data source is the AND result data, and O represents that the operation data source is the OR result data.
[0050] S105: Repeat the above process, continuously divide the AND result data of the (2b - 1) - th group and the 2b - th group of the same data group into one group to perform AND operation and OR operation respectively, and divide the OR result data of the (2b - 1) - th group and the 2b - th group of the same data group into one group to perform AND operation and OR operation respectively, until the above process has been carried out for the first preset number of times.
[0051] Among them, b takes integers greater than or equal to 1 in sequence. It can be understood that the maximum value of b is equal to the value obtained by taking the floor of half of the number of the same data group in the upper - layer operation.
[0052] Exemplarily, still taking the example where the respective data of the aforementioned data to be verified are denoted as A1 to A8 in sequence, then continue to take and as a group to obtain a group of third - layer first AND operation data groups; take and as a group to obtain a group of third - layer first OR operation data groups; take and as a group to obtain a group of third - layer second AND operation data groups; take and As a group, a set of third-layer second OR operation data groups is obtained.
[0053] After that, perform an AND operation on and to obtain the AND result data of the first AND operation data group in the third layer Perform an OR operation on and to obtain the OR result data of the first AND operation data group in the third layer
[0054] Perform an AND operation on and to obtain the AND result data of the first OR operation data group in the third layer Perform an OR operation on and to obtain the OR result data of the first OR operation data group in the third layer
[0055] Perform an AND operation on and to obtain the AND result data of the second AND operation data group in the third layer Perform an OR operation on and to obtain the OR result data of the second AND operation data group in the third layer
[0056] Perform an AND operation on and to obtain the AND result data of the second OR operation data group in the third layer Perform an OR operation on and to obtain the OR result data of the first OR operation data group in the third layer
[0057] Among them, the first number 3 in the superscript represents the AND operation or OR operation in the third layer; the second number in the superscript represents the operation data source during the second-layer operation, A indicates that the operation data source is the AND result data, and O indicates that the operation data source is the OR result data; the third number in the superscript represents the operation data source during the third-layer operation, A indicates that the operation data source is the AND result data, and O indicates that the operation data source is the OR result data.
[0058] It can be understood that in the above example, since the data to be verified is 8-bit data, after three layers of AND operations and OR operations, there is exactly one AND result data for the same data group, and there is also exactly one OR result data for the same data group. Therefore, it is impossible to continue grouping and performing AND operations and OR operations separately. Therefore, for the above example, at most only three layers of AND operations and OR operations can be performed, that is, the maximum value of the first preset number is 3. However, for the case where the data to be verified is 16 bits, four layers of AND operations and OR operations can be performed, that is, the maximum value of the first preset number is 4. And for the case where the data to be verified is 32 bits, five layers of AND operations and OR operations can be performed, that is, the maximum value of the first preset number is 5. Therefore, in the embodiments of the present application, the setting of the first preset number can be combined with the size of the data to be verified, and it can be set to be less than or equal to the value obtained by taking the integer part of log 2 (N + 1).
[0059] In the embodiments of the present application, when N is odd and N is equal to 2 n -1 (n is a positive integer greater than or equal to 2), at this time, the number of the first-layer data groups to be operated will be odd. At this time: the AND result data of the (2a - 1)-th first-layer data group to be operated and the AND result data of the 2a-th first-layer data group to be operated can be used as a group to obtain a second-layer AND operation data group, and at the same time, the AND result data of the last first-layer data group to be operated and the last bit data of the data to be verified can be used as a group to obtain the (a + 1)-th second-layer AND operation data group; and, the OR result data of the (2a - 1)-th first-layer data group to be operated and the OR result data of the 2a-th first-layer data group to be operated can be used as a group to obtain a second-layer OR operation data group, and at the same time, the OR result data of the last first-layer data group to be operated and the last bit data of the data to be verified can be used as a group to obtain the (a + 1)-th second-layer OR operation data group.
[0060] Exemplarily, assuming that the data to be verified is 7-bit data, and the data of each bit is sequentially denoted as A1 to A7, then three first-layer data groups to be operated can be obtained as A1 and A2, A3 and A4, A5 and A6, and A7 is idle.
[0061] Then there is the AND operation result of the first layer There is the OR operation result of the first layer
[0062] Then when dividing the second-layer AND operation data groups, there is: combining and as the first second-layer AND operation data group, and combining and A7 as the second second-layer AND operation data group. When dividing the second-layer OR operation data groups, there is: combining and As the second-layer OR operation data group of the first group, take and A7 as the second-layer OR operation data group of the second group.
[0063] It can be seen that based on the above implementation method, when N is odd and N is equal to 2 n - 1, at most n groupings can be performed, so the first preset number can be set to be less than or equal to the value obtained by taking the integer part of log 2 (N + 1).
[0064] It can be understood that in the embodiments of the present application, when N is odd but N is not equal to 2 n - 1, if the number of the first-layer data groups to be operated is also odd, then when taking the AND result data of the (2a - 1)-th first-layer data group to be operated and the AND result data of the 2a-th first-layer data group to be operated as a group to obtain a second-layer AND operation data group, the AND result data of the last first-layer data group to be operated and the last bit data of the data to be verified can still be taken as a group to obtain the (a + 1)-th second-layer AND operation data group; and, when taking the OR result data of the (2a - 1)-th first-layer data group to be operated and the OR result data of the 2a-th first-layer data group to be operated as a group to obtain a second-layer OR operation data group, the OR result data of the last first-layer data group to be operated and the last bit data of the data to be verified can still be taken as a group to obtain the (a + 1)-th second-layer OR operation data group.
[0065] In the embodiments of the present application, when N is odd but N is not equal to 2 n - 1, if the number of the first-layer data groups to be operated is not odd, but the number of the data groups to be operated in a certain layer is odd, then the last bit data of the data to be verified can be taken as a group with the AND result data of the data groups to be operated in this layer respectively, and at the same time, the last bit data of the data to be verified can be taken as a group with the AND result data of the data groups to be operated in this layer respectively.
[0066] Exemplarily, assume that N is 13, that is, the data to be verified is 13-bit data, and the data of each bit is denoted as A1 to A13 in sequence. Then six first-layer data groups to be operated can be obtained, which are A1 and A2, A3 and A4, A5 and A6, A7 and A8, A9 and 10, A11 and A12, and A13 is idle. Then there are three groups of each second-layer data group to be operated, and the three groups of second-layer AND operation data groups are respectively: and and and The three groups of second-layer OR operation data groups are: and and and Then, when grouping the third-layer data groups to be calculated, there will be an odd number of cases. At this time, A13 can be used for complementation, that is: two third-layer first AND operation data groups: and and A13, two third-layer first OR operation data groups: and and A13, two third-layer second AND operation data groups: and and A13, two third-layer second OR operation data groups: and and A13.
[0067] In the embodiments of the present application, when the number of data groups to be calculated in a certain layer is odd, the AND result data of the last group of the data groups to be calculated in this layer can be combined with the AND result data of the odd-numbered data groups to be calculated that appear again later into a group for calculation. The OR result data of the last group of the data groups to be calculated in this layer can be combined with the AND result data of the odd-numbered data groups to be calculated that appear again later into a group for calculation. If there is no layer with odd-numbered data groups to be calculated later, it can be used as the final AND result data and OR result data, and together with the AND result data and OR result data obtained last time, determine whether the data to be verified is the target data.
[0068] Exemplarily, in the above example, assuming N is 12, then and cannot be grouped any further, then it can be combined with the AND result data and OR result data of and , the AND result data and OR result data of and , the AND result data and OR result data of and , the AND result data and OR result data of and to determine whether the data to be verified is the target data.
[0069] S106: Determine whether the data to be verified is the target data according to the AND result data and OR result data obtained last time.
[0070] In the embodiments of the present application, the target data represents a one-bit valid coding data or a one-bit-like valid coding data. Among them, the one-bit-like valid coding data refers to: data with 2 valid bits (denoted as two-bit valid data), data with 1 non-valid bit (denoted as one-bit non-valid data), etc.
[0071] In the embodiments of the present application, the obtained AND result data and / or OR result data after the above operations will more intuitively reflect the quantity situation of the valid data in the data to be verified. For example, for a one-bit valid coding data, assuming the valid data is 1 and the other bits are 0, then all AND operations should be 0, and there will be exactly one value of 1 in the value after the final OR operation, so as to realize the judgment of a one-bit valid coding data. Another example, for a two-bit valid data, after multiple AND operations, there are two situations. One is that the final AND operation result will all be 0, and there will be exactly two values of 1 in the value after the final OR operation, such as Figure 5 the final result shown. The other is that there is exactly one value of 1 in the final AND operation result, and there will be exactly one value of 1 in the value after the final OR operation, such as Figure 6 the final result shown. Based on these two situations, the judgment of two-bit valid data can be realized. Another example, for a one-bit non-valid bit data, assuming the valid data is 1 and there is exactly one bit that is 0, then all OR operations should be 1, and there will be exactly one value of 0 in the value after the final AND operation, so as to realize the judgment of a one-bit non-valid bit data.
[0072] Based on this, when the obtained AND result data in the last time conforms to the preset first type of result value, and the obtained OR result data in the last time conforms to the preset second type of result value, it can be determined that the data to be verified is the target data.
[0073] For different target data, corresponding first type of result values and second type of result values can be set, so as to realize the determination of whether the data to be verified is the target data. Exemplarily, for the target data being a one-bit valid coding data, when all the obtained AND result data in the last time are 0 and there is only one value of 1 in the OR result data, it can be determined that the data to be verified is the target data, otherwise it is determined that the data to be verified is not the target data. Another example, for the target data being a two-bit valid coding data, when all the obtained AND result data in the last time are 0 and there are only two values of 1 in the OR result data, or when there is exactly one value of 1 in all the obtained AND result data in the last time and there is only one value of 1 in the OR result data, it can be determined that the data to be verified is the target data, otherwise it is determined that the data to be verified is not the target data. Another example, for the target data being a one-bit non-valid bit data, when all the obtained OR result data in the last time are 1 and there is only one value of 0 in the AND result data, it can be determined that the data to be verified is the target data, otherwise it is determined that the data to be verified is not the target data.
[0074] In addition, for validly encoded data or one-bit-like validly encoded data, the result values obtained during the operations of each layer can also, to a certain extent, reflect whether the data to be verified is the target data. Therefore, in an alternative implementation of the embodiments of the present application, it is also possible to determine whether the data to be verified is the target data by combining the result values obtained during the operations of each layer.
[0075] Exemplarily, for one-bit validly encoded data, two-bit validly encoded data, etc., it can be set that if each AND result data obtained after the second preset number of times (including the AND result data obtained in the round where the second preset number of times is located) conforms to the preset first type of result value, and the OR result data obtained in the last time conforms to the preset second type of result value, it is determined that the data to be verified is the target data; otherwise, it is determined that the data to be verified is not the target data. Herein, the second preset number of times is less than the first preset number of times.
[0076] For one-bit non-valid bit data, it can be set that if each OR result data obtained after the second preset number of times (including the OR result data obtained in the round where the second preset number of times is located) conforms to the preset second type of result value, and the AND result data obtained in the last time conforms to the preset first type of result value, it is determined that the data to be verified is the target data; otherwise, it is determined that the data to be verified is not the target data.
[0077] Among them, for different target data, the setting requirements for the second preset number of times can be different. For example, for one-bit validly encoded data and one-bit non-valid bit data, the same result will be followed during each operation, so the second preset number of times can be set to 1. However, for two-bit validly encoded data, in the operation, it is possible that the two valid data are in the same group or in different groups during the first grouping, resulting in possible differences in the results of the first operation. Therefore, the second preset number of times can be set to 2.
[0078] In some alternative implementations of the embodiments of the present application, if N is odd and N is equal to 2 n + 1, then at this time, the last bit data of the data to be verified will always be idle and cannot be grouped with any intermediate-level AND result data or OR result data. Therefore, at this time, it can be independently used as one-bit verification data, and thus, based on the AND result data and OR result data obtained in the last time, as well as the last bit data of the data to be verified, it is determined whether the data to be verified is the target data.
[0079] Exemplarily, assume that N is 9, that is, the data to be verified is 9-bit data, and the data of each bit is sequentially denoted as A1 to A9. Then, four groups of first-layer data groups to be operated on can be obtained, which are A1 and A2, A3 and A4, A5 and A6, A7 and A8, and A9 is idle.
[0080] Then there is the AND operation result of the first layer There is the OR operation result of the first layer
[0081] Then when dividing the data group for the second-layer AND operation, there is: Take and as the first group of second-layer AND operation data groups, and take and as the second group of second-layer AND operation data groups. When dividing the data group for the second-layer OR operation, there is: Take and as the first group of second-layer OR operation data groups, and take and as the second group of second-layer OR operation data groups.
[0082] After that, perform an AND operation on and to obtain the AND operation result Perform an OR operation on and to obtain the OR operation result Perform an AND operation on and to obtain the AND operation result Perform an OR operation on and to obtain the OR operation result Perform an AND operation on and to obtain the AND operation result Perform an OR operation on and to obtain the OR operation result Perform an AND operation on and to obtain the AND operation result Perform an OR operation on and to obtain the OR operation result
[0083] Take and as a group to obtain a group of third-layer first AND operation data groups; take and as a group to obtain a group of third-layer first OR operation data groups; take and as a group to obtain a group of third-layer second AND operation data groups; take and as a group to obtain a group of third-layer second OR operation data groups.
[0084] After that, perform an operation on and perform an AND operation to obtain the AND result data of the first AND operation data group in the third layer For and perform an OR operation to obtain the OR result data of the first AND operation data group in the third layer
[0085] For and perform an AND operation to obtain the AND result data of the first OR operation data group in the third layer For and perform an OR operation to obtain the OR result data of the first OR operation data group in the third layer
[0086] For and perform an AND operation to obtain the AND result data of the second AND operation data group in the third layer For and perform an OR operation to obtain the OR result data of the second AND operation data group in the third layer
[0087] For and perform an AND operation to obtain the AND result data of the second OR operation data group in the third layer For and perform an OR operation to obtain the OR result data of the first OR operation data group in the third layer
[0088] Finally, determine whether the data to be verified is the target data according to and A9
[0089] Assume that the target data is one-bit valid coding data or two-bit valid coding data. Then, it can be determined that the data to be verified is the target data when the AND result data obtained last time meets the preset first type of result value, and the OR result data obtained last time plus the last bit of the data to be verified meets the preset second type of result value. Exemplarily, assume that it is determined whether the above 9-bit data to be verified is one-bit valid coding data. Then, it can be determined whether are all 0, and whether there is exactly one 1 in and A9
[0090] Assume that the target data is a single-bit invalid data. Then, it can be determined that the data to be verified is the target data when the last obtained AND result data plus the last bit of the data to be verified conforms to a preset first type of result value, and the last obtained OR result data conforms to a preset second type of result value. Exemplarily, assume that it is determined whether the above-mentioned 9-bit data to be verified is a single-bit valid encoded data. Then, it can be determined whether there is exactly one 0 in A9, and are both 1.
[0091] It can be understood that the above determination process can be implemented by a determination unit (such as, but not limited to, a comparator, etc.).
[0092] Based on the solution of the embodiment of the present application, by continuously grouping the data to be verified and then performing AND operations and OR operations, the finally obtained result will more intuitively reflect the number of valid data in the data to be verified, so that it can be determined whether the data to be verified is the target data. Moreover, in the solution of the present application, each layer can perform AND operations and OR operations simultaneously based on AND gates and OR gates, resulting in a smaller delay, which is also beneficial for application in large-scale and high-speed digital circuit designs.
[0093] Based on the same inventive concept, an embodiment of the present application also provides a data verification circuit that can implement the above method, as Figure 2 shown, including: multiple layers of AND operation units, multiple layers of OR operation units, and a determination unit. Among them:
[0094] In the first layer of AND operation units of the multiple layers of AND operation units, the i-th AND gate in the first layer of AND operation units is respectively connected to the (2i - 1)-th bit and the 2i-th bit of the data to be verified; in the first layer of operation units of the multiple layers of OR operation units, the i-th OR gate in the first layer of operation units is respectively connected to the (2i - 1)-th bit and the 2i-th bit of the data to be verified; the data to be verified has a total of N bits, and i is an integer from 1 to N / 2.
[0095] In the n-th layer of AND operation units of the multiple layers of AND operation units, every 2 n-1 AND gates form a group; in the n-th layer of OR operation units of the multiple layers of OR operation units, every 2 n-1 OR gates form a group; among them:
[0096] The j-th AND gate in the i-th group of the (n + 1)-th layer of AND operation units is respectively connected to the ((j + 1) / 2)-th AND gate in the (2i - 1)-th group and the ((j + 1) / 2)-th AND gate in the 2i-th group of the n-th layer of AND operation units; the k-th AND gate in the i-th group of the (n + 1)-th layer of AND operation units is respectively connected to the (k / 2)-th OR gate in the (2i - 1)-th group and the (k / 2)-th OR gate in the 2i-th group of the n-th layer of OR operation units.
[0097] The j-th OR gate in the i-th group of the (n + 1)-th layer OR operation unit is respectively connected to the ((j + 1) / 2)-th AND gate in the (2i - 1)-th group of the n-th layer AND operation unit and the ((j + 1) / 2)-th AND gate in the 2i-th group of the n-th layer AND operation unit; the k-th OR gate in the i-th group of the (n + 1)-th layer OR operation unit is respectively connected to the (k / 2)-th OR gate in the (2i - 1)-th group of the n-th layer OR operation unit and the (k / 2)-th OR gate in the 2i-th group of the n-th layer OR operation unit; where j is odd and k is even.
[0098] The judgment unit is respectively connected to each AND gate of the last layer AND operation unit of multiple layers of AND operation units and each OR gate of the last layer OR operation unit of multiple layers of OR operation units.
[0099] The judgment unit body is used to determine whether the data to be verified is the target data according to the output value of the last layer AND operation unit and the output value of the last layer OR operation unit; the target data represents a one-bit valid coding data or a quasi-one-bit valid coding data.
[0100] It can be understood that based on the above connection method, the circuit can achieve the continuous grouping and multi-layer operation of the method described above during execution.
[0101] In the embodiment of the present application, each bit of the data to be verified can be one or some data temporary storage devices connected in the circuit, such as each data bit in a register or a memory. Each bit can be led out through a separate wire and connected to the AND gate and the OR gate.
[0102] In the embodiment of the present application, the size of the data to be verified is determined when the data verification circuit in the embodiment of the present application accesses the corresponding data temporary storage device. That is, when the data verification circuit accesses the corresponding data temporary storage device, the value of N is determined.
[0103] In a feasible implementation manner of the embodiment of the present application, the number of layers of the AND operation unit is equal to the value obtained by rounding down log 2 (N + 1); the number of layers of the OR operation unit is equal to the value obtained by rounding down log 2 (N + 1).
[0104] In another feasible implementation manner of the embodiment of the present application, the number of layers of the AND operation unit can be less than the value obtained by rounding down log 2 (N + 1); the number of layers of the OR operation unit can be less than the value obtained by rounding down log 2 (N + 1). However, the number of layers of the AND operation unit is the same as the number of layers of the OR operation unit.
[0105] In an alternative implementation manner of the embodiment of the present application, each AND gate of each layer of the multi-layer AND operation unit can also be respectively connected to the judgment unit; each OR gate of each layer of the multi-layer OR operation unit can also be respectively connected to the judgment unit. In this way, the judgment unit can further combine the AND operation results of each AND gate of each layer of the AND operation unit and the OR operation results of each OR gate of each layer of the OR operation unit to further determine whether the data to be verified is the target data, improving the accuracy of target data verification.
[0106] In an alternative implementation manner of the embodiment of the present application, the judgment unit may include a first comparator and a second comparator. Each AND gate of each layer of the multi-layer AND operation unit is respectively connected to the first comparator. Each OR gate of each layer of the multi-layer OR operation unit is respectively connected to the second comparator. In this way, the first comparator is used to connect to each AND gate of each layer of the AND operation unit, and the second comparator is used to connect to each OR gate of each layer of the OR operation unit, which can realize the separate comparison of the AND operation result and the OR operation result, and the comparison accuracy is higher.
[0107] In an alternative implementation manner of the embodiment of the present application, if N is odd, and the number of groups in the first layer AND operation unit is odd, and the number of groups in the first layer OR operation unit is odd, then: the first AND gate in the last group of the second layer AND operation unit is respectively connected to the AND gate in the last group of the first layer AND operation unit and the last bit of the data to be verified; the second AND gate in the last group of the second layer AND operation unit is respectively connected to the OR gate in the last group of the first layer OR operation unit and the last bit of the data to be verified. For example Figure 3 as shown.
[0108] In an alternative implementation manner of the embodiment of the present application, if N is odd, and the number of groups in each layer AND operation unit and each layer OR operation unit is even, then: the judgment unit is also connected to the last bit of the data to be verified. For example Figure 4 as shown.
[0109] It can be understood that the embodiments described in the foregoing method part can all be implemented in the data verification circuit of the embodiment of the present application through corresponding wiring connection methods.
[0110] Based on the data verification circuit provided by the embodiment of the present application, through the connection of multi-layer AND gates and OR gates, continuous AND operations and OR operations are performed, and the finally obtained result will more intuitively reflect the quantity situation of the valid data in the data to be verified, so as to determine whether the data to be verified is the target data. And in the solution of the present application, each layer is based on the AND operation and OR operation performed simultaneously by the AND gate and the OR gate, and the generated time delay is small, which is also beneficial to be applied in large-scale and high-speed digital circuit designs.
[0111] To facilitate understanding of the solution of the embodiments of the present application, the following takes verifying whether the data to be verified is two-bit valid coding data as an example for illustration. Assume that the data to be verified is 8-bit data.
[0112] In the first grouping, there are two cases, that is, 2 valid bits are grouped together, as Figure 5 shown, the data to be verified is 00001100; 2 valid bits are not grouped together, as Figure 6 shown, the data to be verified is 00010100.
[0113] As Figure 5 shown, after performing the grouping AND / OR operations in the first layer, the obtained data group and the data group respectively form a OneHot data. Thereafter, continue the grouping operation to obtain the data group data group data group data group Finally, the result data
[0114] are 00010001 respectively, thus determining it as two-bit valid coding data.
[0115] As Figure 6 shown, first after the first-layer operation, the AND result data is all 0, or the data group formed by the OR result data is still 2-bit valid data. Continue grouping, and there will still be cases where 2 valid bits are grouped together and cases where two valid bits are not grouped together. Continue grouping, and finally the result data
[0116] are 00000011 respectively, thus determining it as two-bit valid coding data.
[0117] Based on the same inventive concept, an embodiment of the present application further provides a chip, which includes the aforementioned data verification circuit.
[0118] In the embodiments of the present application, the chip may be a processor chip such as a GPU (Graphics Processing Unit), a CPU (Central Processing Unit), an AI (Artificial Intelligence), an NPU (Neural network Processing Unit), an ISP (Image Signal Processor), a DPU (Display Processing Unit), a VPU (Video Processing Unit), a DSP (Digital Signal Processor), etc., or may be a memory chip such as a DRAM (Dynamic Random Access Memory), an SRAM (Static Random Access Memory), a Flash (Flash Memory), etc., or may also be a sensor chip or a power management chip, etc.
[0119] In the embodiments of the present application, an electronic device is further provided, which may include the aforementioned chip.
[0120] In the embodiments of the present application, the electronic device may be, but is not limited to, a device such as a board card, a motherboard, a communication module, etc. with a chip, which can be independently produced and used as a part of other large devices.
[0121] In the embodiments of the present application, an electronic device is further provided, which includes the aforementioned electronic device. The electronic device may be, but is not limited to, a terminal device, such as a smart phone, a smart wearable device, a computer, etc., or may also be a non-terminal device such as a server.
[0122] In the embodiments provided in the present application, it should be understood that the disclosed device and method can be implemented in other ways. The device embodiments described above are merely illustrative. Additionally, the shown or discussed couplings or direct couplings or communication connections between each other may be through some communication interfaces. The indirect couplings or communication connections of devices or units may be in electrical, mechanical, or other forms.
[0123] In this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.
[0124] In this article, "a plurality of" means two or more.
[0125] The above are only the embodiments of the present application and are not intended to limit the protection scope of the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.
Claims
1. A data verification circuit, characterized in that: include: multi-layer and operating units and multi-layer or operating units; The i-th AND gate in the first layer AND operation unit of the multi-layer AND operation unit is respectively connected to the 2i-1th bit and the 2i-th bit of the data to be verified; the i-th OR gate in the first layer operation unit of the multi-layer OR operation unit is respectively connected to the 2i-1th bit and the 2i-th bit of the data to be verified; the data to be verified has N bits in total, and i is an integer from 1 to N / 2; In the nth layer and operation unit of the multi-layer and operation unit, every 2 n-1 AND gates form a group; in the nth layer or operation unit of the multi-layer or operation unit, every 2 n-1 OR gates form a group; among them: The jth AND gate in the i-th group of the AND operation unit of the n+1th layer is respectively connected to the (j+1) / 2th AND gate in the 2i-1th group of the AND operation unit of the nth layer and the (j+1) / 2th AND gate in the 2i-group; the kth AND gate in the i-th group of the AND operation unit of the n+1th layer is respectively connected to the k / 2th OR gate in the 2i-1th group of the OR operation unit of the nth layer and the k / 2th OR gate in the 2i-group; The jth OR gate in the i-th group of the OR operation unit of the n+1th layer is respectively connected to the (j+1) / 2th AND gate in the 2i-1th group of the OR operation unit of the nth layer and the (j+1) / 2th AND gate in the 2i-group; the kth OR gate in the i-th group of the OR operation unit of the n+1th layer is respectively connected to the k / 2th OR gate in the 2i-1th group of the OR operation unit of the nth layer and the k / 2th OR gate in the 2i-group; wherein j is an odd number and k is an even number; A judgment unit, connected to each AND gate of the last layer of the AND operation unit of the multi-layer AND operation unit, and each OR gate of the last layer of the OR operation unit of the multi-layer OR operation unit; The judgment unit body is used to determine whether the data to be verified is target data according to the output value of the last layer and the operation unit and the output value of the last layer or the operation unit; the target data represents one-bit valid coded data or quasi-one-bit valid coded data.
2. The data verification circuit according to claim 1, characterized in that: The number of layers of the AND operation unit is equal to the value rounded down to the integer of log2(N+1); the number of layers of the OR operation unit is equal to the value rounded down to the integer of log2(N+1).
3. The data verification circuit according to claim 1, characterized in that: Each layer of the multi-layer AND operation unit and each AND gate of the operation unit are also connected to the judgment unit respectively; Each OR gate of each layer or operation unit of the multi-layer OR operation unit is also connected to the judgment unit respectively.
4. The data verification circuit as claimed in claim 3, characterized in that: The judging unit comprises a first comparator and a second comparator; Each AND gate of each layer of the multi-layer AND operation unit is respectively connected to the first comparator; Each OR gate of each layer or operation unit of the multi-layer OR operation unit is connected to the second comparator respectively.
5. The data verification circuit according to any one of claims 1 to 4, characterized in that: If N is an odd number, and the number of groups in the first layer and the operation unit is an odd number, and the number of groups in the first layer or the operation unit is an odd number, then: The first AND gate in the last group of the second-layer AND operation unit is respectively connected to the AND gate in the last group of the first-layer AND operation unit and the last bit of the data to be verified; The second AND gate in the last group of the second-layer AND operation unit is respectively connected to the OR gate in the last group of the first-layer OR operation unit and the last bit of the data to be verified.
6. The data verification circuit according to any one of claims 1 to 4, characterized in that: If N is an odd number, and the number of groups of each layer and operation unit and each layer or operation unit is even, then: The judgment unit is also connected to the last bit of the data to be verified.
7. A data verification method, characterized in that: include: When receiving the data to be verified, the 2i-1th bit and the 2ith bit of the data to be verified are taken as a group to obtain i groups of first-layer data groups to be operated; wherein the data to be verified has a total of N bits, and i is an integer between 1 and N / 2; Performing AND operations and OR operations on each group of first-layer data to be operated respectively, and obtaining AND result data and OR result data of each group of first-layer data to be operated; The AND result data of the first layer of data groups to be calculated in group 2a-1 and the AND result data of the first layer of data groups to be calculated in group 2a are taken as a group to obtain a group of second layer AND operation data groups; the OR result data of the first layer of data groups to be calculated in group 2a-1 and the OR result data of the first layer of data groups to be calculated in group 2a are taken as a group to obtain a group of second layer OR operation data groups; a is an integer from 1 to i / 2; Performing AND operations and OR operations on each group of second-level AND operation data groups, respectively, to obtain AND result data and OR result data of each group of second-level AND operation data groups; performing AND operations and OR operations on each group of second-level OR operation data groups, respectively, to obtain AND result data and OR result data of each group of second-level OR operation data groups; Repeat the above process, continuously group the 2b-1 group of the same data group and the AND result data of the 2b group into one group and perform AND operation and OR operation respectively, and group the 2b-1 group of the same data group and the OR result data of the 2b group into one group and perform AND operation and OR operation respectively, until the above process is performed for a first preset number of times; wherein b is an integer greater than or equal to 1 in turn; Determine whether the data to be verified is target data based on the AND result data and OR result data obtained last time; the target data represents one-bit valid coded data or quasi-one-bit valid coded data.
8. The data verification method according to claim 7, characterized in that: The first preset number is equal to the value rounded down to the integer of log2(N+1).
9. The data verification method according to claim 7 or 8, characterized in that: If N is an odd number, and the number of the first layer of data groups to be operated is also an odd number, then: When the AND result data of the first layer of data groups to be calculated in group 2a-1 and the AND result data of the first layer of data groups to be calculated in group 2a are taken as one group to obtain group a of second layer AND calculation data groups, the method further includes: The last group of AND result data of the first-layer data group to be operated and the last bit of the data to be verified are taken as a group to obtain the a+1th group of second-layer AND operation data group; When the OR result data of the first layer of data groups to be calculated in group 2a-1 and the OR result data of the first layer of data groups to be calculated in group 2a are taken as one group to obtain group a of second layer OR calculation data groups, the method further includes: The last group of OR result data of the first layer data group to be operated and the last bit of the data to be verified are taken as a group to obtain the a+1th group of second layer OR operation data group.
10. The data verification method according to claim 7 or 8, characterized in that: Determining whether the data to be verified is the target data according to the AND result data and OR result data obtained last time includes: When the last obtained AND result data meets the preset first type result value, and the last obtained OR result data meets the preset second type result value, the data to be verified is determined to be the target data.
11. The data verification method according to claim 7 or 8, characterized in that: Determining whether the data to be verified is the target data according to the AND result data and OR result data obtained last time includes: If each of the AND result data obtained after the second preset number of times meets the preset first-category result value, and the OR result data obtained last time meets the preset second-category result value, the data to be verified is determined to be the target data; The second preset number of times is smaller than the first preset number of times.
12. The data verification method according to claim 7 or 8, characterized in that: If the N is equal to 2 n +1, where n is a positive integer greater than or equal to 2, then: According to the AND result data and OR result data obtained last time and the last bit of the data to be verified, it is determined whether the data to be verified is the target data.
13. The data verification method according to claim 12, characterized in that: Determining whether the data to be verified is the target data according to the last obtained AND result data and OR result data and the last bit of the data to be verified, includes: When the last obtained AND result data meets the preset first type result value, and the last obtained OR result data plus the last bit of the data to be verified meets the preset second type result value, the data to be verified is determined to be the target data.
14. A chip, characterized in that: The method comprises a data verification circuit as described in any one of claims 1 to 6.
15. An electronic device, characterized in that: Comprising the chip as claimed in claim 14.
16. An electronic device, characterized in that: Comprising the electronic device as claimed in claim 15.
Citation Information
Patent Citations
Circuit device for judging whether more than one 1 exists in sequence numbers
CN102566962A
One-hot code detection method and one-hot code detector
CN104516820A
One-hot code detection circuit
CN105049056A
Method and system for verifying sequencer
CN113496106A
One-hot encoded instruction register for boundary scan test compliant devices
US20060069974A1