SDR microsystem integrated packaging structure based on IPD technology and manufacturing method

Abstract

The invention discloses an SDR microsystem integrated packaging structure based on an IPD technology and a manufacturing method, and relates to the technical field of microelectronic packaging, the SDR microsystem integrated packaging structure comprises an adapter plate, an integrated passive device, a radio frequency transceiver chip, a programmable logic circuit chip and other chips required by an SDR microsystem, and the integrated passive device can be stacked above the adapter plate in an inverted mounting or lead bonding manner or is embedded and integrated by digging a cavity in the adapter plate, the integrated passive device is manufactured in a manner of directly manufacturing the passive device by adopting an IPD technology or a manner of integrating acoustic filters such as SAW, BAW and the like by adopting the IPD technology, and the passive device required by the microsystem is obtained at one time through a jointed board design. A large number of passive devices are efficiently integrated, on one hand, the size of the SDR microsystem is reduced, on the other hand, interconnection delay of the devices and signal transmission mismatching are reduced, high-frequency, broadband and high-speed transmission of signals is achieved, power consumption of products is reduced, and system performance is improved.

Description

Technical Field

[0001] The present invention relates to an SDR microsystem integrated packaging structure and manufacturing method based on IPD technology, belonging to the field of microelectronic packaging technology. Background Art

[0002] With the development of advanced packaging technologies, integrating technologies such as three-dimensional heterogeneous integration and micro-nano processes can combine the technical advantages of continuing Moore's Law and extending Moore's Law to achieve miniaturized and high-density electronic packaging. To meet the requirements of miniaturization and intelligent applications in aerospace communication data links, software-defined radio (SDR) microsystems are developing towards high performance, multi-function, small size, and low cost. Among them, the large number and variety of passive devices lead to great system matching difficulty and large volume, which is difficult to achieve by a single integration method and requires further integration and miniaturization through new advanced packaging technologies. The existing integrated passive device (IPD) process uses semiconductor back-end processes to realize inductors, capacitors, and thin-film resistors, and further realizes devices with functions such as filtering, balun conversion, and impedance matching. Currently, there are already integration solutions related to microsystems.

[0003] Patent CN107359156 (Heterogeneous Integrated Silicon-Based Radio Frequency Microsystem Structure and Its Manufacturing Method) directly processes passive devices such as attenuators and filters on a silicon-based substrate to achieve heterogeneous integration, reducing the size of integrated passive devices, reducing parasitics, and improving signal transmission speed and stability.

[0004] Patent CN112234143 (On-Chip Integrated IPD Packaging Structure and Its Packaging Method, Three-Dimensional Packaging Structure) uses a silicon substrate as an integrated packaging substrate, integrates passive devices on the substrate, and adopts an integrated method of integrated manufacturing of the packaging substrate to complete the manufacturing of components and system integration in the same process flow, without the need for separate processing of components. The processing and integration are simple and easy to achieve 3D integration.

[0005] The above patents provide microsystem integration solutions based on silicon substrates. However, due to the process characteristics of IPD technology, only broadband filters can be realized, and narrowband devices with high filtering characteristics cannot be realized; the performance of planar devices is limited, and devices with high quality factors cannot be realized, and the frequency selection performance is poor; the insufficient longitudinal precision control accuracy of IPD technology leads to a certain processing error in the dielectric layer thickness of MIM capacitors, resulting in a large overall frequency offset of the device. For the case where complex passive devices are directly integrated on the adapter board, modifying the layout or iterating the process to correct the capacitor processing error increases the cost and takes a longer cycle; eddy current phenomena are likely to occur in the silicon substrate, resulting in poor signal integrity. Summary of the Invention

[0006] The technical problem to be solved by the present invention is: to overcome the deficiencies of the prior art and provide an IPD technology-based integrated packaging structure for SDR microsystems, realizing high-performance, multi-functional, small-size, and low-cost SDR microsystems.

[0007] The technical solution of the present invention is:

[0008] An IPD technology-based integrated packaging structure for SDR microsystems, comprising: an interposer, integrated passive devices, and functional chips;

[0009] The interposer uses a glass substrate, and the functional chips are integrated by interconnecting with the interposer through flip-chip or wire bonding; the integrated passive devices are installed on the interposer by flip-chip or wire bonding, or stacked and integrated above the interposer, or buried and integrated in a cavity dug inside the interposer.

[0010] The upper wiring layer of the interposer realizes the integration of inductors, capacitors, and resistors, and completes signal interconnection, filtering, and impedance matching between different functional chips in the X and Y directions; the lower wiring layer of the interposer realizes signal interconnection in the X and Y directions, and the vias of the interposer realize signal interconnection in the Z direction.

[0011] Further, the functional chips include programmable logic circuit chips, analog-to-digital conversion chips, radio frequency transceiver chips, digital-to-analog conversion chips, processing chips, and storage chips.

[0012] Further, the types of integrated passive devices include resistors, capacitors, filters, power dividers, couplers, baluns, and impedance matching.

[0013] Further, the integrated passive devices are directly fabricated using IPD technology, and the filters can also be fabricated by integrating SAW and BAW acoustic filters using IPD technology.

[0014] Further, the integrated passive devices are fabricated in a panel manufacturing method to obtain various passive devices required for the microsystem at one time.

[0015] Further, a cavity is dug inside the interposer for burying chips, the upper wiring layer is fabricated on the upper part of the interposer, and inductors, capacitors, resistors, and RDL are all located in the upper wiring layer; a resistor thin film layer is fabricated on the upper part of the upper wiring layer to obtain a resistor, an inductor is fabricated through the metal layer of the upper wiring layer, a capacitor is fabricated through the metal layer and silicon nitride thin film layer of the upper wiring layer, and RDL is fabricated through the metal layer of the upper wiring layer.

[0016] Further, the lower wiring is fabricated on the lower part of the interposer to realize signal interconnection in the X and Y directions, and bumps are fabricated on the lower surface of the lower wiring for assembling the IPD technology-based integrated packaging structure of the SDR microsystem on a PCB or a packaging case.

[0017] Furthermore, the integrated passive device uses glass as the substrate, and the manufacturing method is specifically as follows:

[0018] 1) Clean the glass wafer;

[0019] 2) Dig cavities at specific positions;

[0020] 3) Embed SAW and BAW acoustic filters into the cavities;

[0021] 4) Fabricate a resistive film through a sputtering process;

[0022] 5) Perform photolithography and etching, pattern electroplate Cu, and fabricate the first layer of metal, metal 1, as the lower capacitor plate, inductor connection line, and lead-out line for SAW and BAW filters;

[0023] 6) Grow a silicon nitride film, leaving the dielectric layer of the capacitor;

[0024] 7) Fabricate the dielectric layer P1 and perform window opening;

[0025] 8) Perform photolithography and etching, pattern electroplate Cu, and fabricate the second layer of metal, metal 2, to form the upper capacitor plate and the inductor-shaped winding;

[0026] 9) Fabricate the dielectric layer P2 and perform window opening;

[0027] 10) Fabricate the UBM through sputtering and electroplating processes and fabricate bumps through a ball mounting process;

[0028] 11) Assemble the carrier wafer through a temporary bonding process, and then thin the glass wafer through a thinning process;

[0029] 12) Remove the carrier wafer through a debonding process and separate the integrated passive device through a dicing process.

[0030] In a second aspect, the present invention also proposes a manufacturing method for an SDR microsystem integrated packaging structure based on IPD technology, including the following steps:

[0031] 1) Prepare a glass wafer for fabricating the interposer;

[0032] 2) Etch the glass via area through a laser-induced etching process and dig cavities at preset positions;

[0033] 3) Realize the metal Cu filling of the glass vias through physical vapor deposition and electroplating processes;

[0034] 4) Embed the integrated passive device into the cavity;

[0035] 5) Fabricate the upper wiring layer through sputtering and electroplating processes, including inductors, capacitors, resistive devices, and RDL therein;

[0036] 6) Assemble the chip with prefabricated micro-bumps onto the glass wafer of the interposer through the flip-chip bonding process;

[0037] 7) Assemble the upload wafer through the temporary bonding process;

[0038] 8) Thin the glass wafer of the interposer through the thinning process;

[0039] 9) Fabricate the lower-layer wiring through the sputtering and electroplating processes, and fabricate the bumps through the ball-planting process;

[0040] 10) Remove the carrier wafer through the debonding process, and separate the SDR microsystem integrated package structure through the dicing process.

[0041] Furthermore, the integrated passive devices can also be installed on the interposer through the flip-chip or wire bonding method, or integrated through the three-dimensional stacking method above the interposer.

[0042] The beneficial effects of the present invention compared with the prior art are as follows:

[0043] (1) The present invention uses a glass substrate as the main material, which has excellent product reliability compared with materials such as silicon substrates, is suitable for high-frequency applications, and realizes better electrical performance.

[0044] (2) The present invention directly completes the interconnection in the XY direction between chips on the interposer through the IPD technology and realizes filtering, impedance matching, etc., simplifies the integration, and at the same time shortens the interconnection distance, with better performance.

[0045] (3) There are many types of passive devices in the SDR microsystem of the present invention. It is impossible to directly process all the passive devices that meet the requirements on the interposer at one time while integrating the system. For complex-function IPD devices, a separate design method is adopted, which has strong flexibility and better product versatility. At the same time, panel manufacturing is selected to obtain the passive devices required for the microsystem at one time. The same batch of wafers has good consistency, and the performance is better after integration. At the same time, the capacitance processing error can be considered, and the design with a capacitance deviation of ±5% is manufactured in the same batch of panel layout, with a short product iteration cycle and low cost.

[0046] (4) The three-dimensional stacking of the passive devices in the present invention and then integration can make the volume of the microsystem product smaller.

[0047] (5) The integrated passive devices in the present invention are directly fabricated using the IPD technology. Among them, the filter can also be integrated with SAW and BAW acoustic filters through the IPD technology, which can improve the frequency selection performance of the SDR microsystem and enhance the anti-interference characteristics of the SDR microsystem. Description of the Drawings

[0048] Figure 1Top view of the SDR microsystem integrated packaging structure based on IPD technology of the present invention;

[0049] Figure 2 Longitudinal schematic diagram of the SDR microsystem integrated packaging structure based on IPD technology of the present invention;

[0050] Figure 3 Flowchart of the processing method of the SDR microsystem integrated packaging structure based on IPD technology of the present invention;

[0051] Figure 4 Flowchart of the processing method of the integrated passive device of the present invention. Specific embodiments

[0052] The following further describes in detail the specific embodiments of the present invention with reference to the accompanying drawings.

[0053] It is composed of chips required for the SDR microsystem such as an interposer, an integrated passive device, a radio frequency transceiver chip, and a programmable logic circuit chip. All devices are integrated by interconnecting with the interposer in a flip-chip or wire bonding manner. The interposer is made of glass material, and the interconnection in the XY direction between chips is completed, as well as filtering, impedance matching, etc. are realized. The integrated passive device is directly fabricated using IPD technology, and the filter can also be integrated with SAW and BAW acoustic filters by IPD technology.

[0054] As Figure 1 、 2 shown, it is a kind of SDR microsystem integrated packaging structure based on IPD technology of the present invention, that is, the basic form of the present invention, including: an interposer 1, an integrated passive device 3, and a functional chip;

[0055] The interposer 1 uses a glass substrate, and the functional chips are integrated by interconnecting with the interposer in a flip-chip or wire bonding manner; the integrated passive device 3 is mounted on the interposer by a flip-chip or wire bonding method, or stacked and integrated above the interposer, or buried and integrated in a cavity dug inside the interposer;

[0056] The upper wiring layer 11 of the interposer 1 realizes the integration of inductors 14, capacitors 15, and resistors 16, and completes the signal interconnection, filtering, and impedance matching in the X and Y directions between different functional chips; the lower wiring layer 12 of the interposer 1 realizes the signal interconnection in the X and Y directions, and the vias 13 of the interposer 1 realize the signal interconnection in the Z direction.

[0057] A cavity 9 is dug inside the interposer 1 for embedding chips. An upper wiring layer 11 is fabricated on the upper part of the interposer 1. The inductor 14, capacitor 15, resistor 16, and RDL 18 are all located in the upper wiring layer 11. The resistor 16 is obtained by fabricating a resistor thin film layer on the upper part of the upper wiring layer 11. The inductor 14 is fabricated through the metal layer of the upper wiring layer 11. The capacitor 15 is fabricated through the metal layer of the upper wiring layer 11 and a silicon nitride thin film layer. The RDL 18 is fabricated through the metal layer of the upper wiring layer 11.

[0058] A lower wiring layer 12 is fabricated on the lower part of the interposer 1 to achieve signal interconnection in the X and Y directions. Bumps 17 are fabricated on the lower surface of the lower wiring layer 12 for assembling the SDR microsystem integrated packaging structure on a PCB or a packaging case.

[0059] The functional chips include a programmable logic circuit chip 2, an analog-to-digital conversion chip 4, a radio frequency transceiver chip 5, a digital-to-analog conversion chip 6, a processing chip 7, and a storage chip 8.

[0060] The types of integrated passive devices 3 include resistors, capacitors, filters, power dividers, couplers, baluns, and impedance matching.

[0061] The integrated passive devices 3 are directly fabricated using IPD technology. Among them, the filter can also be integrated with SAW and BAW acoustic filters through IPD technology.

[0062] The integrated passive devices 3 are fabricated in a panel manufacturing method to obtain various passive devices required for the microsystem at one time.

[0063] Embodiment 1:

[0064] This embodiment presents the structural composition of the SDR microsystem integrated packaging structure. The interposer 1 selects a glass substrate, which has excellent reliability compared to products made of materials such as silicon substrates, is suitable for high-frequency applications, and achieves better electrical performance. The interposer 1 includes an upper wiring layer 11, a lower wiring layer 12, and through vias (TGV) 13 dug in the interposer 1.

[0065] In this embodiment, an upper wiring layer 11 is fabricated on the upper part of the interposer 1. The upper wiring layer 11 includes an inductor 14, a capacitor 15, a resistor 16, and an RDL 18 (redistribution layer 18). The specific settings are as follows: A cavity 9 is dug at a predetermined position of the interposer 1 for burying chips. A resistor thin film layer is fabricated on the upper part of the upper wiring layer 11 to obtain the resistor 16. The inductor 14 is fabricated through the metal layer of the upper wiring layer 11. The capacitor 15 is fabricated through the metal layer and silicon nitride thin film layer of the upper wiring layer 11. The RDL 18 is fabricated through the metal layer of the upper wiring layer 11, completing signal interconnection in the X and Y directions between different chips and realizing functions such as filtering and impedance matching. In this way, some passive devices are directly fabricated on the interposer, simplifying the integration process and reducing costs. The chips with micro-bumps already fabricated are assembled above the upper wiring layer 11 through the flip-chip bonding process.

[0066] A lower wiring layer 12 is fabricated on the lower part of the interposer 1, which can realize signal interconnection in the X and Y directions. Bumps 17 are fabricated below the lower wiring layer 12 for assembly on a PCB or a package case. The through-vias (TGVs) 13 of the interposer 1 can realize signal interconnection in the Z direction.

[0067] The SDR microsystem has a variety of passive devices. Passive devices with simple functions can be directly fabricated on the interposer through the above implementation scheme. For IPD devices with complex functions or special performances, a separate design and panel manufacturing method is adopted to obtain the passive devices required for the microsystem at one time (designs with a capacitance deviation of ±5% are panel-fabricated in the same batch, and appropriate products are selected according to performance tests later), which can reduce costs. At the same time, due to the good consistency of wafers in the same batch, the integrated SDR microsystem has a high signal matching degree, lower transmission loss, and better performance.

[0068] In this embodiment, in order to reduce the volume of passive devices, the passive devices can be three-dimensionally stacked and integrated to obtain a stacked integrated passive device 10, or the passive devices can be buried in the cavity 9 by digging cavities in the interposer 1, and later the signals are interconnected with other devices through the upper wiring 11 of the interposer 1.

[0069] Embodiment 2:

[0070] Combined with Figure 3 , introduce the manufacturing method of the integrated packaging structure of the SDR microsystem based on the IPD technology.

[0071] 1) Prepare a glass wafer for fabricating the interposer 1.

[0072] 2) Etch the glass through-via (TGV) 13 area by laser-induced etching process and dig a cavity 9 at a specific position.

[0073] 3) The metal Cu filling of the through-glass via (TGV) 13 is achieved by physical vapor deposition and electroplating processes.

[0074] 4) The integrated passive device 3 is buried in the cavity 9.

[0075] 5) The upper layer wiring 11 is fabricated by processes such as sputtering and electroplating, including the inductor 14, capacitor 15, resistor device 16, and RDL 18 in the upper layer wiring 11.

[0076] 6) The chip with micro-bumps already fabricated is assembled onto the glass wafer of the interposer 1 through the flip-chip bonding process.

[0077] 7) The carrier wafer is assembled through the temporary bonding process.

[0078] 8) The glass wafer of the interposer 1 is thinned through the thinning process.

[0079] 9) The lower layer wiring 12 is fabricated by sputtering and electroplating processes, and the bumps 17 are fabricated through the ball mounting process.

[0080] 10) The carrier wafer is removed through the debonding process, and the SDR microsystem integration packaging structure is separated through the dicing process.

[0081] Example 3:

[0082] Combined with Figure 4 , a manufacturing method of integrated passive devices with glass as the substrate is introduced.

[0083] 1) Clean the glass wafer.

[0084] 2) Dig a cavity at a specific position.

[0085] 3) Burry the SAW and BAW filters in the cavity.

[0086] 4) Fabricate the resistance thin film by sputtering process.

[0087] 5) Lithograph and etch, pattern electroplate Cu, and fabricate the first layer of metal (metal 1), which serves as the lower electrode of the capacitor, the connecting wire of the inductor, and the lead-out wire of the SAW and BAW filters.

[0088] 6) Grow the silicon nitride thin film, leaving the dielectric layer of the capacitor.

[0089] 7) Fabricate the dielectric layer P1 and perform window opening.

[0090] 8) Lithograph and etch, pattern electroplate Cu, and fabricate the second layer of metal (metal 2) to form the upper electrode of the capacitor and the inductor-shaped winding.

[0091] 9) Fabricate the dielectric layer P2 and perform window opening.

[0092] 10) The UBM (Under Bump Metallization, a key process in semiconductor packaging technology, referring to the metallization layer under the chip bump) is fabricated through sputtering and electroplating processes, and the bumps are fabricated through the ball mounting process.

[0093] 11) The upload wafer is assembled through the temporary bonding process, and then the glass wafer is thinned through the thinning process.

[0094] 12) The carrier wafer is removed through the debonding process, and the integrated passive device is separated through the dicing process.

[0095] The parts not detailed in the present invention belong to the common general knowledge of those skilled in the art.

Claims

1. An SDR microsystem integrated packaging structure based on IPD technology, characterized in that include: An adapter board (1), an integrated passive device (3) and a functional chip; The adapter board (1) uses a glass substrate, and the functional chip is integrated by interconnecting with the adapter board through flip-chip or wire bonding; the integrated passive device (3) is mounted on the adapter board through flip-chip or wire bonding, or is stacked and integrated on the adapter board, or is buried and integrated in a cavity inside the adapter board; The upper wiring layer (11) of the adapter board (1) realizes the integration of inductors (14), capacitors (15), and resistors (16), and completes signal interconnection, filtering, and impedance matching between chips with different functions in the X and Y directions; the lower wiring layer (12) of the adapter board (1) realizes signal interconnection in the X and Y directions, and the through hole (13) of the adapter board (1) realizes signal interconnection in the Z direction.

2. The SDR microsystem integrated packaging structure based on IPD technology according to claim 1, characterized in that: The functional chip comprises a programmable logic circuit chip (2), an analog / digital conversion chip (4), a radio frequency transceiver chip (5), a digital / analog conversion chip (6), a processing chip (7), and a storage chip (8).

3. The SDR microsystem integrated packaging structure based on IPD technology according to claim 1, characterized in that: Integrated passive devices (3) types include resistors, capacitors, filters, power dividers, couplers, baluns, and impedance matching.

4. The SDR microsystem integrated packaging structure based on IPD technology according to claim 3, characterized in that: The integrated passive device (3) is directly manufactured using the IPD technology, wherein the filter can also be manufactured by integrating SAW and BAW acoustic filters through the IPD technology.

5. The SDR microsystem integrated packaging structure based on IPD technology according to claim 1, characterized in that: A cavity (9) is dug out inside the adapter board (1) for embedding a chip, an upper wiring layer (11) is fabricated on the upper part of the adapter board (1), and an inductor (14), a capacitor (15), a resistor (16), and an RDL (18) are all located in the upper wiring layer (11); a resistor film layer is fabricated on the upper part of the upper wiring layer (11) to obtain a resistor (16), an inductor (14) is fabricated through the metal layer of the upper wiring layer (11), a capacitor (15) is fabricated through the metal layer and a silicon nitride film layer of the upper wiring layer (11), and an RDL (18) is fabricated through the metal layer of the upper wiring layer (11).

6. The SDR microsystem integrated packaging structure based on IPD technology according to claim 1, characterized in that: A lower layer wiring (12) is made at the bottom of the adapter board (1) to realize signal interconnection in the X and Y directions, and bumps (17) are made on the lower surface of the lower layer wiring (12) to be used for assembling the SDR microsystem integrated packaging structure on a PCB or a packaging tube shell.

7. The SDR microsystem integrated packaging structure based on IPD technology according to any one of claims 1 to 6, characterized in that: The integrated passive device uses glass as a substrate, and the manufacturing method is specifically as follows: 1) Cleaning glass wafers; 2) Digging a cavity at a specific location; 3) burying SAW and BAW acoustic filters in the cavity; 4) Making resistor thin film by sputtering process; 5) Photolithography and etching, patterning and electroplating Cu to make the first layer of metal 1, which serves as the lower plate of the capacitor, the connecting wire of the inductor, and the lead wire of the SAW and BAW filters; 6) Grow a silicon nitride film, leaving a dielectric layer for the capacitor; 7) Making a dielectric layer P1 and opening windows; 8) Photolithography and etching, patterning and electroplating Cu, making the second layer of metal 2, forming the upper plate of the capacitor and the winding of the inductor shape; 9) Making a dielectric layer P2 and opening windows; 10) Fabricate UBM by sputtering and electroplating process, and fabricate bumps by ball planting process; 11) Assembling the carrier wafer through a temporary bonding process, and then thinning the glass wafer through a thinning process; 12) Remove the upper carrier wafer through the debonding process, and separate the integrated passive devices through the dicing process.

8. A method for manufacturing an SDR microsystem integrated packaging structure based on IPD technology as claimed in any one of claims 1 to 7, characterized in that include: 1) Prepare the glass wafer for making the adapter plate; 2) etching the through-glass hole (13) region by laser-induced etching to dig a cavity (9) at a preset position; 3) Filling the through-glass hole (13) with metal Cu by physical vapor deposition and electroplating process; 4) embedding the integrated passive device (3) into the cavity (9); 5) manufacturing an upper wiring layer (11) including an inductor (14), a capacitor (15), a resistor (16) and an RDL (18) therein by sputtering and electroplating processes; 6) Assembling the chip with micro-bumps fabricated thereon onto the glass wafer of the adapter plate (1) through a flip-chip bonding process; 7) Assembling the carrier wafer through a temporary bonding process; 8) Thinning the glass wafer of the adapter plate (1) by a thinning process; 9) forming lower layer wiring (12) by sputtering and electroplating process, and forming bumps (17) by ball planting process; 10) The carrier wafer is removed through a debonding process, and the SDR microsystem integrated packaging structure is separated through a dicing process.

9. The manufacturing method according to claim 8, characterized in that: The integrated passive device (3) can also be mounted on the adapter board by flip-chip or wire bonding, or integrated by three-dimensional stacking on the adapter board.

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