Numerical control attenuator, cascade attenuator and multi-stage attenuator system

Abstract

The invention provides a numerical control attenuator, a cascade attenuator and a multi-stage attenuator system, and relates to the technical field of attenuators. The numerical control attenuator comprises a first field effect transistor, a second field effect transistor, a third field effect transistor, a first isolation resistor, a second isolation resistor, a third isolation resistor, at least one first attenuation resistor and an equalization unit, the at least one first attenuation resistor and the equalization unit are connected in series between the drain electrode of the first field effect transistor and the drain electrode of the third field effect transistor. According to the invention, the attenuator with a pi-shaped structure is improved, the equalization unit is introduced in an attenuation state, and along with the increase of frequency, the attenuation change is small, the insertion loss is small, and the attenuation precision is high.

Description

Technical Field

[0001] The present invention relates to the technical field of antennas, and in particular, to a numerically controlled attenuator, a cascaded attenuator, and a multi-stage attenuator system. Background Art

[0002] A numerically controlled attenuator is an important component in a radio frequency transceiver module, mainly used for adjusting the system signal amplitude, improving impedance matching, and implementing automatic gain control. At the same time, the use of a numerical control method to switch the attenuation amount improves the flexibility of the system. In modern antenna systems, an attenuator with high precision and low insertion loss is required to enable the system to have precise gain control capabilities, so that the system signal amplitude can be precisely adjusted.

[0003] In the prior art, large-bit attenuators usually adopt a π-type or switch-line type structure, both of which cannot ensure high precision and low insertion loss at the same time, restricting the development of antennas. Summary of the Invention

[0004] Embodiments of the present invention provide a numerically controlled attenuator, a cascaded attenuator, and a multi-stage attenuator system to solve the problem in the prior art that there is a lack of an attenuator with high precision and low insertion loss.

[0005] In a first aspect, an embodiment of the present invention provides a numerically controlled attenuator, including: a first field effect transistor, a second field effect transistor, a third field effect transistor, a first isolation resistor, a second isolation resistor, a third isolation resistor, at least one first attenuation resistor, and an equalization unit;

[0006] The gate of the first field effect transistor is connected to the first end of the first isolation resistor, the drain of the first field effect transistor is connected to the drain of the second field effect transistor to form a radio frequency input end, and the source of the first field effect transistor is grounded;

[0007] The gate of the third field effect transistor is connected to the first end of the third isolation resistor, the drain of the third field effect transistor is connected to the source of the second field effect transistor to form a radio frequency output end, and the source of the third field effect transistor is grounded;

[0008] The gate of the second field effect transistor is connected to the first end of the second isolation resistor;

[0009] The second end of the first isolation resistor and the second end of the third isolation resistor are used for inputting a common-mode voltage, and the second end of the second isolation resistor is used for inputting a differential-mode voltage;

[0010] The at least one first attenuation resistor and the equalization unit are connected in series between the drain of the first field effect transistor and the drain of the third field effect transistor.

[0011] Optionally, the equalization unit includes: an equalization resistor and an equalization inductor;

[0012] The equalizing resistor is connected in parallel with the equalizing inductor between the first end and the second end of the equalizing unit.

[0013] Optionally, the number of the first attenuation resistors is two;

[0014] The first end of the equalizing unit is connected to the drain of the first field effect transistor through the first first attenuation resistor, and the second end of the equalizing unit is connected to the drain of the third field effect transistor through the second first attenuation resistor.

[0015] Optionally, the resistance values of the two first attenuation resistors are the same.

[0016] Optionally, the digital controlled attenuator further includes: two second attenuation resistors;

[0017] The source of the first field effect transistor is grounded through the first second attenuation resistor, and the source of the third field effect transistor is grounded through the second second attenuation resistor.

[0018] Optionally, the resistance values of the two second attenuation resistors are the same.

[0019] Optionally, the value range of the attenuation amount of the digital controlled attenuator is 0 dB to 16 dB.

[0020] Optionally, the resistance values of the first isolation resistor, the second isolation resistor and the third isolation resistor are the same and are all greater than 1.5 kΩ.

[0021] In a second aspect, an embodiment of the present invention provides a cascaded attenuator, including: at least two digital controlled attenuators provided in the first aspect of the embodiment of the present invention;

[0022] The digital controlled attenuators are cascaded in sequence.

[0023] In a third aspect, an embodiment of the present invention further provides a multi-stage attenuator system, including: a 2 dB digital controlled attenuator, a 0.5 dB digital controlled attenuator, an 8 dB digital controlled attenuator, a 1 dB digital controlled attenuator, a 16 dB digital controlled attenuator and a 4 dB digital controlled attenuator cascaded in sequence;

[0024] The 0.5 dB digital controlled attenuator and the 1 dB digital controlled attenuator are of a T-shaped structure;

[0025] The 2 dB digital controlled attenuator and the 4 dB digital controlled attenuator are of a π-shaped structure;

[0026] The 8 dB digital controlled attenuator is the digital controlled attenuator provided in the first aspect of the embodiment of the present invention;

[0027] The 16 dB digital controlled attenuator is formed by cascading two 8 dB digital controlled attenuators provided in the first aspect of the embodiment of the present invention.

[0028] An embodiment of the present invention provides a numerically controlled attenuator, a cascaded attenuator, and a multi-stage attenuator system. The above-mentioned numerically controlled attenuator includes: a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, a first isolation resistor, a second isolation resistor, a third isolation resistor, at least one first attenuation resistor, and an equalization unit; the gate of the first field-effect transistor is connected to the first end of the first isolation resistor, the drain of the first field-effect transistor is connected to the drain of the second field-effect transistor to form a radio frequency input end, and the source of the first field-effect transistor is grounded; the gate of the third field-effect transistor is connected to the first end of the third isolation resistor, the drain of the third field-effect transistor is connected to the source of the second field-effect transistor to form a radio frequency output end, and the source of the third field-effect transistor is grounded; the gate of the second field-effect transistor is connected to the first end of the second isolation resistor; the second ends of the first isolation resistor and the third isolation resistor are used to input a common-mode voltage, and the second end of the second isolation resistor is used to input a differential-mode voltage; the at least one first attenuation resistor and the equalization unit are connected in series between the drain of the first field-effect transistor and the drain of the third field-effect transistor. The embodiment of the present invention improves on the traditional π-type, adds an equalization unit, and when the frequency increases, the attenuation amount changes less, which not only improves the accuracy of the attenuator but also does not increase the insertion loss of the attenuator. Description of the Drawings

[0029] Figure 1 is a schematic structural diagram of a numerically controlled attenuator provided by an embodiment of the present invention;

[0030] Figure 2 is a schematic structural diagram of another numerically controlled attenuator provided by an embodiment of the present invention;

[0031] Figure 3 is Figure 2 a comparison diagram of the attenuation amounts of the 8dB numerically controlled attenuator shown and the prior art π-type 8dB attenuator;

[0032] Figure 4 is a schematic structural diagram of a two-stage cascaded attenuator provided by an embodiment of the present invention;

[0033] Figure 5 is Figure 4 a comparison diagram of the attenuation amounts of the 16dB numerically controlled attenuator shown and the prior art π-type 16dB attenuator;

[0034] Figure 6 is a schematic structural diagram of a six-stage attenuator system provided by an embodiment of the present invention;

[0035] Figure 7 is Figure 6 the chip layout of the six-stage attenuator system shown;

[0036] Figure 8 is Figure 6 the attenuation additional phase shift diagram of the six - stage attenuator shown;

[0037] Figure 9 is Figure 6 the comparison diagram of the attenuation RMS accuracy between the six - stage attenuator shown and the six - stage attenuator in the prior art. Detailed implementation manners

[0038] In order to enable those skilled in the art to better understand this solution, the technical solutions in the embodiments of this solution will be clearly described below in conjunction with the accompanying drawings in the embodiments of this solution. Obviously, the described embodiments are part of the embodiments of this solution, rather than all of the embodiments. Based on the embodiments in this solution, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the scope of protection of this solution.

[0039] The term "including" in the description and claims of this solution and the above - mentioned accompanying drawings, as well as any other variations, means "including but not limited to", intending to cover non - exclusive inclusion, and is not limited only to the examples listed in the text. In addition, terms such as "first" and "second" are used to distinguish different objects, rather than to describe a specific order.

[0040] The implementation of the present invention will be described in detail below with reference to specific accompanying drawings:

[0041] Figure 1 is a schematic structural diagram of a numerically controlled attenuator provided by an embodiment of the present invention. Referring to Figure 1 , the numerically controlled attenuator includes: a first field - effect transistor M 1 , a second field - effect transistor M 2 , a third field - effect transistor M 3 , a first isolation resistor R g1 , a second isolation resistor R g2 , a third isolation resistor R g3 , at least one first attenuation resistor R 1 and an equalization unit 10;

[0042] The gate of the first field - effect transistor M 1 is connected to the first end of the first isolation resistor R g1 , the drain of the first field - effect transistor M 1 is connected to the drain of the second field - effect transistor M 2 to form a radio - frequency input terminal RF in , and the source of the first field - effect transistor M 1 is grounded;

[0043] The gate of the third field - effect transistor M 3 is connected to the third isolation resistor Rg3 is connected to the first end, and the third field effect transistor M 3 has its drain connected to the source of the second field effect transistor M 2 to form a radio frequency output terminal RF out , and the source of the third field effect transistor M 3 is grounded;

[0044] The gate of the second field effect transistor M 2 is connected to the first end of the second isolation resistor R g2 ;

[0045] The second end of the first isolation resistor R g1 and the second end of the third isolation resistor R g3 are used to input the common-mode voltage Vp, and the second end of the second isolation resistor R g2 is used to input the differential-mode voltage V N ;

[0046] At least one first attenuation resistor R 1 is connected in series with the equalization unit 10 between the drain of the first field effect transistor M 1 and the drain of the third field effect transistor M 3 .

[0047] Refer to Figure 1 , when the common-mode voltage Vp is at a high level, the first field effect transistor M 1 and the third field effect transistor M 3 are turned on, in the attenuation state; when the differential-mode voltage V N is at a high level, it is in the zero state. In the embodiment of the present invention, the equalization unit 10 is provided on the basis of the π-type structure, and the zero-state structure remains unchanged, without increasing the zero-state loss. The equalization unit 10 is in the attenuation state and compensates when the frequency increases. The attenuation amount changes little within the frequency range, improving the accuracy of the attenuator without increasing the insertion loss of the attenuator. When applied to the T / R module of the antenna system, it can effectively improve the performance of the antenna system.

[0048] Among them, each field effect transistor can be GaAs PHEMT, GaN PHEMT, etc.

[0049] In a possible implementation manner, refer to Figure 1 , the equalization unit 10 may include: an equalization resistor R 3 and an equalization inductor L 1 ;

[0050] The equalization resistor R 3 is connected in parallel with the equalization inductor L 1 between the first end and the second end of the equalization unit 10.

[0051] In the embodiment of the present invention, the equalization inductor L 1The reactance element is used to equalize the attenuation accuracy and match the absorption port energy with the equalizing resistor R 3 to control the equalizing effect.

[0052] In a possible implementation manner, the number of the first attenuation resistors R 1 can be two;

[0053] The first end of the equalizing unit 10 is connected to the drain of the first field effect transistor M 1 through the first first attenuation resistor R, and the second end of the equalizing unit 10 is connected to the drain of the third field effect transistor M 1 through the second first attenuation resistor R. 1 3 3 To maintain the circuit balance, two first attenuation resistors R

[0054] are arranged on both sides of the equalizing unit 10 in the embodiment of the present invention as the resistors of the attenuation network to control the attenuation amount. 1 In a possible implementation manner, the resistance values of the two first attenuation resistors R

[0055] 1 can be the same.

[0056] Furthermore, the same resistance values of the two first attenuation resistors R 1 further make the circuit structure balanced. 1

[0057] In a possible implementation manner, referring to Figure 2 , the digital controlled attenuator may further include: two second attenuation resistors R 2 ;

[0058] The source of the first field effect transistor M 1 is grounded through the first second attenuation resistor R, and the source of the third field effect transistor M 2 3 is grounded through the second second attenuation resistor R. 2 2 In a possible implementation manner, the resistance values of the two second attenuation resistors R

[0059] 2 can be the same.

[0060] In the embodiment of the present invention, the second attenuation resistor R 1 can be arranged at the sources of the first field effect transistor M and the third field effect transistor M 3 3 2 2 1 1 2 2 2 2 The two first attenuation resistors R and the two second attenuation resistors R jointly control the attenuation amount. Among them, the resistance values of the two second attenuation resistors R

[0061] In a possible implementation, the attenuation value range of the numerically controlled attenuator can be from 0 dB to 16 dB.

[0062] In the embodiment of the present invention, an improvement is made on the basis of the π-type attenuator, and the attenuation value range of the numerically controlled attenuator is from 0 dB to 16 dB;

[0063] For example, for an 8 dB attenuator, if the π-type structure is adopted, the insertion loss is small, but the attenuation accuracy is poor; if the switch-line type structure is adopted, the attenuation accuracy is high, but due to the use of more switching tubes, the insertion loss is large and the size is large. By adopting the structure of the embodiment of the present invention to form an 8 dB attenuator, the accuracy is high and the insertion loss is small, which can meet the actual application requirements.

[0064] It should be noted that when it is greater than 16 dB, the attenuation accuracy of the attenuator provided by the embodiment of the present invention is reduced, and it is not suitable to select the attenuator with the above structure anymore.

[0065] In a possible implementation, the first isolation resistor R g1 , the second isolation resistor R g2 and the third isolation resistor R g3 have the same resistance value, and are all greater than 1.5 kΩ.

[0066] Each isolation resistor is used to isolate DC signals, so a relatively large resistance value can be selected to ensure the isolation effect.

[0067] Adopting Figure 2 the shown circuit structure to form an 8 dB attenuator, and comparing it with the traditional 8 dB attenuator, it can be seen from Figure 3 that Figure 2 the 8 dB attenuator formed by the shown structure has stable attenuation in the whole frequency range, changes little with the frequency, and has high attenuation accuracy.

[0068] Corresponding to the above embodiment, the embodiment of the present invention also provides a cascaded attenuator, including: at least two numerically controlled attenuators as provided in the above embodiment;

[0069] Each numerically controlled attenuator is cascaded in sequence.

[0070] For the numerically controlled attenuator in the above embodiment, the accuracy is limited when applied to a high attenuation amount. Based on this, in the embodiment of the present invention, a multi-stage cascaded manner can be selected to obtain an attenuator with a high attenuation amount.

[0071] For example, for 16 dB, if the π-type structure is adopted, the insertion loss of the attenuator is small but the attenuation accuracy is insufficient; if the switch-type structure is adopted, the attenuation accuracy is better but the insertion loss is large and the volume is large; if the structure of the numerically controlled attenuator provided by the embodiment of the present invention is adopted, at 16 dB, the volume is small, the insertion loss is small, but the attenuation accuracy is reduced.

[0072] Based on this, referring to Figure 4 , two 8dB digitally controlled attenuators can be formed using the structure provided in the embodiments of the present invention, and then the two 8dB digitally controlled attenuators are cascaded to obtain a 16dB attenuator, which not only ensures low loss and small size, but also can ensure the attenuation accuracy. Comparing it with the traditional 16dB attenuator, from Figure 5 , it can be seen that the two-stage 16dB attenuator in the embodiments of the present invention has stable attenuation in the entire frequency range, small variation with frequency, high attenuation accuracy, and a simple circuit structure and small size.

[0073] Furthermore, corresponding to the above embodiments, the embodiments of the present invention also provide a multi-stage attenuator system, referring to Figure 6 , including: a 2dB digitally controlled attenuator, a 0.5dB digitally controlled attenuator, an 8dB digitally controlled attenuator, a 1dB digitally controlled attenuator, a 16dB digitally controlled attenuator, and a 4dB digitally controlled attenuator cascaded in sequence;

[0074] The 0.5dB digitally controlled attenuator and the 1dB digitally controlled attenuator are of T-type structure;

[0075] The 2dB digitally controlled attenuator and the 4dB digitally controlled attenuator are of π-type structure;

[0076] The 8dB digitally controlled attenuator is the digitally controlled attenuator provided in the embodiments of the present invention;

[0077] The 16dB digitally controlled attenuator is formed by cascading two 8dB digitally controlled attenuators provided in the embodiments of the present invention.

[0078] In the embodiments of the present invention, a six-stage attenuator system is also provided. For 0.5dB and 1dB, the T-type structure is adopted, which has a simple circuit structure and small volume while ensuring high precision and low insertion loss; for 2dB and 4dB, the π-type structure can be adopted, which also has a simple circuit structure and small volume while ensuring high precision and low insertion loss; for 8dB and 16dB, the T-type structure and the π-type structure cannot ensure high precision and low insertion loss, so the structure provided in the embodiments of the present invention can be used to form an 8dB attenuator, and at the same time, two 8dB attenuators are cascaded to form a 16dB attenuator, ensuring high precision and low insertion loss, and the circuit structure is also relatively simple and the size is small.

[0079] Corresponding to Figure 6 , Table 1 gives the correspondence table between the control logic and the working state of the GaAs six-stage digitally controlled attenuator of the present invention. Among them, V 1 , V 2 , V 3 , V 4 , V 5 , V 6 , V 7 , V 8, V 9 , V 10 is the control level, where "0V" represents the high level and "-5V" represents the low level.

[0080] Table 1 Correspondence Table between Control Logic and Working States

[0081] State <![CDATA[V 1 > <![CDATA[V 2 > <![CDATA[V 3 > <![CDATA[V 4 > <![CDATA[V 5 > <![CDATA[V 6 > <![CDATA[V 7 > <![CDATA[V 8 > <![CDATA[V 9 > <![CDATA[V 10 > Reference state -5V -5 V -5V 0V -5V 0V -5V 0V -5V 0V 0.5 dB 0V -5V -5V 0V -5V 0V -5V 0V -5V 0V 1 dB -5V 0V -5V 0V -5V 0V -5V 0V -5V 0V 2 dB -5V -5V 0V -5V -5V 0V -5V 0V -5V 0V 4 dB -5V -5V -5V 0V 0V -5V -5V 0V -5V 0V 8 dB -5V -5V -5V 0V -5V 0V 0V -5V -5V 0V 16 dB -5V -5V -5V 0V -5V 0V -5V 0V 0V -5V 31.5 dB 0V 0V 0V -5V 0V -5V 0V -5V 0V -5V

[0082] For example, for the 2dB state, V 3 is at the high level and the 2dB digitally controlled attenuator is in the attenuation state; V 6 , V 8 , V 10 are all at the high level, and the 4dB, 8dB, and 16dB digitally controlled attenuators are all in the zero state. V 1 and V 2 are both at the low level, and the 0.5dB and 1dB digitally controlled attenuators are also both in the zero state. Thus, the total attenuation is 2dB.

[0083] Reference Figure 6 , in the embodiment of the present invention, six attenuators are integrated on one chip, and each attenuator leads out a control line respectively. When providing control voltages to these control lines according to the truth table of the attenuator (Table 1), the attenuation amount of a certain bit can be increased or removed, so as to realize the attenuation function with a minimum step of 0.5dB in the range of 0 to 31.5dB.

[0084] For Figure 6 the six-stage attenuator system shown, in the layout design, electromagnetic compatibility issues can be considered. Add isolation bands formed by multiple groups of cascaded common-ground vias to achieve electromagnetic space isolation and prevent signal crosstalk. At the same time, reduce the crossing of microwave transmission lines and DC transmission lines and add filter capacitors on the DC transmission lines to reduce the crosstalk coupling of external signals to the internal circuit. Further, in the layout, first connect the RF transmission path, then connect the DC path, and finally make full use of the flexibility of the control terminal signals to layout the layout to achieve the control of the attenuator, significantly improving the layout efficiency. Exemplarily, refer to Figure 7 the layout shown.

[0085] Based on Figure 6 and Figure 7, the above six - stage attenuator system can be manufactured by using GaAs PHEMT microwave monolithic integrated circuit process technology. The main process steps of GaAs process are: mesa isolation, ohmic contact, gate trenching and metallization, device passivation, metal lift - off, air - bridge preparation, back - side chemical thinning, via process, etc. GaAs process is mature, the manufacturing process is simple, the chip size is small, and the performance of the manufactured chip is stable. The chip size is only 2.00mm×1.00mm×0.07mm. It should be noted that the above circuit can also use other semiconductor processes such as GaN.

[0086] The attenuator system chip obtained by manufacturing is tested in the frequency range of 2GHz to 18GHz. The test results are as follows: in the operating frequency band of 2GHz to 18GHz, the insertion loss of this chip is less than 5.1dB, the attenuation RMS error is less than 0.4dB (reference Figure 9 ), and the additional phase shift of attenuation is within ±4° (reference Figure 8 ). It can be seen from this that the attenuation system provided by the embodiment of the present invention has a small size, high attenuation accuracy, and small insertion loss, and has broad application prospects in the T / R components of modern antenna systems.

[0087] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A digitally controlled attenuator, characterized in that: include: A first field effect transistor, a second field effect transistor, a third field effect transistor, a first isolation resistor, a second isolation resistor, a third isolation resistor, at least one first attenuation resistor and a balancing unit; The gate of the first field effect transistor is connected to the first end of the first isolation resistor, the drain of the first field effect transistor is connected to the drain of the second field effect transistor to form a radio frequency input end, and the source of the first field effect transistor is grounded; The gate of the third field effect tube is connected to the first end of the third isolation resistor, the drain of the third field effect tube is connected to the source of the second field effect tube to form a radio frequency output end, and the source of the third field effect tube is grounded; The gate of the second field effect transistor is connected to the first end of the second isolation resistor; The second end of the first isolation resistor and the second end of the third isolation resistor are used to input a same-direction terminal voltage, and the second end of the second isolation resistor is used to input a reverse terminal voltage; The at least one first attenuation resistor is connected in series with the balancing unit between the drain of the first field effect transistor and the drain of the third field effect transistor.

2. The digitally controlled attenuator according to claim 1, characterized in that: The balancing unit includes: a balancing resistor and a balancing inductor; The balancing resistor and the balancing inductor are connected in parallel between the first end and the second end of the balancing unit.

3. The digitally controlled attenuator according to claim 2, characterized in that: The number of the first attenuation resistors is two; The first end of the equalizing unit is connected to the drain of the first field effect transistor through a first first attenuation resistor, and the second end of the equalizing unit is connected to the drain of the third field effect transistor through a second first attenuation resistor.

4. The digitally controlled attenuator according to claim 3, characterized in that: The two first attenuation resistors have the same resistance value.

5. The digitally controlled attenuator according to claim 3, characterized in that: The digital controlled attenuator further comprises: two second attenuation resistors; The source of the first field effect transistor is grounded through a first second attenuation resistor, and the source of the third field effect transistor is grounded through a second second attenuation resistor.

6. The digitally controlled attenuator according to claim 5, characterized in that: The two second attenuation resistors have the same resistance value.

7. The digitally controlled attenuator according to any one of claims 1 to 6, characterized in that: The attenuation value of the digital controlled attenuator ranges from 0dB to 16dB.

8. The digitally controlled attenuator according to any one of claims 1 to 6, characterized in that: The first isolation resistor, the second isolation resistor and the third isolation resistor have the same resistance value, and are all greater than 1.5 kΩ.

9. A cascade attenuator, characterized in that: include: At least two digitally controlled attenuators according to any one of claims 1 to 8; The digitally controlled attenuators are cascaded sequentially.

10. A multi-stage attenuator system, characterized in that: include: Sequentially cascaded 2dB digital attenuator, 0.5dB digital attenuator, 8dB digital attenuator, 1dB digital attenuator, 16dB digital attenuator and 4dB digital attenuator; The 0.5dB digitally controlled attenuator and the 1dB digitally controlled attenuator are T-shaped structures; The 2dB digitally controlled attenuator and the 4dB digitally controlled attenuator are of π-type structure; The 8dB digitally controlled attenuator is the digitally controlled attenuator according to any one of claims 1 to 8; The 16 dB digitally controlled attenuator is formed by cascading two 8 dB digitally controlled attenuators according to any one of claims 1 to 8.

Images