Multi-channel narrowband data link integrated processing module

Abstract

The present invention relates to the fields of communication technology and navigation systems, and discloses a multi-channel narrowband data link integrated processing module, comprising: a radio frequency transceiver module, comprising a radio frequency transceiver for converting received radio frequency signals into baseband signals and vice versa; an analog channelization module, connected to the radio frequency transceiver module, for receiving the converted baseband signals from the radio frequency transceiver module and performing preliminary channel division on the signals, dividing the signals into multiple frequency bands; and a digital channelization processing module, connected to the analog channelization module, for digitizing the analog channelized signals. By employing a zero intermediate frequency (IF) architecture, a multi-stage channelization design, FPGA and SOC collaboration, precise clock synchronization, and anti-interference technology, the present invention improves the accuracy of multi-channel signal processing and system stability, while reducing power consumption and hardware complexity.

Description

Technical Field

[0001] The present invention relates to the field of communication technology and navigation system technology, in particular to a multi-channel narrowband data link integrated processing module. Background Art

[0002] With technological advancements, especially the widespread use of communications and navigation systems, modern society is increasingly demanding high-precision, high-speed data transmission. Industries such as aviation, aerospace, military, and transportation rely on efficient communications and precise positioning systems. These systems often need to process multiple signal channels simultaneously and cope with complex environmental interference.

[0003] Existing technologies typically process RF signals using a superheterodyne receiver architecture. This architecture's advantages lie in its ability to process signals across multiple frequency bands and mitigate the impact of high-frequency signals through frequency conversion techniques. Furthermore, existing signal processing modules often utilize traditional discrete module designs, independently processing receive and transmit signals. These technologies effectively perform signal reception and spectrum analysis, while also providing a degree of anti-interference capability.

[0004] However, the existing technology has some shortcomings; first, the superheterodyne architecture has a spectrum mirroring problem when processing complex signals, which leads to a decrease in the quality of the received signal; second, most existing technologies use multiple independent modules for signal processing, which not only increases the complexity of the system, but also brings higher power consumption and larger volume; in addition, when multiple signals are concurrent, the accuracy of clock synchronization and phase synchronization of the existing technology cannot meet the requirements of efficient and stable operation, especially in high-noise or complex environments, and the existing anti-interference methods cannot effectively suppress multipath effects and noise interference, resulting in reduced positioning accuracy and limited system reliability. Summary of the Invention

[0005] In view of the deficiencies of the prior art, the present invention provides a multi-channel narrowband data link integrated processing module, which solves the problems of multi-channel signal processing, insufficient synchronization accuracy and weak anti-interference ability in the prior art.

[0006] To achieve the above objectives, the present invention is implemented through the following technical solutions: a multi-channel narrowband data link integrated processing module, comprising:

[0007] A radio frequency transceiver module, comprising a radio frequency transceiver for converting received radio frequency signals into baseband signals and converting baseband signals into radio frequency signals;

[0008] The analog channelization module is connected to the RF transceiver module, and is used to receive the baseband signal converted by the RF transceiver module and perform preliminary channel division on the signal, dividing the signal into multiple frequency band signals.

[0009] The digital channelization processing module is connected to the analog channelization module and is used to digitally process the analog channelized signal, further decompose the signal into multiple sub-channels, and reduce the processing complexity through filtering and extraction.

[0010] The signal processing module is connected to the digital channelization processing module and is used to perform demodulation, despreading and decoding processing on each sub-channel signal to extract communication data.

[0011] The multi-channel synchronization module is connected to the RF transceiver module, the analog channelization module, and the digital channelization processing module to ensure clock synchronization and signal phase consistency among all modules.

[0012] The navigation processing module is connected to the signal processing module and is used to receive satellite navigation signals and provide positioning and timing functions.

[0013] The information processing module is connected to the signal processing module and the navigation processing module, and is used to fuse the received communication information and navigation information, provide comprehensive data output, and exchange data with external systems.

[0014] Preferably, the radio frequency transceiver includes:

[0015] 4 receive and 4 transmit positions 4T4R;

[0016] configured to convert a radio frequency signal into an I / Q baseband signal by quadrature mixing;

[0017] The system is configured to convert baseband signals to and from radio frequency signals through analog-to-digital conversion and digital-to-analog conversion.

[0018] Preferably, the analog channelization module includes:

[0019] a signal power splitter configured to split the received radio frequency signal into multiple frequency band signals;

[0020] an amplifier configured to amplify the gain of the signal in each frequency band;

[0021] a filter configured to selectively extract a signal from each frequency band;

[0022] The channel selection unit is configured to allocate signals to different sub-channels according to different frequency bands.

[0023] Preferably, the digital channelization processing module includes:

[0024] a digital downconverter configured to downconvert the signal to baseband by frequency mixing;

[0025] a digital filter configured to low-pass filter each channel signal;

[0026] The decimation module is configured to reduce the sampling rate of the signal to reduce the complexity of subsequent processing.

[0027] Preferably, the signal processing module includes:

[0028] A demodulation unit configured to perform demodulation processing on an input modulated signal;

[0029] a despreading module configured to despread the spread spectrum signal;

[0030] A decoding module configured to decode the received coded signal and restore the original data;

[0031] The frequency hopping control unit is configured to perform frequency hopping processing on the signal.

[0032] Preferably, the information processing module includes:

[0033] A dual-core ARM processor configured to perform information processing tasks;

[0034] a data fusion unit configured to fuse the communication data and the navigation data and output the integrated data;

[0035] The high-speed interface management unit is configured to manage an external data interface.

[0036] Preferably, the multi-channel synchronization module includes:

[0037] a reference clock synchronization unit configured to synchronize clocks of a plurality of radio frequency modules;

[0038] A JESD204B interface control unit configured to synchronize data from multiple channels;

[0039] a local oscillator synchronization module configured to ensure that the local oscillators of the radio frequency transceivers are phase-aligned;

[0040] The reference clock management unit is configured to provide a unified clock signal for the entire system.

[0041] Preferably, the navigation processing module includes:

[0042] a satellite navigation chip configured to receive and decode satellite navigation signals;

[0043] A positioning and timing unit configured to provide high-precision positioning and timing functions;

[0044] An anti-interference module is configured to enhance the robustness of signal reception.

[0045] Preferably, the RF transceiver module, analog channelization module, digital channelization processing module, signal processing module and information processing module are all integrated into a 6UVPX module, and the module size is 160mm×233.35mm×25.4mm, 5HP width.

[0046] The present invention also provides a signal processing method for a multi-channel narrowband data link integrated processing module, comprising the following steps:

[0047] Receives RF signals and converts them into baseband signals through RF transceivers;

[0048] Divide the signal into multiple sub-channels through analog channelization and digital channelization modules;

[0049] Use FPGA processing modules to demodulate, despread and decode each channel signal;

[0050] Use information processing modules for data fusion and information output;

[0051] The navigation processing module is used to decode, locate and time the satellite navigation signals, providing high-precision positioning and time synchronization information.

[0052] The present invention provides a multi-channel narrowband data link integrated processing module. It has the following beneficial effects:

[0053] 1. Through a zero-IF architecture and multi-stage channelization design, this invention improves signal quality and reception accuracy. Compared with traditional superheterodyne reception technology, this invention greatly simplifies the hardware structure, reduces system complexity, and mitigates the impact of spectral images, thereby improving signal restoration sensitivity.

[0054] 2. This invention combines the collaborative work of FPGA and SOC to improve the system's real-time performance and processing efficiency. Unlike traditional solutions with a single processing unit, this architecture improves the data throughput and response speed of the entire system through parallel computing and information fusion, ensuring stable operation in high-speed data link environments.

[0055] 3. Through a high-precision multi-channel synchronization mechanism, this invention solves the problem of timing discrepancies between multiple signal channels. Using reference clock synchronization, JESD204B interface control, and local oscillator synchronization modules, it ensures signal phase consistency and clock synchronization, avoiding data loss and distortion caused by synchronization errors.

[0056] 4. In terms of anti-interference performance, the present invention enhances the system's robustness in complex environments through multi-layer signal processing and interference cancellation technology. Through efficient filtering and multipath interference suppression, the present invention can effectively cope with high-noise environments and ensure the stable transmission of navigation and communication signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1 It is a system structure diagram of the present invention;

[0058] Figure 2 Flow chart of the method of the present invention. DETAILED DESCRIPTION

[0059] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the specification of the present invention. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0060] Please see the attached Figure 1 , an embodiment of the present invention provides a multi-channel narrowband data link integrated processing module, comprising:

[0061] The RF transceiver module includes an RF transceiver for converting received RF signals into baseband signals and converting baseband signals into RF signals;

[0062] The RF transceiver module is responsible for receiving RF signals, converting them into baseband signals, and then converting the baseband signals back into RF signals. To achieve efficient, low-noise, and broadband reception and transmission, this module utilizes a variety of advanced signal processing technologies, including quadrature mixing, analog-to-digital conversion, and digital-to-analog conversion. The integration of these technologies significantly improves signal processing accuracy and efficiency.

[0063] In this embodiment, the RF transceiver module converts the received RF signal through the RF transceiver and transmits the signal to the subsequent signal processing unit through the RF transceiver. The RF transceiver uses orthogonal mixing technology to convert the received RF signal into an I / Q baseband signal. During the transmission process, the RF transceiver converts the baseband signal into an RF signal through a digital-to-analog converter (DAC) and then transmits it through the RF transceiver.

[0064] Typically, RF transceiver modules need to support the parallel reception and transmission of multiple signal channels. The signal from each channel is distributed through a power splitter, amplified by a low-noise amplifier (LNA), and selectively extracted through a filter. After processing, the received signal is fed into a subsequent digital channelization module for precise signal separation and processing.

[0065] During the signal reception process, the RF transceiver converts the input RF signal S RF(t) is converted into a baseband signal through orthogonal mixing technology. Specifically, the received RF signal is mixed with two orthogonal carrier signals to obtain I signal and Q signal respectively. The formula for this process is expressed as:

[0066] S I / Q (t) = S RF (t)1·cos(ω c t)+jS RF (t)·sin(ω c t);

[0067] Where: S RF (t)1 is the received RF signal; ω c is the carrier frequency; S I / Q (t) is the converted I / Q baseband signal; j is the imaginary unit.

[0068] The core function of this step is to convert high-frequency signals into low-frequency baseband signals, making subsequent digital signal processing simpler and more efficient.

[0069] In practical applications, RF transceivers are used according to different carrier frequencies (ω c ) splits the RF signal into two orthogonal signal paths (I and Q) and performs signal filtering and gain control. The digitized I / Q signals are then transmitted to downstream signal processing units (such as digital channelization modules) via the ADC.

[0070] During the signal transmission process, the baseband signal S BB (t) is converted into a radio frequency signal through a digital-to-analog converter (DAC). The specific transmission process includes steps such as digital-to-analog conversion and frequency up-conversion. The transmitted radio frequency signal can be expressed as:

[0071]

[0072] Where: S BB (t) is the baseband signal; S RF (t)2 is the transmitted radio frequency signal; ω c is the carrier frequency.

[0073] According to this formula, the baseband signal S BB (t) It is modulated onto the carrier frequency at the transmitter and converted into a radio frequency signal S suitable for wireless transmission. RF (t)2.

[0074] At the receiving end of the RF transceiver module, the received signal is divided by the signal power divider. The power divider divides the input RF signal S RF(t) is divided into multiple signal frequency bands, which are then passed to filters and amplifiers. Signal amplifiers primarily increase the signal amplitude to ensure that the signal strength meets the requirements of subsequent processing. During the amplification process, low-noise amplifiers (LNAs) primarily suppress noise and prevent the loss of important signal characteristics during the amplification process.

[0075] The power splitter divides the RF signal into multiple frequency bands, which are then filtered to further remove noise. Each frequency band undergoes gain amplification and fine filtering to ensure signal quality. Finally, these processed signals are fed into the subsequent digital channelization processing module.

[0076] The RF transceiver module contains multiple important components that work together to ensure stable reception and transmission of RF signals.

[0077] Signal power splitter: The signal power splitter divides the input RF signal S RF (t)2 is divided into multiple signal frequency bands. Each frequency band signal will pass through a specific filter and amplifier during processing before entering the subsequent processing module.

[0078] Low-noise amplifier (LNA): A low-noise amplifier (LNA) is used to enhance signal strength and minimize noise. During signal reception, the LNA amplifies the input signal to a certain level so that the signal quality is maintained during subsequent processing.

[0079] Filter: Filters are used in RF transceiver modules to selectively extract the effective frequency band of the signal, remove high-frequency noise, and ensure signal quality for subsequent digital processing.

[0080] The design of the RF transceiver module ensures the system can operate stably in high-frequency environments. The signal conversion and processing technology within each module is designed to ensure stable and efficient signal transmission, especially in multi-channel narrowband data link applications.

[0081] In multi-channel systems, RF transceiver modules support multiple receive and transmit channels, enabling simultaneous signal reception and transmission across multiple frequency bands, significantly improving the system's signal processing capabilities. Furthermore, the module's integrated design eliminates the need for external equipment for both signal reception and transmission, reducing system size and cost.

[0082] In one possible implementation, the RF transceiver module can be integrated with other signal processing units. For example, multiple signal channels within the RF transceiver module can be processed in parallel by an FPGA, enabling real-time processing of multi-channel signals. Through efficient parallel computing, the FPGA can quickly switch between receiving and transmitting signals, further improving system response speed.

[0083] The RF transceiver module ensures smooth signal switching and efficient transmission between different frequency bands through efficient RF signal conversion and processing. The module design not only improves signal quality but also optimizes the performance of multi-channel signal processing.

[0084] The analog channelization module is connected to the RF transceiver module, and is used to receive the baseband signal converted by the RF transceiver module and perform preliminary channel division on the signal, dividing the signal into multiple frequency band signals;

[0085] The analog channelization module is responsible for the initial processing, segmentation, and enhancement of received broadband signals. Through proper signal distribution and optimization, the analog channelization module provides high-quality signals for the subsequent digital channelization module. To achieve more efficient signal processing, the module design takes into account signal bandwidth requirements, filtering accuracy, and amplification needs.

[0086] The first step of the analog channelization module is to perform signal power splitting on the received RF signal. The received RF signal is divided into multiple sub-channels by the signal power splitter. These sub-channel signals will undergo different processing, including gain amplification and filtering. After each frequency band signal passes through the power splitter, it is distributed into multiple independent signals. Assume that the input signal S RF (t) is a broadband RF signal, which is represented in the frequency domain as S RF (f), where f is the frequency variable. The signal is divided into multiple frequency bands by the power divider, and each frequency band will be assigned to a different sub-channel.

[0087] For the i-th subchannel, the frequency domain representation of the signal can be written as:

[0088]

[0089] Where: S RF (f) is the representation of the input signal in the frequency domain; H i (f) is the filter response function associated with the i-th subchannel, which defines the bandwidth range of the frequency band; N is the total number of subchannels.

[0090] This expression describes the division of the RF signal by the power divider and the filter, where the signal of each subchannel corresponds to a frequency band in the frequency domain and the signal is evenly distributed.

[0091] In the filtering phase, filters are used to selectively extract the valid signal components of each channel. After the signal passes through the filter, unnecessary frequency components and noise are removed, improving the signal quality of each frequency band. The filter bandwidth needs to be set according to the requirements of the target frequency band to ensure that the signal bandwidth is not affected.

[0092] After the signal has been split and filtered, it needs to be amplified by an amplifier to ensure that the signal strength is sufficient to meet the needs of subsequent processing. The function of the signal amplifier is to increase the amplitude of the signal and minimize the signal noise during the amplification process. Specifically, the signal It will be amplified after passing through the amplifier, and the expression is:

[0093]

[0094] in: is the i-th signal after amplification; G is the gain coefficient; is the i-th signal obtained after the signal is split.

[0095] The gain factor G is usually a constant that controls the signal gain of each channel. The amplified signal provides a signal input of sufficient strength for subsequent channelization and digital processing.

[0096] After power splitting, filtering, and amplification, each frequency band signal still needs to be distributed by the channel selection unit. The channel selection unit's task is to divide each signal into different frequency bands and assign them to the appropriate processing channel. This step is critical to ensuring that each frequency band signal is processed correctly.

[0097] The channel selection unit allocates signals based on the bandwidth requirements of each frequency band, allowing each band to operate independently. Typically, the channel selection unit adjusts to the different requirements of the frequency band to ensure efficient and accurate signal processing.

[0098] The analog channelization module in this embodiment is composed of multiple core components, as follows:

[0099] Signal power splitter: This component divides the RF signal S RF (t) Distributed into multiple channel signals Ensures that the processing of each channel signal is evenly distributed.

[0100] Filter: The filter is responsible for removing invalid frequency components in the signal to ensure that the quality of each channel signal is not affected by high-frequency noise.

[0101] Amplifier: The amplifier is used to amplify the signal in each frequency band to ensure that the signal strength meets the requirements of subsequent processing.

[0102] Channel selection unit: The channel selection unit allocates signals to appropriate sub-channels according to frequency band requirements, so that each signal can be processed independently to avoid interference between signals.

[0103] Alternatively, the signal splitters and filters in the analog channelization module can be dynamically adjusted based on specific needs. For example, the signal splitter distribution can be flexibly configured based on the system load requirements to achieve optimal signal processing. The filter bandwidth can also be adjusted based on the actual frequency band of the input signal to adapt to different signal environments.

[0104] In one possible implementation, the analog channelization module can work closely with the digital channelization module to form a hybrid channelization structure. Building on the analog channelization module, the digital channelization module further processes the signal by performing signal downscaling, decimation, and filtering, thus completing the entire signal processing flow.

[0105] The analog channelization module effectively divides the received broadband RF signal into multiple sub-channel signals through the collaboration of signal power splitters, amplifiers, filters and channel selection units. It can efficiently process multiple signal frequency bands in parallel, ensuring that each signal channel can work independently and effectively, and provide high-quality signal input for the subsequent digital channelization module.

[0106] The digital channelization processing module is connected to the analog channelization module and is used to digitize the analog channelized signal, further decompose the signal into multiple sub-channels, and reduce the processing complexity through filtering and extraction;

[0107] The primary purpose of the digital channelization processing module is to further process the signals transmitted from the analog channelization module. Specifically, it performs operations such as down-conversion, filtering, and decimation. These steps not only reduce signal processing complexity but also enhance the system's processing capabilities and flexibility. The digital channelization processing module effectively improves the signal-to-noise ratio, enhances the system's anti-interference capabilities, and optimizes signal bandwidth and latency.

[0108] In this embodiment, the key components of the digital channelization module include a digital downconverter (DDC), a digital filter, and a decimation module. Each component is designed to improve overall performance and reduce computational burden, enabling the module to efficiently process signals from the analog channelization module. The DDC downconverts high-frequency signals to baseband frequency, the digital filter removes ineffective frequency bands from the signal, and the decimation module reduces the signal sampling rate, reducing system power consumption and processing complexity.

[0109] The digital downconverter (DDC) is a key component in the digital channelization processing module. Its primary function is to convert received high-frequency signals to baseband. It converts high-frequency signals into low-frequency signals through frequency mixing, enabling more efficient subsequent processing.

[0110] Specifically, the digital down converter uses the same frequency as the carrier frequency ω c The corresponding sine wave signal is mixed, so that the received signal S amplified (t) Converts a high-frequency signal to a low-frequency baseband signal. The mathematical expression of the down-conversion process is as follows:

[0111] S DDC (t) = S amplified (t)·cos(ω c t)+jS amplified (t)·sin(ω c t);

[0112] Where: S DDC (t) is the baseband signal after down-conversion; S amplified (t) is the signal after amplification and filtering; ω c is the carrier frequency; j is the imaginary unit.

[0113] This process converts the signal from the RF band to the baseband band, ensuring that subsequent signal processing will not be affected by the frequency band expansion, making signal processing more efficient.

[0114] Digital filters are an integral part of the digital channelization module, primarily used to remove high-frequency noise from the signal while retaining the effective low-frequency signal. The design of digital filters is crucial to the overall system performance, especially when processing broadband signals. The filters ensure that unwanted frequency components in the signal are effectively suppressed.

[0115] In the digital channelization process, the digital filter mainly filters the down-converted signal by low-pass filtering. The filter transfer function can be expressed as follows:

[0116]

[0117] Where: H(f) is the transfer function of the filter; f is the frequency of the input signal; f c is the cutoff frequency of the filter.

[0118] The filter is designed so that the signal above the cutoff frequency f c The noise is filtered out and only the low-frequency components are retained, ensuring that the signal quality is not unnecessarily affected.

[0119] The decimation module is the most important part of the digital channelization module. Its main function is to reduce the sampling rate, thereby reducing the computational complexity of subsequent processing. By reducing the sampling frequency of the signal, the decimation module can effectively reduce system resource usage and improve signal processing efficiency.

[0120] Specifically, the decimation operation reduces the computational complexity of signal processing by reducing the number of sampling points. The decimated signal is represented as:

[0121] S extracted (t) = S DDC (mT);

[0122] Where: S extracted (t) is the signal after extraction; S DDC (t) is the signal after digital down-conversion; T is the sampling period; m is the index of the sampling point.

[0123] In this way, the extraction module reduces the amount of data and reduces the burden of signal processing, while still retaining the effective information of the signal, ensuring that the subsequent processing flow can run efficiently.

[0124] In the digital channelization module, the signal first receives a filtered and amplified signal from the analog channelization module. The digital channelization module first converts the signal from the high-frequency band to the baseband band using a digital downconverter. Next, the signal passes through a digital filter to remove high-frequency noise and retain the valid signal. Finally, the decimation module reduces the signal's sampling rate, reducing the complexity of subsequent processing.

[0125] This series of steps ensures that the signal is efficiently processed within the digital channelization module and is ready for subsequent digital processing tasks such as signal demodulation and despreading.

[0126] Alternatively, in the digital channelization module, the digital filter type and decimation factor can be dynamically adjusted based on specific system requirements. For example, the digital filter can employ different filtering algorithms (FIR) depending on the characteristics of the input signal. Furthermore, the decimation factor of the decimation module can be adjusted based on the signal bandwidth and subsequent processing capabilities.

[0127] Specifically, the carrier frequency ω of the digital downconverter c It can automatically adjust according to different signal frequency bands. In some applications, the digital down converter can dynamically select different carrier frequencies based on the frequencies of signals in different frequency bands to meet the system's processing requirements for multiple signal frequency bands.

[0128] In one possible implementation, the digital channelization module can work in conjunction with other modules to form a multi-level channelization structure. In this structure, multiple digital channelization modules can work in parallel to process different signal channels, thereby improving signal processing throughput and efficiency.

[0129] The digital channelization module successfully converts the signal from a broadband signal into a format suitable for further digital processing through multiple steps, including digital down-conversion, digital filtering, and decimation. While ensuring signal quality, the digital channelization module also significantly reduces computational complexity and improves processing efficiency.

[0130] a signal processing module connected to the digital channelization processing module and configured to perform demodulation, despreading and decoding processing on each sub-channel signal to extract communication data;

[0131] The signal processing module not only handles basic signal processing tasks such as demodulation, despreading, and decoding, but also undertakes the critical tasks of frequency hopping control and real-time processing. The FPGA, with its powerful parallel computing capabilities, enables efficient real-time processing of multi-channel signals. The implementation of this module not only increases the system's processing speed but also significantly enhances signal interference immunity and processing accuracy.

[0132] In this embodiment, the signal processing module consists of multiple submodules, including a demodulation module, a despreading module, a decoding module, and a frequency hopping control module. Each module operates in parallel within the FPGA, processing the signal stream in real time. The demodulation module converts the received modulated signal into a baseband signal; the despreading module processes the spread spectrum signal; the decoding module decodes the received coded signal; and the frequency hopping control module ensures that the signal hops at the predetermined frequency to avoid interference.

[0133] The demodulation module is a core component of the signal processing module, responsible for extracting the original data from the received modulated signal. The basic idea of the demodulation process is to recover the signal's amplitude or phase, thereby determining the transmitted digital information. The demodulation algorithm may vary for different modulation schemes (such as QPSK and MSK).

[0134] In the case of QPSK modulation, the demodulation process mainly extracts data by judging the phase of the signal. Given the received signal S received (t), demodulated baseband signal S demod (t) can be expressed as a phase demodulation form: S demod (t) = arg(S received (t));

[0135] Where: S received (t) is the received modulation signal; arg(S received (t)) is the phase information of the signal; S demod (t) is the demodulated baseband signal.

[0136] This formula recovers the transmitted data by extracting the phase of the received signal. The details and formulas of the demodulation process may vary for different modulation methods, but the core idea is the same: recovering the amplitude or phase of the signal.

[0137] The despreading module is responsible for despreading the spread spectrum signal. A spread spectrum signal uses a specific spreading code to expand the original signal, thereby occupying a larger bandwidth in the frequency domain. The despreading module's task is to restore the signal to its original bandwidth by performing a correlation operation with the known spreading code, removing the redundant spectrum generated by the spread spectrum.

[0138] For the spread spectrum signal S demod (t), the despreading process is carried out by the spreading code C code The multiplication operation of (t) restores the original signal. This process can be expressed as the following formula:

[0139] S de-spread (t) = S demod (t)·C code (t);

[0140] Where: S de-spread (t) is the despread signal; S demod (t) is the demodulated signal; C code (t) is the spreading code.

[0141] The despreading module restores the original spectrum of the signal by multiplying it with the spreading code, removes the redundant part of the frequency band, and thus returns the frequency band of the signal to the appropriate bandwidth.

[0142] The decoding module converts the despread signal back into the original data. The signal is typically encoded at the transmitter, and the decoding module performs the reverse operation to restore the received encoded signal to the original data. Common decoding methods include convolutional decoding and turbo decoding.

[0143] Specifically, the decoding module will receive the signal S de-spread (t) Perform the corresponding decoding operation to convert it into the original data stream. The decoded data D decoded It can be expressed as:

[0144] D decoded =decode(S de-spread (t));

[0145] Where: D decoded is the original data after decoding; S de-spread (t) is the despread signal; decode(·) represents the decoding operation.

[0146] The decoding module uses an efficient decoding algorithm to restore the encoded signal to the original data, ensuring the correct transmission of information during the communication process.

[0147] The frequency hopping control module performs frequency hopping on the signal to avoid interference caused by static frequencies. Frequency hopping is a common anti-interference technology that ensures signal transmission quality by rapidly switching between multiple frequencies. In multi-band communications, the frequency hopping control module ensures signal stability through real-time frequency adjustment.

[0148] Given the frequency hopping control signal ω hop , the signal after frequency hopping can be expressed by the following formula:

[0149] S hopping (t) = S demod (t)·cos(ω hop t);

[0150] Where: S hopping (t) is the signal after frequency hopping; S demod (t) is the demodulated signal; ω hop is the frequency hopping frequency; t is the time variable, which represents the evolution of the signal in time and reflects the change of the signal over time.

[0151] The frequency hopping control module avoids spectrum interference by adjusting the frequency hopping frequency, improves the system's anti-interference ability, and ensures stable signal transmission.

[0152] The workflow of the signal processing module is as follows: First, the demodulation module demodulates the received signal to restore the amplitude or phase of the signal; then, the signal is processed by the despreading module to remove the redundant spectrum generated by the spread spectrum; then, the decoding module decodes the signal and restores it to the original data; finally, the frequency hopping control module performs frequency hopping on the signal to ensure stable signal transmission.

[0153] Each module runs through parallel computing. The parallel processing capability of FPGA ensures the high efficiency of signal processing and meets the needs of high-speed signal processing.

[0154] Alternatively, within the signal processing module, the demodulation, despreading, and decoding modules can be designed to be customized based on specific communication standards. For example, the demodulation and decoding algorithms can be optimized to suit different modulation and coding schemes to meet specific system requirements. Furthermore, hardware acceleration units within the FPGA can accelerate demodulation and despreading operations, reducing computational latency.

[0155] Specifically, in some embodiments, the frequency hopping control module can dynamically adjust the frequency hopping strategy according to changes in the actual communication environment. When the channel conditions are poor, the system can increase the frequency hopping frequency to reduce interference.

[0156] In one possible implementation, the signal processing module can also work in conjunction with other hardware modules (such as a CPU or DSP) to achieve fast data transmission through a high-speed interface (such as LVDS or SERDES), further improving the processing capability of the system.

[0157] The signal processing module achieves efficient processing of multi-channel signals through operations such as demodulation, despreading, decoding, and frequency hopping. Each module is designed with efficient parallel processing in mind, giving the entire system extremely high performance in high-speed signal processing.

[0158] An information processing module, connected to the signal processing module and the navigation processing module, is used to fuse the received communication information and navigation information, provide comprehensive data output, and exchange data with external systems;

[0159] The information processing module connects the data flows within the system and is responsible for managing, processing, and integrating the data. Leveraging a dual-core ARM processor, a data fusion unit, and a high-speed interface management unit, the information processing module not only ensures smooth data flow processing but also enables efficient integration of communication and navigation data. By processing communication and navigation information in real time, this module provides high-quality input for subsequent modules, ensuring stable system operation in complex application scenarios.

[0160] In this embodiment, the design of the information processing module includes core components such as a dual-core ARM processor, a data fusion unit, and a high-speed interface management unit. The specific operations are as follows: the dual-core ARM processor is responsible for efficiently processing information transmitted from the signal processing module; the data fusion unit merges communication data and navigation data to provide comprehensive data for the system; and the high-speed interface management unit ensures the effective transmission of all data.

[0161] The dual-core ARM processor is the core computing unit in the information processing module. Its tasks include receiving data streams from previous modules, performing operations such as unpacking, decoding, and preprocessing, and managing communications with external devices. The dual-core processor design efficiently supports parallel computing, improving data processing capabilities, especially when processing multiple data streams simultaneously.

[0162] Specifically, after receiving the data, the dual-core ARM processor will first classify the data. For example, for the transmitted data D raw (t), the data is decoded and processed by the ARM processor. The processed data D processed(t) is calculated by the following formula:

[0163] D processed (t) = f(D raw (t));

[0164] Where: D processed (t) is the processed data; D raw (t) is the original received data; f(·) represents the processing function (such as unpacking, decoding, etc.) performed on the original data.

[0165] The processed data will then be sent to the data fusion unit for further processing and fusion.

[0166] Working details of data fusion unit

[0167] The core task of the data fusion unit is to effectively fuse data from different sources (communication data and navigation data). To ensure synchronization and coordination of different data types, the data fusion unit weights the different data streams received according to preset rules and outputs the combined data. This process typically relies on methods such as weighted fusion algorithms and Kalman filtering.

[0168] For example, communication data D comm (t) and navigation data D nav The fusion of (t) can be performed by weighted averaging, and the formula is as follows:

[0169] D fused (t)=w1·D comm (t)+w2·D nav (t);

[0170] Where: D fused (t) is the integrated data after fusion; D comm (t) is the communication data; D nav (t) is the navigation data; w1 and w2 are the weighting coefficients of communication data and navigation data.

[0171] In this formula, the weighting coefficients w1 and w2 are used to adjust the impact of communication data and navigation data on the final fusion result. They can be dynamically adjusted according to different scenarios to ensure the optimization of the fusion result.

[0172] As an option, the data fusion unit can also support other fusion algorithms, such as Kalman filtering or particle filtering, to meet more complex application requirements. For example, when the quality of communication data and navigation data differs significantly, Kalman filtering can be selected to dynamically adjust the data fusion process to enhance the system's anti-interference capabilities.

[0173] The high-speed interface management unit (HIMU) is a key element in data exchange between the information processing module and external system modules or devices. It manages connections with external devices and ensures efficient data flow to other system modules or devices. It supports multiple standard interface protocols, including Ethernet, RS-422, and RS-232, ensuring compatibility with a wide range of external systems.

[0174] During data transmission, the high-speed interface management unit performs the following functions:

[0175] Receive data streams from the SOC module and ensure that the data is sent to the target device as needed;

[0176] Process input data from external devices and send it to the SOC module for further processing;

[0177] Buffer data to cope with bandwidth instability or data delay issues in external systems.

[0178] In the information processing module's workflow, the dual-core ARM processor first receives the raw data stream from the preceding module and performs the necessary decoding and processing. This processed data is then transferred to the data fusion unit for integration, generating the final composite data. This fused data is then transmitted to external devices or system modules via the high-speed interface management unit, completing data exchange and information transfer. This entire process is accomplished through parallel computing within the SOC module, ensuring high system efficiency and real-time performance.

[0179] Alternatively, the dual-core ARM processor and data fusion unit of the information processing module can communicate over a network to achieve distributed processing. For example, in a larger system architecture, the SOC module can work in conjunction with multiple external devices to share different data processing tasks.

[0180] Specifically, the SOC module can dynamically adjust the data fusion algorithm based on real-time environmental changes. For example, in an environment with poor signal quality, the system can dynamically adjust the weighted strategy to make the fusion results of communication data or navigation data more reliable.

[0181] In one possible implementation, the information processing module can also work in conjunction with external storage devices to cache and store data. By storing and managing historical data, the system can recover and retransmit data by looking back at historical data in the event of data loss or bit errors, thereby enhancing system reliability.

[0182] The information processing module effectively integrates communication and navigation data through the collaboration of a dual-core ARM processor, a data fusion unit, and a high-speed interface management unit. Each module ensures the real-time and accuracy of data streams through efficient parallel computing, providing high-quality processed data for subsequent modules.

[0183] The multi-channel synchronization module is connected to the RF transceiver module, analog channelization module, and digital channelization processing module to ensure clock synchronization and signal phase consistency among all modules;

[0184] The multi-channel synchronization module ensures clock and signal phase synchronization between multiple RF modules or receive channels. To efficiently process multiple signal channels and ensure accurate and stable data transmission, a precise synchronization mechanism is crucial. This module includes a reference clock synchronization unit, a JESD204B interface control unit configured to synchronize data across multiple channels, a local oscillator synchronization module, and a reference clock management unit. These modules work together to ensure high-precision synchronization between signals.

[0185] In this embodiment, the multi-channel synchronization module is synchronized through various control methods, including clock synchronization and phase synchronization. When multiple RF modules work together, only by ensuring the consistency of the clock and signal phase of each channel can signal distortion, data loss, and system errors be effectively avoided.

[0186] The reference clock synchronization unit is a key component in multi-channel synchronization modules, enabling data and clock synchronization between RF modules. The JESD204B standard provides a high-bandwidth serial data transmission method that ensures data synchronization between multiple channels.

[0187] In this embodiment, the JESD204B interface control unit coordinates the operation of multiple RF modules by providing a unified clock signal, ensuring that data streams are processed in the correct time sequence. This interface control unit synchronizes the operating clocks of all RF modules, thereby ensuring stable and accurate signal transmission.

[0188] Alternatively, in some complex systems, the reference clock synchronization unit can be configured to dynamically adjust the clock frequency to accommodate different signal processing requirements. For example, high-frequency applications may require a higher-frequency clock to process high-speed signals, while low-frequency applications can use a lower-frequency clock.

[0189] The local oscillator (LO) synchronization module ensures the phase alignment of the local oscillators (LOs) of multiple RF modules. When receiving or transmitting signals, multiple RF modules must share the same LO frequency to ensure proper signal transmission. If the LO signals of multiple modules are out of phase, signal distortion will occur due to signal superposition, affecting overall system performance.

[0190] In this embodiment, the local oscillator synchronization module adjusts the phase of the local oscillator through a real-time feedback mechanism. The local oscillator signal of each RF module is detected and compared with the target phase signal, and the phase deviation is adjusted. The specific adjustment formula is:

[0191] Where: Δθ LO is the local oscillator phase adjustment amount; is the target local oscillator phase (ideal value); is the actual phase of the current local oscillator.

[0192] The local oscillator synchronization module ensures that the local oscillator signals of multiple RF modules remain consistent through precise phase adjustment, thereby effectively avoiding interference caused by phase inconsistency.

[0193] As an option, in high-precision applications, the LO synchronization module can be combined with an external phase detector and calibration equipment to further improve the accuracy and stability of phase synchronization.

[0194] The reference clock management unit (RCMU) is responsible for clock synchronization across the entire system, providing a unified clock source to ensure consistent clock references for all modules. This ensures that multiple modules within the system (such as the RF transceiver and signal processing modules) operate under the same clock synchronization conditions. The CMU typically avoids synchronization errors caused by clock drift by precisely controlling the clock source.

[0195] In this embodiment, the clock signal of the reference clock management unit is provided by a high-precision clock generator, ensuring low latency and high stability of the clock signal. This module not only needs to distribute the clock signal, but also needs to ensure the consistency of the clock signal when transferring data between external devices or modules.

[0196] Specifically, the reference clock management unit achieves synchronization by distributing clock signals. Assume that the clock signals of each module in the system are θ module (t), then the goal of clock signal synchronization is:

[0197] θ module (t) = θ reference (t);

[0198] Where: θ module (t) is the working clock signal of each module; θ reference(t) is the reference clock signal.

[0199] This synchronization method ensures that all modules work under the same time base, eliminating signal errors caused by clock offset or clock inconsistency.

[0200] Specifically, the reference clock management unit can also support switching between multiple clock sources according to different system requirements. Different application scenarios may require the use of different clock sources to meet the requirements of high-precision signal processing.

[0201] The overall workflow of the multi-channel synchronization module is as follows: First, the JESD204B interface control unit ensures clock synchronization across all RF modules using a high-bandwidth data transmission protocol. Next, the local oscillator synchronization module precisely synchronizes the RF module's local oscillator signals, ensuring phase consistency across all modules. Finally, the reference clock management unit uses a unified clock signal to ensure that all modules operate under the same time reference. This entire process ensures synchronization across all signal channels within the system, preventing timing errors, signal loss, and interference.

[0202] Each module works through parallel computing, efficiently processing data streams from multiple RF modules and ensuring precise signal synchronization.

[0203] As an option, in some high-frequency or large-scale applications, the system can use multiple reference clock sources for synchronization and select the most appropriate clock source through an intelligent scheduling mechanism to ensure clock signal stability and optimize system performance.

[0204] Specifically, in special applications, the system can also be combined with advanced clock source calibration technology to further improve synchronization accuracy. This calibration technology is especially important in areas with high-precision signal processing requirements.

[0205] In one possible implementation, the multi-channel synchronization module can also cooperate with external synchronization devices to expand its functionality. For example, using an external synchronization signal source can further improve the synchronization accuracy of the system, especially in scenarios where multiple devices work together, effectively reducing synchronization errors.

[0206] The multi-channel synchronization module achieves precise synchronization of clock and signal phases through the combination of the JESD204B interface control unit, the local oscillator synchronization module and the reference clock management unit, ensuring the stability and efficiency of the entire system in complex application environments.

[0207] The navigation processing module is connected to the signal processing module and is used to receive satellite navigation signals and provide positioning and timing functions;

[0208] The navigation processing module not only receives satellite navigation signals but also ensures highly accurate positioning and time synchronization. To ensure module stability and accuracy in complex environments, the navigation processing module requires an effective combination of anti-interference technology, precise positioning algorithms, and efficient clock synchronization mechanisms. Key functions of this module include extracting positioning and time data from satellite signals, improving positioning accuracy through differential GPS (DGPS) technology, and enhancing robustness through noise reduction and signal filtering.

[0209] In this embodiment, the navigation processing module includes a satellite navigation chip, a positioning and timing unit, and an anti-interference module. The satellite navigation chip is responsible for receiving and decoding satellite signals, the positioning and timing unit is responsible for converting the decoded signals into accurate position and time data, and the anti-interference module ensures the stability and reliability of navigation data in high-noise environments.

[0210] Satellite navigation chips are responsible for extracting location information, time information, and satellite health status from received satellite signals. They support multiple satellite navigation systems, such as GPS, GLONASS, BeiDou, and Galileo, adapting to different satellite system standards and providing high-precision location information in real time.

[0211] The satellite navigation chip in this embodiment parses received satellite signals to calculate the receiver's current location (longitude, latitude, altitude, etc.) and time (UTC). It estimates the distance between the receiver and each satellite using pseudorange measurements of GPS system signals. By comparing the receiver's location with known satellite positions, the chip calculates the receiver's location.

[0212] The positioning and timing unit further processes the position and time information provided by the satellite navigation chip to ensure high-precision positioning and accurate time synchronization. In this embodiment, the positioning and timing unit uses standard pseudo-range measurement technology to estimate the receiver position through the least squares method based on the multiple satellite signals received. The basic principle of position estimation is as follows: location =(f satellite )(S1,S2,...,S n );

[0213] Where: P location is the calculated receiver position (including longitude, latitude and altitude); S1, S2, ..., S n is the number of satellite signals received; f satellite is a positioning function based on satellite signals, usually a least squares method or a Kalman filter algorithm.

[0214] The positioning and timing unit can also synchronize time and compensate for the clock errors of different satellites. For example, the time stamp contained in the satellite signal is UTC time, and the receiver's clock may have a certain deviation from the satellite's clock. The positioning and timing unit corrects the clock error using the following formula:

[0215] Δt receiver =Δt satellite +Δt system ;

[0216] Where: Δt receiver is the clock error of the receiver; Δt satellite is the satellite clock error; Δt system is the error of the system clock.

[0217] This formula can accurately calculate clock errors and perform necessary time synchronization to ensure the accuracy of time information.

[0218] The anti-interference module is primarily used to enhance the robustness of the navigation processing module, ensuring stable system operation in the presence of interference sources (such as electromagnetic interference and building reflections). Satellite navigation signals are susceptible to various interferences during transmission, especially in urban high-rise buildings or other complex environments. Signal multipath and shielding effects can seriously affect positioning accuracy.

[0219] The anti-interference module in this embodiment effectively filters out noise and interference signals through various technical means, such as signal filtering, spectrum analysis, and signal weighting. Through efficient signal processing algorithms, the anti-interference module can identify and remove invalid signals from the environment and improve the system's receiving sensitivity.

[0220] The anti-interference process can be described by the following formula:

[0221] S clean =S raw -D interference ;

[0222] Where: S clean For clear signals after removing interference; S raw is the original signal received; D interference For interference signal.

[0223] By filtering the received original signal, the anti-interference module can effectively remove the interference signal, thereby improving the positioning accuracy and system robustness.

[0224] The overall workflow of the navigation processing module is as follows:

[0225] The satellite navigation chip first receives the signal from the satellite and decodes the satellite's location information, time information, etc.

[0226] The positioning and timing unit uses algorithms such as pseudo-range measurement and least squares method to perform positioning and time synchronization based on the information provided by the satellite navigation chip.

[0227] The anti-interference module removes environmental noise and ensures signal clarity through filtering and interference identification technology.

[0228] Finally, the positioning and timing unit outputs processed location information and accurate time data.

[0229] As an option, the navigation processing module can also combine external base station signals to improve positioning accuracy using Differential GPS (DGPS) technology. By comparing the signals with the base station signals, the navigation processing module can correct positioning errors caused by atmospheric and multipath effects, further improving system accuracy.

[0230] Specifically, the navigation processing module supports higher-precision positioning methods, such as RTK (Real-Time Kinematic Positioning), which provides centimeter-level positioning accuracy through precise real-time differential data. This technology is crucial for positioning systems requiring extremely high precision, such as autonomous vehicles and agricultural machinery.

[0231] In one possible implementation, the navigation processing module can also combine sensor data (such as an inertial measurement unit (IMU)) to provide more stable positioning information. In situations where satellite signals cannot be received (such as underground or in areas with densely populated buildings), the system can use inertial navigation to provide short-term position information prediction.

[0232] The navigation processing module successfully achieves high-precision positioning and time synchronization functions through the coordinated work of the satellite navigation chip, positioning and timing unit, and anti-interference module. By supporting multiple satellite systems and integrating different technologies, the navigation processing module can provide high-quality and reliable positioning and timing services in various environments.

[0233] The signal processing method of the multi-channel narrowband data link integrated processing module described below can be referenced to the multi-channel narrowband data link integrated processing module described above.

[0234] Please see the attached Figure 2 The present invention also provides a signal processing method for a multi-channel narrowband data link integrated processing module, comprising the following steps:

[0235] Receives RF signals and converts them into baseband signals through RF transceivers;

[0236] Divide the signal into multiple sub-channels through analog channelization and digital channelization modules;

[0237] Use FPGA processing modules to demodulate, despread and decode each channel signal;

[0238] Use information processing modules for data fusion and information output;

[0239] The navigation processing module is used to decode, locate and time the satellite navigation signals, providing high-precision positioning and time synchronization information.

[0240] The method of this embodiment can be used to execute the above system embodiment. Its principles and technical effects are similar and will not be described in detail here.

[0241] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

Claims

1. Multi-channel narrowband data link integrated processing module, characterized by: include: A radio frequency transceiver module, comprising a radio frequency transceiver for converting received radio frequency signals into baseband signals and converting baseband signals into radio frequency signals; The analog channelization module is connected to the RF transceiver module and is used to receive the baseband signal converted by the RF transceiver module and perform preliminary channel division on the signal to divide the signal into multiple frequency band signals. The analog channelization module includes: a signal power splitter configured to split the received radio frequency signal into multiple frequency band signals; an amplifier configured to amplify the gain of the signal in each frequency band; a filter configured to selectively extract a signal from each frequency band; a channel selection unit configured to allocate signals to different sub-channels according to different frequency bands; The digital channelization processing module is connected to the analog channelization module and is used to digitize the analog channelized signal, further decompose the signal into multiple sub-channels, and reduce the processing complexity through filtering and extraction; a signal processing module connected to the digital channelization processing module and configured to perform demodulation, despreading and decoding processing on each sub-channel signal to extract communication data; The multi-channel synchronization module is connected to the RF transceiver module, analog channelization module, and digital channelization processing module to ensure clock synchronization and signal phase consistency among all modules; The navigation processing module is connected to the signal processing module and is used to receive satellite navigation signals and provide positioning and timing functions; The information processing module is connected to the signal processing module and the navigation processing module, and is used to fuse the received communication information and navigation information, provide comprehensive data output, and exchange data with external systems. The information processing module includes: A dual-core ARM processor configured to perform information processing tasks; a data fusion unit configured to fuse the communication data and the navigation data and output the integrated data; The high-speed interface management unit is configured to manage an external data interface.

2. The multi-channel narrowband data link integrated processing module according to claim 1, characterized in that: The radio frequency transceiver comprises: 4 receive and 4 transmit positions 4T4R; configured to convert a radio frequency signal into an I / Q baseband signal by quadrature mixing; The system is configured to convert baseband signals to and from radio frequency signals through analog-to-digital conversion and digital-to-analog conversion.

3. The multi-channel narrowband data link integrated processing module according to claim 1, characterized in that: The digital channelization processing module includes: a digital downconverter configured to downconvert the signal to baseband by frequency mixing; a digital filter configured to low-pass filter each channel signal; The decimation module is configured to reduce the sampling rate of the signal to reduce the complexity of subsequent processing.

4. The multi-channel narrowband data link integrated processing module according to claim 1, characterized in that: The signal processing module includes: A demodulation unit configured to perform demodulation processing on an input modulated signal; a despreading module configured to despread the spread spectrum signal; A decoding module configured to decode the received coded signal and restore the original data; The frequency hopping control unit is configured to perform frequency hopping processing on the signal.

5. The multi-channel narrowband data link integrated processing module according to claim 1, characterized in that: The multi-channel synchronization module includes: a reference clock synchronization unit configured to synchronize clocks of a plurality of radio frequency modules; A JESD204B interface control unit configured to synchronize data from multiple channels; a local oscillator synchronization module configured to ensure that the local oscillators of the radio frequency transceivers are phase-aligned; The reference clock management unit is configured to provide a unified clock signal for the entire system.

6. The multi-channel narrowband data link integrated processing module according to claim 1, characterized in that: The navigation processing module includes: a satellite navigation chip configured to receive and decode satellite navigation signals; A positioning and timing unit configured to provide high-precision positioning and timing functions; An anti-interference module is configured to enhance the robustness of signal reception.

7. The multi-channel narrowband data link integrated processing module according to claim 1, characterized in that: The RF transceiver module, analog channelization module, digital channelization processing module, signal processing module and information processing module are all integrated into a 6UVPX module with a size of 160mm×233.35mm×25.4mm and a width of 5HP.

8. The signal processing method of the multi-channel narrowband data link integrated processing module is characterized in that: Using the multi-channel narrowband data link integrated processing module according to any one of claims 1 to 7 comprises the following steps: Receives RF signals and converts them into baseband signals through RF transceivers; Divide the signal into multiple sub-channels through analog channelization and digital channelization modules; Use FPGA processing modules to demodulate, despread and decode each channel signal; Use information processing modules for data fusion and information output; The navigation processing module is used to decode, locate and time the satellite navigation signals, providing high-precision positioning and time synchronization information.

Images