Autonomous controllable printer main control chip system

Abstract

The invention relates to the technical field of printing equipment control, and discloses an autonomous controllable printer main control chip system, which comprises a main core module used for receiving printing data of external equipment, processing the data, and distributing a real-time control task to an auxiliary core module through task scheduling; the auxiliary core module is used for executing real-time control, including laser modulation, paper driving, carbon powder optimization and high-pressure control, of a printing engine; the inter-core communication module is used for realizing cooperative work between the main core module and the auxiliary core module through transmission of task instructions; the data transmission module completes storage and scheduling of printing data through a shared memory and a high-speed data transmission technology; and the pin configuration module is used for dynamically adjusting the function distribution of the chip pins. The main core module and the auxiliary core module work cooperatively, efficient distribution and real-time feedback of tasks are achieved through the inter-core communication module, and the technical effect of parallel processing of printing task analysis and real-time execution is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of printing device control, and particularly to an autonomous and controllable printer main control chip system. Background Art

[0002] The printer main control chip system is the core component of the printer, responsible for coordinating the entire process of receiving, parsing, data transmission, task execution, and result feedback of printing tasks. Through a highly integrated hardware architecture and optimized software algorithms, it manages the collaboration between the printing engine and external devices to achieve efficient execution of printing tasks and stable operation of the system.

[0003] In the existing printer main control chip technology, the core tasks are usually completed by a single-core architecture. The main control chip needs to process multiple tasks such as external data reception, task parsing, and real-time control simultaneously. Although this architecture can meet the basic requirements when dealing with low-complexity tasks, as the complexity of printing tasks increases, the single-core architecture gradually shows limitations in task scheduling and real-time guarantee. For example, when high-real-time tasks (such as laser modulation) and low-priority tasks (such as data caching) compete for resources, the single-core architecture is prone to task delays or lags, resulting in a decline in printing quality or printing efficiency. The deficiencies of this architecture in multi-task parallel processing limit the further improvement of printer performance.

[0004] In addition, in the existing technology, most of the data transmission designs adopt the traditional bus communication mode, and the data is directly exchanged through the bus by the main core module and the sub-core module. Although this transmission method has a simple structure, it is prone to bus congestion problems. Especially when dealing with large-scale printing tasks, the computing resources of the main core and the sub-core are often occupied by data transmission operations, resulting in a decline in the execution efficiency of core tasks. At the same time, the design of the data verification mechanism during data transmission is relatively weak, and data loss or errors may occur and cannot be detected and repaired in a timely manner. This makes the traditional data transmission scheme difficult to meet the requirements of both high efficiency and reliability. Summary of the Invention

[0005] In view of the deficiencies of the existing technology, the present invention provides an autonomous and controllable printer main control chip system, which solves the problems of insufficient task parallel processing ability, low data transmission efficiency, and weak system security of the existing printer main control chip.

[0006] To achieve the above objectives, the present invention is realized through the following technical solutions: An autonomous and controllable printer main control chip system, comprising:

[0007] A main core module, used for receiving printing data from external devices, processing the data, and allocating real-time control tasks to the sub-core module through task scheduling;

[0008] The secondary core module is used to perform real-time control of the printing engine, including laser modulation, paper driving, toner optimization, and high-voltage control;

[0009] The inter-core communication module realizes collaborative work between the main core module and the secondary core module through the transfer of task instructions;

[0010] The data transmission module completes the storage and scheduling of printing data through shared memory and high-speed data transmission technology;

[0011] The pin configuration module is used to dynamically adjust the function allocation of the chip pins to adapt to the hardware requirements of different printers;

[0012] The data security management module is used for data encryption, decryption, and data destruction.

[0013] Preferably, the main core module includes an external data interface module and a task scheduling module. The external data interface module includes a USB 2.0 interface, an SD IO interface, and a network communication interface. The network communication interface supports Gigabit Ethernet communication through a built-in MAC module.

[0014] Preferably, the secondary core module includes an engine control module and a timing control module. The engine control module is used to control the laser modulation, toner consumption optimization, and paper driving operations of the printer. The timing control module is used to generate control signals synchronized with printing, including high-voltage timing signals, paper feed motor drive signals, and fusing temperature control signals.

[0015] Preferably, the data transmission module completes the high-speed transmission of printing data through shared memory and DMA technology. The main core module and the secondary core module exchange intermediate data of printing tasks through shared memory. The secondary core module reads the printing data in the shared memory based on DMA and executes control tasks in real time.

[0016] Preferably, the engine control module includes:

[0017] A laser modulation unit for decoding printing data and generating a modulation signal for driving the laser;

[0018] A toner optimization unit for adjusting the usage ratio of toner according to the number of effective black dots in the printing task;

[0019] A laser compensation unit for correcting the angular deviation of the laser.

[0020] Preferably, the pin configuration module supports flexible adjustment of the pin signal type by dynamically configuring the input, output, and power functions of the pins, including reconfiguration of signal input pins, signal output pins, and power pins, to adapt to the hardware requirements of different models of printers.

[0021] Preferably, the data security management module includes:

[0022] A firmware encryption verification unit that ensures the legality of the firmware through two-stage firmware startup verification and starts the second-stage firmware after the first-stage firmware verification passes;

[0023] A data encryption and decryption unit for encrypting and decrypting the printing data during transmission;

[0024] A data destruction unit for automatically destroying the printing data in storage after the printing task is completed.

[0025] Preferably, the main core module is configured with a task scheduling unit, and the task scheduling unit is used to parse the printing task, allocate the subtasks with higher real-time requirements to the secondary core module, and centrally process the non-real-time tasks.

[0026] The present invention provides an autonomous and controllable printer main control chip system. It has the following beneficial effects:

[0027] 1. By adopting the collaborative architecture design of the main core and secondary core modules and realizing multi-task division of labor and dynamic priority scheduling through the inter-core communication module, the present invention achieves the technical effect of efficient task parsing and real-time execution. Compared with the existing technology that relies on a single-core architecture for centralized task processing, it solves the problems of scheduling delay and insufficient real-time performance caused by tasks competing for computing resources, significantly improves the efficiency of multi-task parallel execution, and meets the requirements of complex printing scenarios.

[0028] 2. The present invention adopts a completely self-designed DMA transmission and shared memory management mechanism, and through the dynamic data prefetching and verification functions, realizes the full-link efficient transfer and integrity guarantee of task data. Compared with the existing technology that relies on the general bus protocol for data interaction, it solves the problems of congestion, delay or error that are prone to occur during data transmission, and significantly improves the reliability of data transmission and the task response speed.

[0029] 3. Through the autonomous firmware verification, task data encryption and decryption, and data destruction functions of the data security management module, the present invention achieves the technical effect of full-system security protection and data trustworthiness throughout the process. Compared with the existing technology that relies on general encryption algorithms or third-party firmware verification tools, it solves the problems of insufficient security and excessive dependence of external tools, effectively improves the anti-attack ability of the system, and has more advantages especially in sensitive data processing and task traceability scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a schematic connection diagram of the system architecture of the present invention;

[0031] Figure 2 It is a system architecture diagram of the present invention. Detailed implementation mode

[0032] The technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the scope of protection of the present invention.

[0033] Embodiment:

[0034] Please refer to the attached Figure 1 - attached Figure 2 , the embodiment of the present invention provides an autonomous and controllable printer main control chip system, including:

[0035] The main core module is used to receive the print data of external devices, process the data, and allocate real-time control tasks to the sub-core module through task scheduling;

[0036] Specifically, as an important part of the autonomous and controllable printer main control chip system, the main core module is mainly used to receive, parse and schedule the print data. Generally, the main core module interacts with external devices, receives print data through various interfaces, and allocates control tasks with higher real-time requirements to the sub-core module for execution according to the real-time requirements of the print task, while processing non-real-time tasks by itself. During the data transmission process, the main core module completes the efficient scheduling of data through the coordinated work with the inter-core communication module and the data transmission module to ensure the coordinated operation of the entire system.

[0037] In some embodiments, the main core module receives print task data from USB devices, network devices or storage devices through the external data interface module. Specifically, the external data interface module supports USB 2.0 device mode, wired network (through the built-in MAC module) and SDIO interface, and is used to adapt to different types of external devices and communication protocols. Through these interfaces, the main core module can receive print data from computer systems, mobile devices or cloud services.

[0038] In this embodiment, the task scheduling function of the main core module is completed based on its built-in task management unit. The task management unit analyzes the received printing tasks, including data format analysis, print content recognition, and task priority judgment. As an option, the analyzed tasks are classified according to real-time requirements. For example, tasks such as print engine control and laser modulation are preferentially marked as real-time tasks, while image processing, data caching, etc. are marked as non-real-time tasks. In a possible implementation, the main core module forwards the real-time tasks to the secondary core module through the inter-core communication module and centrally processes the non-real-time tasks. This division of labor can effectively improve the processing efficiency of the system and the stability of task execution.

[0039] Generally, in order to support complex printing tasks, a cache unit and a shared memory management unit are also integrated in the main core module. In some embodiments, the cache unit is used to store and process temporary printing data inside the main core, such as some unprocessed image data or task marking information; the shared memory management unit is responsible for realizing fast data interaction between the main core and the secondary core. Specifically, the shared memory area is connected to the data transmission module through DMA technology, enabling the main core to quickly transfer the analyzed task data to the secondary core module, and the secondary core can also return the result data to the main core through the shared memory after completing the task.

[0040] As an option, the main core module also supports dynamic scheduling of printing tasks to adapt to the task load in different scenarios. For example, in some high-load situations, the main core module can dynamically adjust the task allocation strategy according to the processing capacity of the secondary core, and hand over some medium-real-time tasks to the secondary core module for processing. In low-load scenarios, the main core module can temporarily cache tasks to avoid overloading the secondary core. This dynamic scheduling ability enables the entire chip system to maintain stable performance in different working environments.

[0041] In a possible implementation, the task scheduling function of the main core module can also be combined with the firmware verification function of the security management module. Generally, during the startup process, the main core module first loads the built-in firmware startup unit (BOOT1) and verifies the legality of the externally loaded firmware (BOOT2) through BOOT1. After the firmware verification is completed, the main core module starts to receive printing task data. As an improved method, this verification mechanism can also be combined with the traceability function of printing tasks to achieve a complete record of the task source and execution status.

[0042] Specifically, after receiving the printing task data, the main core module can synchronously record the key information of the task (such as data source, task execution time, etc.) with the system's real-time clock (RTC) through the built-in log recording unit. This recording method can not only support the debugging and monitoring of printing tasks but also provide technical guarantee for task traceability.

[0043] In some embodiments, to support higher data throughput, the main core module adopts a multi-threaded task scheduling architecture. Specifically, the multi-threaded architecture allows the main core module to process multiple task streams simultaneously. For example, one thread is dedicated to parsing and distributing real-time tasks, and another thread is responsible for processing non-real-time tasks and data cache management. In addition, the task scheduling unit of the main core module can also dynamically adjust the allocation of thread resources according to the importance of tasks and the priority of data.

[0044] As an improved approach, the main core module in the present invention also supports an extended printing function. For example, when receiving an image printing task, the main core module can combine with the image processing unit to preprocess the received image data, including processing steps such as resolution adjustment and color space conversion. This processing method can reduce the burden on the secondary core module for printing tasks, thereby improving the overall operating efficiency of the system.

[0045] In terms of implementation, by combining firmware verification, logging, and image preprocessing functions, the main core module can adapt to various printing scenarios, further enhancing the adaptability and reliability of the entire printer main control chip system.

[0046] The secondary core module is used to execute the real-time control of the printing engine, including laser modulation, paper drive, toner optimization, and high-voltage control;

[0047] Specifically, the secondary core module is a key component in the autonomous and controllable printer main control chip system and works in cooperation with the main core module. Generally, the secondary core module focuses on the real-time control of the printing engine, including functions such as laser modulation, paper transfer, high-voltage control, and fixing temperature adjustment. It receives printing tasks through communication with the main core module and completes the execution of real-time tasks in an independent environment to ensure the efficiency and accuracy of the printing process. The work of the secondary core module directly affects the printing quality and execution efficiency, and its design fully considers the balance of real-time performance, reliability, and resource utilization.

[0048] In this embodiment, the secondary core module adopts an independent Cortex-M3 architecture, configured with an independent task execution unit and multiple functional modules to achieve all-round control of the printing engine. Specifically, the secondary core module receives task instructions transmitted by the main core module through the inter-core communication module and calls different functional modules according to the task type to complete relevant operations. As a possible implementation, the tasks include controlling the printing high voltage, driving the paper feed motor, modulating the laser, and adjusting the fixing temperature, etc.

[0049] In some embodiments, the secondary core module integrates a laser modulation module for converting print data into a modulation signal for the laser. Generally, the laser modulation module generates a laser control signal corresponding to the image content by receiving the decoded print data transmitted by the primary core module to achieve accurate print output. Specifically, this module supports the generation of modulation signals with multiple resolutions and is suitable for the requirements of different printing tasks. For example, in the high-resolution printing mode, the laser modulation module can combine the sub-pixel compensation function of the printed image data to adjust the emission angle of the laser in real time to reduce imaging errors.

[0050] In this embodiment, the secondary core module also includes a paper transport control module for driving the paper feed motor and monitoring the status of the paper sensor. As an option, the paper transport control module controls the speed and direction of the paper feed motor by generating a pulse width modulation (PWM) signal, thereby ensuring the accurate positioning and stable operation of the printed paper. In some embodiments, this module can obtain the signal feedback from the paper sensor in real time, monitor the paper transport status, such as detecting whether the paper is jammed or the paper output times out, and report these status information to the primary core module through the inter-core communication module.

[0051] The high-voltage control module in the secondary core module is used to generate multiple high-voltage signals required during the printing process, including the print transfer voltage and the fusing voltage, etc. Specifically, the high-voltage control module generates a high-voltage timing signal synchronized with the printing task through a built-in timing generator and outputs it to the electrode assembly of the print engine through a high-voltage drive circuit. In a possible implementation, the high-voltage control module can adjust the intensity and frequency of the high-voltage signal according to the type of printing task. For example, at different paper thicknesses, the high-voltage control module can optimize the transfer quality by changing the output amplitude of the high-voltage signal.

[0052] As an improved method, the secondary core module also integrates a fusing temperature control module for real-time monitoring and adjusting the working temperature of the printer fuser. Generally, this module obtains the real-time temperature data of the fuser through the connected temperature sensor and adjusts the output power of the heater according to the task requirements to keep the fusing temperature within the set range. In some embodiments, this module can also combine the signal input of the ambient temperature sensor to perform dynamic compensation on the fusing temperature, thereby maintaining stable print quality under different environmental conditions.

[0053] In a possible implementation, the task execution unit of the secondary core module adopts a hardware priority scheduling mechanism to ensure that the tasks with the highest real-time requirements can be executed first. For example, when receiving a laser modulation task and a high-voltage timing control task simultaneously, the task execution unit will give priority to processing the high-voltage timing control task to ensure the timing synchronization of the printing engine. This hardware scheduling method avoids the latency problems that may be caused by traditional software scheduling and improves the response speed of the system.

[0054] In some embodiments, the secondary core module also regularly sends task status reports to the primary core module through the inter-core communication module to ensure that the primary core module can timely understand the task execution status of the secondary core. Specifically, these status reports include the execution progress of the current task, the feedback signals of the sensors, and the abnormal conditions of the system. When the secondary core module detects an abnormal task (such as paper jamming or temperature exceeding the range), it can send an emergency interrupt signal to the primary core module through the inter-core communication module so that the primary core module can take corrective measures in a timely manner.

[0055] The secondary core module works in cooperation with the data transfer module to read the data content of the printing task from the shared memory through the DMA technology. In some embodiments, to improve the reading speed of task data, the secondary core module supports a multi-channel data prefetch mechanism, that is, it pre-reads the data of the next task while executing the current task, thereby reducing the waiting time during task switching. In addition, high-speed data interaction is achieved between the functional modules of the secondary core module through the built-in bus, making the execution of the printing task more efficient.

[0056] Generally, the secondary core module also supports the integrity verification function of task data. Specifically, during the task execution process, the secondary core module will verify the data read from the shared memory. For example, it verifies the accuracy of the data through a verification core or CRC algorithm. In some embodiments, when a data error is detected, the secondary core module can request the primary core module to re-transmit the task data through the inter-core communication module, thereby avoiding printing quality problems caused by data errors.

[0057] The inter-core communication module realizes the collaborative work between the primary core module and the secondary core module through the transfer of task instructions;

[0058] Specifically, the inter-core communication module is one of the core components of the main control chip system of the self-controlled printer, mainly used to coordinate the task interaction and data exchange between the primary core module and the secondary core module. Generally, the inter-core communication module ensures the efficient cooperation between the primary core module and the secondary core module through the transfer of task instructions and data sharing. It not only needs to provide a fast response ability in tasks with high real-time requirements, but also needs to ensure the integrity and stability of task execution, avoiding system anomalies caused by data transmission errors or task scheduling conflicts.

[0059] In the overall system architecture, the inter-core communication module connects the main core module and the secondary core module, and is responsible for task distribution, status feedback, and interruption management. Specifically, the main core module distributes the parsed real-time tasks to the secondary core module through the inter-core communication module, and after the secondary core module completes the task, it will feedback the task execution result or exception information to the main core module through this module. In some embodiments, the inter-core communication module is also used for the synchronization of task scheduling status. For example, the main core module queries the task execution status of the secondary core module through this module to decide whether to adjust the task distribution strategy.

[0060] In this embodiment, the inter-core communication module adopts a hardware-based Mail box mechanism for transmitting instruction signals and control messages between the main core module and the secondary core module. Specifically, the Mail box mechanism realizes communication between the main core and the secondary core through memory mapping. Each Mail box channel corresponds to a dedicated hardware register for storing task instructions or status information. In some embodiments, the main core module triggers the task execution of the secondary core module by writing task instructions to a specific Mail box register, and after the secondary core module completes the task, it will return a status feedback to the main core module through the corresponding Mail box register.

[0061] Generally, in order to improve communication efficiency, the inter-core communication module is used in conjunction with the data transmission module. As an option, task instructions are transmitted through Mail box registers, while large-scale data transmission is completed through shared memory and DMA technology. For example, in a printing task, the main core module sends a print control instruction through the Mail box and stores the print data in the shared memory at the same time. After receiving the control instruction, the secondary core module reads the task data from the shared memory through the data transmission module. This method effectively avoids the transmission bottleneck that may be caused by transmitting a large amount of data through registers.

[0062] In some embodiments, the inter-core communication module also has an interruption management function for handling interruption requests and responses between the main core module and the secondary core module during task execution. Specifically, when the main core module receives an external printing task, it will send an interruption signal to the secondary core module through the inter-core communication module to remind the secondary core module to prepare to receive new task instructions. As a possible implementation method, the interruption signal adopts a hardware trigger method, which is generated by the interruption control unit of the inter-core communication module and distributed to the interruption processing unit of the secondary core module.

[0063] In a possible implementation, to ensure the execution of real-time tasks, the inter-core communication module supports a multi-level priority queue management mechanism. Generally, task instructions are queued and processed according to their priorities. High-priority tasks can interrupt the currently executing low-priority tasks, thus ensuring that real-time tasks can be responded to in a timely manner. For example, when the secondary core module is processing a low-priority non-real-time task, if the primary core module sends a laser modulation task instruction, this task instruction will preferentially enter the task execution queue of the secondary core module and pause the execution of the low-priority task.

[0064] In this embodiment, the inter-core communication module also provides a task synchronization function for coordinating the task states between the primary core module and the secondary core module. In some embodiments, the primary core module can query the status register in the inter-core communication module to obtain the task execution progress of the secondary core module in real time, such as the completion percentage of the current task, the number of execution interruptions, etc. These status information can help the primary core module dynamically adjust the task scheduling strategy to avoid resource conflicts or task backlogs.

[0065] As an improved method, the inter-core communication module supports error detection and recovery functions. Specifically, when a task instruction is lost or a data transmission error occurs during the inter-core communication process, the inter-core communication module will generate an error report and notify the primary core module through an interrupt signal. In some embodiments, after receiving the error report, the primary core module can re-send the error task instruction through the inter-core communication module or request the secondary core module to retry the current task. This design improves the reliability of the system operation, especially in high-load situations.

[0066] In a possible implementation, the inter-core communication module also supports the logging function of task execution. Generally, task logs include the start time, end time, task instruction content, and task execution results of the task. These log information can be transmitted to the log management unit of the primary core module through the inter-core communication module as monitoring data of the system operation status.

[0067] In some embodiments, the inter-core communication module adopts a low-power design to adapt to the energy consumption requirements of the system under different load conditions. For example, when the primary core module or the secondary core module is in the standby state, the inter-core communication module can enter the low-power mode and only retain the interrupt response function. When the primary core module or the secondary core module restarts the task, the inter-core communication module can quickly resume from the low-power mode to the working mode, thus saving system resources.

[0068] The data transmission module completes the storage and scheduling of print data through shared memory and high-speed data transmission technology;

[0069] Specifically, this module is responsible for completing the transmission of large-scale printing data, and at the same time supports the prefetching of task data, the feedback of task completion data, and the integrity verification of data. It works in coordination with the inter-core communication module. Through division of labor and optimization, it ensures the efficient and seamless transfer of task instructions and data streams. In the system, the data transmission module takes shared memory and DMA (Direct Memory Access) technology as the core, significantly reducing the computing burden of the main core and the secondary core during data transmission.

[0070] In this embodiment, the data transmission module realizes data interaction between the main core module and the secondary core module through shared memory. Specifically, the data information of the printing task is stored in the shared memory. The main core module is responsible for writing the parsed printing task data into the shared memory, while the secondary core module reads the data from the shared memory as needed. In some embodiments, to improve the data reading and writing efficiency, the shared memory area is divided into multiple data blocks, and each data block contains a task identifier and data content. After receiving the task identifier through the inter-core communication module, the secondary core module can quickly locate the corresponding data block and start reading the task data.

[0071] Generally, in order to further improve the data transmission performance, the data transmission module also uses DMA technology to reduce the direct participation of the main core and the secondary core in data transmission. As an option, when the main core module completes the parsing of task data, the data transmission module transfers the large-scale printing data from the storage space of the main core to the shared memory area through DMA. In this process, there is no need for the main core to participate in the specific reading and writing operations, thus releasing the computing resources of the main core for the processing of other tasks. In some embodiments, the secondary core module also directly reads data from the shared memory through the DMA mechanism, without manual polling or direct access to the memory, further reducing the data transmission latency.

[0072] In a possible implementation manner, the data transmission module combines a task priority management mechanism and can dynamically adjust the order of data transmission. For example, when the main core module writes multiple printing tasks to the shared memory, the data transmission module can assign different access permissions and queue orders to the data blocks according to the priorities of the tasks. Generally, the task data with higher real-time requirements will be transmitted first, while the low-priority task data will enter the transmission queue and wait for execution. This priority management mechanism is particularly suitable for the multi-task parallel printing scenario and can effectively prevent the high-priority tasks from being interrupted due to data transmission delays.

[0073] In this embodiment, to ensure the reliability of data transmission, the data transmission module is also configured with a data integrity verification unit. Specifically, during data transmission, this unit verifies the integrity of the transmitted data block through a checksum or CRC algorithm. If a data error is detected, the data transmission module will send an error report to the main core module or the secondary core module through the inter-core communication module and request retransmission of this data block. In some embodiments, the verification unit also supports setting different verification intensities for different types of data blocks. For example, more stringent verification standards are adopted for critical task data, while simplified verification algorithms are used for ordinary data to reduce system resource consumption.

[0074] As an improved method, the data transmission module supports the prefetch function of task data. Generally, when the secondary core module starts to execute a certain printing task, the data transmission module will simultaneously prefetch the subsequent data that the task may need from the shared memory and cache it in the high-speed buffer of the secondary core module. In some embodiments, this prefetch mechanism is based on a predictive analysis algorithm of the task queue. For example, it predicts the range of required data for the next task according to the historical execution situation of the task, thereby reducing the delay caused by data reading during task switching.

[0075] In some embodiments, the data transmission module is closely integrated with the task scheduling function of the main core module. Specifically, the main core module can obtain the usage status of data blocks in the shared memory through the data transmission module, such as the number of currently idle data blocks, the amount of data being transmitted, etc., and adjust the task scheduling strategy based on this information. For example, when the number of idle data blocks in the shared memory is insufficient, the main core module can suspend writing data for new tasks to avoid data congestion problems in the shared memory area.

[0076] In a possible implementation, the data transmission module also supports dynamic bandwidth management functions to adapt to data transmission requirements under different task loads. For example, in a high-load scenario, the data transmission module can dynamically adjust the transmission frequency of DMA or the transmission size of data blocks to optimize the bandwidth usage efficiency of the system. In some embodiments, this module can also allocate different data transmission bandwidths based on the type of task. For example, a higher-priority bandwidth is allocated for print engine control data, while a secondary bandwidth is allocated for auxiliary function data, so as to ensure the normal operation of core tasks under high-load conditions.

[0077] In this embodiment, the data transmission module is also configured with a status monitoring unit for real-time monitoring of the performance parameters during data transmission. For example, the status monitoring unit can record metrics such as the time overhead, transmission rate, and error rate of each data transmission, and feedback this information to the main core module through the inter-core communication module. In some embodiments, the main core module can dynamically optimize the task scheduling and system resource allocation strategies based on this feedback data, thereby improving the operating efficiency of the entire system.

[0078] A pin configuration module for dynamically adjusting the function allocation of chip pins to adapt to the hardware requirements of different printers;

[0079] Specifically, this module adapts to different types of hardware requirements through a dynamic configuration mechanism, including input signals, output signals, and power signals, etc., thereby enhancing the scalability and adaptability of the system. The pin configuration module plays a bridging role in the coordinated operation of the main core module and the secondary core module. By optimizing the allocation of pin resources, it ensures the normal communication and function implementation between modules.

[0080] In the entire system, the pin configuration module is directly associated with the main core module and is used to support the main core in adjusting the hardware interfaces required for task execution. At the same time, this module collaborates with the secondary core module to dynamically switch the pin functions to meet the control requirements of real-time tasks. In some embodiments, the pin configuration module can also be combined with the data transmission module and the inter-core communication module to complete the interface function switching required during the task instruction and data exchange process, so as to adapt to complex multi-task processing scenarios.

[0081] In this embodiment, the pin configuration module adopts a dynamic configuration architecture based on the Overlay technology and realizes multi-purpose support by remapping the physical functions of the internal pins of the chip. Specifically, each pin can be dynamically configured as an input, output, or power pin according to the task requirements. In some embodiments, the input pin can be used to receive environmental parameters from external sensors, such as temperature or paper transfer status signals; the output pin is used to send control signals, such as motor drive signals or laser modulation signals; the power pin provides power supply support for different hardware units according to the task execution requirements.

[0082] Generally, in order to meet the requirements of different printer hardware architectures, the pin configuration module completes the real-time control of the pin functions through a configuration register group. As an option, this register group contains several independent configuration bits, and each bit corresponds to the function setting of a pin. For example, in the laser modulation task, the main core module can dynamically set a group of pins to the output mode by modifying the configuration register to send laser control signals; when the task switches to paper transfer control, these pins can be reconfigured to the input mode to receive the feedback signals from the paper sensor.

[0083] In a possible implementation, the pin configuration module supports a multi-level configuration priority management mechanism. Generally, the pin configuration request of a high-priority task will interrupt the configuration status of the current low-priority task, thus ensuring the execution of critical tasks. For example, during the execution of a printing task, when the sub-core module requests the pin configuration for adjusting the fusing temperature, the pin configuration module will give priority to this request and temporarily suspend the pin configuration adjustment of the low-priority task. This priority mechanism can effectively avoid task delays or execution failures caused by pin conflicts.

[0084] In this embodiment, the pin configuration module also incorporates a status monitoring function for real-time tracking of the current configuration status of each pin. In some embodiments, the main-core module can obtain the current pin allocation situation by querying the status register of the pin configuration module, such as which pins are in the input mode, which pins are in the output mode, and whether there are any unallocated idle pins. Specifically, this status information can help the main-core module optimize resource allocation during task scheduling and avoid problems such as resource shortages or duplicate allocations.

[0085] As an improved approach, the pin configuration module also supports the dynamic expansion of pin functions. For example, in some embodiments, this module can achieve the input and output of complex signals through specific pin combination modes. For example, when high-speed signals need to be transmitted, multiple pins can be configured in a parallel output mode to transmit data streams; while in the case of low-speed signals, the same pins can be configured in a serial communication mode to save pin resources. This dynamic expansion function further improves the system's adaptability to diverse hardware requirements.

[0086] In a possible implementation, the pin configuration module also supports a task pre-configuration function for reserving the required pin resources in advance for certain high-priority tasks. Generally, when the main-core module parses a task, it will notify the pin configuration module through the inter-core communication module to reserve the required pin group in advance. For example, before the printing task starts, the pin configuration module can set some pins to the laser modulation mode in advance according to the task type, and after the task is completed, these pins will be automatically restored to the default state. This function is particularly important in high-concurrency scenarios and can significantly reduce the configuration delay during task switching.

[0087] In some embodiments, the pin configuration module also provides a function for real-time adjustment of the pin level status. For example, in the output signal mode, the module can dynamically control the pin level to adapt to different hardware interface level standards. For example, for the conversion between TTL interfaces and CMOS interfaces, the system can achieve compatibility by adjusting the pin output voltage. In the input signal mode, the pin configuration module also supports setting the triggering mode of the signal edge, such as selecting rising edge triggering or falling edge triggering, to meet the requirements of specific tasks.

[0088] Generally, in order to further improve the flexibility of the module, the pin configuration module also supports programming control of its configuration logic through a software interface. In some embodiments, developers can dynamically adjust the pin function allocation strategy through a dedicated interface of the configuration register. For example, in a special printing task, the user can define a specific set of pin configuration schemes through software to perform special hardware control tasks and quickly restore the default configuration after the task is completed.

[0089] The data security management module is used for data encryption, decryption, and data destruction.

[0090] Specifically, during system operation, the data security management module closely cooperates with the inter-core communication module and the data transmission module. The main core module performs secure startup verification and data encryption operations of the firmware through the data security management module, and stores the processed encrypted data in the shared memory through the data transmission module. In some embodiments, when the secondary core module receives print task data, it decrypts and verifies the task data through the data security management module to ensure the data integrity and source legality of task execution.

[0091] In this embodiment, the data security management module includes a firmware verification unit, an encryption and decryption unit, and a logging unit. The firmware verification unit is used to verify the legality of the firmware code during the chip startup phase. Specifically, this unit adopts a two-stage verification mechanism. First, it loads the basic startup program built into the system through the BOOT1 firmware, and on this basis, verifies the legality of the BOOT2 firmware. Generally, only after the BOOT2 passes the verification can the main core module start the task management program and receive external print task data. In some embodiments, the firmware verification unit also supports a dynamic update mechanism. For example, during system operation, the main core module can load an authorized new firmware version through the data security management module, thereby enhancing the security and scalability of the system.

[0092] As an option, the encryption and decryption unit in the data security management module uses a symmetric encryption algorithm to encrypt the printing data during transmission. Generally, when the main core module receives a printing task from an external device, it will call the encryption and decryption unit to encrypt the printing data, and then write the encrypted data into the shared memory through the data transmission module. In some embodiments, this unit also supports block encryption of task data. For example, the task data is divided into multiple data blocks according to the task priority, and an independent encryption key is assigned to each data block to prevent the security risk caused by single-point data leakage. When the secondary core module reads the task data, the encryption and decryption unit will use the corresponding decryption key to decrypt the data and pass the decrypted data to the task execution unit.

[0093] In this embodiment, the data security management module further includes a log recording unit for recording the execution status and data flow of the printing task. Specifically, the log recording unit combines with the RTC (Real Time Clock) module of the system to store information such as the execution time, source device, task identifier, and execution result of the task in the secure memory area in the form of logs. In some embodiments, the main core module can query these log information in real time through the data security management module for debugging the printing task or analyzing the running status of the system. For example, when the printing task is interrupted or fails to execute, the main core module can quickly locate the problem based on the log information and take corresponding corrective measures.

[0094] In a possible implementation, the data security management module supports the function of destroying task data. Generally, when the secondary core module completes the printing task, it will trigger a data destruction operation through the data security management module to clear the data blocks related to the task in the shared memory. In some embodiments, the data destruction operation adopts a multiple overwrite algorithm, such as overwriting the data block with random numbers multiple times to ensure that it cannot be recovered. This mechanism is particularly important when dealing with sensitive data and can effectively prevent the illegal reading or reuse of task data after the task is completed.

[0095] As an improved method, the data security management module also supports the traceability management of task data. Generally, the traceability management function is implemented by combining log recording and data encryption mechanisms. For example, a unique task identifier and timestamp are generated for each task data block, and this information is embedded in the encryption header of the data block. In some embodiments, when the main core module or the secondary core module discovers data anomalies, it can obtain the source and execution history of the task by parsing the encryption header of the data block, so as to quickly identify security threats or system vulnerabilities.

[0096] In this embodiment, the data security management module also supports a task priority security policy, which is used to dynamically adjust the security protection level when multiple tasks are executed in parallel. For example, for high-priority tasks, the data security management module can enable a higher-level encryption algorithm and a more frequent logging policy, while for low-priority tasks, a standard-level security protection is adopted. This policy can optimize the usage efficiency of system resources while ensuring security.

[0097] In some embodiments, the data security management module also provides an external interface for collaborating with external devices to execute security tasks. For example, when it is necessary to verify the source of a printing task, the data security management module can exchange encryption keys and authentication information with the task source device through the external interface to ensure the authenticity and legality of the task data source. As a possible implementation, the authentication information of the external device can be transmitted to the main core module through a secure encryption channel and parsed and verified by the data security management module.

[0098] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An autonomous and controllable printer main control chip system, characterized in that: include: The main core module is used to receive the printing data of the external device and process the data, and assign the real-time control tasks to the sub-core module through task scheduling; A sub-core module that performs real-time control of the print engine, including laser modulation, paper drive, toner optimization, and high-voltage control; The inter-core communication module realizes the collaborative work between the main core module and the sub-core module by transmitting task instructions; Data transmission module, which completes the storage and scheduling of printing data through shared memory and high-speed data transmission technology; Pin configuration module, used to dynamically adjust the function allocation of chip pins to adapt to the hardware requirements of different printers; Data security management module, used for data encryption, decryption and data destruction.

2. The autonomous controllable printer main control chip system according to claim 1, characterized in that: The main core module includes an external data interface module and a task scheduling module. The external data interface module includes a USB 2.0 interface, an SDIO interface and a network communication interface. The network communication interface supports Gigabit Ethernet communication through a built-in MAC module.

3. The autonomous and controllable printer main control chip system according to claim 1, characterized in that: The sub-core module includes an engine control module and a timing control module. The engine control module is used to control the laser modulation, toner consumption optimization and paper driving operation of the printer. The timing control module is used to generate control signals synchronized with printing, including high-voltage timing signals, paper feed motor drive signals and fixing temperature control signals.

4. The autonomous controllable printer main control chip system according to claim 1, characterized in that: The data transmission module completes high-speed transmission of printing data through shared memory and DMA technology. The main core module and the sub-core module exchange intermediate data of printing tasks through shared memory. The sub-core module reads the printing data in the shared memory based on DMA and executes control tasks in real time.

5. The autonomous controllable printer main control chip system according to claim 1, characterized in that: The engine control module includes: A laser modulation unit, for decoding the printing data and generating a modulation signal to drive the laser; Toner optimization unit, used to adjust the toner usage ratio according to the number of effective black dots in the printing task; The laser compensation unit is used to correct the angular deviation of the laser.

6. The autonomous controllable printer main control chip system according to claim 1, characterized in that: The pin configuration module supports flexible adjustment of pin signal types by dynamically configuring the input, output and power functions of the pins, including reconfiguration of signal input pins, signal output pins and power pins, to adapt to the hardware requirements of different models of printers.

7. The autonomous and controllable printer main control chip system according to claim 1, characterized in that: The data security management module includes: The firmware encryption verification unit ensures the legitimacy of the firmware through a two-stage firmware startup verification. The second stage firmware is started after the first stage firmware verification passes; A data encryption and decryption unit, used for encrypting and decrypting the printing data in transmission; The data destruction unit is used to automatically destroy the stored print data after the print task is completed.

8. The autonomous and controllable printer main control chip system according to claim 1, characterized in that: The main core module is configured with a task scheduling unit, which is used to parse the printing task, allocate subtasks with higher real-time requirements to the sub-core modules, and centrally process non-real-time tasks.

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