Hybrid imaging sensor with high sampling point distribution

Abstract

The present disclosure provides a hybrid imaging sensor with a high sampling point distribution. The pixel array includes a photodiode and a color filter array. The photodiode of the first fraction is included in the CIS pixel and the photodiode of the second fraction is included in the hybrid CIS / EVS pixel. The photodiodes are arranged in groups. A color filter array includes first, second, and third color filters arranged in a damascene pattern over the photodiode. Each packet includes a plurality of sub-packets including a first sub-packet disposed under at least one of the first color filters, a second sub-packet disposed under at least one of the second color filters, and a third sub-packet disposed under at least one of the third color filters. Each of the first, second, and third sub-packets includes at least one CIS pixel, and at least one of the first photodiode sub-packets further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 608,150, filed on Dec. 8, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure generally relates to image sensors, and more particularly (but not exclusively) to hybrid image sensors having a high sampling point distribution. Background Art

[0004] Image sensors have become ubiquitous and are now widely used in digital cameras, mobile phones, cameras, and medical, automotive, and other applications. As image sensors are integrated into a wider range of electronic devices, there is a desire to enhance their functionality, performance metrics, and the like in as many ways as possible (e.g., resolution, power consumption, dynamic range, etc.) through both device architecture design and image acquisition processing. Technologies for manufacturing image sensors have been evolving rapidly and continuously. For example, the requirements for higher resolution and lower power consumption have driven further miniaturization and integration of these devices.

[0005] A typical image sensor operates in response to incident image light from an external scene onto the image sensor. The image sensor includes a pixel array having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charges after absorbing the image light. The image charges generated by the pixels can be measured as an analog output image signal on column bit lines, which varies according to the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light, and the image light is read out as an analog image signal from the column bit lines and converted into a digital value to generate a digital image (e.g., image data) representing the external scene. The analog image signal on the bit lines is coupled to a readout circuit, which includes an input stage having an analog-to-digital conversion (ADC) circuit to convert these analog image signals from the pixel array into digital image signals. Summary of the Invention

[0006] On the one hand, the present disclosure provides a pixel array, which includes: a plurality of photodiodes arranged in rows and columns, wherein the plurality of photodiodes of the first fraction are included in CMOS image sensor (CIS) pixels selectively coupled to a first readout circuit, wherein the plurality of photodiodes of the second fraction are included in hybrid CIS / event-based vision sensor (EVS) pixels selectively coupled to one of the first readout circuit or a second readout circuit, wherein the plurality of photodiodes are arranged in photodiode groups; and a color filter array including a plurality of color filters arranged in a mosaic pattern over the plurality of photodiodes, wherein the color filter array includes a first color filter, a second color filter, and a third color filter, wherein each photodiode group includes a plurality of photodiode sub-groups, the plurality of photodiode sub-groups including a first photodiode sub-group disposed under at least one of the first color filters, a second photodiode sub-group disposed under at least one of the second color filters, and a third photodiode sub-group disposed under at least one of the third color filters, wherein at least one photodiode of each of the first photodiode sub-group, the second photodiode sub-group, and the third photodiode sub-group is included in the CIS pixels, and wherein at least one photodiode of the first photodiode sub-group is included in the hybrid CIS / EVS pixels.

[0007] On the other hand, the present disclosure provides a pixel circuit, which includes: a pixel array including a plurality of pixels arranged in rows and columns, wherein each pixel includes: at least one photodiode configured to photogenerate image charges in response to incident light; a floating diffusion region coupled to receive the image charges from the at least one photodiode; and at least one transfer transistor coupled between the corresponding one of the at least one photodiode and the floating diffusion region to transfer the image charges from the corresponding one of the at least one photodiode to the floating diffusion region; and a color filter array disposed over the pixel array, wherein the color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over one of the pixels, wherein each of the plurality of pixels is selectively coupled to a first readout circuit, wherein the plurality of pixels includes a first subset of the pixels configured to be disconnected from a second readout circuit and coupled to the first readout circuit to read a first set of data signals, and a second subset of the pixels selectively coupled to the second readout circuit to read a second set of data signals, and wherein in each NxN pixel group, each row of pixels includes at least one pixel included in the first subset of the pixels and disposed under at least one of the color filters.

[0008] On the other hand, the present disclosure provides an imaging system, comprising: a pixel circuit including a pixel array having a plurality of pixels arranged in rows and columns and a color filter array disposed over the pixel array, wherein the color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over one of the pixels, wherein each pixel includes: at least one photodiode configured to photogenerate image charges in response to incident light; a floating diffusion region coupled to receive the image charges from the at least one photodiode; and at least one transfer transistor coupled between a corresponding one of the at least one photodiodes and the floating diffusion region to transfer the image charges from the corresponding one of the at least one photodiodes to the floating diffusion region; a first readout circuit coupled to each of the plurality of pixels to read out a first set of data signals; a second readout circuit, wherein the plurality of pixels includes a first subset of the pixels not coupled to the second readout circuit and a second subset of the pixels coupled to the second readout circuit, wherein the second readout circuit is coupled to each of the pixels included in the second subset to read out a second set of data signals; and a mode switch circuit configured to selectively couple an individual one of the pixels to the first readout circuit or the second readout circuit based on an operating mode of the individual one of the pixels included in the second subset, wherein in each NxN pixel grouping, each row of pixels includes at least one pixel included in the first subset of the pixels and disposed below at least one of the color filters, where N is an integer. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Non-limiting and non-exhaustive embodiments of the present disclosure are described with reference to the following figures, wherein like reference numerals refer to like components throughout the various views unless otherwise specified.

[0010] Figure 1 Illustrate an example of a stacked hybrid complementary metal oxide semiconductor (CMOS) image sensor (CIS) having an event-based vision sensor (EVS) system in accordance with the teachings of the present disclosure.

[0011] Figure 2 Illustrate an example of a pixel circuit of a four-Bayer filter array having an example hybrid imaging sensor in accordance with the teachings of the present disclosure.

[0012] Figure 3 Schematically illustrate an example of a pair of pixels of an example hybrid imaging sensor in accordance with the teachings of the present disclosure.

[0013] Figure 4 Schematically illustrate an example of a plurality of pixel circuits of an example hybrid imaging sensor in accordance with the teachings of the present disclosure.

[0014] Figure 5 Describe an example of a pixel circuit of a four - Bayer filter array with an example hybrid imaging sensor according to the teachings of the present disclosure.

[0015] Figure 6 Describe an example of a pixel circuit of a four - Bayer filter array with an example hybrid imaging sensor according to the teachings of the present disclosure.

[0016] Figure 7 Describe an example of a pixel circuit of a four - Bayer filter array with an example hybrid imaging sensor according to the teachings of the present disclosure.

[0017] Figure 8 Describe an example of a pixel circuit of a four - Bayer filter array with an example hybrid imaging sensor and dual - phase detection (DPD) capability according to the teachings of the present disclosure.

[0018] Figure 9 Describe an example of a pixel circuit of a four - RGBC color filter array with an example hybrid imaging sensor according to the teachings of the present disclosure.

[0019] Figure 10 Describe an example of a pixel circuit of a four - RGBC color filter array with an example hybrid imaging sensor according to the teachings of the present disclosure.

[0020] Figure 11 Describe an example of a pixel circuit of a four - Bayer filter array with an example hybrid imaging sensor according to the teachings of the present disclosure.

[0021] Figure 12 Describe an example of a pixel circuit of a four - Bayer filter array with an example hybrid imaging sensor according to the teachings of the present disclosure.

[0022] Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Those skilled in the art will appreciate that the elements in the drawings are illustrated for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to assist in improving the understanding of various embodiments of the present disclosure. Additionally, commonly known elements that are useful or necessary in a commercially viable embodiment are typically not depicted so as not to obscure these various embodiments of the technology. Detailed Description

[0023] I. Overview

[0024] The disclosure relates to examples of imaging systems having pixel circuits that provide simultaneous hybrid functionality with a high sampling point distribution. In the following description, numerous specific details are set forth to provide a thorough understanding of the examples. However, one of ordinary skill in the relevant art will recognize that the techniques described herein may be practiced without one or more of the specific details or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations have not been shown or described in detail to avoid obscuring certain aspects.

[0025] Reference throughout this specification to "one example" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example of the present disclosure. Thus, the appearances of the phrases "in one example" or "in an embodiment" throughout the specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more examples.

[0026] For ease of description, spatial relative terms (e.g., "below", "beneath", "above", "below", "over", "on", "top", "bottom", "left", "right", "center", "middle", and the like) may be used herein to describe the relationship of one element or feature to another (additional) element or feature, as illustrated in the figures. It should be understood that, in addition to the orientation depicted in the figures, the spatial relative terms are also intended to cover different orientations of the device during use or operation. For example, if the device in the figures is rotated or flipped, an element described as "below" or "beneath" or "under" other elements or features will be oriented "above" the other elements or features. Thus, the exemplary terms "below" or "beneath" can cover both an upper and a lower orientation. The device may be oriented in other ways (rotated 90 degrees or at other orientations), and the spatial relative descriptors used herein are interpreted accordingly. Additionally, it should be understood that when an element is referred to as being "between" two other elements, the element may be the only element between the two other elements or there may also be one or more intervening elements.

[0027] It should be further understood that although the terms first, second, third, etc. may be used herein to describe various elements, these elements should not be limited by these terms and are not used to determine the process sequence or formation order of the associated elements. Unless otherwise indicated, these terms are only used to distinguish one element from another. Thus, the first element discussed below may be referred to as the second element without departing from the teachings of the disclosed embodiments.

[0028] Throughout this specification, several terms of the art are used. These terms have their ordinary meaning in the art, unless specifically defined herein or the context in which they are used otherwise clearly indicates. It should be noted that element names and symbols may be used interchangeably throughout this document (e.g., Si and silicon); however, both have the same meaning.

[0029] As will be discussed, various examples of imaging systems are disclosed that have pixel circuits providing simultaneous hybrid functionality (e.g., simultaneous image / video capture and event-driven sensing capabilities) with a high sampling point distribution. Although normal image / video sensors provide good image and / or video capture capabilities, one limitation of normal image / video sensors is that normal image sensors do not provide ultra-high frame rate and ultra-high speed capture capabilities, which can be useful in various applications such as machine vision, gaming, and artificial intelligence sensing. Attempts to provide such ultra-high frame rate and ultra-high speed capabilities to typical image / video sensors have led to compromise solutions that provide poorer quality image capture compared to their normal image sensor counterparts.

[0030] It should be appreciated that circuit designs in accordance with the teachings of the present disclosure address at least some of the problems discussed above. For example, the image sensors disclosed herein can operate in a hybrid mode, where for various event-driven (or other) applications, the image sensor simultaneously uses a first set of pixels to provide good image and video capture capabilities and uses a second set of pixels to sense events from pixels at ultra-high frame rates and at ultra-high speeds. Additionally, the first and second sets of pixels can be arranged in a high sampling point distribution to provide improved contrast and / or modulation transfer function (MTF) compared to other image sensors.

[0031] Thus, as will be shown and described in the various examples below, an example pixel includes a plurality of photodiodes and a color filter array arranged in rows and columns. A first fraction of the plurality of photodiodes is of a CMOS image sensor (CIS) pixel type, and a second fraction of the plurality of photodiodes is of a hybrid CIS / event-based vision sensor (EVS) pixel type. The plurality of photodiodes are arranged in photodiode groups. The color filter array includes a plurality of color filters arranged in a mosaic pattern over the plurality of photodiodes. The color filter array includes a first color filter, a second color filter, and a third color filter. Each photodiode group includes a plurality of photodiode sub-groups, the plurality of photodiode sub-groups including a first photodiode sub-group disposed under at least one of the first color filters, a second photodiode sub-group disposed under at least one of the second color filters, and a third photodiode sub-group disposed under at least one of the third color filters. Each of the first photodiode sub-group, the second photodiode sub-group, and the third photodiode sub-group includes at least one CIS pixel. Additionally, at least one of the first photodiode sub-groups further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters.

[0032] In some embodiments, an example pixel circuit includes a pixel array and a color filter. The pixel array includes pixels arranged in rows and columns, and each pixel includes at least one photodiode, a floating diffusion region coupled to the at least one photodiode, and at least one transfer transistor coupled between the at least one photodiode and the floating diffusion region. The color filter is disposed over the pixel array and includes color filters disposed over the pixels. Each pixel is coupled to a first readout circuit. As will be discussed in various examples below, the pixels include a first subset of pixels and a second subset of pixels. In various examples, the second subset of pixels is also selectively coupled to a second readout circuit, and the first subset of pixels is the remaining subset of pixels that are not coupled to the second readout circuit. In other words, the second subset of pixels is a subset of all pixels that includes some but not all of the pixels coupled to the first readout circuit in accordance with the teachings of the present disclosure. In each 4x4 pixel grouping, each row of pixels includes at least one pixel that is included in the first subset of pixels (e.g., not coupled to the second readout circuit) and is disposed under at least one of the color filters.

[0033] For illustration, Figure 1 An example of a stacked complementary metal-oxide semiconductor (CMOS) image sensor (CIS) having an event-based vision sensor (EVS) system 100 in accordance with the teachings of the present disclosure is illustrated. As shown in the depicted example, the stacked CIS having the EVS system 100 includes a first die 102, a second die 104, and a third die 106 that are stacked and coupled together in a stacked chip configuration. In various examples, the first die 102, the second die 104, and the third die 106 are semiconductor dies that include a suitable semiconductor material (e.g., silicon). In the example, the first die 102 (also referred to as the top die 102 of the stacked CIS having the EVS system 100) includes a pixel array 108. The third die 106 (also referred to as the bottom die 106 of the stacked CIS having the EVS system 100) includes an image readout circuit 116 (also referred to as an image readout mixed-signal circuitry). The image readout circuit 116 can be coupled to the pixel array 108 of the top die 102 through column-level connections 110 for normal image readout. In various examples, the column-level connections 110 for normal image readout are implemented from the column bitlines of the pixel array 108 using through-silicon vias (TSVs) that extend between the top die 102 and the bottom die 106 and are routed through the second die 104.

[0034] In various examples, the pixel array 108 is a two-dimensional (2D) array comprising a plurality of pixel units (also referred to as “pixels”), each pixel unit comprising at least one photodiode exposed to incident light. As illustrated in the depicted example, the pixels are arranged in rows and columns to acquire image data of a person, location, object, etc., which can then be used to reproduce an image and / or video of the person, location, object, etc. As further discussed herein, the pixels of the first fraction are CMOS image sensor (CIS) pixels, and the pixels of the second fraction are hybrid CIS / event-based vision sensor (EVS) pixels. In an example, each CIS pixel comprises at least one photosensor (e.g., a photodiode) that can be configured to photogenerate an image charge in response to incident light. After each CIS pixel has acquired its image charge, the corresponding analog image charge data is read out by an image readout circuit 116 in the bottom die 106 via column bit lines. In various examples, the image charge from each row of the pixel array 108 can be read out in parallel by the image readout circuit 116 via the column bit lines.

[0035] In various examples, the image readout circuit 116 in the bottom die 106 comprises amplifiers, analog-to-digital converter (ADC) circuitry, associated analog support circuitry, associated digital support circuitry, etc. for normal image readout and processing. In some examples, the image readout circuit 116 may also comprise event-driven readout circuitry, as will be described in more detail below. In operation, the photogenerated analog image charge signal is read out from the pixel units of the pixel array 108, amplified and converted to a digital value in the image readout circuit 116. In some examples, the image readout circuit 116 can read out one row of image data at a time. In other examples, the image readout circuit 116 can use various other techniques (not illustrated), such as serial readout or all pixels simultaneously full parallel readout, to read out the image data. The image data can be stored or even manipulated by applying post-image effects (e.g., cropping, rotation, red-eye removal, brightness adjustment, contrast adjustment, etc.).

[0036] In a depicted example, the second die 104 (also referred to as the middle die 104 of the stacked CIS with the EVS system 100) includes an event-driven sensing array 112 coupled to the pixel array 108 in the top die 102. In various examples, the event-driven sensing array 112 is coupled to the pixels of the pixel array 108 via one or more pairs of hybrid bonds disposed between the top die 102 and the middle die 104. In one example, the event-driven sensing array 112 includes an event-driven circuit array. As will be discussed, in one example, in accordance with the teachings of the present disclosure, each of the event-driven circuits in the event-driven sensing array 112 is coupled to at least one of the plurality of pixels of the pixel array 108 via at least one pair of hybrid bonds between the top die 102 and the middle die 104 to asynchronously detect events occurring in the light incident on the pixel array 108.

[0037] In some embodiments, pixels of the second resolution (i.e., hybrid CIS / EVS pixels) may be selectively coupled to the event-driven readout circuit of the event-driven sensing array 112. When operating as EVS pixels, the photosensors of the hybrid CIS / EVS pixels can be used to track changes in the intensity of light incident on the photosensors from an external scene. Specifically, the photosensors can photogenerate image charge (electrons or holes) or photocurrent in response to incident light from the external scene. The photogenerated image can then be provided to the coupled event-driven circuits of the event-driven sensing array 112 via an EVS connection (e.g., a hybrid bond). In some embodiments, the event-driven circuit includes: (i) a photocurrent-to-voltage converter coupled to the photosensor to convert the photocurrent generated by the photosensor into a voltage; and (ii) a filter amplifier coupled to the photocurrent-to-voltage converter to generate a filtered and amplified signal in response to the voltage received from the photocurrent-to-voltage converter. The event-driven circuit may further include a threshold comparison circuit to determine and generate an event detection signal in response to an event asynchronously detected in the incident light received from the external scene. For example, when a change in the pixel signal at the output of the filter amplifier relative to a reference pixel signal is detected to be greater than a predetermined voltage threshold, the threshold comparison circuit may generate an event detection signal. It should be understood that the described event-driven readout circuit is one example implementation for reading out event signals. Various implementations of readout circuitry and readout schemes for event vision sensor pixels are well known. Therefore, details regarding the circuitry and readout techniques for event-driven circuits are omitted herein for the sake of brevity and to clarify aspects of the present technology.

[0038] In various examples, corresponding event detection signals are generated by event-driven circuitry in the event-driven sensing array 112. The event detection signals can be coupled to be received and processed by the event-driven peripheral circuitry 114, which in one example is disposed in the middle die 104 around the periphery of the event-driven sensing array 112, as Figure 1 shown. The depicted example also illustrates column-level connections 110 for normal image readout routed through the middle die 104 between the top die 102 and the bottom die 106.

[0039] II. Various Examples of Pixel Circuits

[0040] Figure 2 An example of an NxN (e.g., 4x4) pixel circuit 207 including a pixel array 208 in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 2 the pixel array 208 can be an example of the pixel array 108 in a stacked CIS having an EVS system 100 as shown in Figure 1 and the similarly named and numbered elements above are similarly coupled and operative hereinafter.

[0041] In the illustrated example, the pixel array 208 includes a plurality of pixel units or pixels 219 arranged in Y rows and X columns. For example, each pixel 219 can include four sub-pixels 218 each including a photodiode. Thus, the pixel array 208 includes a plurality of photodiodes arranged in rows and columns and also arranged in groups of photodiodes. In the illustrated example, four photodiodes in the four sub-pixels 218 are coupled together to share a floating diffusion region 220 (represented as an "X" above the four sub-pixels 218) such that each pixel 219 includes one floating diffusion region 220. Thus, each pixel 219 includes four photodiodes and the pixel array 208 is capable of providing quad-phase detection (QPD), in which case the top / bottom and / or left / right photodiodes can be read out separately to provide phase information. In various examples, the groupings of photodiodes correspond to a 4x4 pattern of four photodiodes (e.g., Figure 2 one such grouping is illustrated in Figure 2 . The groupings of photodiodes can include multiple sub-groupings of photodiodes (e.g., 2x2 sub-groupings of photodiodes). In various examples, the sub-groupings of photodiodes correspond to a 2x2 pattern of four photodiodes (e.g., Figure 3 the 4x4 photodiodes illustrated in

[0042] The pixel circuit 207 may further include a color filter array 209 arranged in a mosaic pattern and disposed on top of the pixel array 208. In one example, the color filter array 209 includes a plurality of color (e.g., R, G, B, C) filters 230 each having one of a plurality of colors (e.g., red, green, blue, or transparent) and disposed on top of one of the pixels 219. The color filter array 209 may include a first color filter (e.g., blue and / or transparent), a second color filter (e.g., green and / or transparent), and a third color filter (e.g., red and / or transparent). Each of the first, second, and third color filters may be configured to have a different light response. A particular light response may mean that the color filter has high sensitivity to certain parts of the electromagnetic spectrum while having low sensitivity to other parts of the spectrum. A first sub-group of photodiodes may be disposed under at least one of the first color filters, a second sub-group of photodiodes may be disposed under at least one of the second color filters, and a third sub-group of photodiodes may be disposed under at least one of the third color filters.

[0043] In Figure 2 it, the color filter array 209 includes a four - Bayer filter array such that four color filters 230 of the same color are disposed on top of a 2x2 grouping of pixels 219 arranged in two adjacent rows and two adjacent columns. For example, the pixels 219 in rows 1 to 2 and columns 1 to 2 are disposed under a blue (e.g., first) filter 230 (labeled "B"), (i) the pixels 219 in rows 1 to 2 and columns 3 to 4 and (ii) the pixels 219 in rows 3 to 4 and columns 1 to 2 are disposed under a green (e.g., second) filter 230 (labeled "G"), and the pixels 219 in rows 3 to 4 and columns 3 to 4 are disposed under a red (e.g., third) filter 230 (labeled "R"). In other examples, it should be understood that, in accordance with the teachings of the present disclosure, some but not all of the red, green, and blue color filters may be replaced with transparent filters (e.g., transparent, white, full - color, etc.) such that the transparent filters are interspersed among the red, green, and blue color filters.

[0044] The pixel circuit 207 may further include a plurality of microlenses 240 disposed on top of the pixel array 208 (e.g., on top of the plurality of photodiodes). Specifically, the microlenses 240 are sized and distributed such that each microlens 240 is disposed on top of each pixel 219 or the photodiodes of a corresponding 2x2 pattern. The microlenses 240 may help focus incident light onto the underlying photodiodes included in the pixels 219, thereby improving the sensitivity of the pixel circuit 207 and the overall image quality. The microlenses 240 may also reduce crosstalk between adjacent pixels 219, thereby enhancing the ability of the pixel circuit 207 to accurately capture fine details and colors.

[0045] Each of the pixels 219 may be coupled to a first readout circuit, such as Figure 1The image readout circuit 116 shown in. Thus, all pixels 219 can be used to provide CIS imaging information. In addition, pixel 219 may include a first subset 219a of pixels 219 (patterned in Figure 2 ), and a second subset 219b of pixels 219. A second subset is a subset of a set that contains some but not all of the elements of the original set. In various examples, each of the pixels 219 may be selectively coupled to the first readout circuit. For example, during hybrid CIS and EVS sensing operations, only the pixels of the second subset 219b are configured to be coupled to a second readout circuit, such as one of the event-driven readout circuits included in the event-driven sensing array 112 shown in Figure 1 . During hybrid CIS and EVS sensing operations, the pixels of the first subset 219a are coupled to the first readout circuit but not to the second readout circuit (e.g., disconnected from the second readout circuit). Thus, a first fraction of the photodiodes is included in the first subset 219a (e.g., CIS pixels) and a second fraction of the photodiodes is included in the second subset 219b (e.g., hybrid CIS / EVS pixels). In the 4x4 pattern of the four-photodiode example illustrated in Figure 2 , the first subset 219a includes 50% of the pixels 219 and the second subset 219b includes 50% of the pixels 219. The second subset 219b of pixels 219 may be arranged in a checkerboard pattern such that the second subset 219b contains (i) pixels 219 in odd rows and even columns and (ii) pixels 219 in even rows and odd columns. Those of ordinary skill in the art will appreciate that in other examples, the positions of the pixels in the second subset 219b and the pixels in the first subset 219a may be reversed (e.g., the second subset 219b contains (i) pixels 219 in odd rows and odd columns and (ii) pixels 219 in even rows and even columns).

[0046] In various examples, the pixel circuit 207 may operate in a first mode, a second mode, and a third mode. In the first mode, all pixels 219 are configured to provide CIS information, for example, by a first readout circuit, such that the pixel circuit 207 provides an image corresponding to an external scene without image quality loss compared to a conventional only-CIS pixel circuit. In the second mode, pixels in a first subset 219a are configured to couple to a first readout circuit to continue providing CIS information, and pixels in a second subset 219b are configured to couple to a second readout circuit to provide event detection signals (e.g., providing photocurrent for event detection functionality) and / or other non-CIS information (e.g., intensity change or motion information). Because the pixels in the second subset 219b are disposed under the RGB filter 230, the non-CIS information may be provided as R+G+G+B or gray, which may result in reduced sensitivity for event detection (or other functionality) in the second mode but may provide improved image quality in the first mode. Thus, the second mode is a hybrid mode in which the pixel circuit 207 provides both CIS information and non-CIS information. In the third mode, all pixels 219 are configured to provide non-CIS information. For example, in the third mode, pixels in the first subset 219a and pixels in the second subset 219b may be configured to couple to the second readout circuit to provide event detection signals (e.g., providing photocurrent for event detection functionality) and / or other non-CIS information (e.g., intensity change or motion information).

[0047] It should be understood that in accordance with the teachings of the present disclosure, in Figure 2In the example NxN (e.g., 4x4) pixel circuit 207 shown, when the pixels of the second subset 219b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 219a configured to provide CIS information under a filter having the same or similar chromatographic response. In other words, each of the first photodiode sub-group, the second photodiode sub-group, and the third photodiode sub-group contains at least one CIS pixel, and at least one of the first photodiode sub-group further contains at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters. In various examples, at least one of the second photodiode sub-group further contains at least one hybrid CIS / EVS pixel disposed under at least one of the second color filters, and / or at least one of the third photodiode sub-group further contains at least one hybrid CIS / EVS pixel disposed under at least one of the third color filters. Thus, it should be understood that, in accordance with the teachings of the present disclosure, in the hybrid mode, all sampling sites (pixels) of any particular color in the 4x4 example pixel circuit 207 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 219b that provides an event detection signal in the hybrid mode, there is at least one corresponding pixel of the first subset 219a disposed under a filter having the same or similar color selectivity in the example 4x4 pixel circuit 207 that provides corresponding color imaging information.

[0048] Figure 3 Schematically illustrate a first pixel 319a coupled to a second pixel 319b in accordance with the teachings of the present disclosure. It should be understood that Figure 3 the first pixel 319a may be an example of one of the pixels included in Figure 2 the second subset 219b shown in Figure 3 the second pixel 319b may be an example of one of the pixels included in Figure 2 the first subset 219a shown in

[0049] In the illustrated example, the first pixel 319a includes four photodiodes 350a (e.g., each corresponding to one of the sub-pixels 218), four transfer transistors 352a, and a floating diffusion region FD 320a. The four photodiodes 350a are each configured to photogenerate image charge in response to incident light, FD 320a is coupled to receive image charge from the four photodiodes 350a, and the four transfer transistors 352a are coupled between the corresponding ones of the four photodiodes 350a and FD 320a to transfer image charge from the corresponding photodiode 350a to FD 320a.

[0050] In the illustrated example, the second pixel 319b includes four photodiodes 350b (e.g., each corresponding to one of the sub-pixels 218), four transfer transistors 352b, and a floating diffusion region FD 320b. The four photodiodes 350b are each configured to photogenerate image charge in response to incident light, the FD 320b is coupled to receive the image charge from the four photodiodes 350b, and the four transfer transistors 352b are coupled between corresponding ones of the four photodiodes 350b and the FD 320b to transfer the image charge from the corresponding photodiode 350b to the FD 320b. In another example, it should be understood that the first pixel 319a may include a different number of photodiodes 350a and transfer transistors 352a (e.g., one, two, etc. photodiodes 350a / transfer gates 352a, for example), and the second pixel 319b may also include a different number of photodiodes 350b and transfer transistors 352b (e.g., one, two, etc. photodiodes 350b / transfer transistors 352b, for example). In some embodiments, the second pixel 319b may further include a dual floating diffusion region (DFD) switch 370 (e.g., a transistor, a standard switch, etc. as shown), a reset transistor 372, a source follower transistor 374, and a row select transistor 376. The DFD switch 370 may selectively couple the FD 320b to a MOS capacitor 380, and the MOS capacitor 380 is coupled to ground for configuring the conversion gain for the corresponding pixel. The reset transistor 372 may selectively couple the FD 320b to a voltage source (e.g., for a reset operation). The source follower transistor 374 includes a gate terminal coupled to the FD 320b. The source follower transistor 374 is coupled between a voltage source (e.g., the same or a different voltage source as the voltage source to which the reset transistor 372 is coupled) and the row select transistor 376, and the row select transistor 376 is coupled to a bit line.

[0051] The first pixel 319a may be coupled to the second pixel 319b via a mode switch circuit 360, and the mode switch circuit 360 is configured to selectively couple the first pixel 319a to (i) a first readout circuit (e.g., a first mode) (e.g., Figure 1 the image readout circuit 116 shown in Figure 1One of the event-driven readout circuits in the event-driven sensing array 112 shown in [the figure] or (iii) both the second pixel 319b circuit and the second readout circuit (third mode). In the third mode, the four photodiodes 350a of the first pixel 319a are coupled to the second readout circuit through the EVS switch 362, and the four photodiodes 350b of the second pixel 319b are also coupled to the second readout circuit through the CIS switch 364 and the EVS switch 362. The mode switch circuit 360 can be located on the same die as the first pixel 319a and / or the second pixel 319b or on different dies. The mode switch circuit 360 includes an EVS switch 362 (e.g., a transistor, a standard switch, etc. as shown) and a CIS switch 364 (e.g., a transistor, a standard switch, etc. as shown) each coupled to the FD 320a. The EVS switch 362 can selectively couple the FD 320a to the second readout circuit. The CIS switch 364 can selectively couple the FD 320a to the second pixel 319b and thus to the first readout circuit, as described in more detail below.

[0052] Figure 4 Schematically illustrates an example of a pixel circuit 407 according to the teachings of the present disclosure. It should be understood that Figure 4 the pixel circuit 407 can be Figure 2 the example of the pixel circuit 207 shown in [the figure], and the similarly named and numbered elements above are similarly coupled and function below.

[0053] The pixel circuit 407 can include a pixel array 408, a color filter array 409 disposed above the pixel array 408, and a plurality of microlenses 440 disposed above each of the pixels in the pixel array 408. In the illustrated example, the pixel array 408 includes a first pixel 319a and a second pixel 319b in a certain pattern or arrangement, as described above in Figure 3 [the figure]. For example, as depicted in the example shown in Figure 4 [the figure], eight pixels in the first pixel 319a are arranged in a checkerboard pattern such that the first pixel 319a is in (i) odd rows and even columns and (ii) even rows and odd columns. The pixel array 408 also includes eight pixels in the second pixel 319b arranged in a checkerboard pattern offset from the checkerboard pattern of the first pixel 319a. It should be understood that the pixel array 408 can include different arrangements and / or ratios of the first pixel 319a and the second pixel 319b. For example, although 8 / 16 (e.g., 50%) of the pixels in the illustrated pixel array 408 include the first pixel 319a and the remaining 8 / 16 (e.g., 50%) of the pixels in the illustrated pixel array 408 include the second pixel 319b, in other examples, 1 / 16, 2 / 16, 3 / 16, 4 / 16, or other ratios of the pixels in the pixel array can include the first pixel 319a.

[0054] Each second pixel 319b may be disposed under a color filter (e.g., color filter 230) having one of a plurality of colors (e.g., red, green, or blue). Each first pixel 319a may be disposed under a color filter (e.g., color filter 230) having one of a plurality of colors (e.g., red, green, or blue), a non-RGB or transparent filter, or without a filter, as further described herein. In various instances where the first pixel 319a is disposed under a color filter, the pixel circuit 407 may be Figure 2 the pixel circuit 207 shown in or a schematic description corresponding to the pixel circuit 207. In various instances where the first pixel 319a is disposed under a non-RGB or transparent filter (or without a filter), the pixel circuit 407 may be Figure 9 and 10 the pixel circuits shown in or corresponding to Figure 9 and 10 the schematic descriptions of the pixel circuits shown in.

[0055] Referring together to Figure 3 and 4 , the EVS switch 362 and the CIS switch 364 of the mode switch circuit 360 may be controlled by a plurality of switch signals. In the illustrated example, the EVS switch 362 coupled to the first pixels 319a in columns 1 and 2 is controlled by the switch signal EVS_SW_evs_even 412, the CIS switch 364 coupled to the first pixels 319a in columns 1 and 2 is controlled by the switch signal CIS_SW_evs_even 414, the CIS switch 364 coupled to the first pixels 319a in columns 3 and 4 is controlled by the switch signal CIS_SW_evs_odd 416, and the EVS switch 362 coupled to the first pixels 319a in columns 3 and 4 is controlled by the switch signal EVS_SW_evs_odd 418. It should be understood that the EVS switch 362 and the CIS switch 364 of the mode switch circuit 360 may be controlled by different combinations of switch signals.

[0056] Continuing together Figure 3 and 4In the example depicted, the pixel circuit 407 can operate in a first mode by turning on switch signals 414 and 416 and turning off switch signals 412 and 418. In the first mode, the image charge photogenerated by the photodiode 350a of the first pixel 319a is completely guided via the CIS switch 364 to the gate terminal of the source follower transistor 374 included in a second pixel 319b vertically adjacent to the particular first pixel 319a. The image charge photogenerated by the photodiode 350b of the second pixel 319b is also completely guided to the gate terminal of the corresponding source follower transistor 374. The information then travels to the bit line and is read out by the first readout circuit (e.g., Figure 1 the image readout circuit 116 shown in ). Thus, when the pixel circuit 407 operates in the first mode, all pixels 319a, 319b included in the pixel array 408 provide CIS information with no loss of image quality compared to a conventional CIS-only pixel array.

[0057] The pixel circuit 407 can operate in a second mode by asserting switch signals 412 and 418 and de-asserting switch signals 414 and 416. In the second mode, the image charge photogenerated by the photodiode 350a of the first pixel 319a is completely guided via the EVS switch 362 to a second readout circuit, e.g., one of the event-driven readout circuits included in Figure 1 the event-driven sensing array 112 shown in . The image charge photogenerated by the photodiode 350b of the second pixel 319b continues to be completely guided to the gate terminal of the corresponding source follower transistor 374 since the CIS switch 362 is turned off by the corresponding switch signals CIS_SW_evs_even 414 and switch signal CIS_SW_evs_odd signal 416. The information then travels to the bit line and is read out by the first readout circuit (e.g., Figure 1 the image readout circuit 116 shown in ). Thus, when the pixel circuit 407 operates in the second mode, the signal provided by the first pixel 319a is used by the second readout circuit to collect and process non-CIS information (e.g., event detection, phase detection autofocus, etc.), while the signal provided by the second pixel 319b is used by the first readout circuit to collect and process CIS information. In other words, the pixel circuit 407 provides both CIS information (e.g., from the second pixel 319b) and non-CIS information (e.g., from the first pixel 319a) when operating in the second mode.

[0058] The pixel circuit 407 can operate in the third mode by turning on all the switch signals 412, 414, 416, 418. In the third mode, since all the EVS switches 362 and CIS switches 364 of the mode switch circuit 360 are turned on, the image charges generated by the photodiodes 350a of the first pixel 319a and the photodiodes 350b of the second pixel 319b are guided to the second readout circuit, such as one of the event-driven readout circuits included in the event-driven sensing array 112 shown in Figure 1 . Thus, when the pixel circuit 407 operates in the third mode, all the pixels 319a, 319b included in the pixel array 408 provide EVS information or non-CIS information.

[0059] By using a separate set of switch signals to control the EVS switches 362 and CIS switches 364 of the first pixel 319a coupled to columns 1 and 2 (e.g., using switch signals 412 and 414) and columns 3 and 4 (e.g., using switch signals 416, 418), a more refined control of the pixel circuit 407 can be achieved. For example, a part of the pixel circuit 407 in columns 1 and 2 can operate in one of the three modes, while a part of the pixel circuit 407 in columns 3 and 4 can operate in a different one of the three modes. It should be understood that a greater or lesser degree of refined control can be achieved by wiring the EVS switches 362 and CIS switches 364 differently.

[0060] In various examples, a group of four pixels may not be coupled to each other to neither provide vertical charge merging nor horizontal charge merging, and when operating in the merging mode, the pixel circuit can result in a noise penalty corresponding to 4C1+H+V-SF (a group of 4 units (2x2) is merged ("4C1"), and additional horizontal and vertical merging is performed by a source follower (SF) transistor ("H+V-SF")). In various examples, four pixels may be coupled to each other to provide vertical charge merging, and when operating in the merging mode, the pixel circuit can result in a noise penalty corresponding to 2x4+H-SF (a group of 2x4 units is merged, and additional horizontal merging is performed by a source follower (SF) transistor ("H-SF")). In various examples, four pixels may be coupled to each other to provide vertical and horizontal charge merging, and when operating in the merging mode, the pixel circuit can result in noise equivalent to 4x4.

[0061] In various examples, a group of two pixels may not be coupled to each other to neither provide vertical charge merging nor horizontal charge merging, and when operating in the merging mode, the pixel circuit can result in noise equivalent to 2x2+H-SF (noise penalty due to SFbin). In various examples, two pixels may be coupled to each other to provide horizontal charge merging, and when operating in the merging mode, the pixel circuit can result in noise equivalent to 4x2.

[0062] Refer together to Figures 2 to 4 , in each 4x4 pixel group, each row of pixels includes at least one pixel that is included in a first subset of the pixels and is disposed below at least one of the color filters. Additionally, in various instances, in each 4x4 pixel group, each row of pixels includes at least one pixel that is included in a second subset of the pixels. Additionally or alternatively, in various instances, in each 4x4 pixel group, each column of pixels includes (i) at least one pixel that is included in the second subset of the pixels and / or (ii) at least one pixel that is included in the first subset of the pixels and is disposed below at least one of the color filters. Thus, when the imaging system operates in the second mode described above, this results in a high sampling point distribution of CIS information from the pixels included in the first subset and a high sampling point distribution for event detection, phase detection autofocus (PDAF), or other processing performed exclusively on the signals from the pixels included in the second subset. Compared with other image sensors, the high sampling point distribution disclosed herein can result in improved contrast and / or modulation transfer function (MTF).

[0063] III. Additional Examples of Pixel Circuits

[0064] Figure 5 Describe an example of an NxN (e.g., 4x4) pixel circuit 507 including a pixel array 508 according to the teachings of the present disclosure. It should be understood that Figure 5 the pixel array 508 can be an example of the pixel array 108 in the stacked CIS having an EVS system 100 shown in Figure 1 , and the similarly named and numbered elements above are similarly coupled and operative hereinafter.

[0065] In the illustrated example, the pixel array 508 includes a plurality of pixel units or pixels 519 arranged in Y rows and X columns. Each pixel 519 can include at least one photodiode and a floating diffusion region. Thus, the pixel array 508 includes a plurality of photodiodes arranged in rows and columns and also arranged in photodiode groups. In various instances, the photodiode groups correspond to a 4x4 pattern of photodiodes (e.g., Figure 5 illustrates one such group). The photodiode groups can include a plurality of photodiode subgroups (e.g., 2x2 photodiode subgroups). In various instances, the photodiode subgroups correspond to a 2x2 pattern of photodiodes (e.g., as illustrated in Figure 5 ).

[0066] The pixel circuit 507 may further include a color filter array 509 arranged in a mosaic pattern and disposed over the pixel array 508. In one example, the color filter array 509 includes a plurality of color (e.g., RGB) filters 530 each having one of a plurality of colors (e.g., red, green, or blue) and disposed over one of the pixels 519. The color filter array 509 may include a first color filter (e.g., blue and / or transparent), a second color filter (e.g., green and / or transparent), and a third color filter (e.g., red and / or transparent). A first sub-group of photodiodes may be disposed under at least one of the first color filters, a second sub-group of photodiodes may be disposed under at least one of the second color filters, and a third sub-group of photodiodes may be disposed under at least one of the third color filters.

[0067] In Figure 5 , the color filter array 509 includes a four-Bayer filter array such that four color filters 530 of the same color are disposed over a 2x2 grouping of pixels 519 arranged in two adjacent rows and two adjacent columns. For example, the pixels 519 in rows 1 to 2 and columns 1 to 2 are disposed under a blue (e.g., first) color filter 530 (labeled "B"), (i) the pixels 519 in rows 1 to 2 and columns 3 to 4 and (ii) the pixels 519 in rows 3 to 4 and columns 1 to 2 are disposed under a green (e.g., second) color filter 530 (labeled "G"), and the pixels 519 in rows 3 to 4 and columns 3 to 4 are disposed under a red (e.g., third) color filter 530 (labeled "R"). In other examples, it should be understood that, in accordance with the teachings of the present disclosure, some but not all of the red, green, and blue color filters may be replaced with transparent filters (e.g., transparent, white, full-color, etc.) such that the transparent filters are interspersed among the red, green, and blue color filters.

[0068] The pixel circuit 507 may further include a plurality of microlenses 540 disposed over the pixel array 508 (e.g., over the plurality of photodiodes). Specifically, the microlenses 540 are sized and distributed such that each microlens 540 is disposed over each pixel 519 or corresponding photodiode. The microlenses 540 may help focus incident light onto the underlying photodiodes included in the pixels 519, thereby improving the sensitivity of the pixel circuit 507 and the overall image quality. The microlenses 540 may also reduce crosstalk between adjacent pixels 519, thereby enhancing the ability of the pixel circuit 507 to accurately capture fine details and colors.

[0069] Each of the pixels 519 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in Figure 5In the second subset patterning). The second subset is a subset of a set that contains some but not all of the elements of the original set. In various examples, only the second subset 519b of the pixels 519 is configured to selectively couple to a second readout circuit in a particular pixel operation mode (e.g., a hybrid mode), such as one of the event-driven readout circuits included in the event-driven sensing array 112 shown in Figure 1 One of the event-driven readout circuits in the event-driven sensing array 112 shown in. The pixels in the first subset 519a couple to the first readout circuit during a particular pixel operation mode (e.g., a hybrid mode), but do not couple to the second readout circuit. Thus, the first fraction of photodiodes is included in the first subset 519a (e.g., CIS pixels) and the second fraction of photodiodes is included in the second subset 519b (e.g., hybrid CIS / EVS pixels). In Figure 5 In, the first subset 519a includes 75% of the pixels and the second subset 519b includes 25% of the pixels, and the second subset 519b of the pixels 519 is arranged in (i) row 1 and column 2, (ii) row 2 and column 1, (iii) row 3 and column 4, and (iv) row 4 and column 3. Thus, the second subset 519b contains 4 / 16 or 25% of the pixels 519. Those of ordinary skill in the art will appreciate that in other examples, the number and / or location of the pixels in the second subset 519b may vary.

[0070] In various examples, the pixel circuit 507 can operate in a first mode, a second mode, and a third mode. In the first mode, all the pixels 519 are configured to couple to the first readout circuit to provide CIS imaging information corresponding to an external scene, such that the pixel circuit 507 provides an image without loss of image quality compared to a conventional only-CIS pixel circuit. In the second mode, the pixels in the first subset 519a are configured to couple to the first readout circuit to continue to provide CIS information, and the pixels in the second subset 519b are configured to couple to the second readout circuit to provide event detection signals (e.g., provide photocurrent for event detection functionality) and / or other non-CIS information. Since the pixels in the second subset 519b are disposed under the RGB filter 530, the non-CIS information can be provided as R+G+G+B or gray, which may result in reduced sensitivity for event detection (or other functionality) in the second mode, but can provide improved image quality in the first mode. Thus, the second mode is a hybrid mode in which the pixel circuit 507 provides both CIS imaging information and non-CIS information (e.g., information related to events or intensity changes or movement of objects) at the same time. In the third mode, all the pixels 519 are configured to provide non-CIS information. For example, in the third mode, all the pixels 519 can be configured to connect to the second readout circuit through the Figure 3 The CIS switch 364 and the EVS switch illustrated in.

[0071] Thus, it should be understood that in accordance with the teachings of the present disclosure, inFigure 5 In the example NxN (e.g., 4x4) pixel circuit 507 shown, when the pixels of the second subset 519b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 519a configured to provide CIS information under the color filters of the same color. In other words, each of the first photodiode sub-grouping, the second photodiode sub-grouping, and the third photodiode sub-grouping includes at least one CIS pixel, and at least one of the first photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters. In various examples, at least one of the second photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the second color filters, and / or at least one of the third photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the third color filters. Thus, it should be understood that, in accordance with the teachings of the present disclosure, in the second or hybrid mode, all sampling sites of any particular color in the 4x4 example pixel circuit 507 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 519b that provides an event detection signal, there is a corresponding pixel of the first subset 519a disposed under the color filter of the same color selectivity in the example 4x4 pixel circuit 507, which maintains the image quality (e.g., preserves color-space information).

[0072] Figure 6 An example of an NxN (e.g., 4x4) pixel circuit 607 including a pixel array 608 in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 6 the pixel array 608 may be an example of the pixel array 108 included in the stacked CIS having the EVS system 100 shown in Figure 1 and the similarly named and numbered elements above are similarly coupled and operative hereinafter.

[0073] In the illustrated example, the pixel array 608 includes a plurality of pixel units or pixels 619 arranged in Y rows and X columns. Each pixel 619 may include at least one photodiode and a floating diffusion region. Thus, the pixel array 608 includes a plurality of photodiodes arranged in rows and columns and also arranged in photodiode groupings. In various examples, the photodiode groupings correspond to a 4x4 pattern of photodiodes (e.g., Figure 6 one such grouping is illustrated in Figure 6 ). The photodiode groupings may include a plurality of photodiode sub-groupings (e.g., 2x2 photodiode sub-groupings). In various examples, the photodiode sub-groupings correspond to a 2x2 pattern of photodiodes (e.g., as illustrated in

[0074] The pixel circuit 607 may further include a color filter array 609 arranged in a mosaic pattern and disposed over the pixel array 608. In one example, the color filter array 609 includes a plurality of color (e.g., RGB) filters 630 each having one of a plurality of colors (e.g., red, green, or blue) and disposed over one of the pixels 619. The color filter array 609 may include a first color filter (e.g., blue and / or transparent), a second color filter (e.g., green and / or transparent), and a third color filter (e.g., red and / or transparent). A first sub-group of photodiodes may be disposed under at least one of the first color filters, a second sub-group of photodiodes may be disposed under at least one of the second color filters, and a third sub-group of photodiodes may be disposed under at least one of the third color filters.

[0075] In Figure 6 , the color filter array 609 includes a four-Bayer filter array such that four color filters 630 of the same color are disposed over a 2x2 grouping of pixels 619 arranged in two adjacent rows and two adjacent columns. For example, the pixels 619 in rows 1 to 2 and columns 1 to 2 are disposed under a blue (e.g., first) color filter 630 (labeled "B"), (i) the pixels 619 in rows 1 to 2 and columns 3 to 4 and (ii) the pixels 619 in rows 3 to 4 and columns 1 to 2 are disposed under a green (e.g., second) color filter 630 (labeled "G"), and the pixels 619 in rows 3 to 4 and columns 3 to 4 are disposed under a red (e.g., third) color filter 630 (labeled "R"). In other examples, it should be understood that, in accordance with the teachings of the present disclosure, some but not all of the red, green, and blue color filters may be replaced with transparent filters (e.g., transparent, white, full-color, etc.) such that the transparent filters are scattered among the red, green, and blue color filters.

[0076] The pixel circuit 607 may further include a plurality of microlenses 640 disposed over the pixel array 608 (e.g., over the plurality of photodiodes). Specifically, the microlenses 640 are sized and distributed such that each microlens 640 is disposed over each pixel 619 or corresponding photodiode. The microlenses 640 may help focus incident light onto the underlying photodiodes included in the pixels 619, thereby improving the sensitivity of the pixel circuit 607 and the overall image quality. The microlenses 640 may also reduce crosstalk between adjacent pixels 619, thereby enhancing the ability of the pixel circuit 607 to accurately capture fine details and colors.

[0077] Each of the pixels 619 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown inFigure 6 (in the middle patterning). The second subset is a subset of a set that contains some but not all of the elements of the original set. In various examples, only the second subset 619b of the pixels 619 is configured to be coupled to a second readout circuit, such as one of the event-driven readout circuits included in the event-driven sensing array 112 shown in Figure 1 (as shown). In a particular pixel operation mode (e.g., hybrid mode), the pixels in the first subset 619a are coupled to the first readout circuit but not to the second readout circuit. Thus, a first fraction of the photodiodes is included in the first subset 619a (e.g., CIS pixels) and a second fraction of the photodiodes is included in the second subset 619b (e.g., hybrid CIS / EVS pixels). In Figure 6 (as shown), the second subset 619b of the pixels 619 is arranged in a checkerboard pattern such that the second subset 619b includes the pixels 619 in (i) odd rows and even columns and (ii) even rows and odd columns. In Figure 7 (as shown), the first subset 619a includes 8 out of a total of 16 pixels or 50% of the pixels, and the second subset 619b includes 50% of the pixels, and the second subset 519b of the pixels 519 includes 8 out of a total of 16 pixels or 50% of the pixels 519. Those of ordinary skill in the art will appreciate that in other examples, the positions of the pixels in the second subset 619b and the pixels in the first subset 619a may be flipped (e.g., the second subset 619b includes the pixels 619 in (i) odd rows and odd columns and (ii) even rows and even columns).

[0078] In various examples, the pixel circuit 607 can operate in a first mode, a second mode, and a third mode. In the first mode, all the pixels 619 are configured to be coupled to the first readout circuit to provide CIS information corresponding to an external scene, such that the pixel circuit 607 provides an image without loss of image quality compared to a conventional only-CIS pixel circuit. In the second mode, the pixels in the first subset 619a are configured to be coupled to the first readout circuit to continue to provide CIS information, and the pixels in the second subset 619b are configured to be coupled to the second readout circuit to provide an event detection signal (e.g., providing photocurrent for event detection functionality) and / or other non-CIS information. Since the pixels in the second subset 619b are placed under the RGB filter 630, the non-CIS information can be provided in R+G+G+B or gray, which may result in a reduced sensitivity for event detection (or other functionality) in the second mode, but can provide improved image quality in the first mode. Thus, the second mode is a hybrid mode in which the pixel circuit 607 simultaneously provides CIS information and non-CIS information corresponding to an external scene. In the third mode, all the pixels 619 are configured to be coupled to the first readout circuit to provide non-CIS information corresponding to an external scene.

[0079] Thus, it should be understood that, in accordance with the teachings of the present disclosure, in the example NxN (e.g., 4x4) pixel circuit 607 shown in Figure 6 when the pixels of the second subset 619b are configured to operate in the second mode and provide an event detection signal through the second readout circuit, there are also one or more pixels of the first subset 619a configured to provide CIS information through the first readout circuit under a filter having the same color selectivity. In other words, each of the first photodiode sub-grouping, the second photodiode sub-grouping, and the third photodiode sub-grouping includes at least one CIS pixel, and at least one of the first photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters. In various examples, at least one of the second photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the second color filters, and / or at least one of the third photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the third color filters. Thus, it should be understood that, in accordance with the teachings of the present disclosure, in the second or hybrid mode, all sampling sites of any particular color in the 4x4 example pixel circuit 607 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 619b that provides an event detection signal, there is a corresponding pixel of the first subset 619a disposed under a filter having the same color selectivity in the example 4x4 pixel circuit 607.

[0080] Figure 7 An example of an NxN (e.g., 4x4) pixel circuit 707 including a pixel array 708 in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 7 the pixel array 708 of Figure 1 may be an example of the pixel array 708 included in the stacked CIS having the EVS system 100 shown in

[0081] In the illustrated example, pixel array 708 includes a plurality of pixel units or pixels 719 arranged in Y rows and X columns. Each pixel 719 may include four sub-pixels 718 each including a photodiode. Thus, pixel array 708 includes a plurality of photodiodes arranged in rows and columns and also arranged in groupings of photodiodes. In one example, the four photodiodes in the four sub-pixels 718 are coupled together to share a floating diffusion region 720 (represented as an "X" over the four sub-pixels 718), such that each pixel 719 includes one floating diffusion region 720. Thus, each pixel 719 includes four photodiodes, and pixel array 708 is capable of providing quad-phase detection (QPD), in which case the top / bottom and / or left / right photodiodes can be read out separately to provide phase information. In various examples, the photodiode groupings correspond to a 4x4 pattern of four photodiodes (e.g., Figure 7 illustrates one such grouping). The photodiode groupings may include a plurality of photodiode sub-groupings (e.g., 2x2 photodiode sub-groupings). In various examples, the photodiode sub-groupings correspond to a 2x2 pattern of four photodiodes (e.g., Figure 7 illustrated 4x4 photodiodes).

[0082] Pixel circuit 707 may also include a color filter array 709 arranged in a mosaic pattern and disposed over pixel array 708. In one example, color filter array 709 includes a plurality of color (e.g., RGB) filters 730 each having one of a plurality of colors (e.g., red, green, or blue) and disposed over one of pixels 719. Color filter array 709 may include a first color filter (e.g., blue and / or transparent), a second color filter (e.g., green and / or transparent), and a third color filter (e.g., red and / or transparent). A first photodiode sub-grouping may be disposed under at least one of the first color filters, a second photodiode sub-grouping may be disposed under at least one of the second color filters, and a third photodiode sub-grouping may be disposed under at least one of the third color filters.

[0083] In Figure 7In [the figure], the color filter array 709 includes a four-Bayer filter array such that four color filters 730 of the same color are disposed over a 2x2 grouping of pixels 719 arranged in two adjacent rows and two adjacent columns. For example, the pixels 719 in rows 1 to 2 and columns 1 to 2 are disposed under a blue (e.g., first) color filter 730 (labeled "B"), (i) the pixels 719 in rows 1 to 2 and columns 3 to 4 and (ii) the pixels 719 in rows 3 to 4 and columns 1 to 2 are disposed under a green (e.g., second) color filter 730 (labeled "G"), and the pixels 719 in rows 3 to 4 and columns 3 to 4 are disposed under a red (e.g., third) color filter 730 (labeled "R"). In other instances, it should be understood that, in accordance with the teachings of the present disclosure, some but not all of the red, green, and blue color filters may be replaced with transparent filters (e.g., transparent, white, full-color, etc.) such that the transparent filters are interspersed among the red, green, and blue color filters.

[0084] The pixel circuit 707 may further include a plurality of microlenses 740 disposed over the pixel array 708 (e.g., over a plurality of photodiodes). Specifically, the microlenses 740 are sized and distributed such that each microlens 740 is disposed over each pixel 719 or four sub-pixels 718 or the photodiodes of a corresponding 2x2 pattern. The microlenses 740 may help to focus the incident light onto the underlying photodiodes included in the pixels 719, thereby improving the sensitivity of the pixel circuit 707 and the overall image quality. The microlenses 740 may also reduce crosstalk between adjacent pixels 719, thereby enhancing the ability of the pixel circuit 707 to accurately capture fine details and colors.

[0085] Each of the pixels 719 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in [the figure]. Thus, all of the pixels 719 may be used to provide CIS information. Additionally, the pixels 719 may include a first subset 719a of the pixels 719 (patterned in Figure 7 [the figure]) and a second subset 719b of the pixels 719. The second subset is a subset of a set that contains some but not all of the elements of the original set. In various instances, only the pixels of the second subset 719b are configured to selectively couple to a second readout circuit in a particular pixel operation mode (e.g., hybrid mode), such as one of the event-driven readout circuits included in the Figure 1 event-driven sensing array 112 shown in [the figure]. The pixels of the first subset 719a couple to the first readout circuit in a particular pixel operation mode (e.g., hybrid mode) but do not couple to the second readout circuit. Thus, a first fraction of the photodiodes are included in the first subset 719a (e.g., CIS pixels) and a second fraction of the photodiodes are included in the second subset 719b (e.g., hybrid CIS / EVS pixels). In Figure 7In this case, a second subset 719b of pixels 719 is arranged in (i) row 1 and column 2, (ii) row 2 and column 1, (iii) row 3 and column 4, and (iv) row 4 and column 3. Thus, the second subset 719b includes 4 / 16 or 25% of the pixels 719. Those of ordinary skill in the art will appreciate that in other instances, the number and / or location of the pixels in the second subset 719b may be different.

[0086] In various examples, the pixel circuit 707 may operate in a first mode, a second mode, and a third mode. In the first mode, all of the pixels 719 are configured to couple to a first readout circuit to provide CIS information corresponding to an external scene such that, compared to a conventional only-CIS pixel circuit, the pixel circuit 707 provides an image without loss of image quality. In the second mode, the pixels in the first subset 719a are configured to couple to the first readout circuit to continue to provide CIS information, and the pixels in the second subset 719b are configured to couple to a second readout circuit to provide an event detection signal (e.g., providing a photocurrent for event detection functionality) and / or other non-CIS information. Because the pixels in the second subset 719b are disposed under the RGB filter 730, the non-CIS information may be provided as R+G+G+B or gray, which may result in reduced sensitivity for event detection (or other functionality) in the second mode, but may provide improved image quality in the first mode. Thus, the second mode is a hybrid mode in which the pixel circuit 707 simultaneously provides CIS information and non-CIS information corresponding to an external scene. In the third mode, all of the pixels 719 are configured to couple to the second readout circuit to provide non-CIS information corresponding to an external scene.

[0087] It should be understood that in accordance with the teachings of the present disclosure, in Figure 7In the example NxN (e.g., 4x4) pixel circuit 707 shown, when the pixels of the second subset 719b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 719a configured to provide CIS information under filters of the same or similar color. In other words, each of the first photodiode sub-group, the second photodiode sub-group, and the third photodiode sub-group includes at least one CIS pixel, and at least one of the first photodiode sub-group further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters. In various examples, at least one of the second photodiode sub-group further includes at least one hybrid CIS / EVS pixel disposed under at least one of the second color filters, and / or at least one of the third photodiode sub-group further includes at least one hybrid CIS / EVS pixel disposed under at least one of the third color filters. Thus, it should be understood that, in accordance with the teachings of the present disclosure, in the second or hybrid mode, all sampling sites of any particular color in the 4x4 example pixel circuit 707 are not sacrificed for maintaining color space information for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 719b that provides an event detection signal, there is a corresponding pixel of the first subset 719a disposed under a filter of the same or similar color selectivity in the example 4x4 pixel circuit 707.

[0088] Figure 8 An example of an NxN (e.g., 4x4) pixel circuit 807 including a pixel array 808 in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 8 the pixel array 808 may be an example of the pixel array 808 included in a stacked CIS having an EVS system 100 as shown in Figure 1 and the similarly named and numbered elements are coupled and operate similarly hereinafter.

[0089] In the illustrated example, the pixel array 808 includes a plurality of pixel units or pixels 819 arranged in Y rows and X columns. Each pixel 819 may include two sub-pixels 818 each including a photodiode. Thus, the pixel array 808 includes a plurality of photodiodes arranged in rows and columns and also arranged in groups of photodiodes. Two photodiodes in the two sub-pixels 818 are coupled together to share a floating diffusion region 820 (represented as a horizontal line extending between the two sub-pixels 818), such that each pixel 819 includes one floating diffusion region 820. Thus, each pixel 819 includes a dual photodiode coupled to a common floating diffusion region 820, and the pixel array 808 is capable of providing dual-phase detection (DPD) for autofocus operation, in which case the left / right photodiodes can be individually read out to provide phase information. In various examples, the groups of photodiodes correspond to a 4x4 pattern of four photodiodes (e.g., one such grouping is illustrated in Figure 8 ). The groups of photodiodes may include a plurality of sub-groups of photodiodes (e.g., 2x2 sub-groups of photodiodes). In various examples, the sub-groups of photodiodes correspond to a 2x2 pattern of two photodiodes (e.g., the 4x2 photodiodes illustrated in Figure 8 ).

[0090] The pixel circuit 807 may also include a color filter array 809 arranged in a mosaic pattern and disposed on top of the pixel array 808. In one example, the color filter array 809 includes a plurality of color (e.g., RGB) filters 830 each having one of a plurality of colors (e.g., red, green, or blue) and disposed on top of one of the pixels 819. The color filter array 809 may include a first color filter (e.g., blue and / or transparent), a second color filter (e.g., green and / or transparent), and a third color filter (e.g., red and / or transparent). A first sub-group of photodiodes may be disposed under at least one of the first color filters, a second sub-group of photodiodes may be disposed under at least one of the second color filters, and a third sub-group of photodiodes may be disposed under at least one of the third color filters.

[0091] In Figure 8In [the figure], the color filter array 809 includes a four-Bayer filter array such that four color filters 830 of the same color are disposed over a 2x2 grouping of pixels 819 arranged in two adjacent rows and two adjacent columns. For example, the pixels 819 in rows 1 to 2 and columns 1 to 2 are disposed under a blue (e.g., first) color filter 830 (labeled "B"), the pixels 819 in (i) rows 1 to 2 and columns 3 to 4 and (ii) rows 3 to 4 and columns 1 to 2 are disposed under a green (e.g., second) color filter 830 (labeled "G"), and the pixels 819 in rows 3 to 4 and columns 3 to 4 are disposed under a red (e.g., third) color filter 830 (labeled "R"). In other instances, it should be understood that, in accordance with the teachings of the present disclosure, some but not all of the red, green, and blue color filters may be replaced with transparent filters (e.g., transparent, white, full-color, etc.) such that the transparent filters are interspersed among the red, green, and blue color filters.

[0092] The pixel circuit 807 may also include a plurality of microlenses 840 disposed over the pixel array 808 (e.g., over a plurality of photodiodes). Specifically, the microlenses 840 are sized and distributed such that each microlens 840 is disposed over each pixel 819, two sub-pixels 818, or a corresponding 2x1 pattern of photodiodes. The microlenses 840 may help to focus incident light onto the underlying photodiodes included in the pixels 819, thereby improving the sensitivity of the pixel circuit 807 and the overall image quality. The microlenses 840 may also reduce crosstalk between adjacent pixels 819, thereby enhancing the ability of the pixel circuit 807 to accurately capture fine details and colors.

[0093] Each of the pixels 819 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in [the figure]. Thus, all of the pixels 819 may be used to provide CIS information. Additionally, the pixels 819 may include a first subset 819a of the pixels 819 (patterned in Figure 8 [the figure]) and a second subset 819b of the pixels 819. The second subset is a subset of a set that contains some but not all of the elements of the original set. In various instances, in a particular pixel operation mode (hybrid mode), only the pixels of the second subset 819b are configured to selectively couple to a second readout circuit, such as one of the event-driven readout circuits included in the Figure 1 event-driven sensing array 112 shown in [the figure]. In a particular pixel operation mode (e.g., hybrid mode), the pixels in the first subset 819a are coupled to the first readout circuit but not to the second readout circuit. Thus, a first fraction of the photodiodes are included in the first subset 819a (e.g., CIS pixels) and a second fraction of the photodiodes are included in the second subset 819b (e.g., hybrid CIS / EVS pixels). In Figure 8Among them, the second subset 819b of pixels 819 is arranged in (i) row 1 and column 2, (ii) row 2 and column 1, (iii) row 3 and column 4, and (iv) row 4 and column 3. Thus, the second subset 819b contains 4 / 16 or 25% of the pixels 819. Those of ordinary skill in the art will understand that in other instances, the number and / or position of the pixels in the second subset 819b may be different.

[0094] In various examples, the pixel circuit 807 can operate in a first mode, a second mode, and a third mode. In the first mode, all pixels 819 are configured to be coupled to a first readout circuit to provide CIS information corresponding to an external scene, such that the pixel circuit 807 provides an image without image quality loss compared to a conventional only-CIS pixel circuit. In the second mode, the pixels in the first subset 819a are configured to be coupled to the first readout circuit to continue to provide CIS information, and the pixels in the second subset 819b are configured to be coupled to a second readout circuit to provide an event detection signal (e.g., providing a photocurrent for event detection functionality) and / or other non-CIS information. Since the pixels in the second subset 819b are disposed under the RGB filter 830, the non-CIS information can be provided as R+G+G+B or gray, which may result in a reduced sensitivity of event detection (or other functionality) in the second mode, but can provide improved image quality in the first mode. Thus, the second mode is a hybrid mode in which the pixel circuit 807 simultaneously provides CIS information and non-CIS information corresponding to an external scene. In the third mode, all pixels 819 are configured to be coupled to the second readout circuit to provide non-CIS information.

[0095] It should be understood that in accordance with the teachings of the present disclosure, in Figure 8In the example NxN (e.g., 4x4) pixel circuit 807 shown, when the pixels of the second subset 819b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 819a configured to provide CIS information under filters of the same or similar color. In other words, each of the first photodiode sub-grouping, the second photodiode sub-grouping, and the third photodiode sub-grouping includes at least one CIS pixel, and at least one of the first photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters. In various examples, at least one of the second photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the second color filters, and / or at least one of the third photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the third color filters. Thus, it should be understood that, in accordance with the teachings of the present disclosure, in the second or hybrid mode, all sampling sites of any particular color in the 4x4 example pixel circuit 807 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 819b that provides an event detection signal, there is a corresponding pixel of the first subset 819a disposed under a filter of the same or similar color selectivity in the example 4x4 pixel circuit 807.

[0096] Figure 9 An example of an NxN (e.g., 4x4) pixel circuit 907 including a pixel array 908 in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 9 the pixel array 908 of Figure 1 may be an example of the pixel array 108 in the stacked CIS having an EVS system 100 shown in

[0097] In the illustrated example, the pixel array 908 includes a plurality of pixel units or pixels 919 arranged in Y rows and X columns. Each pixel 919 may include at least one photodiode and a floating diffusion region. In various examples, the photodiode grouping corresponds to a 4x4 pattern of four photodiodes (e.g., Figure 9 one such grouping is illustrated in Figure 9 ). The photodiode grouping may include a plurality of photodiode sub-groupings (e.g., 2x2 photodiode sub-groupings). In various examples, the photodiode sub-grouping corresponds to a 2x2 pattern of photodiodes (e.g., as illustrated in

[0098] The pixel circuit 907 may further include a color filter array 909 arranged in a mosaic pattern and disposed over the pixel array 908. In one example, the color filter array 909 includes a plurality of color (e.g., RGBC) filters 930 each having one of a plurality of colors (e.g., red, green, blue, or transparent) and disposed over one of the pixels 919. The color filter array 909 may include a first color filter (e.g., blue and / or transparent), a second color filter (e.g., green and / or transparent), and a third color filter (e.g., red and / or transparent). A first sub-group of photodiodes may be disposed under at least one of the first color filters, a second sub-group of photodiodes may be disposed under at least one of the second color filters, and a third sub-group of photodiodes may be disposed under at least one of the third color filters.

[0099] Figure 9 An example is depicted in accordance with the teachings of the present disclosure in which some but not all of the red, green, and blue color filters may be replaced with transparent filters (e.g., transparent, white, full color, etc.) such that the transparent filters are interspersed among the red, green, and blue color filters. Thus, in the example depicted in Figure 9 the color filter array 909 includes a four-color array of red, blue, green, and green (RGGB) color filters and a transparent color filter array such that two color filters 930 of the same color (e.g., red, green, or blue) are disposed over two pixels 919 arranged diagonally in adjacent rows and columns. For example, the pixels 919 in (i) row 1 and column 1 and (ii) row 2 and column 2 are disposed under a blue (e.g., first) color filter 930 (labeled "B"), the pixels 919 in (i) row 1 and column 3, (ii) row 2 and column 4, (iii) row 3 and column 1, and (iv) row 4 and column 2 are disposed under a green (e.g., second) color filter 930 (labeled "G"), and the pixels 919 in (i) row 3 and column 3 and (ii) row 4 and column 4 are disposed under a red (e.g., third) color filter 930 (labeled "R"). The remaining ones of the pixels 919 arranged in a checkerboard pattern are disposed under a non-RGB or transparent filter 932. Alternatively, the remaining ones of the pixels 919 may not be disposed under any color filter.

[0100] The pixel circuit 907 may also include a plurality of microlenses 940 disposed over the pixel array 908 (e.g., over the plurality of photodiodes). Specifically, the microlenses 940 are sized and distributed such that each microlens 940 is disposed over a 2x2 grouping of pixels 919 or a corresponding sub-grouping of photodiodes. The microlenses 940 may help focus incident light onto the underlying photodiodes included in the pixels 919, thereby improving the sensitivity of the pixel circuit 907 and the overall image quality. The microlenses 940 may also reduce crosstalk between adjacent 2x2 groupings of pixels 919, thereby enhancing the ability of the pixel circuit 907 to accurately capture fine details and colors.

[0101] Each of the pixels 919 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in. Thus, all of the pixels 919 may be used to provide CIS information. Additionally, the pixels 919 may include a first subset 919a of the pixels 919 (patterned in Figure 9 ) and a second subset 919b of the pixels 919. The second subset is a subset of a set that contains some but not all of the elements of the original set. In various examples, in a particular operating mode, only the second subset 919b of the pixels 919 is configured to selectively couple to a second readout circuit, such as one of the event-driven readout circuits included in the event-driven sensing array 112 shown in Figure 1 . The pixels in the first subset 919a are coupled to the first readout circuit but not to the second readout circuit. Thus, a first fraction of the photodiodes are included in the first subset 919a (e.g., CIS pixels) and a second fraction of the photodiodes are included in the second subset 919b (e.g., hybrid CIS / EVS pixels). As illustrated, the photodiodes included in the second subset 919b may be disposed over a non-RGB or transparent color filter 932. In Figure 9 , the second subset 919b of the pixels 919 is arranged in a checkerboard pattern such that the second subset 919b includes (i) pixels 919 in odd rows and even columns and (ii) pixels 919 in even rows and odd columns. Those of ordinary skill in the art will appreciate that in other examples, the positions of the pixels in the second subset 919b and the first subset 919a may be reversed (e.g., the second subset 919b includes (i) pixels 919 in odd rows and odd columns and (ii) pixels 919 in even rows and even columns).

[0102] In various examples, pixel circuit 907 may operate in a first mode, a second mode, and a third mode. In the first mode, all pixels 919 are configured to couple to a first readout circuit to provide CIS information corresponding to an external scene such that, compared to a conventional only-CIS pixel circuit, pixel circuit 907 provides an image without image quality loss. In the second mode, pixels in a first subset 919a are configured to couple to the first readout circuit to continue providing CIS information, and pixels in a second subset 919b are configured to couple to a second readout circuit to provide event detection signals and / or other non-CIS information. Thus, the second mode is a hybrid mode in which pixel circuit 907 simultaneously provides CIS information and non-CIS information corresponding to an external scene. In the third mode, all pixels 919 are configured to couple to the second readout circuit to provide non-CIS information. When pixel circuit 907 operates in the second or third mode, particularly in low light settings where event detection latency may be particularly important, positioning the pixels of the second subset 919b under a non-RGB or transparent filter 932 (or no filter) can help increase the generated photocurrent and / or reduce the latency associated with the pixels of the second subset 919b.

[0103] Thus, it should be understood that, according to the teachings of the present disclosure, in Figure 9 the example NxN (e.g., 4x4) pixel circuit 907 shown, when the pixels of the second subset 919b are configured to operate in the second mode and provide event detection signals, there is also at least one pixel of the first subset 919a configured to provide CIS information under a filter having the same or similar color as the color filter replaced by each corresponding transparent filter. In other words, each of the first photodiode sub-grouping, the second photodiode sub-grouping, and the third photodiode sub-grouping includes at least one CIS pixel, and at least one of the first photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel positioned under at least one of the first color filters. In various examples, at least one of the second photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel positioned under at least one of the second color filters, and / or at least one of the third photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel positioned under at least one of the third color filters. Thus, it should be understood that, according to the teachings of the present disclosure, in the hybrid mode, all sampling sites of any particular color in the 4x4 example pixel circuit 907 are not sacrificed for EVS functionality at any time. In other words, according to the teachings of the present disclosure, for each pixel of the second subset 919b that provides an event detection signal, there is a corresponding pixel of the first subset 919a positioned under a filter in the example 4x4 pixel circuit 907 having the same or similar color selectivity as the color filter replaced by each corresponding transparent filter.

[0104] Figure 10 An example of a pixel circuit 1007 including a pixel array 1008 of NxN (e.g., 4x4) according to the teachings of the present disclosure is illustrated. It should be understood that Figure 10 the pixel array 1008 may be an example of the pixel array 108 in the stacked CIS having the EVS system 100 shown in Figure 1 , and the similarly named and numbered elements above are similarly coupled and operative hereinafter.

[0105] In the illustrated example, the pixel array 1008 includes a plurality of pixel units or pixels 1019 arranged in Y rows and X columns. Each pixel 1019 may include at least one photodiode and a floating diffusion region. In various examples, the photodiode groupings correspond to a 4x4 pattern of four photodiodes (e.g., Figure 10 one such grouping is illustrated in Figure 10 ). The photodiode groupings may include a plurality of photodiode sub-groupings (e.g., 2x2 photodiode sub-groupings). In various examples, the photodiode sub-groupings correspond to a 2x2 pattern of photodiodes (e.g., as illustrated in

[0106] The pixel circuit 1007 may further include a color filter array 1009 arranged in a mosaic pattern and disposed over the pixel array 1008. In one example, the color filter array 1009 includes a plurality of color (e.g., RGGB and clear (C)) filter elements 1030 each having one of a plurality of colors (e.g., red, green, blue, or clear) and disposed over one of the pixels 1019. The color filter array 1009 may include a first color filter (e.g., blue and / or clear), a second color filter (e.g., green and / or clear), and a third color filter (e.g., red and / or clear). The first photodiode sub-grouping may be disposed under at least one of the first color filters, the second photodiode sub-grouping may be disposed under at least one of the second color filters, and the third photodiode sub-grouping may be disposed under at least one of the third color filters.

[0107] Figure 10 An example is depicted according to the teachings of the present disclosure in which some but not all of the red, green, and blue color filters are replaced with clear filters (e.g., clear, white, full color, etc.) such that the clear filters are dispersed among the red, green, and blue color filters. Thus, in Figure 10In the example depicted, the color filter array 1009 includes a four-RGBC color filter array such that two RGB filters 1030 of the same color are disposed over two pixels 1019 that are diagonally arranged in adjacent rows and columns. For example, the pixels 1019 in (i) row 1 and column 2 and (ii) row 2 and column 1 are disposed below a blue (e.g., first) filter 1030 (labeled "B"), the pixels 1019 in (i) row 1 and column 3, (ii) row 2 and column 4, (iii) row 3 and column 1, and (iv) row 4 and column 2 are disposed below a green (e.g., second) filter 1030 (labeled "G"), and the pixels 1019 in (i) row 3 and column 4 and (ii) row 4 and column 3 are disposed below a red (e.g., third) filter 1030 (labeled "R"). The remaining ones of the pixels 1019 are disposed below a non-RGB or transparent filter 1032. Alternatively, the remaining ones of the pixels 1019 may not be disposed below any filter.

[0108] The pixel circuit 1007 may also include a plurality of microlenses 1040 disposed over the pixel array 1008 (e.g., over the plurality of photodiodes). Specifically, the microlenses 1040 are sized and distributed such that each microlens 1040 is disposed over a 2x2 grouping of pixels 1019 or a corresponding sub-grouping of photodiodes. The microlenses 1040 may help focus incident light onto the underlying photodiodes included in the pixels 1019, thereby improving the sensitivity of the pixel circuit 1007 and the overall image quality. The microlenses 1040 may also reduce crosstalk between adjacent 2x2 groupings of pixels 1019, thereby enhancing the ability of the pixel circuit 1007 to accurately capture fine details and colors.

[0109] Each of the pixels 1019 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in. Thus, all of the pixels 1019 may be used to provide CIS information. Additionally, the pixels 1019 may include a first subset 1019a of the pixels 1019 (patterned in Figure 10 ), and a second subset 1019b of the pixels 1019. The second subset is a subset of a set that contains some but not all of the elements of the original set. In various examples, only the second subset 1019b of the pixels 1019 is configured to selectively couple to a second readout circuit, such as one of the event-driven readout circuits included in the Figure 1 event-driven sensing array 112 shown in. The pixels in the first subset 1019a are coupled to the first readout circuit but not to the second readout circuit. Thus, a first fraction of the photodiodes are included in the first subset 1019a (e.g., CIS pixels) and a second fraction of the photodiodes are included in the second subset 1019b (e.g., hybrid CIS / EVS pixels). In Figure 10In [the figure], the second subset 1019b of pixels 1019 is arranged such that the second subset 1019b includes pixels 1019 in a 2x2 grouping (e.g., when multiple 4x4 pixel circuits 1007 are arranged together, the pixels 1019 at each corner of the illustrated 4x4 pixel circuit 1007 can form part of a 2x2 grouping of pixels 1019). Those of ordinary skill in the art will appreciate that in other instances, the positions of the pixels in the second subset 1019b and the pixels in the first subset 1019a can be flipped.

[0110] In various examples, the pixel circuit 1007 can operate in a first mode, a second mode, and a third mode. In the first mode, all pixels 1019 are configured to couple to a first readout circuit to provide CIS information corresponding to an external scene, such that the pixel circuit 1007 provides an image without loss of image quality compared to a conventional only-CIS pixel circuit. In the second mode, the pixels in the first subset 1019a are configured to couple to the first readout circuit to continue providing CIS information, and the pixels in the second subset 1019b are configured to couple to a second readout circuit to provide event detection signals and / or other non-CIS information. Thus, the second mode is a hybrid mode in which the pixel circuit 1007 simultaneously provides CIS information and non-CIS information corresponding to an external scene. In the third mode, all pixels 1019 are configured to couple to the second readout circuit to provide non-CIS information. When the pixel circuit 1007 operates in the second or third mode (especially in low-light settings where event detection latency may be particularly important), positioning the pixels of the second subset 1019b under a non-RGB or transparent filter 1032 (or no filter) can help increase the generated photocurrent and / or reduce the latency associated with the pixels of the second subset 1019b.

[0111] Thus, it should be understood that in accordance with the teachings of the present disclosure, in Figure 10In the example NxN (e.g., 4x4) pixel circuit 1007 shown, when the pixels of the second subset 1019b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 1019a configured to provide CIS information under a filter having the same or a similar color as the color filter replaced by each corresponding transparent filter. In other words, each of the first photodiode sub-grouping, the second photodiode sub-grouping, and the third photodiode sub-grouping includes at least one CIS pixel, and at least one of the first photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters. In various examples, at least one of the second photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the second color filters, and / or at least one of the third photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the third color filters. Thus, it should be appreciated that, in accordance with the teachings of the present disclosure, in the second or hybrid mode, all sampling sites of any particular color in the 4x4 example pixel circuit 1007 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 1019b that provides an event detection signal, there is a corresponding pixel of the first subset 1019a disposed under a filter in the example 4x4 pixel circuit 1007 having the same or a similar color selectivity as the color filter replaced by each corresponding transparent filter.

[0112] Figure 11 An example of an NxN (e.g., 4x4) pixel circuit 1107 including a pixel array 1108 in accordance with the teachings of the present disclosure is illustrated. It should be appreciated that Figure 11 the pixel array 1108 may be an example of the pixel array 108 in a stacked CIS having an EVS system 100 as shown in Figure 1 and the similarly named and numbered elements are similarly coupled and operative hereinafter.

[0113] In the illustrated example, the pixel array 1108 includes a plurality of pixel units or pixels 1119 arranged in Y rows and X columns. Each pixel 1119 may include at least one photodiode and a floating diffusion region. In various examples, the photodiode grouping corresponds to a 4x4 pattern of four photodiodes (e.g., Figure 11 one such grouping is illustrated in Figure 11 ). The photodiode grouping may include a plurality of photodiode sub-groupings (e.g., 2x2 photodiode sub-groupings). In various examples, the photodiode sub-grouping corresponds to a 2x2 pattern of photodiodes (e.g., as illustrated in

[0114] The pixel circuit 1107 may further include a color filter array 1109 arranged in a mosaic pattern and disposed on top of the pixel array 1108. In one example, the color filter array 1109 includes a plurality of color (e.g., RGB) filters 1130 each having one of a plurality of colors (e.g., red, green, or blue) and disposed on top of one of the pixels 1119. The color filter array 1109 may include a first color filter (e.g., blue and / or transparent), a second color filter (e.g., green and / or transparent), and a third color filter (e.g., red and / or transparent). A first sub-group of photodiodes may be disposed under at least one of the first color filters, a second sub-group of photodiodes may be disposed under at least one of the second color filters, and a third sub-group of photodiodes may be disposed under at least one of the third color filters.

[0115] In Figure 11 , the color filter array 1109 includes a four-Bayer filter array such that four color filters 1130 of the same color are disposed on top of a 2x2 grouping of pixels 1119 arranged in two adjacent rows and two adjacent columns. For example, the pixels 1119 in rows 1 to 2 and columns 1 to 2 are disposed under a blue (e.g., first) color filter 1130 (labeled "B"), (i) the pixels 1119 in rows 1 to 2 and columns 3 to 4 and (ii) the pixels 1119 in rows 3 to 4 and columns 1 to 2 are disposed under a green (e.g., second) color filter 1130 (labeled "G"), and the pixels 1119 in rows 3 to 4 and columns 3 to 4 are disposed under a red (e.g., third) color filter 1130 (labeled "R"). In other examples, it should be understood that, in accordance with the teachings of the present disclosure, some but not all of the red, green, and blue color filters may be replaced with transparent filters (e.g., transparent, white, full-color, etc.) such that the transparent filters are interspersed among the red, green, and blue color filters.

[0116] The pixel circuit 1107 may further include a plurality of microlenses 1140 disposed on top of the pixel array 1108 (e.g., on top of the plurality of photodiodes). Specifically, the microlenses 1140 are sized and distributed such that each microlens 1140 is disposed on top of a 2x2 grouping of pixels 1119 or a corresponding sub-group of photodiodes. The microlenses 1140 may help focus incident light onto the underlying photodiodes included in the pixels 1119, thereby improving the sensitivity of the pixel circuit 1107 and the overall image quality. The microlenses 1140 may also reduce crosstalk between adjacent 2x2 groupings of pixels 1119, thereby enhancing the ability of the pixel circuit 1107 to accurately capture fine details and colors.

[0117] Each of the pixels 1119 may be coupled to a first readout circuit, such as Figure 1The image readout circuit 116 shown in. Thus, all pixels 1119 can be used to provide CIS information. In addition, the pixels 1119 can include a first subset 1119a of the pixels 1119 (patterned in Figure 11 ), and a second subset 1119b of the pixels 1119. The second subset is a subset of a set that contains some but not all of the elements of the original set. In various examples, in a particular pixel operation mode (e.g., hybrid mode), only the second subset 1119b of the pixels 1119 is configured to selectively couple to a second readout circuit, such as one of the event-driven readout circuits included in the event-driven sensing array 112 shown in Figure 1 . In a particular pixel mode (e.g., hybrid mode), the pixels in the first subset 1119a are coupled to the first readout circuit but not to the second readout circuit. Thus, a first fraction of the photodiodes is included in the first subset 1119a (e.g., CIS pixels) and a second fraction of the photodiodes is included in the second subset 1119b (e.g., hybrid CIS / EVS pixels). In Figure 11 , the second subset 1119b of the pixels 1119 is arranged in a checkerboard pattern such that the second subset 1119b includes the pixels 1119 in (i) odd rows and even columns and (ii) even rows and odd columns. Those of ordinary skill in the art will appreciate that in other examples, the positions of the pixels in the second subset 1119b and the first subset 1119a can be flipped (e.g., the second subset 1119b includes the pixels 1119 in (i) odd rows and odd columns and (ii) even rows and even columns).

[0118] In various examples, the pixel circuit 1107 can operate in a first mode, a second mode, and a third mode. In the first mode, all pixels 1119 are configured to couple to the first readout circuit to provide CIS information corresponding to an external scene, such that the pixel circuit 1107 provides an image without loss of image quality compared to a conventional only-CIS pixel circuit. In the second mode, the pixels in the first subset 1119a are configured to couple to the first readout circuit to continue providing CIS information, and the pixels in the second subset 1119b are configured to couple to the second readout circuit to provide event detection signals (e.g., providing photocurrent for event detection functionality) and / or other non-CIS information. Because the pixels in the second subset 1119b are placed under the RGB filter 1130, the non-CIS information can be provided as R+G+G+B or gray, which can result in reduced sensitivity for event detection (or other functionality) in the second mode, but can provide improved image quality in the first mode. Thus, the second mode is a hybrid mode in which the pixel circuit 1107 simultaneously provides CIS information and non-CIS information corresponding to an external scene. In the third mode, all pixels 1119 are configured to couple to the second readout circuit to provide non-CIS information.

[0119] Thus, it should be understood that, in accordance with the teachings of the present disclosure, in the example NxN (e.g., 4x4) pixel circuit 1107 shown in Figure 11 when the pixels of the second subset 1119b are configured to operate in a second mode and provide an event detection signal, there are also one or more pixels of the first subset 1119a configured to provide CIS information under a filter having the same or a similar color as the color filter replaced by each corresponding transparent filter. In other words, each of the first photodiode sub-grouping, the second photodiode sub-grouping, and the third photodiode sub-grouping includes at least one CIS pixel, and at least one of the first photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters. In various examples, at least one of the second photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the second color filters, and / or at least one of the third photodiode sub-grouping further includes at least one hybrid CIS / EVS pixel disposed under at least one of the third color filters. Thus, it should be understood that, in accordance with the teachings of the present disclosure, in a particular pixel operation mode (e.g., hybrid mode), all sampling sites of any particular color in the 4x4 example pixel circuit 1107 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 1119b that provides an event detection signal, there is a corresponding pixel of the first subset 1119a disposed under a filter in the example 4x4 pixel circuit 1107 having the same or a similar color selectivity as the color filter replaced by each corresponding transparent filter.

[0120] Figure 12 An example of an NxN (e.g., 4x4) pixel circuit 1207 including a pixel array 1208 in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 12 the pixel array 1208 of Figure 1 may be an example of the pixel array 108 in the stacked CIS having the EVS system 100 shown in

[0121] In the illustrated example, the pixel array 1208 includes a plurality of pixel units or pixels 1219 arranged in Y rows and X columns. Each pixel 1219 may include at least one photodiode and a floating diffusion region. In various examples, the photodiode groupings correspond to a 4x4 pattern of four photodiodes (e.g., Figure 12which describes such a grouping). The photodiode grouping may include a plurality of photodiode sub-groupings (e.g., a 2x2 photodiode sub-grouping). In various examples, the photodiode sub-grouping corresponds to a 2x2 pattern of photodiodes (e.g., as described in Figure 12 ).

[0122] The pixel circuit 1207 may also include a color filter array 1209 arranged in a mosaic pattern and disposed on top of the pixel array 1208. In one example, the color filter array 1209 includes a plurality of color (e.g., RGB) filters 1230 each having one of a plurality of colors (e.g., red, green, or blue) and disposed on top of one of the pixels 1219. The color filter array 1209 may include a first color filter (e.g., blue and / or transparent), a second color filter (e.g., green and / or transparent), and a third color filter (e.g., red and / or transparent). The first photodiode sub-grouping may be disposed under at least one of the first color filters, the second photodiode sub-grouping may be disposed under at least one of the second color filters, and the third photodiode sub-grouping may be disposed under at least one of the third color filters.

[0123] In Figure 12 , the color filter array 1209 includes a four-Bayer color filter array such that four color filters 1230 of the same color are disposed on top of a 2x2 grouping of pixels 1219 arranged in two adjacent rows and two adjacent columns. For example, the pixels 1219 in rows 1 to 2 and columns 1 to 2 are disposed under a blue (e.g., first) color filter 1230 (labeled "B"), (i) the pixels 1219 in rows 1 to 2 and columns 3 to 4 and (ii) the pixels 1219 in rows 3 to 4 and columns 1 to 2 are disposed under a green (e.g., second) color filter 1230 (labeled "G"), and the pixels 1219 in rows 3 to 4 and columns 3 to 4 are disposed under a red (e.g., third) color filter 1230 (labeled "R"). In other examples, it should be understood that, in accordance with the teachings of the present disclosure, some but not all of the red, green, and blue color filters may be replaced with transparent color filters (e.g., transparent, white, full-color, etc.) such that the transparent color filters are dispersed among the red, green, and blue color filters.

[0124] The pixel circuit 1207 may further include a plurality of microlenses 1240 disposed over the pixel array 1208 (e.g., over a plurality of photodiodes). Specifically, the microlenses 1240 are sized and distributed such that each microlens 1240 is disposed over a 2x2 grouping of pixels 1219 or a corresponding sub-grouping of photodiodes. The microlenses 1240 may help to focus incident light onto the underlying photodiodes included in the pixels 1219, thereby improving the sensitivity of the pixel circuit 1207 and the overall image quality. The microlenses 1240 may also reduce crosstalk between adjacent 2x2 groupings of pixels 1219, thereby enhancing the ability of the pixel circuit 1207 to accurately capture fine details and colors.

[0125] Each of the pixels 1219 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in. Thus, all of the pixels 1219 may be used to provide CIS information. Additionally, the pixels 1219 may include a first subset 1219a of the pixels 1219 (patterned in Figure 12 ) and a second subset 1219b of the pixels 1219. A subset is a set that contains some but not all of the elements of an original set. In various examples, in a particular pixel operation mode (e.g., a hybrid mode), only the second subset 1219b of the pixels 1219 is configured to selectively couple to a second readout circuit, such as one of the event-driven readout circuits included in the event-driven sensing array 112 shown in Figure 1 . In a particular pixel operation mode (e.g., a hybrid mode), the pixels in the first subset 1219a are thus coupled to the first readout circuit but not to the second readout circuit. Accordingly, a first fraction of the photodiodes are included in the first subset 1219a (e.g., CIS pixels) and a second fraction of the photodiodes are included in the second subset 1219b (e.g., hybrid CIS / EVS pixels). In Figure 12 , the second subset 1219b of the pixels 1219 is arranged such that the second subset 1219b includes pixels 1219 in 2x2 groupings (e.g., when a plurality of 4x4 pixel circuits 1207 are arranged together in a pixel array, the pixels 1219 at each corner of the illustrated 4x4 pixel circuit 1207 may form part of a 2x2 grouping of pixels 1219 (e.g., at a central region)). In such examples, the pixels included in the second subset 1219b of the pixels 1219 may be surrounded by the pixels in the first subset 1219a of the pixels 1219. Those of ordinary skill in the art will appreciate that in other examples, the positions of the pixels in the second subset 1219b and the pixels in the first subset 1219a may be reversed.

[0126] In various examples, the pixel circuit 1207 may operate in a first mode, a second mode, and a third mode. In the first mode, all pixels 1219 are configured to be coupled to the first readout circuit to provide CIS information corresponding to the external scene, so that the pixel circuit 1207 provides an image without image quality loss compared to the conventional CIS-only pixel circuit. In the second mode, the pixels in the first subset 1219a are configured to be coupled to the first readout circuit to continue to provide CIS information, and the pixels in the second subset 1219b are configured to be coupled to the second readout circuit to provide an event detection signal (e.g., to provide photocurrent for event detection functionality) and / or other non-CIS information. Because the pixels in the second subset 1219b are disposed under the RGB filter 1230, the non-CIS information can be provided in R+G+G+B or gray, which can result in reduced sensitivity of event detection (or other functionality) in the second mode, but can provide improved image quality in the first mode. Therefore, the second mode is a mixed mode in which the pixel circuit 1207 provides both CIS information and non-CIS information corresponding to the external scene. In the third mode, all pixels 1219 are configured to be coupled to the second readout circuit to provide non-CIS information.

[0127] Therefore, it should be understood that according to the teachings of the present disclosure, Figure 12 In the example NxN (e.g., 4x4) pixel circuit 1207 shown in , when the pixels of the second subset 1219b are configured to operate in the second mode and provide event detection signals, there are also one or more pixels of the first subset 1219a configured to provide CIS information under a filter having the same or similar color as the color filter replaced by each corresponding transparent filter. In other words, each of the first photodiode subgrouping, the second photodiode subgrouping, and the third photodiode subgrouping includes at least one CIS pixel, and at least one of the first photodiode subgroupings further includes at least one hybrid CIS / EVS pixel disposed under at least one of the first color filters. In various examples, at least one of the second photodiode subgroupings further includes at least one hybrid CIS / EVS pixel disposed under at least one of the second color filters, and / or at least one of the third photodiode subgroupings further includes at least one hybrid CIS / EVS pixel disposed under at least one of the third color filters. Thus, it should be appreciated that, in accordance with the teachings of the present disclosure, all sampling sites of any particular color in the 4x4 example pixel circuit 1207 are not sacrificed for EVS functionality at any time in the second or hybrid mode. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 1219b providing an event detection signal, there is a corresponding pixel of the first subset 1219a disposed in the example 4x4 pixel circuit 1207 under a filter having the same or similar color selectivity as the color filter that each corresponding clear filter replaces.

[0128] It should be understood that the pixel circuits described herein and above are merely examples illustrating certain features of the present disclosure, and other pixel circuits are within the scope of the present disclosure. In various examples, the pixel circuit may include 1 / 16, 2 / 16, 3 / 16, 4 / 16, 5 / 16, 6 / 16, 7 / 16, or other ratios of pixels included in the second subset. In various examples, the pixel circuit may include pixels included in the second subset in different arrangements (e.g., in a 4x4 pixel grouping, the central four pixels and the pixels at each corner may be included in the second subset). In various examples, the pixel circuit may include a Bayer filter array, a quad-Bayer filter array, an RGBC filter array, a quad-RGBC filter array, or other filter arrays. In various examples, the pixel circuit may include pixels structured and arranged to provide phase detection information (e.g., half-shielded PDAF, microlens phase detection, DPD, QPD). Additionally, in examples where a 4x4 pixel grouping includes one or more columns in which only one pixel is placed under a color filter of a given color, the bit lines may extend diagonally across the pixel array (e.g., rather than along a column) to support analog merging. In various examples, the pixel circuit may include pixel arrangements and structures without advanced pixel reduction techniques.

[0129] As discussed above, an imaging system configured according to the techniques of the present disclosure can be configured between a first mode that provides only CIS information, a second mode that provides hybrid (e.g., simultaneous CIS and non-CIS) information, and a third mode that provides only non-CIS information without loss of image quality. This enables the imaging system to selectively provide various types of information without sacrificing conventional imaging quality, which is different from many conventional imaging systems.

[0130] In some cases, due to the way most image sensor systems are used, arranging the pixels included in the second subset in a checkerboard pattern may be preferred. For example, an image sensor (e.g., a smartphone camera) is typically held horizontally or vertically such that horizontal lines or edges (e.g., of a wall, door, window, etc.) fall on a single row or column. If (i) the imaging system is operating in the second (e.g., hybrid) mode, (ii) the pixels included in the second subset cover an entire row or column, and (iii) incident light from a horizontal line or edge falls on the row or column that is completely occupied by the pixels included in the second subset, then the imaging system may not be able to clearly capture that horizontal line or edge due to the lack of CIS pixels in that row or column. On the other hand, the checkerboard pattern ensures that each row and column always contains CIS pixels to capture those horizontal lines or edges, regardless of the mode in which the imaging system is operating.

[0131] In addition, in various examples of the pixel circuits described and / or disclosed herein, in each 4x4 pixel grouping, each row of pixels includes at least one pixel that is included in a first subset of the pixels and is disposed below at least one of the color filters. In some examples, in each 4x4 pixel grouping, each row of pixels includes at least one pixel that is included in a second subset of the pixels. In some examples, in each 4x4 pixel grouping, each column of pixels includes at least one pixel that is included in a first subset of the pixels and is disposed below at least one of the color filters. In some examples, in each 4x4 pixel grouping, each column of pixels includes at least one pixel that is included in a second subset of the pixels.

[0132] Because the pixels included in the second subset and the pixels included in the first subset are arranged in a high sampling point distribution (e.g., for CIS imaging, event detection, phase detection autofocus (PDAF), or other processing during a second mode), the imaging system can provide improved contrast and / or modulation transfer function (MTF) compared to other image sensors.

[0133] IV. Conclusion

[0134] The foregoing description of the illustrative examples of the present disclosure (including that described in the abstract) is not intended to be exhaustive or to limit the present disclosure to the precise forms disclosed. While specific examples of the present disclosure have been described herein for illustrative purposes, those skilled in the relevant art will recognize that various modifications are possible within the scope of the present disclosure.

[0135] These modifications can be made to the present disclosure in view of the foregoing detailed description. The terms used in the appended claims should not be construed as limiting the present disclosure to the specific examples disclosed in the specification. Instead, the scope of the present disclosure will be determined entirely by the appended claims, which are to be construed in accordance with the established principles of claim interpretation.

Claims

1. A pixel array, comprising: a plurality of photodiodes arranged in rows and columns, wherein a first fraction of the plurality of photodiodes are included in complementary metal oxide semiconductor image sensor pixels selectively coupled to a first readout circuit, wherein a second fraction of the plurality of photodiodes are included in hybrid complementary metal oxide semiconductor image sensor / event-based vision sensor pixels selectively coupled to one of the first readout circuit or a second readout circuit, wherein the plurality of photodiodes are arranged in photodiode groups; and a color filter array comprising a plurality of color filters arranged in a mosaic pattern over the plurality of photodiodes, wherein the color filter array comprises a first color filter, a second color filter, and a third color filter, wherein each photodiode grouping includes a plurality of photodiode sub-groupings, the plurality of photodiode sub-groupings including a first photodiode sub-grouping disposed under at least one of the first color filters, a second photodiode sub-grouping disposed under at least one of the second color filters, and a third photodiode sub-grouping disposed under at least one of the third color filters, wherein at least one photodiode of each of the first photodiode subgroup, the second photodiode subgroup, and the third photodiode subgroup is included in the complementary metal oxide semiconductor image sensor pixel, and Wherein at least one photodiode in the first photodiode subgroup is included in the hybrid complementary metal oxide semiconductor image sensor / event-based vision sensor pixel.

2. The pixel array of claim 1 , wherein a first and a second of the hybrid complementary metal oxide semiconductor image sensor / event-based vision sensor pixels are arranged in adjacent rows and adjacent columns, and wherein at least one photodiode in the second photodiode subgroup is included in the hybrid complementary metal oxide semiconductor image sensor / event-based vision sensor pixel.

3. The pixel array of claim 2, wherein at least one photodiode in the third photodiode subgroup is included in the hybrid complementary metal oxide semiconductor image sensor / event-based vision sensor pixel.

4. The pixel array according to claim 3, wherein the first color filter includes a first type color filter responsive to light having a wavelength within a first range and a clear color filter, wherein the first photodiode subgroup includes (i) a photodiode included in the complementary metal oxide semiconductor image sensor pixel and disposed under the first type color filter of the first color filter, and (ii) a photodiode included in the hybrid complementary metal oxide semiconductor image sensor / event-based vision sensor pixel and disposed under the clear color filter of the first color filter, wherein the second color filter includes a second type color filter responsive to light having a wavelength within a second range different from the first range and a clear color filter, wherein the second photodiode subgroup includes (i) a photodiode included in the complementary metal oxide semiconductor image sensor pixel and disposed under the second type color filter of the second color filter, and (ii) a photodiode included in the hybrid complementary metal oxide semiconductor image sensor / event-based vision sensor pixel and disposed under the clear color filter of the second color filter, and wherein the third color filter comprises a third type color filter responsive to light having a wavelength within a third range different from the first and second ranges and a transparent color filter, wherein the third photodiode subgroup comprises (i) a photodiode included in the complementary metal oxide semiconductor image sensor pixel and disposed under the third type color filter of the third color filter, and (ii) a photodiode included in the hybrid complementary metal oxide semiconductor image sensor / event-based vision sensor pixel and disposed under the transparent color filter of the third color filter. 5 . The pixel array of claim 4 , wherein the first type of color filter comprises a blue filter, wherein the second type of color filter comprises a red filter, and wherein the third type of color filter comprises a green filter.

6. The pixel array of claim 1, wherein each of the photodiode groups comprises a 2x2 photodiode sub-group.

7. The pixel array of claim 6, wherein each of the photodiode subgroups comprises a 2x2 photodiode, a 4x4 photodiode, or a 4x2 photodiode.

8. The pixel array of claim 6, wherein the 2x2 photodiode subgroupings include a first photodiode subgrouping under the at least one of the first color filters, a second photodiode subgrouping under the at least one of the second color filters, and third and fourth photodiode subgroupings under a third color filter.

9. A pixel circuit, comprising: A pixel array comprising a plurality of pixels arranged in rows and columns, wherein each pixel comprises: at least one photodiode configured to photogenerate image charge in response to incident light; a floating diffusion region coupled to receive the image charge from the at least one photodiode; and at least one transfer transistor coupled between a corresponding one of the at least one photodiode and the floating diffusion region to transfer the image charge from the corresponding one of the at least one photodiode to the floating diffusion region; and a color filter array disposed over the pixel array, wherein the color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over one of the pixels, wherein each of the plurality of pixels is selectively coupled to a first readout circuit, wherein the plurality of pixels include a first subset of the pixels configured to be disconnected from a second readout circuit while being coupled to the first readout circuit to read out a first set of data signals, and a second subset of the pixels selectively coupled to the second readout circuit to read out a second set of data signals, and Wherein in each NxN pixel grouping, each row of pixels includes at least one pixel included in the first subset of the pixels and disposed under at least one of the color filters.

10. The pixel circuit of claim 9, wherein in each NxN pixel grouping, each row of pixels includes at least one pixel included in the second subset of pixels.

11. The pixel circuit of claim 9, wherein in each NxN pixel grouping, each pixel column includes at least one pixel included in the first subset of the pixels and disposed under at least one of the color filters.

12. The pixel circuit of claim 9, wherein in each NxN pixel grouping, each pixel column includes at least one pixel included in the second subset of the pixels.

13. The pixel circuit of claim 9 , wherein the color filter array comprises a quad-Bayer filter array such that color filters of the same color are disposed over 2×2 pixel groups arranged in adjacent rows and columns, and wherein the pixels included in the second subset are arranged in a checkerboard pattern across the pixel array.

14. The pixel circuit of claim 9 , wherein the color filter array comprises a four-color filter array including red, blue, and green filters and a transparent filter array, the filters being arranged in a manner such that (i) red, green, and blue filters of the same color are disposed over at least two pixels included in the first subset and are arranged diagonally into adjacent rows and columns, and (ii) a transparent filter is disposed over pixels included in the second subset, and the pixels included in the second subset are arranged in a checkerboard pattern across the pixel array.

15. The pixel circuit of claim 9, wherein the first readout circuit comprises image readout circuitry, and wherein the second readout circuitry comprises event detection circuitry.

16. The pixel circuit of claim 9, wherein the first subset includes 50% of the pixels included in the pixel array, and wherein the second subset includes 50% of the pixels included in the pixel array.

17. An imaging system comprising: A pixel circuit comprising a pixel array including a plurality of pixels arranged in rows and columns and a color filter array disposed over the pixel array, wherein the color filter array comprises a plurality of color filters each having one of a plurality of colors and disposed over one of the pixels, wherein each pixel comprises: at least one photodiode configured to photogenerate image charge in response to incident light; a floating diffusion region coupled to receive the image charge from the at least one photodiode; and at least one transfer transistor coupled between a corresponding one of the at least one photodiode and the floating diffusion region to transfer the image charge from the corresponding one of the at least one photodiode to the floating diffusion region; a first readout circuit coupled to each of the plurality of pixels to read out a first set of data signals; a second readout circuit, wherein the plurality of pixels includes a first subset of the pixels not coupled to the second readout circuit and a second subset of the pixels coupled to the second readout circuit, wherein the second readout circuit is coupled to each of the pixels included in the second subset to read out a second set of data signals; and a mode switch circuit configured to selectively couple individual ones of the pixels included in the second subset to the first readout circuit or the second readout circuit based on an operating mode of the individual ones of the pixels included in the second subset, Wherein in each NxN pixel grouping, each row of pixels includes at least one pixel included in the first subset of the pixels and disposed under at least one of the color filters, where N is an integer.

18. The imaging system of claim 17, wherein in each NxN pixel grouping, each row of pixels includes at least one pixel included in the second subset of pixels.

19. The imaging system of claim 17, wherein in each NxN pixel grouping, each column of pixels includes at least one pixel included in the first subset of the pixels and disposed under at least one of the color filters.

20. The imaging system of claim 17, wherein in each NxN pixel grouping, each column of pixels includes at least one pixel included in the second subset of pixels.

21. The imaging system of claim 17, wherein the color filter array comprises a quad-Bayer filter array such that color filters of the same color are disposed over 2x2 pixel groups arranged in adjacent rows and columns, and wherein the pixels included in the second subset are arranged in a checkerboard pattern across the pixel array.

22. The imaging system of claim 17 , wherein the color filter array comprises a four-color filter array including red, green and blue filters and a clear filter array, the filters being arranged in a manner such that (i) red, green and blue filters of the same color are disposed over at least two pixels included in the first subset and are arranged diagonally in adjacent rows and columns, and (ii) a clear filter is disposed over pixels included in the second subset and the pixels included in the second subset are arranged in a checkerboard pattern across the pixel array.

23. The imaging system of claim 17, wherein the first readout circuit comprises image readout circuitry, and wherein the second readout circuitry comprises event detection circuitry.

24. The imaging system of claim 17, wherein the at least one photodiode comprises four photodiodes, wherein the at least one transfer transistor comprises four transfer transistors, wherein the four photodiodes for each pixel are disposed under a common microlens, and wherein the pixel circuit is configured to provide four phase detection information.

25. The imaging system of claim 17, wherein the at least one photodiode comprises two photodiodes, wherein the at least one transfer transistor comprises two transfer transistors, wherein the two photodiodes for each pixel are disposed under a common microlens, and wherein the pixel circuit is configured to provide dual phase detection information.

Images