Signal processing system based on diamond color center quantum sensor

Abstract

The invention discloses a signal processing system based on a diamond color center quantum sensor, and the system comprises an NV diamond color center sensor which is used for obtaining a partial discharge signal and transmitting the partial discharge signal to a data collection module of an FPGA control module; the data acquisition module is used for transmitting the partial discharge signals to a multi-frequency synchronization module, so that the multi-frequency synchronization module generates a plurality of reference signals according to the partial discharge signals, phase locking is carried out on the partial discharge signals through the reference signals, and the partial discharge signals after frequency point synchronization are obtained; the partial discharge signal after frequency point synchronization is transmitted to the data processing unit; and the data processing unit is used for storing the partial discharge signal after the frequency point synchronization to the data storage unit and outputting the partial discharge signal after the frequency point synchronization. According to the invention, clock synchronization of multiple frequency points in the partial discharge signal can be realized.

Description

Technical Field

[0001] The present invention relates to the field of quantum sensing technology, and particularly to a signal system based on a diamond color center quantum sensor. Background Art

[0002] As a new type of sensing technology, quantum sensors have been widely used in fields such as physical measurement, medical diagnosis, and environmental monitoring in recent years. In particular, quantum sensors based on diamond color centers (such as nitrogen-vacancy color centers, NV centers), among which, NV diamond color center quantum sensors can provide high-precision measurement results by detecting weak electromagnetic signals. At present, the integration and efficiency of diamond color center quantum sensor systems still face many challenges, especially in signal processing and transmission. Existing diamond color center quantum sensing systems usually rely on traditional hardware signal processing units, such as microcontrollers, digital signal processors (DSPs), and field programmable gate arrays (FPGAs). During the partial discharge signal detection process of diamond color center quantum sensors, it is usually necessary to perform phase-locked detection on multiple frequency points, which requires the system to accurately synchronize signals of different frequencies. However, existing methods have not achieved signal synchronization at multiple frequency points. Summary of the Invention

[0003] An embodiment of the present invention provides a signal processing system based on a diamond color center quantum sensor, which can achieve clock synchronization of multiple frequency points in partial discharge signals, so that the output partial discharge signals after frequency point synchronization have higher availability and accuracy.

[0004] An embodiment of the present invention provides a signal processing system based on a diamond color center quantum sensor, including: an NV diamond color center sensor and an FPGA control module; wherein, the FPGA control module includes: a data acquisition module, a multi-frequency synchronization module, a data processing unit, and a data storage unit;

[0005] The NV diamond color center sensor is configured to acquire a partial discharge signal and transmit the partial discharge signal to the data acquisition module of the FPGA control module;

[0006] The data acquisition module is configured to transmit the partial discharge signal to the multi-frequency synchronization module, so that the multi-frequency synchronization module generates a plurality of reference signals according to the partial discharge signal, phase-lock the partial discharge signal with each reference signal to obtain a partial discharge signal after frequency point synchronization, and transmit the partial discharge signal after frequency point synchronization to the data processing unit;

[0007] The data processing unit is configured to store the partial discharge signal after frequency point synchronization in the data storage unit and output the partial discharge signal after frequency point synchronization.

[0008] Furthermore, the FPGA control module further includes: a noise suppression and filtering module;

[0009] The data acquisition module is further configured to: when receiving the partial discharge signal, transmit the partial discharge signal to the noise suppression and filtering module, so that the noise suppression and filtering module performs denoising, filtering, and gain adjustment on the partial discharge signal in sequence to obtain an optimized partial discharge signal, and transmit the optimized partial discharge signal to the data acquisition module;

[0010] The data acquisition module is configured to transmit the partial discharge signal to the multi-frequency synchronization module, including:

[0011] The data acquisition module is configured to transmit the optimized partial discharge signal to the multi-frequency synchronization module.

[0012] Furthermore, the FPGA control module further includes: a high-speed acquisition module;

[0013] The data acquisition module is configured to transmit the optimized partial discharge signal to the multi-frequency synchronization module, including:

[0014] The data acquisition module is configured to transmit the optimized partial discharge signal to the high-speed acquisition module, so that the high-speed acquisition module converts the optimized partial discharge signal into a digital signal, transmits the digital signal to the data acquisition module, and enables the data acquisition module to transmit the digital signal to the multi-frequency synchronization module.

[0015] Furthermore, the FPGA control module further includes: a circuit conditioning module;

[0016] The high-speed acquisition module converts the optimized partial discharge signal into a digital signal and transmits the digital signal to the data acquisition module, including:

[0017] Converting the optimized partial discharge signal into a digital signal and transmitting the digital signal to the circuit conditioning module;

[0018] So that the circuit conditioning module compares the digital signal with a preset reference value and determines the error signal of the digital signal; eliminates the error signal of the digital signal through a proportional control algorithm and an integral control algorithm to obtain a digital signal with the error signal eliminated, and transmits the digital signal with the error signal eliminated to the high-speed acquisition module;

[0019] Enabling the high-speed acquisition module to transmit the digital signal with the error signal eliminated to the data acquisition module.

[0020] Further, the data storage unit includes a first memory connection port, a second memory connection port, a first memory, and a second memory;

[0021] The first memory connection port is connected to the first memory through a first communication line, and the second memory connection port is connected to the second memory through a second communication line.

[0022] Further, storing the partial discharge signal after frequency point synchronization into the data storage unit includes:

[0023] Storing the data belonging to the high 16 bits of the partial discharge signal after frequency point synchronization into the first memory, and storing the data belonging to the low 16 bits of the partial discharge signal after frequency point synchronization into the second memory.

[0024] Further, both the first memory and the second memory are third-generation double data rate synchronous dynamic random access memories.

[0025] Further, the multi-frequency synchronization module includes a plurality of signal processing channels;

[0026] Generating a plurality of reference signals according to the partial discharge signal, and performing phase locking on the partial discharge signal with each reference signal to obtain the partial discharge signal after frequency point synchronization, includes:

[0027] Generating a plurality of reference signals according to the frequency points included in the partial discharge signal; wherein, the number of generated reference signals is the same as the number of frequency points included in the partial discharge signal;

[0028] Inputting each reference signal and each frequency point of the partial discharge signal corresponding to each reference signal into each signal processing channel respectively, so that each reference signal performs phase locking on each frequency point of the partial discharge signal one by one to obtain the partial discharge signal after frequency point synchronization; wherein, the phase locking processing in each signal processing channel is executed in parallel.

[0029] Further, the reference signal is a harmonic frequency signal.

[0030] Further, the reference signal is a fundamental frequency signal.

[0031] By implementing the present invention, the following beneficial effects are achieved:

[0032] The present invention provides a signal processing system based on a diamond color center quantum sensor, which system includes an NV diamond color center sensor and an FPGA control module; wherein, the FPGA control module includes: a data acquisition module, a multi-frequency synchronization module, a data processing unit, and a data storage unit. After obtaining a partial discharge signal through the NV diamond color center sensor, it is transmitted to the data acquisition module, and the data acquisition module then transmits the partial discharge signal to the multi-frequency synchronization module. The multi-frequency synchronization module generates a plurality of reference signals according to the partial discharge signal, and phase-locks the partial discharge signal with each reference signal to obtain a partial discharge signal with synchronized frequency points, thereby realizing clock synchronization of multiple frequency points in the partial discharge signal and making the output partial discharge signal with synchronized frequency points have higher availability and accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 FIG. 1 is a schematic diagram of a first structure of a signal processing system based on a diamond color center quantum sensor provided by an embodiment of the present invention.

[0034] Figure 2 FIG. 2 is a schematic diagram of a second structure of a signal processing system based on a diamond color center quantum sensor provided by an embodiment of the present invention.

[0035] Figure 3 FIG. 3 is a schematic diagram of PI control processing provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0036] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0037] To make the objectives, technical solutions, and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are a part of the embodiments of the present application, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs; the terms used herein are for the purpose of describing specific embodiments only and are not intended to limit this application; the terms "comprising" and "having" and any variations thereof in the specification and claims of this application and the above drawings are intended to cover non-exclusive inclusion.

[0039] In the description of the embodiments of this application, technical terms such as "first" and "second" are only used to distinguish different objects and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity, specific order or primary-secondary relationship of the indicated technical features. In the description of the embodiments of this application, the meaning of "a plurality of" is more than two, unless otherwise specifically defined.

[0040] Referring to "embodiments" herein means that the specific features, structures or characteristics described in connection with the embodiments can be included in at least one embodiment of this application. The phrase appearing in various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0041] In the description of the embodiments of this application, the term "and / or" is merely a description of the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0042] In the description of the embodiments of this application, the term "a plurality of" refers to more than two (including two). Similarly, "a plurality of groups" refers to more than two groups (including two groups), and "a plurality of pieces" refers to more than two pieces (including two pieces).

[0043] In the description of the embodiments of this application, unless otherwise clearly specified and limited, technical terms such as "install", "connect", "connection", "fix" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can also be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of this application can be understood according to specific situations.

[0044] It should be noted in advance that diamond color center quantum sensing systems usually rely on traditional hardware signal processing units, such as microcontrollers, digital signal processors (DSPs), and field programmable gate arrays (FPGAs).

[0045] Microcontrollers (MCUs) are usually used for simple system control and management tasks, such as data acquisition control, display, communication interfaces, etc. However, the computing power and processing speed of microcontrollers are relatively low, so they are usually used for signal processing tasks with lower precision and lower frequencies. In diamond color center quantum sensing systems, MCUs may be used for low-speed data acquisition and simple feedback control, but they are not suitable for high-speed signal acquisition and processing.

[0046] Digital signal processors (DSPs) are usually used to process high-frequency and high-speed signals and are suitable for processing complex signal processing tasks, such as filtering, Fourier transform, and signal demodulation, etc. DSPs may be used for signal acquisition and processing in some quantum sensing systems, especially in situations involving high-speed sampling and requiring strong computing power. However, the processing power of DSPs is still limited compared to FPGAs, especially in parallel processing and efficient data stream transmission.

[0047] Field programmable gate arrays (FPGAs) are the most commonly used hardware platforms in many high-performance quantum sensing systems currently, especially in applications that require high-speed signal acquisition, parallel data processing, and real-time feedback control. FPGAs have high programmability and parallel processing capabilities, can process multiple signal channels simultaneously, execute complex signal processing tasks, and have extremely low latency.

[0048] The following is about the present invention

[0049] As Figure 1 and Figure 2 shown, a signal processing system based on a diamond color center quantum sensor provided by an embodiment of the present invention includes: an NV diamond color center sensor and an FPGA control module; wherein, the FPGA control module includes: a data acquisition module, a multi-frequency synchronization module, a data processing unit, and a data storage unit;

[0050] The NV diamond color center sensor is used to acquire partial discharge signals and transmit the partial discharge signals to the data acquisition module of the FPGA control module;

[0051] The data acquisition module is used to transmit the partial discharge signals to the multi-frequency synchronization module, so that the multi-frequency synchronization module generates several reference signals according to the partial discharge signals, phase-lock the partial discharge signals with each reference signal to obtain the partial discharge signals synchronized at frequency points, and transmit the partial discharge signals synchronized at frequency points to the data processing unit;

[0052] The data processing unit is configured to store the partial discharge signal after frequency point synchronization into the data storage unit and output the partial discharge signal after frequency point synchronization.

[0053] Specifically, the NV diamond color center sensor is mainly responsible for detecting the weak signal generated by partial discharge (i.e., the above partial discharge signal), and transmitting the partial discharge signal to the data acquisition module of the FPGA control module. Among them, the FPAG control module integrates a multi-interface control level output module, a data acquisition module, a data storage unit, a multi-frequency synchronization module, a noise suppression and filtering module, a circuit conditioning module, a high-speed acquisition module, a lock-in amplification module, and a data processing unit, which is the core module for partial discharge signal processing. The data acquisition module therein can transmit the partial discharge signal to the multi-frequency synchronization module after receiving the partial discharge signal. After receiving the partial discharge signal, the multi-frequency control module will generate multiple reference signals based on the partial discharge signal. The partial discharge signal can be phase-locked through the generated multiple reference signals, and at the same time, multiple frequency points in the partial discharge signal can achieve clock synchronization during the phase-locking process, thereby obtaining the partial discharge signal after frequency point synchronization. The partial discharge signal after frequency point synchronization is transmitted to the data processing unit (ARM processing unit). The data processing unit stores the partial discharge signal after frequency point synchronization into the data storage unit and outputs the partial discharge signal after frequency point synchronization to an external signal analysis system, so that the external signal analysis system performs data analysis, protocol packet assembly, etc. based on the partial discharge signal after frequency point synchronization.

[0054] In a preferred embodiment, the data acquisition module is further configured to: when receiving the partial discharge signal, transmit the partial discharge signal to the noise suppression and filtering module, so that the noise suppression and filtering module sequentially performs denoising, filtering, and gain adjustment on the partial discharge signal to obtain the partial discharge signal with optimized signal, and transmit the partial discharge signal with optimized signal to the data acquisition module; the data acquisition module is configured to transmit the partial discharge signal to the multi-frequency synchronization module, including: the data acquisition module is configured to transmit the partial discharge signal with optimized signal to the multi-frequency synchronization module.

[0055] Specifically, when the data acquisition module receives a partial discharge signal, in addition to directly transmitting the partial discharge signal to the multi-frequency synchronization module for processing, it can also transmit the partial discharge signal to the noise suppression and filtering module before transmitting it to the multi-frequency synchronization module. In the noise suppression and filtering module, there are noise reduction strategies, filtering strategies, and signal gain adjustment strategies. After transmitting the partial discharge signal to the noise suppression and filtering module, the noise reduction strategies, filtering strategies, and signal gain adjustment strategies in the noise suppression and filtering module will perform noise reduction, filtering, and gain adjustment processing on the partial discharge signal in sequence, so as to optimize the signal quality of the partial discharge signal, obtain the partial discharge signal after signal optimization, and transmit the partial discharge signal after signal optimization back to the data acquisition module. At this time, the partial discharge signal in the data acquisition module is the partial discharge signal after signal optimization, and then the partial discharge signal after signal optimization is transmitted to the multi-frequency synchronization module.

[0056] In a preferred embodiment, the data acquisition module for transmitting the partial discharge signal after signal optimization to the multi-frequency synchronization module includes: the data acquisition module for transmitting the partial discharge signal after signal optimization to the high-speed acquisition module, so that the high-speed acquisition module converts the partial discharge signal after signal optimization into a digital signal, transmits the digital signal to the data acquisition module, and enables the data acquisition module to transmit the digital signal to the multi-frequency synchronization module.

[0057] Specifically, after transmitting the partial discharge signal after signal optimization to the high-speed acquisition module, the high-speed acquisition module converts the partial discharge signal after signal optimization into a digital signal, and then transmits the digital signal back to the data acquisition module.

[0058] In a preferred embodiment, the high-speed acquisition module converts the partial discharge signal after signal optimization into a digital signal and transmits the digital signal to the data acquisition module, including: converting the partial discharge signal after signal optimization into a digital signal and transmitting the digital signal to the circuit conditioning module; enabling the circuit conditioning module to compare the digital signal with a preset reference value and determine the error signal of the digital signal; eliminating the error signal of the digital signal through a proportional control algorithm and an integral control algorithm to obtain a digital signal after error signal elimination, and transmitting the digital signal after error signal elimination to the high-speed acquisition module; enabling the high-speed acquisition module to transmit the digital signal after error signal elimination to the data acquisition module.

[0059] Specifically, as Figure 3As shown, after the high-speed signal acquisition module obtains the digital signal, it transmits the digital signal to the circuit conditioning module, and then uses the digital signal as the signal input of the circuit conditioning module. In the circuit conditioning module, the error signal elimination and the error accumulation signal elimination are mainly achieved through PI control adaptation (i.e., the above proportional control algorithm and integral control algorithm, where P control refers to the proportional control algorithm and I control refers to the integral control algorithm). The principle of the proportional control algorithm is to directly adjust the control quantity according to the magnitude of the error signal. When the error signal increases, the control quantity also increases accordingly to quickly respond to the error change. Therefore, when comparing the input signal with a preset reference value, such as the "zero point" of the demodulation curve, if there is an error, the error is used as the error signal, and the error signal is eliminated through the proportional control algorithm. However, the proportional control has the characteristics of fast response speed and timely adjustment, but it may not be able to completely eliminate the steady-state error. Therefore, the integral control algorithm is needed to eliminate the steady-state error. The principle of the integral control algorithm is to accumulate the error signal and adjust the control quantity according to the accumulation result. The accumulation process can continue until the error signal decreases to zero or approaches zero, thereby eliminating the steady-state error. The digital signal processed by the proportional control algorithm and the integral control algorithm is transmitted to the high-speed acquisition module, so that the high-speed acquisition module transmits the digital signal after the error signal is eliminated to the data acquisition module.

[0060] The closed-loop control of the circuit conditioning module has the following advantages: 1. The closed-loop control system can suppress the influence of environmental noise by performing real-time feedback and adjustment on the measurement signal, which helps to reduce the system error; 2. The closed-loop system can monitor the magnetic field in real time to maintain the stability of the microwave frequency. This is crucial for indicators such as the magnetic sensitivity of the diamond NV magnetic sensor, ensuring the accuracy and reliability of the magnetic field measurement results; 3. The closed-loop control system can precisely control the magnetic field source according to the pre-determined calibration curve, thereby improving the linearity of the system. This helps to eliminate the non-linear error and achieve more accurate magnetic field measurement; 4. The closed-loop control system can reduce the system error by performing real-time feedback and correction on the measurement signal. This helps to eliminate the errors caused by factors such as temperature changes and magnetic field drift, and improve the accuracy of the measurement results.

[0061] In a preferred embodiment, the data storage unit includes a first memory connection port, a second memory connection port, a first memory, and a second memory; the first memory connection port is connected to the first memory through a first communication line, and the second memory connection port is connected to the second memory through a second communication line.

[0062] In a preferred embodiment, storing the partial discharge signal after frequency point synchronization into the data storage unit includes: storing the data belonging to the high 16 bits of the data in the partial discharge signal after frequency point synchronization into the first memory, and storing the data belonging to the low 16 bits of the data in the partial discharge signal after frequency point synchronization into the second memory.

[0063] In a preferred embodiment, both the first memory and the second memory are third-generation double data rate synchronous dynamic random access memories.

[0064] Specifically, the solution of the present invention uses the FPGA+ARM bus transmission to realize data transmission and storage. To meet the data caching requirements of FPGA parallel operations, two 4Gbit third-generation double data rate synchronous dynamic random access memories (DDR3) are set in the data storage unit. The connection port BANK34 of the first memory is connected to the first memory through the first communication line, and the first memory is only used to store the data belonging to the high 16 bits of the data. The connection port BANK35 of the second memory is connected to the second memory through the second communication line, and the second memory is only used to store the data belonging to the low 16 bits of the data. Among them, both the first communication line and the second communication line are address lines and control lines.

[0065] In a preferred embodiment, the multi-frequency synchronization module includes several signal processing channels; generating several reference signals according to the partial discharge signal and performing phase locking on the partial discharge signal with each reference signal to obtain the partial discharge signal after frequency point synchronization includes: generating several reference signals according to the frequency points included in the partial discharge signal; where the number of generated reference signals is the same as the number of frequency points included in the partial discharge signal; inputting each reference signal and each frequency point of the partial discharge signal corresponding to each reference signal into each signal processing channel respectively, so that each reference signal performs phase locking on each frequency point of the partial discharge signal one by one to obtain the partial discharge signal after frequency point synchronization; where the phase locking processing in each signal processing channel is executed in parallel.

[0066] Specifically, the multi-frequency synchronization module mainly involves technologies such as direct digital synthesis (DDS), phase-locked loop (PLL), parallel computing and clock synchronization, dynamic regulation and feedback control. Among them, DDS technology enables the multi-frequency synchronization module to accurately generate reference signals at multiple frequency points, and through digital control of frequency synthesis, DDS technology can accurately and flexibly output signals. In the multi-frequency synchronization module, multiple DDS modules are arranged based on DDS technology, so that multiple DDS modules can generate different reference signals according to the number of frequency points of the partial discharge signal, and the number of generated reference signals is the same as the number of frequency points included in the partial discharge signal; each reference signal and each frequency point of the partial discharge signal corresponding to the reference signal are respectively input into each signal processing channel, so that each reference signal performs phase locking on each frequency point of the partial discharge signal one by one, and the partial discharge signal after frequency point synchronization is obtained. This method can ensure that the phase locking of multiple frequency points can be processed in parallel, thereby improving the accuracy and processing efficiency of clock synchronization.

[0067] The multi-frequency synchronization module is associated with multiple phase-locked amplification modules. PLL technology is used to maintain the synchronization of signals, and each PLL module controls the clock synchronization of different frequency points respectively. PLL technology can ensure that the phase between the output signal and the reference signal remains consistent, reduce the phase error, and thus improve the signal synchronization accuracy. Phase-locked control is performed on each frequency point of the partial discharge signal respectively to maintain the synchronization of each frequency. Through precise clock management and feedback control, it can ensure the consistency of signals at all frequency points and avoid phase-locking failure.

[0068] In addition, the multi-frequency synchronization module has the ability of real-time feedback control, and can dynamically adjust the frequencies of the DDS module and the PLL module according to the collected signals during the detection process, so as to maintain signal synchronization. If the frequency of the partial discharge signal changes, the multi-frequency synchronization module can automatically adjust the frequency of the output signal to ensure the synchronization and stability of the entire system.

[0069] In a preferred embodiment, the reference signal is a harmonic frequency signal.

[0070] In an alternative embodiment, the reference signal is a fundamental frequency signal.

[0071] Specifically, the above reference signal can be selected as a fundamental frequency signal or a harmonic frequency signal.

[0072] It should be noted that the system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. In addition, in the attached drawings of the system embodiments provided by the present invention, the connection relationship between modules indicates that they have a communication connection, which can be specifically implemented as one or more communication buses or signal lines. Those of ordinary skill in the art can understand and implement it without creative efforts.

[0073] Those skilled in the art can clearly understand that for the sake of convenience and simplicity, the specific working process of the system described above can refer to the corresponding process in the foregoing method embodiment, which will not be elaborated herein.

[0074] The terminal device can be a computing device such as a desktop computer, a notebook, a palm computer, and a cloud server. The terminal device may include, but is not limited to, a processor and a memory.

[0075] The so-called processor may be a central processing unit (CPU), or may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The processor is the control center of the terminal device, connecting various parts of the entire terminal device through various interfaces and lines.

[0076] The memory can be used to store the computer program. By running or executing the computer program stored in the memory and calling the data stored in the memory, the processor realizes various functions of the terminal device. The memory mainly includes a program storage area and a data storage area. Among them, the program storage area can store an operating system, application programs required for at least one function, etc.; the data storage area can store data created according to the use of the mobile phone, etc. In addition, the memory can include high-speed random access memory, and can also include non-volatile memory, such as a hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage devices.

[0077] The storage medium is a computer-readable storage medium, and the computer program is stored in the computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-mentioned various method embodiments can be realized. Among them, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disc, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc.

[0078] The above is the preferred implementation manner of the present invention. It should be noted that for those of ordinary skill in the art of this technology, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements are also regarded as the protection scope of the present invention.

Claims

1. A signal processing system based on a diamond color center quantum sensor, characterized in that: include: NV diamond color center sensor and FPGA control module; wherein the FPGA control module includes: a data acquisition module, a multi-frequency synchronization module, a data processing unit and a data storage unit; The NV diamond color center sensor is used to obtain a partial discharge signal and transmit the partial discharge signal to a data acquisition module of the FPGA control module; The data acquisition module is used to transmit the partial discharge signal to the multi-frequency synchronization module, so that the multi-frequency synchronization module generates a plurality of reference signals according to the partial discharge signal, phase-locks the partial discharge signal with each reference signal, obtains the partial discharge signal after frequency point synchronization, and transmits the partial discharge signal after frequency point synchronization to the data processing unit; The data processing unit is used to store the partial discharge signal after the frequency point synchronization into the data storage unit and output the partial discharge signal after the frequency point synchronization.

2. A signal processing system based on a diamond color center quantum sensor as claimed in claim 1, characterized in that: The FPGA control module also includes: a noise suppression and filtering module; The data acquisition module is further used to: upon receiving the partial discharge signal, transmit the partial discharge signal to the noise suppression and filtering module, so that the noise suppression and filtering module sequentially performs denoising, filtering and gain adjustment on the partial discharge signal to obtain a partial discharge signal after signal optimization, and transmit the partial discharge signal after signal optimization to the data acquisition module; The data acquisition module is used to transmit the partial discharge signal to the multi-frequency synchronization module, including: The data acquisition module is used to transmit the local discharge signal after signal optimization to the multi-frequency synchronization module.

3. A signal processing system based on a diamond color center quantum sensor as claimed in claim 2, characterized in that: The FPGA control module also includes: a high-speed acquisition module; The data acquisition module is used to transmit the signal-optimized partial discharge signal to the multi-frequency synchronization module, including: The data acquisition module is used to transmit the signal-optimized partial discharge signal to the high-speed acquisition module, so that the high-speed acquisition module converts the signal-optimized partial discharge signal into a digital signal, transmits the digital signal to the data acquisition module, and the data acquisition module transmits the digital signal to the multi-frequency synchronization module.

4. A signal processing system based on a diamond color center quantum sensor as claimed in claim 3, characterized in that: The FPGA control module also includes: a circuit conditioning module; The high-speed acquisition module converts the signal-optimized partial discharge signal into a digital signal, and transmits the digital signal to the data acquisition module, including: Converting the signal-optimized partial discharge signal into a digital signal, and transmitting the digital signal to a circuit conditioning module; The circuit conditioning module compares the digital signal with a preset reference value and determines an error signal of the digital signal; eliminates the error signal of the digital signal through a proportional control algorithm and an integral control algorithm to obtain a digital signal after the error signal is eliminated, and transmits the digital signal after the error signal is eliminated to the high-speed acquisition module; The high-speed acquisition module transmits the digital signal after the error signal is eliminated to the data acquisition module.

5. A signal processing system based on a diamond color center quantum sensor as claimed in claim 4, characterized in that: The data storage unit includes a first memory connection port, a second memory connection port, a first memory and a second memory; The first memory connection port is connected to the first memory via a first communication line, and the second memory connection port is connected to the second memory via a second communication line.

6. A signal processing system based on a diamond color center quantum sensor as claimed in claim 5, characterized in that: The storing of the partial discharge signal after frequency point synchronization into the data storage unit comprises: The data of the upper 16 bits of the partial discharge signal after the frequency point synchronization is stored in the first memory, and the data of the lower 16 bits of the partial discharge signal after the frequency point synchronization is stored in the second memory.

7. A signal processing system based on a diamond color center quantum sensor as claimed in claim 6, characterized in that: The first memory and the second memory are both third generation double rate synchronous dynamic random access memory.

8. A signal processing system based on a diamond color center quantum sensor as claimed in claim 7, characterized in that: The multi-frequency synchronization module includes several signal processing channels; The generating of a plurality of reference signals according to the partial discharge signal, and phase-locking the partial discharge signal with each reference signal to obtain a partial discharge signal after frequency point synchronization includes: Generating a plurality of reference signals according to the frequency points included in the partial discharge signal; wherein the number of the generated reference signals is consistent with the number of the frequency points included in the partial discharge signal; Each reference signal and each frequency point of the local discharge signal corresponding to each reference signal are input into each signal processing channel respectively, so that each reference signal is phase-locked to each frequency point of the local discharge signal one by one, and a local discharge signal with synchronized frequency points is obtained; wherein, the phase-locking process of each signal processing channel is executed in parallel.

9. A signal processing system based on a diamond color center quantum sensor as claimed in claim 1, characterized in that: The reference signal is a harmonic frequency signal.

10. A signal processing system based on a diamond color center quantum sensor as claimed in claim 1, characterized in that: The reference signal is a fundamental frequency signal.

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